[net-next-2.6.git] / drivers / gpu / drm / nouveau / nouveau_drv.c

/*
 * Copyright 2005 Stephane Marchesin.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include <linux/console.h>

#include "drmP.h"
#include "drm.h"
#include "drm_crtc_helper.h"
#include "nouveau_drv.h"
#include "nouveau_hw.h"
#include "nouveau_fb.h"
#include "nouveau_fbcon.h"
#include "nv50_display.h"

#include "drm_pciids.h"

MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
int nouveau_ctxfw = 0;
module_param_named(ctxfw, nouveau_ctxfw, int, 0400);

MODULE_PARM_DESC(noagp, "Disable AGP");
int nouveau_noagp;
module_param_named(noagp, nouveau_noagp, int, 0400);

MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
static int nouveau_modeset = -1; /* kms */
module_param_named(modeset, nouveau_modeset, int, 0400);

MODULE_PARM_DESC(vbios, "Override default VBIOS location");
char *nouveau_vbios;
module_param_named(vbios, nouveau_vbios, charp, 0400);

MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
int nouveau_vram_pushbuf;
module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);

MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
int nouveau_vram_notify = 1;
module_param_named(vram_notify, nouveau_vram_notify, int, 0400);

MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
int nouveau_duallink = 1;
module_param_named(duallink, nouveau_duallink, int, 0400);

MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
int nouveau_uscript_lvds = -1;
module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);

MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
int nouveau_uscript_tmds = -1;
module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);

MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
int nouveau_ignorelid = 0;
module_param_named(ignorelid, nouveau_ignorelid, int, 0400);

MODULE_PARM_DESC(noagp, "Disable all acceleration");
int nouveau_noaccel = 0;
module_param_named(noaccel, nouveau_noaccel, int, 0400);

MODULE_PARM_DESC(noagp, "Disable fbcon acceleration");
int nouveau_nofbaccel = 0;
module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);

MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
		 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
		 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
		 "\t\tDefault: PAL\n"
		 "\t\t*NOTE* Ignored for cards with external TV encoders.");
char *nouveau_tv_norm;
module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);

MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
		"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
		"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
		"\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
int nouveau_reg_debug;
module_param_named(reg_debug, nouveau_reg_debug, int, 0600);

int nouveau_fbpercrtc;
#if 0
module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
#endif

static struct pci_device_id pciidlist[] = {
	{
		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
		.class = PCI_BASE_CLASS_DISPLAY << 16,
		.class_mask  = 0xff << 16,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
		.class = PCI_BASE_CLASS_DISPLAY << 16,
		.class_mask  = 0xff << 16,
	},
	{}
};

MODULE_DEVICE_TABLE(pci, pciidlist);

static struct drm_driver driver;

static int __devinit
nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	return drm_get_dev(pdev, ent, &driver);
}

static void
nouveau_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

static int
nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
	struct nouveau_channel *chan;
	struct drm_crtc *crtc;
	uint32_t fbdev_flags;
	int ret, i;

	if (!drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

	if (pm_state.event == PM_EVENT_PRETHAW)
		return 0;

	fbdev_flags = dev_priv->fbdev_info->flags;
	dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_unpin(nouveau_fb->nvbo);
	}

	NV_INFO(dev, "Evicting buffers...\n");
	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);

	NV_INFO(dev, "Idling channels...\n");
	for (i = 0; i < pfifo->channels; i++) {
		struct nouveau_fence *fence = NULL;

		chan = dev_priv->fifos[i];
		if (!chan || (dev_priv->card_type >= NV_50 &&
			      chan == dev_priv->fifos[0]))
			continue;

		ret = nouveau_fence_new(chan, &fence, true);
		if (ret == 0) {
			ret = nouveau_fence_wait(fence, NULL, false, false);
			nouveau_fence_unref((void *)&fence);
		}

		if (ret) {
			NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
				 chan->id);
		}
	}

	pgraph->fifo_access(dev, false);
	nouveau_wait_for_idle(dev);
	pfifo->reassign(dev, false);
	pfifo->disable(dev);
	pfifo->unload_context(dev);
	pgraph->unload_context(dev);

	NV_INFO(dev, "Suspending GPU objects...\n");
	ret = nouveau_gpuobj_suspend(dev);
	if (ret) {
		NV_ERROR(dev, "... failed: %d\n", ret);
		goto out_abort;
	}

	ret = pinstmem->suspend(dev);
	if (ret) {
		NV_ERROR(dev, "... failed: %d\n", ret);
		nouveau_gpuobj_suspend_cleanup(dev);
		goto out_abort;
	}

	NV_INFO(dev, "And we're gone!\n");
	pci_save_state(pdev);
	if (pm_state.event == PM_EVENT_SUSPEND) {
		pci_disable_device(pdev);
		pci_set_power_state(pdev, PCI_D3hot);
	}

	acquire_console_sem();
	fb_set_suspend(dev_priv->fbdev_info, 1);
	release_console_sem();
	dev_priv->fbdev_info->flags = fbdev_flags;
	return 0;

out_abort:
	NV_INFO(dev, "Re-enabling acceleration..\n");
	pfifo->enable(dev);
	pfifo->reassign(dev, true);
	pgraph->fifo_access(dev, true);
	return ret;
}

static int
nouveau_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_engine *engine = &dev_priv->engine;
	struct drm_crtc *crtc;
	uint32_t fbdev_flags;
	int ret, i;

	if (!drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

	fbdev_flags = dev_priv->fbdev_info->flags;
	dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;

	NV_INFO(dev, "We're back, enabling device...\n");
	pci_set_power_state(pdev, PCI_D0);
	pci_restore_state(pdev);
	if (pci_enable_device(pdev))
		return -1;
	pci_set_master(dev->pdev);

	NV_INFO(dev, "POSTing device...\n");
	ret = nouveau_run_vbios_init(dev);
	if (ret)
		return ret;

	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
		ret = nouveau_mem_init_agp(dev);
		if (ret) {
			NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
			return ret;
		}
	}

	NV_INFO(dev, "Reinitialising engines...\n");
	engine->instmem.resume(dev);
	engine->mc.init(dev);
	engine->timer.init(dev);
	engine->fb.init(dev);
	engine->graph.init(dev);
	engine->fifo.init(dev);

	NV_INFO(dev, "Restoring GPU objects...\n");
	nouveau_gpuobj_resume(dev);

	nouveau_irq_postinstall(dev);

	/* Re-write SKIPS, they'll have been lost over the suspend */
	if (nouveau_vram_pushbuf) {
		struct nouveau_channel *chan;
		int j;

		for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
			chan = dev_priv->fifos[i];
			if (!chan || !chan->pushbuf_bo)
				continue;

			for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
				nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
		}
	}

	NV_INFO(dev, "Restoring mode...\n");
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	}

	if (dev_priv->card_type < NV_50) {
		nv04_display_restore(dev);
		NVLockVgaCrtcs(dev, false);
	} else
		nv50_display_init(dev);

	/* Force CLUT to get re-loaded during modeset */
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		nv_crtc->lut.depth = 0;
	}

	acquire_console_sem();
	fb_set_suspend(dev_priv->fbdev_info, 0);
	release_console_sem();

	nouveau_fbcon_zfill(dev);

	drm_helper_resume_force_mode(dev);
	dev_priv->fbdev_info->flags = fbdev_flags;
	return 0;
}

static struct drm_driver driver = {
	.driver_features =
		DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
		DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
	.load = nouveau_load,
	.firstopen = nouveau_firstopen,
	.lastclose = nouveau_lastclose,
	.unload = nouveau_unload,
	.preclose = nouveau_preclose,
#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
	.debugfs_init = nouveau_debugfs_init,
	.debugfs_cleanup = nouveau_debugfs_takedown,
#endif
	.irq_preinstall = nouveau_irq_preinstall,
	.irq_postinstall = nouveau_irq_postinstall,
	.irq_uninstall = nouveau_irq_uninstall,
	.irq_handler = nouveau_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.get_map_ofs = drm_core_get_map_ofs,
	.get_reg_ofs = drm_core_get_reg_ofs,
	.ioctls = nouveau_ioctls,
	.fops = {
		.owner = THIS_MODULE,
		.open = drm_open,
		.release = drm_release,
		.unlocked_ioctl = drm_ioctl,
		.mmap = nouveau_ttm_mmap,
		.poll = drm_poll,
		.fasync = drm_fasync,
#if defined(CONFIG_COMPAT)
		.compat_ioctl = nouveau_compat_ioctl,
#endif
	},
	.pci_driver = {
		.name = DRIVER_NAME,
		.id_table = pciidlist,
		.probe = nouveau_pci_probe,
		.remove = nouveau_pci_remove,
		.suspend = nouveau_pci_suspend,
		.resume = nouveau_pci_resume
	},

	.gem_init_object = nouveau_gem_object_new,
	.gem_free_object = nouveau_gem_object_del,

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
#ifdef GIT_REVISION
	.date = GIT_REVISION,
#else
	.date = DRIVER_DATE,
#endif
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static int __init nouveau_init(void)
{
	driver.num_ioctls = nouveau_max_ioctl;

	if (nouveau_modeset == -1) {
#ifdef CONFIG_VGA_CONSOLE
		if (vgacon_text_force())
			nouveau_modeset = 0;
		else
#endif
			nouveau_modeset = 1;
	}

	if (nouveau_modeset == 1)
		driver.driver_features |= DRIVER_MODESET;

	return drm_init(&driver);
}

static void __exit nouveau_exit(void)
{
	drm_exit(&driver);
}

module_init(nouveau_init);
module_exit(nouveau_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright 2005 Stephane Marchesin.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*/
	24
	25	#include <linux/console.h>
	26
	27	#include "drmP.h"
	28	#include "drm.h"
	29	#include "drm_crtc_helper.h"
	30	#include "nouveau_drv.h"
	31	#include "nouveau_hw.h"
	32	#include "nouveau_fb.h"
	33	#include "nouveau_fbcon.h"
	34	#include "nv50_display.h"
	35
	36	#include "drm_pciids.h"
	37
054b93e4 BS	38	MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
	39	int nouveau_ctxfw = 0;
	40	module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
	41
6ee73861 BS	42	MODULE_PARM_DESC(noagp, "Disable AGP");
	43	int nouveau_noagp;
	44	module_param_named(noagp, nouveau_noagp, int, 0400);
	45
	46	MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
	47	static int nouveau_modeset = -1; /* kms */
	48	module_param_named(modeset, nouveau_modeset, int, 0400);
	49
	50	MODULE_PARM_DESC(vbios, "Override default VBIOS location");
	51	char *nouveau_vbios;
	52	module_param_named(vbios, nouveau_vbios, charp, 0400);
	53
	54	MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
	55	int nouveau_vram_pushbuf;
	56	module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
	57
	58	MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
f927b890	59	int nouveau_vram_notify = 1;
6ee73861 BS	60	module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
	61
	62	MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
	63	int nouveau_duallink = 1;
	64	module_param_named(duallink, nouveau_duallink, int, 0400);
	65
	66	MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
	67	int nouveau_uscript_lvds = -1;
	68	module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
	69
	70	MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
	71	int nouveau_uscript_tmds = -1;
	72	module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
	73
a1470890 BS	74	MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
	75	int nouveau_ignorelid = 0;
	76	module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
	77
a32ed69d MK	78	MODULE_PARM_DESC(noagp, "Disable all acceleration");
	79	int nouveau_noaccel = 0;
	80	module_param_named(noaccel, nouveau_noaccel, int, 0400);
	81
	82	MODULE_PARM_DESC(noagp, "Disable fbcon acceleration");
	83	int nouveau_nofbaccel = 0;
	84	module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
	85
6ee73861 BS	86	MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
	87	"\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
	88	"\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
	89	"\t\tDefault: PAL\n"
	90	"\t\tNOTE Ignored for cards with external TV encoders.");
	91	char *nouveau_tv_norm;
	92	module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
	93
	94	MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
	95	"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
	96	"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
	97	"\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
	98	int nouveau_reg_debug;
	99	module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
	100
	101	int nouveau_fbpercrtc;
	102	#if 0
	103	module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
	104	#endif
	105
	106	static struct pci_device_id pciidlist[] = {
	107	{
	108	PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
	109	.class = PCI_BASE_CLASS_DISPLAY << 16,
	110	.class_mask = 0xff << 16,
	111	},
	112	{
	113	PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
	114	.class = PCI_BASE_CLASS_DISPLAY << 16,
	115	.class_mask = 0xff << 16,
	116	},
	117	{}
	118	};
	119
	120	MODULE_DEVICE_TABLE(pci, pciidlist);
	121
	122	static struct drm_driver driver;
	123
	124	static int __devinit
	125	nouveau_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	126	{
	127	return drm_get_dev(pdev, ent, &driver);
	128	}
	129
	130	static void
	131	nouveau_pci_remove(struct pci_dev *pdev)
	132	{
	133	struct drm_device *dev = pci_get_drvdata(pdev);
	134
	135	drm_put_dev(dev);
	136	}
	137
	138	static int
	139	nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
	140	{
	141	struct drm_device *dev = pci_get_drvdata(pdev);
	142	struct drm_nouveau_private *dev_priv = dev->dev_private;
	143	struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
	144	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
	145	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
	146	struct nouveau_channel *chan;
	147	struct drm_crtc *crtc;
	148	uint32_t fbdev_flags;
	149	int ret, i;
150
151	if (!drm_core_check_feature(dev, DRIVER_MODESET))
152	return -ENODEV;
153
154	if (pm_state.event == PM_EVENT_PRETHAW)
155	return 0;
156
157	fbdev_flags = dev_priv->fbdev_info->flags;
158	dev_priv->fbdev_info->flags \|= FBINFO_HWACCEL_DISABLED;
159
160	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
161	struct nouveau_framebuffer *nouveau_fb;
162
163	nouveau_fb = nouveau_framebuffer(crtc->fb);
164	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
165	continue;
166
167	nouveau_bo_unpin(nouveau_fb->nvbo);
168	}
169
170	NV_INFO(dev, "Evicting buffers...\n");
171	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
172
173	NV_INFO(dev, "Idling channels...\n");
174	for (i = 0; i < pfifo->channels; i++) {
175	struct nouveau_fence *fence = NULL;
176
177	chan = dev_priv->fifos[i];
178	if (!chan \|\| (dev_priv->card_type >= NV_50 &&
179	chan == dev_priv->fifos[0]))
180	continue;
181
182	ret = nouveau_fence_new(chan, &fence, true);
183	if (ret == 0) {
184	ret = nouveau_fence_wait(fence, NULL, false, false);
185	nouveau_fence_unref((void *)&fence);
186	}
187
188	if (ret) {
189	NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
190	chan->id);
191	}
192	}
193
194	pgraph->fifo_access(dev, false);
195	nouveau_wait_for_idle(dev);
196	pfifo->reassign(dev, false);
197	pfifo->disable(dev);
198	pfifo->unload_context(dev);
199	pgraph->unload_context(dev);
200
201	NV_INFO(dev, "Suspending GPU objects...\n");
202	ret = nouveau_gpuobj_suspend(dev);
203	if (ret) {
204	NV_ERROR(dev, "... failed: %d\n", ret);
205	goto out_abort;
206	}
207
208	ret = pinstmem->suspend(dev);
209	if (ret) {
210	NV_ERROR(dev, "... failed: %d\n", ret);
211	nouveau_gpuobj_suspend_cleanup(dev);
212	goto out_abort;
213	}
214
215	NV_INFO(dev, "And we're gone!\n");
216	pci_save_state(pdev);
217	if (pm_state.event == PM_EVENT_SUSPEND) {
218	pci_disable_device(pdev);
219	pci_set_power_state(pdev, PCI_D3hot);
220	}
221
222	acquire_console_sem();
223	fb_set_suspend(dev_priv->fbdev_info, 1);
224	release_console_sem();
225	dev_priv->fbdev_info->flags = fbdev_flags;
226	return 0;
227
228	out_abort:
229	NV_INFO(dev, "Re-enabling acceleration..\n");
230	pfifo->enable(dev);
231	pfifo->reassign(dev, true);
232	pgraph->fifo_access(dev, true);
233	return ret;
234	}
235
236	static int
237	nouveau_pci_resume(struct pci_dev *pdev)
238	{
239	struct drm_device *dev = pci_get_drvdata(pdev);
240	struct drm_nouveau_private *dev_priv = dev->dev_private;
241	struct nouveau_engine *engine = &dev_priv->engine;
242	struct drm_crtc *crtc;
243	uint32_t fbdev_flags;
244	int ret, i;
245
246	if (!drm_core_check_feature(dev, DRIVER_MODESET))
247	return -ENODEV;
248
249	fbdev_flags = dev_priv->fbdev_info->flags;
250	dev_priv->fbdev_info->flags \|= FBINFO_HWACCEL_DISABLED;
251
252	NV_INFO(dev, "We're back, enabling device...\n");
253	pci_set_power_state(pdev, PCI_D0);
254	pci_restore_state(pdev);
255	if (pci_enable_device(pdev))
256	return -1;
257	pci_set_master(dev->pdev);
258
259	NV_INFO(dev, "POSTing device...\n");
260	ret = nouveau_run_vbios_init(dev);
261	if (ret)
262	return ret;
263
264	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
265	ret = nouveau_mem_init_agp(dev);
266	if (ret) {
267	NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
268	return ret;
269	}
270	}
271
272	NV_INFO(dev, "Reinitialising engines...\n");
273	engine->instmem.resume(dev);
274	engine->mc.init(dev);
275	engine->timer.init(dev);
276	engine->fb.init(dev);
277	engine->graph.init(dev);
278	engine->fifo.init(dev);
279
280	NV_INFO(dev, "Restoring GPU objects...\n");
281	nouveau_gpuobj_resume(dev);
282
283	nouveau_irq_postinstall(dev);
284
285	/* Re-write SKIPS, they'll have been lost over the suspend */
286	if (nouveau_vram_pushbuf) {
287	struct nouveau_channel *chan;
288	int j;
289
290	for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
291	chan = dev_priv->fifos[i];
3c8868d3	292	if (!chan \|\| !chan->pushbuf_bo)
6ee73861 BS	293	continue;
	294
	295	for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
	296	nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
	297	}
	298	}
	299
	300	NV_INFO(dev, "Restoring mode...\n");
	301	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	302	struct nouveau_framebuffer *nouveau_fb;
	303
	304	nouveau_fb = nouveau_framebuffer(crtc->fb);
	305	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
	306	continue;
	307
	308	nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	309	}
	310
	311	if (dev_priv->card_type < NV_50) {
	312	nv04_display_restore(dev);
	313	NVLockVgaCrtcs(dev, false);
	314	} else
	315	nv50_display_init(dev);
	316
	317	/* Force CLUT to get re-loaded during modeset */
	318	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	319	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	320
	321	nv_crtc->lut.depth = 0;
	322	}
	323
	324	acquire_console_sem();
	325	fb_set_suspend(dev_priv->fbdev_info, 0);
	326	release_console_sem();
	327
	328	nouveau_fbcon_zfill(dev);
	329
	330	drm_helper_resume_force_mode(dev);
	331	dev_priv->fbdev_info->flags = fbdev_flags;
	332	return 0;
	333	}
	334
	335	static struct drm_driver driver = {
	336	.driver_features =
	337	DRIVER_USE_AGP \| DRIVER_PCI_DMA \| DRIVER_SG \|
	338	DRIVER_HAVE_IRQ \| DRIVER_IRQ_SHARED \| DRIVER_GEM,
	339	.load = nouveau_load,
	340	.firstopen = nouveau_firstopen,
	341	.lastclose = nouveau_lastclose,
	342	.unload = nouveau_unload,
	343	.preclose = nouveau_preclose,
	344	#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
	345	.debugfs_init = nouveau_debugfs_init,
	346	.debugfs_cleanup = nouveau_debugfs_takedown,
	347	#endif
	348	.irq_preinstall = nouveau_irq_preinstall,
	349	.irq_postinstall = nouveau_irq_postinstall,
	350	.irq_uninstall = nouveau_irq_uninstall,
	351	.irq_handler = nouveau_irq_handler,
	352	.reclaim_buffers = drm_core_reclaim_buffers,
	353	.get_map_ofs = drm_core_get_map_ofs,
	354	.get_reg_ofs = drm_core_get_reg_ofs,
	355	.ioctls = nouveau_ioctls,
	356	.fops = {
357	.owner = THIS_MODULE,
358	.open = drm_open,
359	.release = drm_release,
ed8b6704	360	.unlocked_ioctl = drm_ioctl,
6ee73861 BS	361	.mmap = nouveau_ttm_mmap,
	362	.poll = drm_poll,
	363	.fasync = drm_fasync,
	364	#if defined(CONFIG_COMPAT)
	365	.compat_ioctl = nouveau_compat_ioctl,
	366	#endif
	367	},
	368	.pci_driver = {
	369	.name = DRIVER_NAME,
	370	.id_table = pciidlist,
	371	.probe = nouveau_pci_probe,
	372	.remove = nouveau_pci_remove,
	373	.suspend = nouveau_pci_suspend,
	374	.resume = nouveau_pci_resume
	375	},
	376
	377	.gem_init_object = nouveau_gem_object_new,
	378	.gem_free_object = nouveau_gem_object_del,
	379
	380	.name = DRIVER_NAME,
	381	.desc = DRIVER_DESC,
	382	#ifdef GIT_REVISION
	383	.date = GIT_REVISION,
	384	#else
	385	.date = DRIVER_DATE,
	386	#endif
	387	.major = DRIVER_MAJOR,
	388	.minor = DRIVER_MINOR,
	389	.patchlevel = DRIVER_PATCHLEVEL,
	390	};
	391
	392	static int __init nouveau_init(void)
	393	{
	394	driver.num_ioctls = nouveau_max_ioctl;
	395
	396	if (nouveau_modeset == -1) {
	397	#ifdef CONFIG_VGA_CONSOLE
	398	if (vgacon_text_force())
	399	nouveau_modeset = 0;
	400	else
	401	#endif
	402	nouveau_modeset = 1;
	403	}
	404
	405	if (nouveau_modeset == 1)
	406	driver.driver_features \|= DRIVER_MODESET;
	407
	408	return drm_init(&driver);
	409	}
	410
	411	static void __exit nouveau_exit(void)
	412	{
	413	drm_exit(&driver);
	414	}
	415
	416	module_init(nouveau_init);
	417	module_exit(nouveau_exit);
	418
	419	MODULE_AUTHOR(DRIVER_AUTHOR);
	420	MODULE_DESCRIPTION(DRIVER_DESC);
	421	MODULE_LICENSE("GPL and additional rights");