[net-next-2.6.git] / drivers / gpu / drm / nouveau / nouveau_bios.h

/*
 * Copyright 2007-2008 Nouveau Project
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

#ifndef __NOUVEAU_BIOS_H__
#define __NOUVEAU_BIOS_H__

#include "nvreg.h"
#include "nouveau_i2c.h"

#define DCB_MAX_NUM_ENTRIES 16
#define DCB_MAX_NUM_I2C_ENTRIES 16
#define DCB_MAX_NUM_GPIO_ENTRIES 32
#define DCB_MAX_NUM_CONNECTOR_ENTRIES 16

#define DCB_LOC_ON_CHIP 0

struct dcb_i2c_entry {
	uint8_t port_type;
	uint8_t read, write;
	struct nouveau_i2c_chan *chan;
};

enum dcb_gpio_tag {
	DCB_GPIO_TVDAC0 = 0xc,
	DCB_GPIO_TVDAC1 = 0x2d,
};

struct dcb_gpio_entry {
	enum dcb_gpio_tag tag;
	int line;
	bool invert;
	uint32_t entry;
	uint8_t state_default;
	uint8_t state[2];
};

struct dcb_gpio_table {
	int entries;
	struct dcb_gpio_entry entry[DCB_MAX_NUM_GPIO_ENTRIES];
};

enum dcb_connector_type {
	DCB_CONNECTOR_VGA = 0x00,
	DCB_CONNECTOR_TV_0 = 0x10,
	DCB_CONNECTOR_TV_1 = 0x11,
	DCB_CONNECTOR_TV_3 = 0x13,
	DCB_CONNECTOR_DVI_I = 0x30,
	DCB_CONNECTOR_DVI_D = 0x31,
	DCB_CONNECTOR_LVDS = 0x40,
	DCB_CONNECTOR_DP = 0x46,
	DCB_CONNECTOR_eDP = 0x47,
	DCB_CONNECTOR_HDMI_0 = 0x60,
	DCB_CONNECTOR_HDMI_1 = 0x61,
	DCB_CONNECTOR_NONE = 0xff
};

struct dcb_connector_table_entry {
	uint8_t index;
	uint32_t entry;
	enum dcb_connector_type type;
	uint8_t index2;
	uint8_t gpio_tag;
};

struct dcb_connector_table {
	int entries;
	struct dcb_connector_table_entry entry[DCB_MAX_NUM_CONNECTOR_ENTRIES];
};

enum dcb_type {
	OUTPUT_ANALOG = 0,
	OUTPUT_TV = 1,
	OUTPUT_TMDS = 2,
	OUTPUT_LVDS = 3,
	OUTPUT_DP = 6,
	OUTPUT_ANY = -1
};

struct dcb_entry {
	int index;	/* may not be raw dcb index if merging has happened */
	enum dcb_type type;
	uint8_t i2c_index;
	uint8_t heads;
	uint8_t connector;
	uint8_t bus;
	uint8_t location;
	uint8_t or;
	bool duallink_possible;
	union {
		struct sor_conf {
			int link;
		} sorconf;
		struct {
			int maxfreq;
		} crtconf;
		struct {
			struct sor_conf sor;
			bool use_straps_for_mode;
			bool use_power_scripts;
		} lvdsconf;
		struct {
			bool has_component_output;
		} tvconf;
		struct {
			struct sor_conf sor;
			int link_nr;
			int link_bw;
		} dpconf;
		struct {
			struct sor_conf sor;
		} tmdsconf;
	};
	bool i2c_upper_default;
};

struct dcb_table {
	uint8_t version;

	int entries;
	struct dcb_entry entry[DCB_MAX_NUM_ENTRIES];

	uint8_t *i2c_table;
	uint8_t i2c_default_indices;
	struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES];

	uint16_t gpio_table_ptr;
	struct dcb_gpio_table gpio;
	uint16_t connector_table_ptr;
	struct dcb_connector_table connector;
};

enum nouveau_or {
	OUTPUT_A = (1 << 0),
	OUTPUT_B = (1 << 1),
	OUTPUT_C = (1 << 2)
};

enum LVDS_script {
	/* Order *does* matter here */
	LVDS_INIT = 1,
	LVDS_RESET,
	LVDS_BACKLIGHT_ON,
	LVDS_BACKLIGHT_OFF,
	LVDS_PANEL_ON,
	LVDS_PANEL_OFF
};

/* changing these requires matching changes to reg tables in nv_get_clock */
#define MAX_PLL_TYPES	4
enum pll_types {
	NVPLL,
	MPLL,
	VPLL1,
	VPLL2
};

struct pll_lims {
	struct {
		int minfreq;
		int maxfreq;
		int min_inputfreq;
		int max_inputfreq;

		uint8_t min_m;
		uint8_t max_m;
		uint8_t min_n;
		uint8_t max_n;
	} vco1, vco2;

	uint8_t max_log2p;
	/*
	 * for most pre nv50 cards setting a log2P of 7 (the common max_log2p
	 * value) is no different to 6 (at least for vplls) so allowing the MNP
	 * calc to use 7 causes the generated clock to be out by a factor of 2.
	 * however, max_log2p cannot be fixed-up during parsing as the
	 * unmodified max_log2p value is still needed for setting mplls, hence
	 * an additional max_usable_log2p member
	 */
	uint8_t max_usable_log2p;
	uint8_t log2p_bias;

	uint8_t min_p;
	uint8_t max_p;

	int refclk;
};

struct nvbios {
	struct drm_device *dev;

	uint8_t chip_version;

	uint32_t dactestval;
	uint32_t tvdactestval;
	uint8_t digital_min_front_porch;
	bool fp_no_ddc;

	struct mutex lock;

	uint8_t data[NV_PROM_SIZE];
	unsigned int length;
	bool execute;

	uint8_t major_version;
	uint8_t feature_byte;
	bool is_mobile;

	uint32_t fmaxvco, fminvco;

	bool old_style_init;
	uint16_t init_script_tbls_ptr;
	uint16_t extra_init_script_tbl_ptr;
	uint16_t macro_index_tbl_ptr;
	uint16_t macro_tbl_ptr;
	uint16_t condition_tbl_ptr;
	uint16_t io_condition_tbl_ptr;
	uint16_t io_flag_condition_tbl_ptr;
	uint16_t init_function_tbl_ptr;

	uint16_t pll_limit_tbl_ptr;
	uint16_t ram_restrict_tbl_ptr;
	uint8_t ram_restrict_group_count;

	uint16_t some_script_ptr; /* BIT I + 14 */
	uint16_t init96_tbl_ptr; /* BIT I + 16 */

	struct dcb_table dcb;

	struct {
		int crtchead;
		/* these need remembering across suspend */
		uint32_t saved_nv_pfb_cfg0;
	} state;

	struct {
		struct dcb_entry *output;
		uint16_t script_table_ptr;
		uint16_t dp_table_ptr;
	} display;

	struct {
		uint16_t fptablepointer;	/* also used by tmds */
		uint16_t fpxlatetableptr;
		int xlatwidth;
		uint16_t lvdsmanufacturerpointer;
		uint16_t fpxlatemanufacturertableptr;
		uint16_t mode_ptr;
		uint16_t xlated_entry;
		bool power_off_for_reset;
		bool reset_after_pclk_change;
		bool dual_link;
		bool link_c_increment;
		bool if_is_24bit;
		int duallink_transition_clk;
		uint8_t strapless_is_24bit;
		uint8_t *edid;

		/* will need resetting after suspend */
		int last_script_invoc;
		bool lvds_init_run;
	} fp;

	struct {
		uint16_t output0_script_ptr;
		uint16_t output1_script_ptr;
	} tmds;

	struct {
		uint16_t mem_init_tbl_ptr;
		uint16_t sdr_seq_tbl_ptr;
		uint16_t ddr_seq_tbl_ptr;

		struct {
			uint8_t crt, tv, panel;
		} i2c_indices;

		uint16_t lvds_single_a_script_ptr;
	} legacy;
};

#endif
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright 2007-2008 Nouveau Project
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	21	* DEALINGS IN THE SOFTWARE.
	22	*/
	23
	24	#ifndef __NOUVEAU_BIOS_H__
	25	#define __NOUVEAU_BIOS_H__
	26
	27	#include "nvreg.h"
	28	#include "nouveau_i2c.h"
	29
	30	#define DCB_MAX_NUM_ENTRIES 16
	31	#define DCB_MAX_NUM_I2C_ENTRIES 16
	32	#define DCB_MAX_NUM_GPIO_ENTRIES 32
	33	#define DCB_MAX_NUM_CONNECTOR_ENTRIES 16
	34
	35	#define DCB_LOC_ON_CHIP 0
	36
e7cc51c5 BS	37	struct dcb_i2c_entry {
	38	uint8_t port_type;
	39	uint8_t read, write;
	40	struct nouveau_i2c_chan *chan;
	41	};
	42
	43	enum dcb_gpio_tag {
	44	DCB_GPIO_TVDAC0 = 0xc,
	45	DCB_GPIO_TVDAC1 = 0x2d,
	46	};
	47
	48	struct dcb_gpio_entry {
	49	enum dcb_gpio_tag tag;
	50	int line;
	51	bool invert;
2535d71c	52	uint32_t entry;
02faec09 BS	53	uint8_t state_default;
02faec09 BS	54	uint8_t state[2];
e7cc51c5 BS	55	};
	56
	57	struct dcb_gpio_table {
	58	int entries;
	59	struct dcb_gpio_entry entry[DCB_MAX_NUM_GPIO_ENTRIES];
	60	};
	61
	62	enum dcb_connector_type {
	63	DCB_CONNECTOR_VGA = 0x00,
	64	DCB_CONNECTOR_TV_0 = 0x10,
	65	DCB_CONNECTOR_TV_1 = 0x11,
	66	DCB_CONNECTOR_TV_3 = 0x13,
	67	DCB_CONNECTOR_DVI_I = 0x30,
	68	DCB_CONNECTOR_DVI_D = 0x31,
	69	DCB_CONNECTOR_LVDS = 0x40,
	70	DCB_CONNECTOR_DP = 0x46,
	71	DCB_CONNECTOR_eDP = 0x47,
	72	DCB_CONNECTOR_HDMI_0 = 0x60,
	73	DCB_CONNECTOR_HDMI_1 = 0x61,
f66fa771	74	DCB_CONNECTOR_NONE = 0xff
e7cc51c5 BS	75	};
	76
	77	struct dcb_connector_table_entry {
d544d623	78	uint8_t index;
e7cc51c5 BS	79	uint32_t entry;
e7cc51c5 BS	80	enum dcb_connector_type type;
d544d623	81	uint8_t index2;
e7cc51c5 BS	82	uint8_t gpio_tag;
	83	};
	84
	85	struct dcb_connector_table {
	86	int entries;
	87	struct dcb_connector_table_entry entry[DCB_MAX_NUM_CONNECTOR_ENTRIES];
	88	};
	89
	90	enum dcb_type {
	91	OUTPUT_ANALOG = 0,
	92	OUTPUT_TV = 1,
	93	OUTPUT_TMDS = 2,
	94	OUTPUT_LVDS = 3,
	95	OUTPUT_DP = 6,
	96	OUTPUT_ANY = -1
	97	};
	98
6ee73861 BS	99	struct dcb_entry {
6ee73861 BS	100	int index; /* may not be raw dcb index if merging has happened */
e7cc51c5	101	enum dcb_type type;
6ee73861 BS	102	uint8_t i2c_index;
	103	uint8_t heads;
	104	uint8_t connector;
	105	uint8_t bus;
	106	uint8_t location;
	107	uint8_t or;
	108	bool duallink_possible;
	109	union {
	110	struct sor_conf {
	111	int link;
	112	} sorconf;
	113	struct {
	114	int maxfreq;
	115	} crtconf;
	116	struct {
	117	struct sor_conf sor;
	118	bool use_straps_for_mode;
	119	bool use_power_scripts;
	120	} lvdsconf;
	121	struct {
	122	bool has_component_output;
	123	} tvconf;
	124	struct {
	125	struct sor_conf sor;
	126	int link_nr;
	127	int link_bw;
	128	} dpconf;
	129	struct {
	130	struct sor_conf sor;
	131	} tmdsconf;
	132	};
	133	bool i2c_upper_default;
	134	};
	135
7f245b20	136	struct dcb_table {
6ee73861 BS	137	uint8_t version;
6ee73861 BS	138
7f245b20 BS	139	int entries;
7f245b20 BS	140	struct dcb_entry entry[DCB_MAX_NUM_ENTRIES];
6ee73861 BS	141
	142	uint8_t *i2c_table;
	143	uint8_t i2c_default_indices;
7f245b20	144	struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES];
6ee73861 BS	145
6ee73861 BS	146	uint16_t gpio_table_ptr;
a6678b2a	147	struct dcb_gpio_table gpio;
6ee73861 BS	148	uint16_t connector_table_ptr;
	149	struct dcb_connector_table connector;
	150	};
	151
6ee73861 BS	152	enum nouveau_or {
	153	OUTPUT_A = (1 << 0),
	154	OUTPUT_B = (1 << 1),
	155	OUTPUT_C = (1 << 2)
	156	};
	157
	158	enum LVDS_script {
	159	/* Order does matter here */
	160	LVDS_INIT = 1,
	161	LVDS_RESET,
	162	LVDS_BACKLIGHT_ON,
	163	LVDS_BACKLIGHT_OFF,
	164	LVDS_PANEL_ON,
	165	LVDS_PANEL_OFF
	166	};
	167
	168	/* changing these requires matching changes to reg tables in nv_get_clock */
	169	#define MAX_PLL_TYPES 4
	170	enum pll_types {
	171	NVPLL,
	172	MPLL,
	173	VPLL1,
	174	VPLL2
	175	};
	176
	177	struct pll_lims {
	178	struct {
	179	int minfreq;
	180	int maxfreq;
	181	int min_inputfreq;
	182	int max_inputfreq;
	183
	184	uint8_t min_m;
	185	uint8_t max_m;
	186	uint8_t min_n;
	187	uint8_t max_n;
	188	} vco1, vco2;
	189
	190	uint8_t max_log2p;
	191	/*
	192	* for most pre nv50 cards setting a log2P of 7 (the common max_log2p
	193	* value) is no different to 6 (at least for vplls) so allowing the MNP
	194	* calc to use 7 causes the generated clock to be out by a factor of 2.
	195	* however, max_log2p cannot be fixed-up during parsing as the
	196	* unmodified max_log2p value is still needed for setting mplls, hence
	197	* an additional max_usable_log2p member
	198	*/
	199	uint8_t max_usable_log2p;
	200	uint8_t log2p_bias;
	201
	202	uint8_t min_p;
	203	uint8_t max_p;
	204
	205	int refclk;
	206	};
	207
04a39c57 BS	208	struct nvbios {
	209	struct drm_device *dev;
	210
6ee73861 BS	211	uint8_t chip_version;
	212
	213	uint32_t dactestval;
	214	uint32_t tvdactestval;
	215	uint8_t digital_min_front_porch;
	216	bool fp_no_ddc;
6ee73861	217
d9184fa9	218	struct mutex lock;
39c9bfb4	219
6ee73861 BS	220	uint8_t data[NV_PROM_SIZE];
	221	unsigned int length;
	222	bool execute;
	223
	224	uint8_t major_version;
	225	uint8_t feature_byte;
	226	bool is_mobile;
	227
	228	uint32_t fmaxvco, fminvco;
	229
	230	bool old_style_init;
	231	uint16_t init_script_tbls_ptr;
	232	uint16_t extra_init_script_tbl_ptr;
	233	uint16_t macro_index_tbl_ptr;
	234	uint16_t macro_tbl_ptr;
	235	uint16_t condition_tbl_ptr;
	236	uint16_t io_condition_tbl_ptr;
	237	uint16_t io_flag_condition_tbl_ptr;
	238	uint16_t init_function_tbl_ptr;
	239
	240	uint16_t pll_limit_tbl_ptr;
	241	uint16_t ram_restrict_tbl_ptr;
37383650	242	uint8_t ram_restrict_group_count;
6ee73861 BS	243
	244	uint16_t some_script_ptr; /* BIT I + 14 */
	245	uint16_t init96_tbl_ptr; /* BIT I + 16 */
	246
7f245b20	247	struct dcb_table dcb;
6ee73861 BS	248
	249	struct {
	250	int crtchead;
	251	/* these need remembering across suspend */
	252	uint32_t saved_nv_pfb_cfg0;
	253	} state;
	254
	255	struct {
	256	struct dcb_entry *output;
	257	uint16_t script_table_ptr;
	258	uint16_t dp_table_ptr;
	259	} display;
	260
	261	struct {
	262	uint16_t fptablepointer; /* also used by tmds */
	263	uint16_t fpxlatetableptr;
	264	int xlatwidth;
	265	uint16_t lvdsmanufacturerpointer;
	266	uint16_t fpxlatemanufacturertableptr;
	267	uint16_t mode_ptr;
	268	uint16_t xlated_entry;
	269	bool power_off_for_reset;
	270	bool reset_after_pclk_change;
	271	bool dual_link;
	272	bool link_c_increment;
6ee73861 BS	273	bool if_is_24bit;
	274	int duallink_transition_clk;
	275	uint8_t strapless_is_24bit;
	276	uint8_t *edid;
	277
	278	/* will need resetting after suspend */
	279	int last_script_invoc;
	280	bool lvds_init_run;
	281	} fp;
	282
	283	struct {
	284	uint16_t output0_script_ptr;
	285	uint16_t output1_script_ptr;
	286	} tmds;
	287
	288	struct {
	289	uint16_t mem_init_tbl_ptr;
	290	uint16_t sdr_seq_tbl_ptr;
	291	uint16_t ddr_seq_tbl_ptr;
	292
	293	struct {
	294	uint8_t crt, tv, panel;
	295	} i2c_indices;
	296
	297	uint16_t lvds_single_a_script_ptr;
	298	} legacy;
	299	};
	300
	301	#endif