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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[net-next-2.6.git] / drivers / gpu / drm / i915 / intel_dvo.c
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1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27#include <linux/i2c.h>
5a0e3ad6 28#include <linux/slab.h>
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29#include "drmP.h"
30#include "drm.h"
31#include "drm_crtc.h"
32#include "intel_drv.h"
33#include "i915_drm.h"
34#include "i915_drv.h"
35#include "dvo.h"
36
37#define SIL164_ADDR 0x38
38#define CH7xxx_ADDR 0x76
39#define TFP410_ADDR 0x38
40
b358d0a6 41static struct intel_dvo_device intel_dvo_devices[] = {
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42 {
43 .type = INTEL_DVO_CHIP_TMDS,
44 .name = "sil164",
45 .dvo_reg = DVOC,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
48 },
49 {
50 .type = INTEL_DVO_CHIP_TMDS,
51 .name = "ch7xxx",
52 .dvo_reg = DVOC,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
55 },
56 {
57 .type = INTEL_DVO_CHIP_LVDS,
58 .name = "ivch",
59 .dvo_reg = DVOA,
60 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
61 .dev_ops = &ivch_ops,
62 },
63 {
64 .type = INTEL_DVO_CHIP_TMDS,
65 .name = "tfp410",
66 .dvo_reg = DVOC,
67 .slave_addr = TFP410_ADDR,
68 .dev_ops = &tfp410_ops,
69 },
70 {
71 .type = INTEL_DVO_CHIP_LVDS,
72 .name = "ch7017",
73 .dvo_reg = DVOC,
74 .slave_addr = 0x75,
75 .gpio = GPIOE,
76 .dev_ops = &ch7017_ops,
77 }
78};
79
80static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
81{
82 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
83 struct intel_output *intel_output = enc_to_intel_output(encoder);
84 struct intel_dvo_device *dvo = intel_output->dev_priv;
85 u32 dvo_reg = dvo->dvo_reg;
86 u32 temp = I915_READ(dvo_reg);
87
88 if (mode == DRM_MODE_DPMS_ON) {
89 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
90 I915_READ(dvo_reg);
91 dvo->dev_ops->dpms(dvo, mode);
92 } else {
93 dvo->dev_ops->dpms(dvo, mode);
94 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
95 I915_READ(dvo_reg);
96 }
97}
98
99static void intel_dvo_save(struct drm_connector *connector)
100{
101 struct drm_i915_private *dev_priv = connector->dev->dev_private;
102 struct intel_output *intel_output = to_intel_output(connector);
103 struct intel_dvo_device *dvo = intel_output->dev_priv;
104
105 /* Each output should probably just save the registers it touches,
106 * but for now, use more overkill.
107 */
108 dev_priv->saveDVOA = I915_READ(DVOA);
109 dev_priv->saveDVOB = I915_READ(DVOB);
110 dev_priv->saveDVOC = I915_READ(DVOC);
111
112 dvo->dev_ops->save(dvo);
113}
114
115static void intel_dvo_restore(struct drm_connector *connector)
116{
117 struct drm_i915_private *dev_priv = connector->dev->dev_private;
118 struct intel_output *intel_output = to_intel_output(connector);
119 struct intel_dvo_device *dvo = intel_output->dev_priv;
120
121 dvo->dev_ops->restore(dvo);
122
123 I915_WRITE(DVOA, dev_priv->saveDVOA);
124 I915_WRITE(DVOB, dev_priv->saveDVOB);
125 I915_WRITE(DVOC, dev_priv->saveDVOC);
126}
127
128static int intel_dvo_mode_valid(struct drm_connector *connector,
129 struct drm_display_mode *mode)
130{
131 struct intel_output *intel_output = to_intel_output(connector);
132 struct intel_dvo_device *dvo = intel_output->dev_priv;
133
134 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
135 return MODE_NO_DBLESCAN;
136
137 /* XXX: Validate clock range */
138
139 if (dvo->panel_fixed_mode) {
140 if (mode->hdisplay > dvo->panel_fixed_mode->hdisplay)
141 return MODE_PANEL;
142 if (mode->vdisplay > dvo->panel_fixed_mode->vdisplay)
143 return MODE_PANEL;
144 }
145
146 return dvo->dev_ops->mode_valid(dvo, mode);
147}
148
149static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
150 struct drm_display_mode *mode,
151 struct drm_display_mode *adjusted_mode)
152{
153 struct intel_output *intel_output = enc_to_intel_output(encoder);
154 struct intel_dvo_device *dvo = intel_output->dev_priv;
155
156 /* If we have timings from the BIOS for the panel, put them in
157 * to the adjusted mode. The CRTC will be set up for this mode,
158 * with the panel scaling set up to source from the H/VDisplay
159 * of the original mode.
160 */
161 if (dvo->panel_fixed_mode != NULL) {
162#define C(x) adjusted_mode->x = dvo->panel_fixed_mode->x
163 C(hdisplay);
164 C(hsync_start);
165 C(hsync_end);
166 C(htotal);
167 C(vdisplay);
168 C(vsync_start);
169 C(vsync_end);
170 C(vtotal);
171 C(clock);
172 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
173#undef C
174 }
175
176 if (dvo->dev_ops->mode_fixup)
177 return dvo->dev_ops->mode_fixup(dvo, mode, adjusted_mode);
178
179 return true;
180}
181
182static void intel_dvo_mode_set(struct drm_encoder *encoder,
183 struct drm_display_mode *mode,
184 struct drm_display_mode *adjusted_mode)
185{
186 struct drm_device *dev = encoder->dev;
187 struct drm_i915_private *dev_priv = dev->dev_private;
188 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
189 struct intel_output *intel_output = enc_to_intel_output(encoder);
190 struct intel_dvo_device *dvo = intel_output->dev_priv;
191 int pipe = intel_crtc->pipe;
192 u32 dvo_val;
193 u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg;
194 int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
195
196 switch (dvo_reg) {
197 case DVOA:
198 default:
199 dvo_srcdim_reg = DVOA_SRCDIM;
200 break;
201 case DVOB:
202 dvo_srcdim_reg = DVOB_SRCDIM;
203 break;
204 case DVOC:
205 dvo_srcdim_reg = DVOC_SRCDIM;
206 break;
207 }
208
209 dvo->dev_ops->mode_set(dvo, mode, adjusted_mode);
210
211 /* Save the data order, since I don't know what it should be set to. */
212 dvo_val = I915_READ(dvo_reg) &
213 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
214 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
215 DVO_BLANK_ACTIVE_HIGH;
216
217 if (pipe == 1)
218 dvo_val |= DVO_PIPE_B_SELECT;
219 dvo_val |= DVO_PIPE_STALL;
220 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
221 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
222 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
223 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
224
225 I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
226
227 /*I915_WRITE(DVOB_SRCDIM,
228 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
229 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
230 I915_WRITE(dvo_srcdim_reg,
231 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
232 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
233 /*I915_WRITE(DVOB, dvo_val);*/
234 I915_WRITE(dvo_reg, dvo_val);
235}
236
237/**
238 * Detect the output connection on our DVO device.
239 *
240 * Unimplemented.
241 */
242static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector)
243{
244 struct intel_output *intel_output = to_intel_output(connector);
245 struct intel_dvo_device *dvo = intel_output->dev_priv;
246
247 return dvo->dev_ops->detect(dvo);
248}
249
250static int intel_dvo_get_modes(struct drm_connector *connector)
251{
252 struct intel_output *intel_output = to_intel_output(connector);
253 struct intel_dvo_device *dvo = intel_output->dev_priv;
254
255 /* We should probably have an i2c driver get_modes function for those
256 * devices which will have a fixed set of modes determined by the chip
257 * (TV-out, for example), but for now with just TMDS and LVDS,
258 * that's not the case.
259 */
260 intel_ddc_get_modes(intel_output);
261 if (!list_empty(&connector->probed_modes))
262 return 1;
263
264
265 if (dvo->panel_fixed_mode != NULL) {
266 struct drm_display_mode *mode;
267 mode = drm_mode_duplicate(connector->dev, dvo->panel_fixed_mode);
268 if (mode) {
269 drm_mode_probed_add(connector, mode);
270 return 1;
271 }
272 }
273 return 0;
274}
275
276static void intel_dvo_destroy (struct drm_connector *connector)
277{
278 struct intel_output *intel_output = to_intel_output(connector);
279 struct intel_dvo_device *dvo = intel_output->dev_priv;
280
281 if (dvo) {
282 if (dvo->dev_ops->destroy)
283 dvo->dev_ops->destroy(dvo);
284 if (dvo->panel_fixed_mode)
285 kfree(dvo->panel_fixed_mode);
286 /* no need, in i830_dvoices[] now */
287 //kfree(dvo);
288 }
289 if (intel_output->i2c_bus)
290 intel_i2c_destroy(intel_output->i2c_bus);
291 if (intel_output->ddc_bus)
292 intel_i2c_destroy(intel_output->ddc_bus);
293 drm_sysfs_connector_remove(connector);
294 drm_connector_cleanup(connector);
295 kfree(intel_output);
296}
297
298#ifdef RANDR_GET_CRTC_INTERFACE
299static struct drm_crtc *intel_dvo_get_crtc(struct drm_connector *connector)
300{
301 struct drm_device *dev = connector->dev;
302 struct drm_i915_private *dev_priv = dev->dev_private;
303 struct intel_output *intel_output = to_intel_output(connector);
304 struct intel_dvo_device *dvo = intel_output->dev_priv;
305 int pipe = !!(I915_READ(dvo->dvo_reg) & SDVO_PIPE_B_SELECT);
306
307 return intel_pipe_to_crtc(pScrn, pipe);
308}
309#endif
310
311static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
312 .dpms = intel_dvo_dpms,
313 .mode_fixup = intel_dvo_mode_fixup,
314 .prepare = intel_encoder_prepare,
315 .mode_set = intel_dvo_mode_set,
316 .commit = intel_encoder_commit,
317};
318
319static const struct drm_connector_funcs intel_dvo_connector_funcs = {
c9fb15f6 320 .dpms = drm_helper_connector_dpms,
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321 .save = intel_dvo_save,
322 .restore = intel_dvo_restore,
323 .detect = intel_dvo_detect,
324 .destroy = intel_dvo_destroy,
325 .fill_modes = drm_helper_probe_single_connector_modes,
326};
327
328static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
329 .mode_valid = intel_dvo_mode_valid,
330 .get_modes = intel_dvo_get_modes,
331 .best_encoder = intel_best_encoder,
332};
333
b358d0a6 334static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
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335{
336 drm_encoder_cleanup(encoder);
337}
338
339static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
340 .destroy = intel_dvo_enc_destroy,
341};
342
343
344/**
345 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
346 *
347 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
348 * chip being on DVOB/C and having multiple pipes.
349 */
350static struct drm_display_mode *
351intel_dvo_get_current_mode (struct drm_connector *connector)
352{
353 struct drm_device *dev = connector->dev;
354 struct drm_i915_private *dev_priv = dev->dev_private;
355 struct intel_output *intel_output = to_intel_output(connector);
356 struct intel_dvo_device *dvo = intel_output->dev_priv;
357 uint32_t dvo_reg = dvo->dvo_reg;
358 uint32_t dvo_val = I915_READ(dvo_reg);
359 struct drm_display_mode *mode = NULL;
360
361 /* If the DVO port is active, that'll be the LVDS, so we can pull out
362 * its timings to get how the BIOS set up the panel.
363 */
364 if (dvo_val & DVO_ENABLE) {
365 struct drm_crtc *crtc;
366 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
367
368 crtc = intel_get_crtc_from_pipe(dev, pipe);
369 if (crtc) {
370 mode = intel_crtc_mode_get(dev, crtc);
371
372 if (mode) {
373 mode->type |= DRM_MODE_TYPE_PREFERRED;
374 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
375 mode->flags |= DRM_MODE_FLAG_PHSYNC;
376 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
377 mode->flags |= DRM_MODE_FLAG_PVSYNC;
378 }
379 }
380 }
381 return mode;
382}
383
384void intel_dvo_init(struct drm_device *dev)
385{
386 struct intel_output *intel_output;
387 struct intel_dvo_device *dvo;
f9c10a9b 388 struct i2c_adapter *i2cbus = NULL;
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389 int ret = 0;
390 int i;
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391 int encoder_type = DRM_MODE_ENCODER_NONE;
392 intel_output = kzalloc (sizeof(struct intel_output), GFP_KERNEL);
393 if (!intel_output)
394 return;
395
396 /* Set up the DDC bus */
397 intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D");
398 if (!intel_output->ddc_bus)
399 goto free_intel;
400
401 /* Now, try to find a controller */
402 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
403 struct drm_connector *connector = &intel_output->base;
404 int gpio;
405
406 dvo = &intel_dvo_devices[i];
407
408 /* Allow the I2C driver info to specify the GPIO to be used in
409 * special cases, but otherwise default to what's defined
410 * in the spec.
411 */
412 if (dvo->gpio != 0)
413 gpio = dvo->gpio;
414 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
415 gpio = GPIOB;
416 else
417 gpio = GPIOE;
418
419 /* Set up the I2C bus necessary for the chip we're probing.
420 * It appears that everything is on GPIOE except for panels
421 * on i830 laptops, which are on GPIOB (DVOA).
422 */
f9c10a9b
KP
423 if (i2cbus != NULL)
424 intel_i2c_destroy(i2cbus);
425 if (!(i2cbus = intel_i2c_create(dev, gpio,
426 gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
427 continue;
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428 }
429
430 if (dvo->dev_ops!= NULL)
431 ret = dvo->dev_ops->init(dvo, i2cbus);
432 else
433 ret = false;
434
435 if (!ret)
436 continue;
437
438 intel_output->type = INTEL_OUTPUT_DVO;
f8aed700 439 intel_output->crtc_mask = (1 << 0) | (1 << 1);
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440 switch (dvo->type) {
441 case INTEL_DVO_CHIP_TMDS:
f8aed700
ML
442 intel_output->clone_mask =
443 (1 << INTEL_DVO_TMDS_CLONE_BIT) |
444 (1 << INTEL_ANALOG_CLONE_BIT);
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445 drm_connector_init(dev, connector,
446 &intel_dvo_connector_funcs,
447 DRM_MODE_CONNECTOR_DVII);
448 encoder_type = DRM_MODE_ENCODER_TMDS;
449 break;
450 case INTEL_DVO_CHIP_LVDS:
f8aed700
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451 intel_output->clone_mask =
452 (1 << INTEL_DVO_LVDS_CLONE_BIT);
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453 drm_connector_init(dev, connector,
454 &intel_dvo_connector_funcs,
455 DRM_MODE_CONNECTOR_LVDS);
456 encoder_type = DRM_MODE_ENCODER_LVDS;
457 break;
458 }
459
460 drm_connector_helper_add(connector,
461 &intel_dvo_connector_helper_funcs);
462 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
463 connector->interlace_allowed = false;
464 connector->doublescan_allowed = false;
465
466 intel_output->dev_priv = dvo;
467 intel_output->i2c_bus = i2cbus;
468
469 drm_encoder_init(dev, &intel_output->enc,
470 &intel_dvo_enc_funcs, encoder_type);
471 drm_encoder_helper_add(&intel_output->enc,
472 &intel_dvo_helper_funcs);
473
474 drm_mode_connector_attach_encoder(&intel_output->base,
475 &intel_output->enc);
476 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
477 /* For our LVDS chipsets, we should hopefully be able
478 * to dig the fixed panel mode out of the BIOS data.
479 * However, it's in a different format from the BIOS
480 * data on chipsets with integrated LVDS (stored in AIM
481 * headers, likely), so for now, just get the current
482 * mode being output through DVO.
483 */
484 dvo->panel_fixed_mode =
485 intel_dvo_get_current_mode(connector);
486 dvo->panel_wants_dither = true;
487 }
488
489 drm_sysfs_connector_add(connector);
490 return;
491 }
492
493 intel_i2c_destroy(intel_output->ddc_bus);
494 /* Didn't find a chip, so tear down. */
495 if (i2cbus != NULL)
496 intel_i2c_destroy(i2cbus);
497free_intel:
498 kfree(intel_output);
499}