]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/gpu/drm/i915/intel_drv.h
Merge branch 'usb-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[net-next-2.6.git] / drivers / gpu / drm / i915 / intel_drv.h
CommitLineData
79e53945
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1/*
2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 */
25#ifndef __INTEL_DRV_H__
26#define __INTEL_DRV_H__
27
28#include <linux/i2c.h>
80824003 29#include "i915_drv.h"
79e53945 30#include "drm_crtc.h"
79e53945 31#include "drm_crtc_helper.h"
37811fcc 32#include "drm_fb_helper.h"
913d8d11 33
481b6af3 34#define _wait_for(COND, MS, W) ({ \
913d8d11
CW
35 unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \
36 int ret__ = 0; \
37 while (! (COND)) { \
38 if (time_after(jiffies, timeout__)) { \
39 ret__ = -ETIMEDOUT; \
40 break; \
41 } \
82d7c9e7 42 if (W && !in_dbg_master()) msleep(W); \
913d8d11
CW
43 } \
44 ret__; \
45})
46
481b6af3
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47#define wait_for(COND, MS) _wait_for(COND, MS, 1)
48#define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
49
ec5da01e
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50#define MSLEEP(x) do { \
51 if (in_dbg_master()) \
52 mdelay(x); \
53 else \
54 msleep(x); \
55} while(0)
56
021357ac
CW
57#define KHz(x) (1000*x)
58#define MHz(x) KHz(1000*x)
59
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60/*
61 * Display related stuff
62 */
63
64/* store information about an Ixxx DVO */
65/* The i830->i865 use multiple DVOs with multiple i2cs */
66/* the i915, i945 have a single sDVO i2c bus - which is different */
67#define MAX_OUTPUTS 6
68/* maximum connectors per crtcs in the mode set */
69#define INTELFB_CONN_LIMIT 4
70
71#define INTEL_I2C_BUS_DVO 1
72#define INTEL_I2C_BUS_SDVO 2
73
74/* these are outputs from the chip - integrated only
75 external chips are via DVO or SDVO output */
76#define INTEL_OUTPUT_UNUSED 0
77#define INTEL_OUTPUT_ANALOG 1
78#define INTEL_OUTPUT_DVO 2
79#define INTEL_OUTPUT_SDVO 3
80#define INTEL_OUTPUT_LVDS 4
81#define INTEL_OUTPUT_TVOUT 5
7d57382e 82#define INTEL_OUTPUT_HDMI 6
a4fc5ed6 83#define INTEL_OUTPUT_DISPLAYPORT 7
32f9d658 84#define INTEL_OUTPUT_EDP 8
79e53945 85
f8aed700
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86/* Intel Pipe Clone Bit */
87#define INTEL_HDMIB_CLONE_BIT 1
88#define INTEL_HDMIC_CLONE_BIT 2
89#define INTEL_HDMID_CLONE_BIT 3
90#define INTEL_HDMIE_CLONE_BIT 4
91#define INTEL_HDMIF_CLONE_BIT 5
92#define INTEL_SDVO_NON_TV_CLONE_BIT 6
93#define INTEL_SDVO_TV_CLONE_BIT 7
94#define INTEL_SDVO_LVDS_CLONE_BIT 8
95#define INTEL_ANALOG_CLONE_BIT 9
96#define INTEL_TV_CLONE_BIT 10
97#define INTEL_DP_B_CLONE_BIT 11
98#define INTEL_DP_C_CLONE_BIT 12
99#define INTEL_DP_D_CLONE_BIT 13
100#define INTEL_LVDS_CLONE_BIT 14
101#define INTEL_DVO_TMDS_CLONE_BIT 15
102#define INTEL_DVO_LVDS_CLONE_BIT 16
7c8460db 103#define INTEL_EDP_CLONE_BIT 17
f8aed700 104
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105#define INTEL_DVO_CHIP_NONE 0
106#define INTEL_DVO_CHIP_LVDS 1
107#define INTEL_DVO_CHIP_TMDS 2
108#define INTEL_DVO_CHIP_TVOUT 4
109
6c9547ff
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110/* drm_display_mode->private_flags */
111#define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
112#define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
113
114static inline void
115intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
116 int multiplier)
117{
118 mode->clock *= multiplier;
119 mode->private_flags |= multiplier;
120}
121
122static inline int
123intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
124{
125 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
126}
127
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128struct intel_framebuffer {
129 struct drm_framebuffer base;
130 struct drm_gem_object *obj;
131};
132
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133struct intel_fbdev {
134 struct drm_fb_helper helper;
135 struct intel_framebuffer ifb;
136 struct list_head fbdev_list;
137 struct drm_display_mode *our_mode;
138};
79e53945 139
21d40d37 140struct intel_encoder {
4ef69c7a 141 struct drm_encoder base;
79e53945 142 int type;
79e53945 143 bool load_detect_temp;
e2f0ba97 144 bool needs_tv_clock;
21d40d37 145 void (*hot_plug)(struct intel_encoder *);
f8aed700
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146 int crtc_mask;
147 int clone_mask;
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148};
149
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150struct intel_connector {
151 struct drm_connector base;
df0e9248 152 struct intel_encoder *encoder;
5daa55eb
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153};
154
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155struct intel_crtc {
156 struct drm_crtc base;
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157 enum pipe pipe;
158 enum plane plane;
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159 u8 lut_r[256], lut_g[256], lut_b[256];
160 int dpms_mode;
f7abfe8b 161 bool active; /* is the crtc on? independent of the dpms mode */
652c393a
JB
162 bool busy; /* is scanout buffer being updated frequently? */
163 struct timer_list idle_timer;
164 bool lowfreq_avail;
02e792fb 165 struct intel_overlay *overlay;
6b95a207 166 struct intel_unpin_work *unpin_work;
77ffb597 167 int fdi_lanes;
cda4b7d3
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168
169 struct drm_gem_object *cursor_bo;
170 uint32_t cursor_addr;
171 int16_t cursor_x, cursor_y;
172 int16_t cursor_width, cursor_height;
6b383a7f 173 bool cursor_visible;
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174};
175
176#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
5daa55eb 177#define to_intel_connector(x) container_of(x, struct intel_connector, base)
4ef69c7a 178#define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
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179#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
180
3c17fe4b
DH
181#define DIP_TYPE_AVI 0x82
182#define DIP_VERSION_AVI 0x2
183#define DIP_LEN_AVI 13
184
185struct dip_infoframe {
186 uint8_t type; /* HB0 */
187 uint8_t ver; /* HB1 */
188 uint8_t len; /* HB2 - body len, not including checksum */
189 uint8_t ecc; /* Header ECC */
190 uint8_t checksum; /* PB0 */
191 union {
192 struct {
193 /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
194 uint8_t Y_A_B_S;
195 /* PB2 - C 7:6, M 5:4, R 3:0 */
196 uint8_t C_M_R;
197 /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
198 uint8_t ITC_EC_Q_SC;
199 /* PB4 - VIC 6:0 */
200 uint8_t VIC;
201 /* PB5 - PR 3:0 */
202 uint8_t PR;
203 /* PB6 to PB13 */
204 uint16_t top_bar_end;
205 uint16_t bottom_bar_start;
206 uint16_t left_bar_end;
207 uint16_t right_bar_start;
208 } avi;
209 uint8_t payload[27];
210 } __attribute__ ((packed)) body;
211} __attribute__((packed));
212
f875c15a
CW
213static inline struct drm_crtc *
214intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
215{
216 struct drm_i915_private *dev_priv = dev->dev_private;
217 return dev_priv->pipe_to_crtc_mapping[pipe];
218}
219
4e5359cd
SF
220struct intel_unpin_work {
221 struct work_struct work;
222 struct drm_device *dev;
223 struct drm_gem_object *old_fb_obj;
224 struct drm_gem_object *pending_flip_obj;
225 struct drm_pending_vblank_event *event;
226 int pending;
227 bool enable_stall_check;
228};
229
335af9a2 230int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
f899fc64 231extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
f0217c42 232
79e53945 233extern void intel_crt_init(struct drm_device *dev);
7d57382e 234extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
3c17fe4b 235void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
7d57382e 236extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
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237extern void intel_dvo_init(struct drm_device *dev);
238extern void intel_tv_init(struct drm_device *dev);
652c393a 239extern void intel_mark_busy(struct drm_device *dev, struct drm_gem_object *obj);
79e53945 240extern void intel_lvds_init(struct drm_device *dev);
a4fc5ed6
KP
241extern void intel_dp_init(struct drm_device *dev, int dp_reg);
242void
243intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
244 struct drm_display_mode *adjusted_mode);
cb0953d7 245extern bool intel_dpd_is_edp(struct drm_device *dev);
21d40d37 246extern void intel_edp_link_config (struct intel_encoder *, int *, int *);
814948ad 247extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
32f9d658 248
a9573556 249/* intel_panel.c */
1d8e1c75
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250extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
251 struct drm_display_mode *adjusted_mode);
252extern void intel_pch_panel_fitting(struct drm_device *dev,
253 int fitting_mode,
254 struct drm_display_mode *mode,
255 struct drm_display_mode *adjusted_mode);
a9573556
CW
256extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
257extern u32 intel_panel_get_backlight(struct drm_device *dev);
258extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
1d8e1c75 259
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260extern void intel_crtc_load_lut(struct drm_crtc *crtc);
261extern void intel_encoder_prepare (struct drm_encoder *encoder);
262extern void intel_encoder_commit (struct drm_encoder *encoder);
ea5b213a 263extern void intel_encoder_destroy(struct drm_encoder *encoder);
79e53945 264
df0e9248
CW
265static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
266{
267 return to_intel_connector(connector)->encoder;
268}
269
270extern void intel_connector_attach_encoder(struct intel_connector *connector,
271 struct intel_encoder *encoder);
272extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
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273
274extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
275 struct drm_crtc *crtc);
08d7b3d1
CW
276int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
277 struct drm_file *file_priv);
9d0498a2 278extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
58e10eb9 279extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
21d40d37 280extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
c1c43977 281 struct drm_connector *connector,
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282 struct drm_display_mode *mode,
283 int *dpms_mode);
21d40d37 284extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
c1c43977 285 struct drm_connector *connector,
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286 int dpms_mode);
287
288extern struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB);
289extern int intel_sdvo_supports_hotplug(struct drm_connector *connector);
290extern void intel_sdvo_set_hotplug(struct drm_connector *connector, int enable);
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291extern void intelfb_restore(void);
292extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
293 u16 blue, int regno);
b8c00ac5
DA
294extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
295 u16 *blue, int regno);
7e8b60fa 296extern void intel_init_clock_gating(struct drm_device *dev);
f97108d1
JB
297extern void ironlake_enable_drps(struct drm_device *dev);
298extern void ironlake_disable_drps(struct drm_device *dev);
48fcfc88 299extern void intel_init_emon(struct drm_device *dev);
79e53945 300
127bd2ac 301extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
48b956c5
CW
302 struct drm_gem_object *obj,
303 bool pipelined);
127bd2ac 304
38651674
DA
305extern int intel_framebuffer_init(struct drm_device *dev,
306 struct intel_framebuffer *ifb,
307 struct drm_mode_fb_cmd *mode_cmd,
308 struct drm_gem_object *obj);
309extern int intel_fbdev_init(struct drm_device *dev);
310extern void intel_fbdev_fini(struct drm_device *dev);
28d52043 311
6b95a207
KH
312extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
313extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
1afe3e9d 314extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
6b95a207 315
02e792fb
DV
316extern void intel_setup_overlay(struct drm_device *dev);
317extern void intel_cleanup_overlay(struct drm_device *dev);
5dcdbcb0
CW
318extern int intel_overlay_switch_off(struct intel_overlay *overlay,
319 bool interruptible);
02e792fb
DV
320extern int intel_overlay_put_image(struct drm_device *dev, void *data,
321 struct drm_file *file_priv);
322extern int intel_overlay_attrs(struct drm_device *dev, void *data,
323 struct drm_file *file_priv);
4abe3520 324
eb1f8e4f 325extern void intel_fb_output_poll_changed(struct drm_device *dev);
79e53945 326#endif /* __INTEL_DRV_H__ */