]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/gpu/drm/i915/i915_drv.c
drm/i915: Make dev_priv->mm.wedged an atomic_t
[net-next-2.6.git] / drivers / gpu / drm / i915 / i915_drv.c
CommitLineData
1da177e4
LT
1/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
2 */
0d6aa60b 3/*
bc54fd1a 4 *
1da177e4
LT
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * All Rights Reserved.
bc54fd1a
DA
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 *
0d6aa60b 28 */
1da177e4 29
5669fcac 30#include <linux/device.h>
1da177e4
LT
31#include "drmP.h"
32#include "drm.h"
33#include "i915_drm.h"
34#include "i915_drv.h"
35
36#include "drm_pciids.h"
79e53945 37#include <linux/console.h>
354ff967 38#include "drm_crtc_helper.h"
79e53945 39
d6073d77 40static int i915_modeset = -1;
79e53945
JB
41module_param_named(modeset, i915_modeset, int, 0400);
42
43unsigned int i915_fbpercrtc = 0;
44module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
1da177e4 45
652c393a
JB
46unsigned int i915_powersave = 1;
47module_param_named(powersave, i915_powersave, int, 0400);
48
112b715e
KH
49static struct drm_driver driver;
50
1da177e4
LT
51static struct pci_device_id pciidlist[] = {
52 i915_PCI_IDS
53};
54
79e53945
JB
55#if defined(CONFIG_DRM_I915_KMS)
56MODULE_DEVICE_TABLE(pci, pciidlist);
57#endif
58
b932ccb5 59static int i915_suspend(struct drm_device *dev, pm_message_t state)
ba8bbcf6
JB
60{
61 struct drm_i915_private *dev_priv = dev->dev_private;
ba8bbcf6
JB
62
63 if (!dev || !dev_priv) {
1ae8c0a5
KP
64 DRM_ERROR("dev: %p, dev_priv: %p\n", dev, dev_priv);
65 DRM_ERROR("DRM not initialized, aborting suspend.\n");
ba8bbcf6
JB
66 return -ENODEV;
67 }
68
b932ccb5
DA
69 if (state.event == PM_EVENT_PRETHAW)
70 return 0;
71
ba8bbcf6 72 pci_save_state(dev->pdev);
ba8bbcf6 73
5669fcac 74 /* If KMS is active, we do the leavevt stuff here */
226485e9
JB
75 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
76 if (i915_gem_idle(dev))
77 dev_err(&dev->pdev->dev,
78 "GEM idle failed, resume may fail\n");
79 drm_irq_uninstall(dev);
5669fcac
JB
80 }
81
9e06dd39
JB
82 i915_save_state(dev);
83
3b1c1c11 84 intel_opregion_free(dev, 1);
8ee1c3db 85
b932ccb5
DA
86 if (state.event == PM_EVENT_SUSPEND) {
87 /* Shut down the device */
88 pci_disable_device(dev->pdev);
89 pci_set_power_state(dev->pdev, PCI_D3hot);
90 }
ba8bbcf6
JB
91
92 return 0;
93}
94
95static int i915_resume(struct drm_device *dev)
96{
5669fcac
JB
97 struct drm_i915_private *dev_priv = dev->dev_private;
98 int ret = 0;
99
ba8bbcf6
JB
100 pci_set_power_state(dev->pdev, PCI_D0);
101 pci_restore_state(dev->pdev);
102 if (pci_enable_device(dev->pdev))
103 return -1;
ea7b44c8 104 pci_set_master(dev->pdev);
ba8bbcf6 105
317c35d1 106 i915_restore_state(dev);
ba8bbcf6 107
74a365b3 108 intel_opregion_init(dev, 1);
8ee1c3db 109
5669fcac
JB
110 /* KMS EnterVT equivalent */
111 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
112 mutex_lock(&dev->struct_mutex);
113 dev_priv->mm.suspended = 0;
114
115 ret = i915_gem_init_ringbuffer(dev);
116 if (ret != 0)
117 ret = -1;
118 mutex_unlock(&dev->struct_mutex);
226485e9
JB
119
120 drm_irq_install(dev);
5669fcac 121 }
354ff967
ZY
122 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
123 /* Resume the modeset for every activated CRTC */
124 drm_helper_resume_force_mode(dev);
125 }
5669fcac
JB
126
127 return ret;
ba8bbcf6
JB
128}
129
11ed50ec
BG
130/**
131 * i965_reset - reset chip after a hang
132 * @dev: drm device to reset
133 * @flags: reset domains
134 *
135 * Reset the chip. Useful if a hang is detected. Returns zero on successful
136 * reset or otherwise an error code.
137 *
138 * Procedure is fairly simple:
139 * - reset the chip using the reset reg
140 * - re-init context state
141 * - re-init hardware status page
142 * - re-init ring buffer
143 * - re-init interrupt state
144 * - re-init display
145 */
146int i965_reset(struct drm_device *dev, u8 flags)
147{
148 drm_i915_private_t *dev_priv = dev->dev_private;
149 unsigned long timeout;
150 u8 gdrst;
151 /*
152 * We really should only reset the display subsystem if we actually
153 * need to
154 */
155 bool need_display = true;
156
157 mutex_lock(&dev->struct_mutex);
158
159 /*
160 * Clear request list
161 */
162 i915_gem_retire_requests(dev);
163
164 if (need_display)
165 i915_save_display(dev);
166
167 if (IS_I965G(dev) || IS_G4X(dev)) {
168 /*
169 * Set the domains we want to reset, then the reset bit (bit 0).
170 * Clear the reset bit after a while and wait for hardware status
171 * bit (bit 1) to be set
172 */
173 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
174 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
175 udelay(50);
176 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
177
178 /* ...we don't want to loop forever though, 500ms should be plenty */
179 timeout = jiffies + msecs_to_jiffies(500);
180 do {
181 udelay(100);
182 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
183 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
184
185 if (gdrst & 0x1) {
186 WARN(true, "i915: Failed to reset chip\n");
187 mutex_unlock(&dev->struct_mutex);
188 return -EIO;
189 }
190 } else {
191 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
192 return -ENODEV;
193 }
194
195 /* Ok, now get things going again... */
196
197 /*
198 * Everything depends on having the GTT running, so we need to start
199 * there. Fortunately we don't need to do this unless we reset the
200 * chip at a PCI level.
201 *
202 * Next we need to restore the context, but we don't use those
203 * yet either...
204 *
205 * Ring buffer needs to be re-initialized in the KMS case, or if X
206 * was running at the time of the reset (i.e. we weren't VT
207 * switched away).
208 */
209 if (drm_core_check_feature(dev, DRIVER_MODESET) ||
210 !dev_priv->mm.suspended) {
211 drm_i915_ring_buffer_t *ring = &dev_priv->ring;
212 struct drm_gem_object *obj = ring->ring_obj;
213 struct drm_i915_gem_object *obj_priv = obj->driver_private;
214 dev_priv->mm.suspended = 0;
215
216 /* Stop the ring if it's running. */
217 I915_WRITE(PRB0_CTL, 0);
218 I915_WRITE(PRB0_TAIL, 0);
219 I915_WRITE(PRB0_HEAD, 0);
220
221 /* Initialize the ring. */
222 I915_WRITE(PRB0_START, obj_priv->gtt_offset);
223 I915_WRITE(PRB0_CTL,
224 ((obj->size - 4096) & RING_NR_PAGES) |
225 RING_NO_REPORT |
226 RING_VALID);
227 if (!drm_core_check_feature(dev, DRIVER_MODESET))
228 i915_kernel_lost_context(dev);
229 else {
230 ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
231 ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
232 ring->space = ring->head - (ring->tail + 8);
233 if (ring->space < 0)
234 ring->space += ring->Size;
235 }
236
237 mutex_unlock(&dev->struct_mutex);
238 drm_irq_uninstall(dev);
239 drm_irq_install(dev);
240 mutex_lock(&dev->struct_mutex);
241 }
242
243 /*
244 * Display needs restore too...
245 */
246 if (need_display)
247 i915_restore_display(dev);
248
249 mutex_unlock(&dev->struct_mutex);
250 return 0;
251}
252
253
112b715e
KH
254static int __devinit
255i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
256{
257 return drm_get_dev(pdev, ent, &driver);
258}
259
260static void
261i915_pci_remove(struct pci_dev *pdev)
262{
263 struct drm_device *dev = pci_get_drvdata(pdev);
264
265 drm_put_dev(dev);
266}
267
268static int
269i915_pci_suspend(struct pci_dev *pdev, pm_message_t state)
270{
271 struct drm_device *dev = pci_get_drvdata(pdev);
272
273 return i915_suspend(dev, state);
274}
275
276static int
277i915_pci_resume(struct pci_dev *pdev)
278{
279 struct drm_device *dev = pci_get_drvdata(pdev);
280
281 return i915_resume(dev);
282}
283
de151cf6
JB
284static struct vm_operations_struct i915_gem_vm_ops = {
285 .fault = i915_gem_fault,
ab00b3e5
JB
286 .open = drm_gem_vm_open,
287 .close = drm_gem_vm_close,
de151cf6
JB
288};
289
1da177e4 290static struct drm_driver driver = {
792d2b9a
DA
291 /* don't use mtrr's here, the Xserver or user space app should
292 * deal with them for intel hardware.
293 */
673a394b
EA
294 .driver_features =
295 DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
296 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
22eae947 297 .load = i915_driver_load,
ba8bbcf6 298 .unload = i915_driver_unload,
673a394b 299 .open = i915_driver_open,
22eae947
DA
300 .lastclose = i915_driver_lastclose,
301 .preclose = i915_driver_preclose,
673a394b 302 .postclose = i915_driver_postclose,
ba8bbcf6
JB
303 .suspend = i915_suspend,
304 .resume = i915_resume,
cda17380 305 .device_is_agp = i915_driver_device_is_agp,
0a3e67a4
JB
306 .enable_vblank = i915_enable_vblank,
307 .disable_vblank = i915_disable_vblank,
1da177e4
LT
308 .irq_preinstall = i915_driver_irq_preinstall,
309 .irq_postinstall = i915_driver_irq_postinstall,
310 .irq_uninstall = i915_driver_irq_uninstall,
311 .irq_handler = i915_driver_irq_handler,
312 .reclaim_buffers = drm_core_reclaim_buffers,
313 .get_map_ofs = drm_core_get_map_ofs,
314 .get_reg_ofs = drm_core_get_reg_ofs,
7c1c2871
DA
315 .master_create = i915_master_create,
316 .master_destroy = i915_master_destroy,
955b12de 317#if defined(CONFIG_DEBUG_FS)
27c202ad
BG
318 .debugfs_init = i915_debugfs_init,
319 .debugfs_cleanup = i915_debugfs_cleanup,
955b12de 320#endif
673a394b
EA
321 .gem_init_object = i915_gem_init_object,
322 .gem_free_object = i915_gem_free_object,
de151cf6 323 .gem_vm_ops = &i915_gem_vm_ops,
1da177e4
LT
324 .ioctls = i915_ioctls,
325 .fops = {
b5e89ed5
DA
326 .owner = THIS_MODULE,
327 .open = drm_open,
328 .release = drm_release,
329 .ioctl = drm_ioctl,
de151cf6 330 .mmap = drm_gem_mmap,
b5e89ed5
DA
331 .poll = drm_poll,
332 .fasync = drm_fasync,
8ca7c1df 333#ifdef CONFIG_COMPAT
b5e89ed5 334 .compat_ioctl = i915_compat_ioctl,
8ca7c1df 335#endif
22eae947
DA
336 },
337
1da177e4 338 .pci_driver = {
22eae947
DA
339 .name = DRIVER_NAME,
340 .id_table = pciidlist,
112b715e
KH
341 .probe = i915_pci_probe,
342 .remove = i915_pci_remove,
343#ifdef CONFIG_PM
344 .resume = i915_pci_resume,
345 .suspend = i915_pci_suspend,
346#endif
22eae947 347 },
bc5f4523 348
22eae947
DA
349 .name = DRIVER_NAME,
350 .desc = DRIVER_DESC,
351 .date = DRIVER_DATE,
352 .major = DRIVER_MAJOR,
353 .minor = DRIVER_MINOR,
354 .patchlevel = DRIVER_PATCHLEVEL,
1da177e4
LT
355};
356
357static int __init i915_init(void)
358{
359 driver.num_ioctls = i915_max_ioctl;
79e53945
JB
360
361 /*
362 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
363 * explicitly disabled with the module pararmeter.
364 *
365 * Otherwise, just follow the parameter (defaulting to off).
366 *
367 * Allow optional vga_text_mode_force boot option to override
368 * the default behavior.
369 */
370#if defined(CONFIG_DRM_I915_KMS)
371 if (i915_modeset != 0)
372 driver.driver_features |= DRIVER_MODESET;
373#endif
374 if (i915_modeset == 1)
375 driver.driver_features |= DRIVER_MODESET;
376
377#ifdef CONFIG_VGA_CONSOLE
378 if (vgacon_text_force() && i915_modeset == -1)
379 driver.driver_features &= ~DRIVER_MODESET;
380#endif
381
1da177e4
LT
382 return drm_init(&driver);
383}
384
385static void __exit i915_exit(void)
386{
387 drm_exit(&driver);
388}
389
390module_init(i915_init);
391module_exit(i915_exit);
392
b5e89ed5
DA
393MODULE_AUTHOR(DRIVER_AUTHOR);
394MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4 395MODULE_LICENSE("GPL and additional rights");