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drm/i915: give up on 8xx lid status
[net-next-2.6.git] / drivers / gpu / drm / i915 / i915_debugfs.c
CommitLineData
2017263e
BG
1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
f3cd474b 30#include <linux/debugfs.h>
2017263e
BG
31#include "drmP.h"
32#include "drm.h"
33#include "i915_drm.h"
34#include "i915_drv.h"
35
36#define DRM_I915_RING_DEBUG 1
37
38
39#if defined(CONFIG_DEBUG_FS)
40
433e12f7
BG
41#define ACTIVE_LIST 1
42#define FLUSHING_LIST 2
43#define INACTIVE_LIST 3
2017263e 44
a6172a80
CW
45static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
46{
47 if (obj_priv->user_pin_count > 0)
48 return "P";
49 else if (obj_priv->pin_count > 0)
50 return "p";
51 else
52 return " ";
53}
54
55static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
56{
57 switch (obj_priv->tiling_mode) {
58 default:
59 case I915_TILING_NONE: return " ";
60 case I915_TILING_X: return "X";
61 case I915_TILING_Y: return "Y";
62 }
63}
64
433e12f7 65static int i915_gem_object_list_info(struct seq_file *m, void *data)
2017263e
BG
66{
67 struct drm_info_node *node = (struct drm_info_node *) m->private;
433e12f7
BG
68 uintptr_t list = (uintptr_t) node->info_ent->data;
69 struct list_head *head;
2017263e
BG
70 struct drm_device *dev = node->minor->dev;
71 drm_i915_private_t *dev_priv = dev->dev_private;
72 struct drm_i915_gem_object *obj_priv;
5e118f41 73 spinlock_t *lock = NULL;
2017263e 74
433e12f7
BG
75 switch (list) {
76 case ACTIVE_LIST:
77 seq_printf(m, "Active:\n");
5e118f41 78 lock = &dev_priv->mm.active_list_lock;
433e12f7
BG
79 head = &dev_priv->mm.active_list;
80 break;
81 case INACTIVE_LIST:
a17458fc 82 seq_printf(m, "Inactive:\n");
433e12f7
BG
83 head = &dev_priv->mm.inactive_list;
84 break;
85 case FLUSHING_LIST:
86 seq_printf(m, "Flushing:\n");
87 head = &dev_priv->mm.flushing_list;
88 break;
89 default:
90 DRM_INFO("Ooops, unexpected list\n");
91 return 0;
2017263e 92 }
2017263e 93
a17458fc
BG
94 if (lock)
95 spin_lock(lock);
433e12f7 96 list_for_each_entry(obj_priv, head, list)
2017263e
BG
97 {
98 struct drm_gem_object *obj = obj_priv->obj;
f4ceda89 99
fcffb947 100 seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
f4ceda89 101 obj,
a6172a80 102 get_pin_flag(obj_priv),
725ceaa0 103 obj->size,
f4ceda89 104 obj->read_domains, obj->write_domain,
725ceaa0 105 obj_priv->last_rendering_seqno,
fcffb947
CW
106 obj_priv->dirty ? " dirty" : "",
107 obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
f4ceda89
EA
108
109 if (obj->name)
110 seq_printf(m, " (name: %d)", obj->name);
111 if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
a01c75b3
BG
112 seq_printf(m, " (fence: %d)", obj_priv->fence_reg);
113 if (obj_priv->gtt_space != NULL)
114 seq_printf(m, " (gtt_offset: %08x)", obj_priv->gtt_offset);
115
f4ceda89 116 seq_printf(m, "\n");
2017263e 117 }
5e118f41
CW
118
119 if (lock)
120 spin_unlock(lock);
2017263e
BG
121 return 0;
122}
123
124static int i915_gem_request_info(struct seq_file *m, void *data)
125{
126 struct drm_info_node *node = (struct drm_info_node *) m->private;
127 struct drm_device *dev = node->minor->dev;
128 drm_i915_private_t *dev_priv = dev->dev_private;
129 struct drm_i915_gem_request *gem_request;
130
131 seq_printf(m, "Request:\n");
132 list_for_each_entry(gem_request, &dev_priv->mm.request_list, list) {
133 seq_printf(m, " %d @ %d\n",
134 gem_request->seqno,
135 (int) (jiffies - gem_request->emitted_jiffies));
136 }
137 return 0;
138}
139
140static int i915_gem_seqno_info(struct seq_file *m, void *data)
141{
142 struct drm_info_node *node = (struct drm_info_node *) m->private;
143 struct drm_device *dev = node->minor->dev;
144 drm_i915_private_t *dev_priv = dev->dev_private;
145
146 if (dev_priv->hw_status_page != NULL) {
147 seq_printf(m, "Current sequence: %d\n",
148 i915_get_gem_seqno(dev));
149 } else {
150 seq_printf(m, "Current sequence: hws uninitialized\n");
151 }
152 seq_printf(m, "Waiter sequence: %d\n",
153 dev_priv->mm.waiting_gem_seqno);
154 seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
155 return 0;
156}
157
158
159static int i915_interrupt_info(struct seq_file *m, void *data)
160{
161 struct drm_info_node *node = (struct drm_info_node *) m->private;
162 struct drm_device *dev = node->minor->dev;
163 drm_i915_private_t *dev_priv = dev->dev_private;
164
f2b115e6 165 if (!IS_IRONLAKE(dev)) {
5f6a1695
ZW
166 seq_printf(m, "Interrupt enable: %08x\n",
167 I915_READ(IER));
168 seq_printf(m, "Interrupt identity: %08x\n",
169 I915_READ(IIR));
170 seq_printf(m, "Interrupt mask: %08x\n",
171 I915_READ(IMR));
172 seq_printf(m, "Pipe A stat: %08x\n",
173 I915_READ(PIPEASTAT));
174 seq_printf(m, "Pipe B stat: %08x\n",
175 I915_READ(PIPEBSTAT));
176 } else {
177 seq_printf(m, "North Display Interrupt enable: %08x\n",
178 I915_READ(DEIER));
179 seq_printf(m, "North Display Interrupt identity: %08x\n",
180 I915_READ(DEIIR));
181 seq_printf(m, "North Display Interrupt mask: %08x\n",
182 I915_READ(DEIMR));
183 seq_printf(m, "South Display Interrupt enable: %08x\n",
184 I915_READ(SDEIER));
185 seq_printf(m, "South Display Interrupt identity: %08x\n",
186 I915_READ(SDEIIR));
187 seq_printf(m, "South Display Interrupt mask: %08x\n",
188 I915_READ(SDEIMR));
189 seq_printf(m, "Graphics Interrupt enable: %08x\n",
190 I915_READ(GTIER));
191 seq_printf(m, "Graphics Interrupt identity: %08x\n",
192 I915_READ(GTIIR));
193 seq_printf(m, "Graphics Interrupt mask: %08x\n",
194 I915_READ(GTIMR));
195 }
2017263e
BG
196 seq_printf(m, "Interrupts received: %d\n",
197 atomic_read(&dev_priv->irq_received));
198 if (dev_priv->hw_status_page != NULL) {
199 seq_printf(m, "Current sequence: %d\n",
200 i915_get_gem_seqno(dev));
201 } else {
202 seq_printf(m, "Current sequence: hws uninitialized\n");
203 }
204 seq_printf(m, "Waiter sequence: %d\n",
205 dev_priv->mm.waiting_gem_seqno);
206 seq_printf(m, "IRQ sequence: %d\n",
207 dev_priv->mm.irq_gem_seqno);
208 return 0;
209}
210
a6172a80
CW
211static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
212{
213 struct drm_info_node *node = (struct drm_info_node *) m->private;
214 struct drm_device *dev = node->minor->dev;
215 drm_i915_private_t *dev_priv = dev->dev_private;
216 int i;
217
218 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
219 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
220 for (i = 0; i < dev_priv->num_fence_regs; i++) {
221 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
222
223 if (obj == NULL) {
224 seq_printf(m, "Fenced object[%2d] = unused\n", i);
225 } else {
226 struct drm_i915_gem_object *obj_priv;
227
228 obj_priv = obj->driver_private;
229 seq_printf(m, "Fenced object[%2d] = %p: %s "
0b4d569d 230 "%08x %08zx %08x %s %08x %08x %d",
a6172a80
CW
231 i, obj, get_pin_flag(obj_priv),
232 obj_priv->gtt_offset,
233 obj->size, obj_priv->stride,
234 get_tiling_flag(obj_priv),
235 obj->read_domains, obj->write_domain,
236 obj_priv->last_rendering_seqno);
237 if (obj->name)
238 seq_printf(m, " (name: %d)", obj->name);
239 seq_printf(m, "\n");
240 }
241 }
242
243 return 0;
244}
245
2017263e
BG
246static int i915_hws_info(struct seq_file *m, void *data)
247{
248 struct drm_info_node *node = (struct drm_info_node *) m->private;
249 struct drm_device *dev = node->minor->dev;
250 drm_i915_private_t *dev_priv = dev->dev_private;
251 int i;
252 volatile u32 *hws;
253
254 hws = (volatile u32 *)dev_priv->hw_status_page;
255 if (hws == NULL)
256 return 0;
257
258 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
259 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
260 i * 4,
261 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
262 }
263 return 0;
264}
265
6911a9b8
BG
266static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
267{
268 int page, i;
269 uint32_t *mem;
270
271 for (page = 0; page < page_count; page++) {
ba86bf8b 272 mem = kmap_atomic(pages[page], KM_USER0);
6911a9b8
BG
273 for (i = 0; i < PAGE_SIZE; i += 4)
274 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
656cb793 275 kunmap_atomic(mem, KM_USER0);
6911a9b8
BG
276 }
277}
278
279static int i915_batchbuffer_info(struct seq_file *m, void *data)
280{
281 struct drm_info_node *node = (struct drm_info_node *) m->private;
282 struct drm_device *dev = node->minor->dev;
283 drm_i915_private_t *dev_priv = dev->dev_private;
284 struct drm_gem_object *obj;
285 struct drm_i915_gem_object *obj_priv;
286 int ret;
287
288 spin_lock(&dev_priv->mm.active_list_lock);
289
290 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
291 obj = obj_priv->obj;
292 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
4bdadb97 293 ret = i915_gem_object_get_pages(obj, 0);
6911a9b8
BG
294 if (ret) {
295 DRM_ERROR("Failed to get pages: %d\n", ret);
296 spin_unlock(&dev_priv->mm.active_list_lock);
297 return ret;
298 }
299
300 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
301 i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
302
303 i915_gem_object_put_pages(obj);
304 }
305 }
306
307 spin_unlock(&dev_priv->mm.active_list_lock);
308
309 return 0;
310}
311
312static int i915_ringbuffer_data(struct seq_file *m, void *data)
313{
314 struct drm_info_node *node = (struct drm_info_node *) m->private;
315 struct drm_device *dev = node->minor->dev;
316 drm_i915_private_t *dev_priv = dev->dev_private;
317 u8 *virt;
318 uint32_t *ptr, off;
319
320 if (!dev_priv->ring.ring_obj) {
321 seq_printf(m, "No ringbuffer setup\n");
322 return 0;
323 }
324
325 virt = dev_priv->ring.virtual_start;
326
327 for (off = 0; off < dev_priv->ring.Size; off += 4) {
328 ptr = (uint32_t *)(virt + off);
329 seq_printf(m, "%08x : %08x\n", off, *ptr);
330 }
331
332 return 0;
333}
334
335static int i915_ringbuffer_info(struct seq_file *m, void *data)
336{
337 struct drm_info_node *node = (struct drm_info_node *) m->private;
338 struct drm_device *dev = node->minor->dev;
339 drm_i915_private_t *dev_priv = dev->dev_private;
0ef82af7 340 unsigned int head, tail;
6911a9b8
BG
341
342 head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
343 tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
6911a9b8
BG
344
345 seq_printf(m, "RingHead : %08x\n", head);
346 seq_printf(m, "RingTail : %08x\n", tail);
6911a9b8 347 seq_printf(m, "RingSize : %08lx\n", dev_priv->ring.Size);
76cff81a 348 seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD));
6911a9b8
BG
349
350 return 0;
351}
352
63eeaf38
JB
353static int i915_error_state(struct seq_file *m, void *unused)
354{
355 struct drm_info_node *node = (struct drm_info_node *) m->private;
356 struct drm_device *dev = node->minor->dev;
357 drm_i915_private_t *dev_priv = dev->dev_private;
358 struct drm_i915_error_state *error;
359 unsigned long flags;
360
361 spin_lock_irqsave(&dev_priv->error_lock, flags);
362 if (!dev_priv->first_error) {
363 seq_printf(m, "no error state collected\n");
364 goto out;
365 }
366
367 error = dev_priv->first_error;
368
8a905236
JB
369 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
370 error->time.tv_usec);
63eeaf38
JB
371 seq_printf(m, "EIR: 0x%08x\n", error->eir);
372 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
373 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
374 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
375 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
376 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
377 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
378 if (IS_I965G(dev)) {
379 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
380 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
381 }
382
383out:
384 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
385
386 return 0;
387}
6911a9b8 388
f97108d1
JB
389static int i915_rstdby_delays(struct seq_file *m, void *unused)
390{
391 struct drm_info_node *node = (struct drm_info_node *) m->private;
392 struct drm_device *dev = node->minor->dev;
393 drm_i915_private_t *dev_priv = dev->dev_private;
394 u16 crstanddelay = I915_READ16(CRSTANDVID);
395
396 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
397
398 return 0;
399}
400
401static int i915_cur_delayinfo(struct seq_file *m, void *unused)
402{
403 struct drm_info_node *node = (struct drm_info_node *) m->private;
404 struct drm_device *dev = node->minor->dev;
405 drm_i915_private_t *dev_priv = dev->dev_private;
406 u16 rgvswctl = I915_READ16(MEMSWCTL);
407
408 seq_printf(m, "Last command: 0x%01x\n", (rgvswctl >> 13) & 0x3);
409 seq_printf(m, "Command status: %d\n", (rgvswctl >> 12) & 1);
410 seq_printf(m, "P%d DELAY 0x%02x\n", (rgvswctl >> 8) & 0xf,
411 rgvswctl & 0x3f);
412
413 return 0;
414}
415
416static int i915_delayfreq_table(struct seq_file *m, void *unused)
417{
418 struct drm_info_node *node = (struct drm_info_node *) m->private;
419 struct drm_device *dev = node->minor->dev;
420 drm_i915_private_t *dev_priv = dev->dev_private;
421 u32 delayfreq;
422 int i;
423
424 for (i = 0; i < 16; i++) {
425 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
426 seq_printf(m, "P%02dVIDFREQ: 0x%08x\n", i, delayfreq);
427 }
428
429 return 0;
430}
431
432static inline int MAP_TO_MV(int map)
433{
434 return 1250 - (map * 25);
435}
436
437static int i915_inttoext_table(struct seq_file *m, void *unused)
438{
439 struct drm_info_node *node = (struct drm_info_node *) m->private;
440 struct drm_device *dev = node->minor->dev;
441 drm_i915_private_t *dev_priv = dev->dev_private;
442 u32 inttoext;
443 int i;
444
445 for (i = 1; i <= 32; i++) {
446 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
447 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
448 }
449
450 return 0;
451}
452
453static int i915_drpc_info(struct seq_file *m, void *unused)
454{
455 struct drm_info_node *node = (struct drm_info_node *) m->private;
456 struct drm_device *dev = node->minor->dev;
457 drm_i915_private_t *dev_priv = dev->dev_private;
458 u32 rgvmodectl = I915_READ(MEMMODECTL);
459
460 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
461 "yes" : "no");
462 seq_printf(m, "Boost freq: %d\n",
463 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
464 MEMMODE_BOOST_FREQ_SHIFT);
465 seq_printf(m, "HW control enabled: %s\n",
466 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
467 seq_printf(m, "SW control enabled: %s\n",
468 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
469 seq_printf(m, "Gated voltage change: %s\n",
470 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
471 seq_printf(m, "Starting frequency: P%d\n",
472 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
473 seq_printf(m, "Max frequency: P%d\n",
474 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
475 seq_printf(m, "Min frequency: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
476
477 return 0;
478}
479
b5e50c3f
JB
480static int i915_fbc_status(struct seq_file *m, void *unused)
481{
482 struct drm_info_node *node = (struct drm_info_node *) m->private;
483 struct drm_device *dev = node->minor->dev;
484 struct drm_crtc *crtc;
485 drm_i915_private_t *dev_priv = dev->dev_private;
486 bool fbc_enabled = false;
487
488 if (!dev_priv->display.fbc_enabled) {
489 seq_printf(m, "FBC unsupported on this chipset\n");
490 return 0;
491 }
492
493 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
494 if (!crtc->enabled)
495 continue;
496 if (dev_priv->display.fbc_enabled(crtc))
497 fbc_enabled = true;
498 }
499
500 if (fbc_enabled) {
501 seq_printf(m, "FBC enabled\n");
502 } else {
503 seq_printf(m, "FBC disabled: ");
504 switch (dev_priv->no_fbc_reason) {
505 case FBC_STOLEN_TOO_SMALL:
506 seq_printf(m, "not enough stolen memory");
507 break;
508 case FBC_UNSUPPORTED_MODE:
509 seq_printf(m, "mode not supported");
510 break;
511 case FBC_MODE_TOO_LARGE:
512 seq_printf(m, "mode too large");
513 break;
514 case FBC_BAD_PLANE:
515 seq_printf(m, "FBC unsupported on plane");
516 break;
517 case FBC_NOT_TILED:
518 seq_printf(m, "scanout buffer not tiled");
519 break;
520 default:
521 seq_printf(m, "unknown reason");
522 }
523 seq_printf(m, "\n");
524 }
525 return 0;
526}
527
4a9bef37
JB
528static int i915_sr_status(struct seq_file *m, void *unused)
529{
530 struct drm_info_node *node = (struct drm_info_node *) m->private;
531 struct drm_device *dev = node->minor->dev;
532 drm_i915_private_t *dev_priv = dev->dev_private;
533 bool sr_enabled = false;
534
535 if (IS_I965G(dev) || IS_I945G(dev) || IS_I945GM(dev))
536 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
537 else if (IS_I915GM(dev))
538 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
539 else if (IS_PINEVIEW(dev))
540 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
541
542 seq_printf(m, "self-refresh: %s\n", sr_enabled ? "enabled" :
543 "disabled");
544
545 return 0;
546}
547
f3cd474b
CW
548static int
549i915_wedged_open(struct inode *inode,
550 struct file *filp)
551{
552 filp->private_data = inode->i_private;
553 return 0;
554}
555
556static ssize_t
557i915_wedged_read(struct file *filp,
558 char __user *ubuf,
559 size_t max,
560 loff_t *ppos)
561{
562 struct drm_device *dev = filp->private_data;
563 drm_i915_private_t *dev_priv = dev->dev_private;
564 char buf[80];
565 int len;
566
567 len = snprintf(buf, sizeof (buf),
568 "wedged : %d\n",
569 atomic_read(&dev_priv->mm.wedged));
570
571 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
572}
573
574static ssize_t
575i915_wedged_write(struct file *filp,
576 const char __user *ubuf,
577 size_t cnt,
578 loff_t *ppos)
579{
580 struct drm_device *dev = filp->private_data;
581 drm_i915_private_t *dev_priv = dev->dev_private;
582 char buf[20];
583 int val = 1;
584
585 if (cnt > 0) {
586 if (cnt > sizeof (buf) - 1)
587 return -EINVAL;
588
589 if (copy_from_user(buf, ubuf, cnt))
590 return -EFAULT;
591 buf[cnt] = 0;
592
593 val = simple_strtoul(buf, NULL, 0);
594 }
595
596 DRM_INFO("Manually setting wedged to %d\n", val);
597
598 atomic_set(&dev_priv->mm.wedged, val);
599 if (val) {
600 DRM_WAKEUP(&dev_priv->irq_queue);
601 queue_work(dev_priv->wq, &dev_priv->error_work);
602 }
603
604 return cnt;
605}
606
607static const struct file_operations i915_wedged_fops = {
608 .owner = THIS_MODULE,
609 .open = i915_wedged_open,
610 .read = i915_wedged_read,
611 .write = i915_wedged_write,
612};
613
614/* As the drm_debugfs_init() routines are called before dev->dev_private is
615 * allocated we need to hook into the minor for release. */
616static int
617drm_add_fake_info_node(struct drm_minor *minor,
618 struct dentry *ent,
619 const void *key)
620{
621 struct drm_info_node *node;
622
623 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
624 if (node == NULL) {
625 debugfs_remove(ent);
626 return -ENOMEM;
627 }
628
629 node->minor = minor;
630 node->dent = ent;
631 node->info_ent = (void *) key;
632 list_add(&node->list, &minor->debugfs_nodes.list);
633
634 return 0;
635}
636
637static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
638{
639 struct drm_device *dev = minor->dev;
640 struct dentry *ent;
641
642 ent = debugfs_create_file("i915_wedged",
643 S_IRUGO | S_IWUSR,
644 root, dev,
645 &i915_wedged_fops);
646 if (IS_ERR(ent))
647 return PTR_ERR(ent);
648
649 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
650}
9e3a6d15 651
27c202ad 652static struct drm_info_list i915_debugfs_list[] = {
433e12f7
BG
653 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
654 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
655 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2017263e
BG
656 {"i915_gem_request", i915_gem_request_info, 0},
657 {"i915_gem_seqno", i915_gem_seqno_info, 0},
a6172a80 658 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2017263e
BG
659 {"i915_gem_interrupt", i915_interrupt_info, 0},
660 {"i915_gem_hws", i915_hws_info, 0},
6911a9b8
BG
661 {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
662 {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
663 {"i915_batchbuffers", i915_batchbuffer_info, 0},
63eeaf38 664 {"i915_error_state", i915_error_state, 0},
f97108d1
JB
665 {"i915_rstdby_delays", i915_rstdby_delays, 0},
666 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
667 {"i915_delayfreq_table", i915_delayfreq_table, 0},
668 {"i915_inttoext_table", i915_inttoext_table, 0},
669 {"i915_drpc_info", i915_drpc_info, 0},
b5e50c3f 670 {"i915_fbc_status", i915_fbc_status, 0},
4a9bef37 671 {"i915_sr_status", i915_sr_status, 0},
2017263e 672};
27c202ad 673#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2017263e 674
27c202ad 675int i915_debugfs_init(struct drm_minor *minor)
2017263e 676{
f3cd474b
CW
677 int ret;
678
679 ret = i915_wedged_create(minor->debugfs_root, minor);
680 if (ret)
681 return ret;
682
27c202ad
BG
683 return drm_debugfs_create_files(i915_debugfs_list,
684 I915_DEBUGFS_ENTRIES,
2017263e
BG
685 minor->debugfs_root, minor);
686}
687
27c202ad 688void i915_debugfs_cleanup(struct drm_minor *minor)
2017263e 689{
27c202ad
BG
690 drm_debugfs_remove_files(i915_debugfs_list,
691 I915_DEBUGFS_ENTRIES, minor);
33db679b
KH
692 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
693 1, minor);
2017263e
BG
694}
695
696#endif /* CONFIG_DEBUG_FS */