]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/gpu/drm/i915/dvo_sil164.c
Merge branch 'flock' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl
[net-next-2.6.git] / drivers / gpu / drm / i915 / dvo_sil164.c
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1/**************************************************************************
2
3Copyright © 2006 Dave Airlie
4
5All Rights Reserved.
6
7Permission is hereby granted, free of charge, to any person obtaining a
8copy of this software and associated documentation files (the
9"Software"), to deal in the Software without restriction, including
10without limitation the rights to use, copy, modify, merge, publish,
11distribute, sub license, and/or sell copies of the Software, and to
12permit persons to whom the Software is furnished to do so, subject to
13the following conditions:
14
15The above copyright notice and this permission notice (including the
16next paragraph) shall be included in all copies or substantial portions
17of the Software.
18
19THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
23ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27**************************************************************************/
28
29#include "dvo.h"
30
31#define SIL164_VID 0x0001
32#define SIL164_DID 0x0006
33
34#define SIL164_VID_LO 0x00
35#define SIL164_VID_HI 0x01
36#define SIL164_DID_LO 0x02
37#define SIL164_DID_HI 0x03
38#define SIL164_REV 0x04
39#define SIL164_RSVD 0x05
40#define SIL164_FREQ_LO 0x06
41#define SIL164_FREQ_HI 0x07
42
43#define SIL164_REG8 0x08
44#define SIL164_8_VEN (1<<5)
45#define SIL164_8_HEN (1<<4)
46#define SIL164_8_DSEL (1<<3)
47#define SIL164_8_BSEL (1<<2)
48#define SIL164_8_EDGE (1<<1)
49#define SIL164_8_PD (1<<0)
50
51#define SIL164_REG9 0x09
52#define SIL164_9_VLOW (1<<7)
53#define SIL164_9_MSEL_MASK (0x7<<4)
54#define SIL164_9_TSEL (1<<3)
55#define SIL164_9_RSEN (1<<2)
56#define SIL164_9_HTPLG (1<<1)
57#define SIL164_9_MDI (1<<0)
58
59#define SIL164_REGC 0x0c
60
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61struct sil164_priv {
62 //I2CDevRec d;
63 bool quiet;
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64};
65
66#define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
67
68static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
69{
70 struct sil164_priv *sil = dvo->dev_priv;
f9c10a9b 71 struct i2c_adapter *adapter = dvo->i2c_bus;
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72 u8 out_buf[2];
73 u8 in_buf[2];
74
75 struct i2c_msg msgs[] = {
76 {
f9c10a9b 77 .addr = dvo->slave_addr,
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78 .flags = 0,
79 .len = 1,
80 .buf = out_buf,
81 },
82 {
f9c10a9b 83 .addr = dvo->slave_addr,
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84 .flags = I2C_M_RD,
85 .len = 1,
86 .buf = in_buf,
87 }
88 };
89
90 out_buf[0] = addr;
91 out_buf[1] = 0;
92
f899fc64 93 if (i2c_transfer(adapter, msgs, 2) == 2) {
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94 *ch = in_buf[0];
95 return true;
96 };
97
98 if (!sil->quiet) {
d0c3b04a 99 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
f899fc64 100 addr, adapter->name, dvo->slave_addr);
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101 }
102 return false;
103}
104
105static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
106{
107 struct sil164_priv *sil= dvo->dev_priv;
f9c10a9b 108 struct i2c_adapter *adapter = dvo->i2c_bus;
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109 uint8_t out_buf[2];
110 struct i2c_msg msg = {
f9c10a9b 111 .addr = dvo->slave_addr,
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112 .flags = 0,
113 .len = 2,
114 .buf = out_buf,
115 };
116
117 out_buf[0] = addr;
118 out_buf[1] = ch;
119
f899fc64 120 if (i2c_transfer(adapter, &msg, 1) == 1)
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121 return true;
122
123 if (!sil->quiet) {
d0c3b04a 124 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
f899fc64 125 addr, adapter->name, dvo->slave_addr);
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126 }
127
128 return false;
129}
130
131/* Silicon Image 164 driver for chip on i2c bus */
132static bool sil164_init(struct intel_dvo_device *dvo,
f9c10a9b 133 struct i2c_adapter *adapter)
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134{
135 /* this will detect the SIL164 chip on the specified i2c bus */
136 struct sil164_priv *sil;
137 unsigned char ch;
138
139 sil = kzalloc(sizeof(struct sil164_priv), GFP_KERNEL);
140 if (sil == NULL)
141 return false;
142
f9c10a9b 143 dvo->i2c_bus = adapter;
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144 dvo->dev_priv = sil;
145 sil->quiet = true;
146
147 if (!sil164_readb(dvo, SIL164_VID_LO, &ch))
148 goto out;
149
150 if (ch != (SIL164_VID & 0xff)) {
d0c3b04a 151 DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
f9c10a9b 152 ch, adapter->name, dvo->slave_addr);
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153 goto out;
154 }
155
156 if (!sil164_readb(dvo, SIL164_DID_LO, &ch))
157 goto out;
158
159 if (ch != (SIL164_DID & 0xff)) {
d0c3b04a 160 DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
f9c10a9b 161 ch, adapter->name, dvo->slave_addr);
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162 goto out;
163 }
164 sil->quiet = false;
165
d0c3b04a 166 DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
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167 return true;
168
169out:
170 kfree(sil);
171 return false;
172}
173
174static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
175{
176 uint8_t reg9;
177
178 sil164_readb(dvo, SIL164_REG9, &reg9);
179
180 if (reg9 & SIL164_9_HTPLG)
181 return connector_status_connected;
182 else
183 return connector_status_disconnected;
184}
185
186static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo,
187 struct drm_display_mode *mode)
188{
189 return MODE_OK;
190}
191
192static void sil164_mode_set(struct intel_dvo_device *dvo,
193 struct drm_display_mode *mode,
194 struct drm_display_mode *adjusted_mode)
195{
196 /* As long as the basics are set up, since we don't have clock
197 * dependencies in the mode setup, we can just leave the
198 * registers alone and everything will work fine.
199 */
200 /* recommended programming sequence from doc */
201 /*sil164_writeb(sil, 0x08, 0x30);
202 sil164_writeb(sil, 0x09, 0x00);
203 sil164_writeb(sil, 0x0a, 0x90);
204 sil164_writeb(sil, 0x0c, 0x89);
205 sil164_writeb(sil, 0x08, 0x31);*/
206 /* don't do much */
207 return;
208}
209
210/* set the SIL164 power state */
211static void sil164_dpms(struct intel_dvo_device *dvo, int mode)
212{
213 int ret;
214 unsigned char ch;
215
216 ret = sil164_readb(dvo, SIL164_REG8, &ch);
217 if (ret == false)
218 return;
219
220 if (mode == DRM_MODE_DPMS_ON)
221 ch |= SIL164_8_PD;
222 else
223 ch &= ~SIL164_8_PD;
224
225 sil164_writeb(dvo, SIL164_REG8, ch);
226 return;
227}
228
229static void sil164_dump_regs(struct intel_dvo_device *dvo)
230{
231 uint8_t val;
232
233 sil164_readb(dvo, SIL164_FREQ_LO, &val);
d0c3b04a 234 DRM_LOG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
79e53945 235 sil164_readb(dvo, SIL164_FREQ_HI, &val);
d0c3b04a 236 DRM_LOG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
79e53945 237 sil164_readb(dvo, SIL164_REG8, &val);
d0c3b04a 238 DRM_LOG_KMS("SIL164_REG8: 0x%02x\n", val);
79e53945 239 sil164_readb(dvo, SIL164_REG9, &val);
d0c3b04a 240 DRM_LOG_KMS("SIL164_REG9: 0x%02x\n", val);
79e53945 241 sil164_readb(dvo, SIL164_REGC, &val);
d0c3b04a 242 DRM_LOG_KMS("SIL164_REGC: 0x%02x\n", val);
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243}
244
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245static void sil164_destroy(struct intel_dvo_device *dvo)
246{
247 struct sil164_priv *sil = dvo->dev_priv;
248
249 if (sil) {
250 kfree(sil);
251 dvo->dev_priv = NULL;
252 }
253}
254
255struct intel_dvo_dev_ops sil164_ops = {
256 .init = sil164_init,
257 .detect = sil164_detect,
258 .mode_valid = sil164_mode_valid,
259 .mode_set = sil164_mode_set,
260 .dpms = sil164_dpms,
261 .dump_regs = sil164_dump_regs,
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262 .destroy = sil164_destroy,
263};