]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/gpu/drm/i810/i810_dma.c
llseek: automatically add .llseek fop
[net-next-2.6.git] / drivers / gpu / drm / i810 / i810_dma.c
CommitLineData
1da177e4
LT
1/* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33#include "drmP.h"
34#include "drm.h"
35#include "i810_drm.h"
36#include "i810_drv.h"
37#include <linux/interrupt.h> /* For task queue support */
38#include <linux/delay.h>
5a0e3ad6 39#include <linux/slab.h>
58374713 40#include <linux/smp_lock.h>
1da177e4
LT
41#include <linux/pagemap.h>
42
43#define I810_BUF_FREE 2
44#define I810_BUF_CLIENT 1
bc5f4523 45#define I810_BUF_HARDWARE 0
1da177e4
LT
46
47#define I810_BUF_UNMAPPED 0
48#define I810_BUF_MAPPED 1
49
056219e2 50static struct drm_buf *i810_freelist_get(struct drm_device * dev)
1da177e4 51{
cdd55a29 52 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
53 int i;
54 int used;
1da177e4
LT
55
56 /* Linear search might not be the best solution */
57
b5e89ed5 58 for (i = 0; i < dma->buf_count; i++) {
056219e2 59 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 60 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 61 /* In use is already a pointer */
b5e89ed5 62 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
1da177e4 63 I810_BUF_CLIENT);
aca791c2 64 if (used == I810_BUF_FREE)
1da177e4 65 return buf;
1da177e4 66 }
b5e89ed5 67 return NULL;
1da177e4
LT
68}
69
70/* This should only be called if the buffer is not sent to the hardware
71 * yet, the hardware updates in use for us once its on the ring buffer.
72 */
73
aca791c2 74static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
1da177e4 75{
b5e89ed5
DA
76 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
77 int used;
1da177e4 78
b5e89ed5
DA
79 /* In use is already a pointer */
80 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
1da177e4 81 if (used != I810_BUF_CLIENT) {
b5e89ed5
DA
82 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
83 return -EINVAL;
1da177e4
LT
84 }
85
b5e89ed5 86 return 0;
1da177e4
LT
87}
88
c94f7029 89static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
1da177e4 90{
eddca551
DA
91 struct drm_file *priv = filp->private_data;
92 struct drm_device *dev;
b5e89ed5 93 drm_i810_private_t *dev_priv;
056219e2 94 struct drm_buf *buf;
1da177e4
LT
95 drm_i810_buf_priv_t *buf_priv;
96
97 lock_kernel();
2c14f28b 98 dev = priv->minor->dev;
1da177e4 99 dev_priv = dev->dev_private;
b5e89ed5 100 buf = dev_priv->mmap_buffer;
1da177e4
LT
101 buf_priv = buf->dev_private;
102
103 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
104 vma->vm_file = filp;
105
b5e89ed5 106 buf_priv->currently_mapped = I810_BUF_MAPPED;
1da177e4
LT
107 unlock_kernel();
108
109 if (io_remap_pfn_range(vma, vma->vm_start,
3d77461e 110 vma->vm_pgoff,
b5e89ed5
DA
111 vma->vm_end - vma->vm_start, vma->vm_page_prot))
112 return -EAGAIN;
1da177e4
LT
113 return 0;
114}
115
2b8693c0 116static const struct file_operations i810_buffer_fops = {
b5e89ed5 117 .open = drm_open,
c94f7029 118 .release = drm_release,
ed8b6704 119 .unlocked_ioctl = drm_ioctl,
b5e89ed5
DA
120 .mmap = i810_mmap_buffers,
121 .fasync = drm_fasync,
6038f373 122 .llseek = noop_llseek,
c94f7029
DA
123};
124
aca791c2 125static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
1da177e4 126{
2c14f28b 127 struct drm_device *dev = file_priv->minor->dev;
1da177e4 128 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 129 drm_i810_private_t *dev_priv = dev->dev_private;
99ac48f5 130 const struct file_operations *old_fops;
1da177e4
LT
131 int retcode = 0;
132
b5e89ed5 133 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
1da177e4
LT
134 return -EINVAL;
135
b5e89ed5 136 down_write(&current->mm->mmap_sem);
6c340eac
EA
137 old_fops = file_priv->filp->f_op;
138 file_priv->filp->f_op = &i810_buffer_fops;
1da177e4 139 dev_priv->mmap_buffer = buf;
6c340eac 140 buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
b5e89ed5
DA
141 PROT_READ | PROT_WRITE,
142 MAP_SHARED, buf->bus_address);
1da177e4 143 dev_priv->mmap_buffer = NULL;
6c340eac 144 file_priv->filp->f_op = old_fops;
c7aed179 145 if (IS_ERR(buf_priv->virtual)) {
1da177e4
LT
146 /* Real error */
147 DRM_ERROR("mmap error\n");
c7aed179 148 retcode = PTR_ERR(buf_priv->virtual);
1da177e4
LT
149 buf_priv->virtual = NULL;
150 }
b5e89ed5 151 up_write(&current->mm->mmap_sem);
1da177e4
LT
152
153 return retcode;
154}
155
aca791c2 156static int i810_unmap_buffer(struct drm_buf *buf)
1da177e4
LT
157{
158 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
159 int retcode = 0;
160
161 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
162 return -EINVAL;
163
164 down_write(&current->mm->mmap_sem);
165 retcode = do_munmap(current->mm,
166 (unsigned long)buf_priv->virtual,
167 (size_t) buf->total);
168 up_write(&current->mm->mmap_sem);
169
b5e89ed5
DA
170 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
171 buf_priv->virtual = NULL;
1da177e4
LT
172
173 return retcode;
174}
175
aca791c2 176static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
6c340eac 177 struct drm_file *file_priv)
1da177e4 178{
056219e2 179 struct drm_buf *buf;
1da177e4
LT
180 drm_i810_buf_priv_t *buf_priv;
181 int retcode = 0;
182
183 buf = i810_freelist_get(dev);
184 if (!buf) {
185 retcode = -ENOMEM;
b5e89ed5 186 DRM_DEBUG("retcode=%d\n", retcode);
1da177e4
LT
187 return retcode;
188 }
189
6c340eac 190 retcode = i810_map_buffer(buf, file_priv);
1da177e4
LT
191 if (retcode) {
192 i810_freelist_put(dev, buf);
b5e89ed5 193 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
1da177e4
LT
194 return retcode;
195 }
6c340eac 196 buf->file_priv = file_priv;
1da177e4
LT
197 buf_priv = buf->dev_private;
198 d->granted = 1;
b5e89ed5
DA
199 d->request_idx = buf->idx;
200 d->request_size = buf->total;
201 d->virtual = buf_priv->virtual;
1da177e4
LT
202
203 return retcode;
204}
205
aca791c2 206static int i810_dma_cleanup(struct drm_device *dev)
1da177e4 207{
cdd55a29 208 struct drm_device_dma *dma = dev->dma;
1da177e4
LT
209
210 /* Make sure interrupts are disabled here because the uninstall ioctl
211 * may not have been called from userspace and after dev_private
212 * is freed, it's too late.
213 */
214 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
215 drm_irq_uninstall(dev);
216
217 if (dev->dev_private) {
218 int i;
b5e89ed5
DA
219 drm_i810_private_t *dev_priv =
220 (drm_i810_private_t *) dev->dev_private;
1da177e4 221
aca791c2 222 if (dev_priv->ring.virtual_start)
b9094d3a 223 drm_core_ioremapfree(&dev_priv->ring.map, dev);
b5e89ed5
DA
224 if (dev_priv->hw_status_page) {
225 pci_free_consistent(dev->pdev, PAGE_SIZE,
1da177e4
LT
226 dev_priv->hw_status_page,
227 dev_priv->dma_status_page);
b5e89ed5
DA
228 /* Need to rewrite hardware status page */
229 I810_WRITE(0x02080, 0x1ffff000);
1da177e4 230 }
9a298b2a 231 kfree(dev->dev_private);
b5e89ed5 232 dev->dev_private = NULL;
1da177e4
LT
233
234 for (i = 0; i < dma->buf_count; i++) {
056219e2 235 struct drm_buf *buf = dma->buflist[i];
1da177e4 236 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b9094d3a 237
b5e89ed5 238 if (buf_priv->kernel_virtual && buf->total)
b9094d3a 239 drm_core_ioremapfree(&buf_priv->map, dev);
1da177e4
LT
240 }
241 }
b5e89ed5 242 return 0;
1da177e4
LT
243}
244
aca791c2 245static int i810_wait_ring(struct drm_device *dev, int n)
1da177e4 246{
b5e89ed5
DA
247 drm_i810_private_t *dev_priv = dev->dev_private;
248 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
249 int iters = 0;
250 unsigned long end;
1da177e4
LT
251 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
252
b5e89ed5
DA
253 end = jiffies + (HZ * 3);
254 while (ring->space < n) {
255 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
256 ring->space = ring->head - (ring->tail + 8);
257 if (ring->space < 0)
258 ring->space += ring->Size;
259
1da177e4 260 if (ring->head != last_head) {
b5e89ed5 261 end = jiffies + (HZ * 3);
1da177e4
LT
262 last_head = ring->head;
263 }
b5e89ed5
DA
264
265 iters++;
1da177e4 266 if (time_before(end, jiffies)) {
b5e89ed5
DA
267 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
268 DRM_ERROR("lockup\n");
269 goto out_wait_ring;
1da177e4
LT
270 }
271 udelay(1);
272 }
273
aca791c2 274out_wait_ring:
b5e89ed5 275 return iters;
1da177e4
LT
276}
277
aca791c2 278static void i810_kernel_lost_context(struct drm_device *dev)
1da177e4 279{
b5e89ed5
DA
280 drm_i810_private_t *dev_priv = dev->dev_private;
281 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
1da177e4 282
b5e89ed5
DA
283 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
284 ring->tail = I810_READ(LP_RING + RING_TAIL);
285 ring->space = ring->head - (ring->tail + 8);
286 if (ring->space < 0)
287 ring->space += ring->Size;
1da177e4
LT
288}
289
aca791c2 290static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
1da177e4 291{
cdd55a29 292 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
293 int my_idx = 24;
294 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
295 int i;
1da177e4
LT
296
297 if (dma->buf_count > 1019) {
b5e89ed5
DA
298 /* Not enough space in the status page for the freelist */
299 return -EINVAL;
1da177e4
LT
300 }
301
b5e89ed5 302 for (i = 0; i < dma->buf_count; i++) {
056219e2 303 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 304 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 305
b5e89ed5
DA
306 buf_priv->in_use = hw_status++;
307 buf_priv->my_use_idx = my_idx;
308 my_idx += 4;
1da177e4 309
b5e89ed5 310 *buf_priv->in_use = I810_BUF_FREE;
1da177e4 311
b9094d3a
DA
312 buf_priv->map.offset = buf->bus_address;
313 buf_priv->map.size = buf->total;
314 buf_priv->map.type = _DRM_AGP;
315 buf_priv->map.flags = 0;
316 buf_priv->map.mtrr = 0;
317
318 drm_core_ioremap(&buf_priv->map, dev);
319 buf_priv->kernel_virtual = buf_priv->map.handle;
320
1da177e4
LT
321 }
322 return 0;
323}
324
aca791c2
NK
325static int i810_dma_initialize(struct drm_device *dev,
326 drm_i810_private_t *dev_priv,
327 drm_i810_init_t *init)
1da177e4 328{
55910517 329 struct drm_map_list *r_list;
b5e89ed5 330 memset(dev_priv, 0, sizeof(drm_i810_private_t));
1da177e4 331
bd1b331f 332 list_for_each_entry(r_list, &dev->maplist, head) {
1da177e4
LT
333 if (r_list->map &&
334 r_list->map->type == _DRM_SHM &&
b5e89ed5 335 r_list->map->flags & _DRM_CONTAINS_LOCK) {
1da177e4 336 dev_priv->sarea_map = r_list->map;
b5e89ed5
DA
337 break;
338 }
339 }
1da177e4
LT
340 if (!dev_priv->sarea_map) {
341 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
342 i810_dma_cleanup(dev);
343 DRM_ERROR("can not find sarea!\n");
344 return -EINVAL;
1da177e4
LT
345 }
346 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
347 if (!dev_priv->mmio_map) {
348 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
349 i810_dma_cleanup(dev);
350 DRM_ERROR("can not find mmio map!\n");
351 return -EINVAL;
1da177e4 352 }
d1f2b55a 353 dev->agp_buffer_token = init->buffers_offset;
1da177e4
LT
354 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
355 if (!dev->agp_buffer_map) {
356 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
357 i810_dma_cleanup(dev);
358 DRM_ERROR("can not find dma buffer map!\n");
359 return -EINVAL;
1da177e4
LT
360 }
361
362 dev_priv->sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 363 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
1da177e4 364
b5e89ed5
DA
365 dev_priv->ring.Start = init->ring_start;
366 dev_priv->ring.End = init->ring_end;
367 dev_priv->ring.Size = init->ring_size;
1da177e4 368
b9094d3a
DA
369 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
370 dev_priv->ring.map.size = init->ring_size;
371 dev_priv->ring.map.type = _DRM_AGP;
372 dev_priv->ring.map.flags = 0;
373 dev_priv->ring.map.mtrr = 0;
1da177e4 374
b9094d3a
DA
375 drm_core_ioremap(&dev_priv->ring.map, dev);
376
377 if (dev_priv->ring.map.handle == NULL) {
b5e89ed5
DA
378 dev->dev_private = (void *)dev_priv;
379 i810_dma_cleanup(dev);
380 DRM_ERROR("can not ioremap virtual address for"
1da177e4 381 " ring buffer\n");
20caafa6 382 return -ENOMEM;
1da177e4
LT
383 }
384
b9094d3a
DA
385 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
386
b5e89ed5 387 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
1da177e4
LT
388
389 dev_priv->w = init->w;
390 dev_priv->h = init->h;
391 dev_priv->pitch = init->pitch;
392 dev_priv->back_offset = init->back_offset;
393 dev_priv->depth_offset = init->depth_offset;
394 dev_priv->front_offset = init->front_offset;
395
396 dev_priv->overlay_offset = init->overlay_offset;
397 dev_priv->overlay_physical = init->overlay_physical;
398
399 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
400 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
401 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
402
b5e89ed5
DA
403 /* Program Hardware Status Page */
404 dev_priv->hw_status_page =
405 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
406 &dev_priv->dma_status_page);
407 if (!dev_priv->hw_status_page) {
1da177e4
LT
408 dev->dev_private = (void *)dev_priv;
409 i810_dma_cleanup(dev);
410 DRM_ERROR("Can not allocate hardware status page\n");
411 return -ENOMEM;
412 }
b5e89ed5
DA
413 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
414 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
1da177e4
LT
415
416 I810_WRITE(0x02080, dev_priv->dma_status_page);
b5e89ed5 417 DRM_DEBUG("Enabled hardware status page\n");
1da177e4 418
b5e89ed5 419 /* Now we need to init our freelist */
1da177e4
LT
420 if (i810_freelist_init(dev, dev_priv) != 0) {
421 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
422 i810_dma_cleanup(dev);
423 DRM_ERROR("Not enough space in the status page for"
1da177e4 424 " the freelist\n");
b5e89ed5 425 return -ENOMEM;
1da177e4
LT
426 }
427 dev->dev_private = (void *)dev_priv;
428
b5e89ed5 429 return 0;
1da177e4
LT
430}
431
c153f45f
EA
432static int i810_dma_init(struct drm_device *dev, void *data,
433 struct drm_file *file_priv)
1da177e4 434{
b5e89ed5 435 drm_i810_private_t *dev_priv;
c153f45f 436 drm_i810_init_t *init = data;
b5e89ed5 437 int retcode = 0;
1da177e4 438
c153f45f 439 switch (init->func) {
b5e89ed5
DA
440 case I810_INIT_DMA_1_4:
441 DRM_INFO("Using v1.4 init.\n");
9a298b2a 442 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
b5e89ed5
DA
443 if (dev_priv == NULL)
444 return -ENOMEM;
c153f45f 445 retcode = i810_dma_initialize(dev, dev_priv, init);
b5e89ed5
DA
446 break;
447
448 case I810_CLEANUP_DMA:
449 DRM_INFO("DMA Cleanup\n");
450 retcode = i810_dma_cleanup(dev);
451 break;
c153f45f
EA
452 default:
453 return -EINVAL;
1da177e4
LT
454 }
455
b5e89ed5 456 return retcode;
1da177e4
LT
457}
458
1da177e4
LT
459/* Most efficient way to verify state for the i810 is as it is
460 * emitted. Non-conformant state is silently dropped.
461 *
462 * Use 'volatile' & local var tmp to force the emitted values to be
463 * identical to the verified ones.
464 */
aca791c2 465static void i810EmitContextVerified(struct drm_device *dev,
b5e89ed5 466 volatile unsigned int *code)
1da177e4 467{
b5e89ed5 468 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
469 int i, j = 0;
470 unsigned int tmp;
471 RING_LOCALS;
472
b5e89ed5 473 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
1da177e4 474
b5e89ed5
DA
475 OUT_RING(GFX_OP_COLOR_FACTOR);
476 OUT_RING(code[I810_CTXREG_CF1]);
1da177e4 477
b5e89ed5
DA
478 OUT_RING(GFX_OP_STIPPLE);
479 OUT_RING(code[I810_CTXREG_ST1]);
1da177e4 480
b5e89ed5 481 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
1da177e4
LT
482 tmp = code[i];
483
b5e89ed5
DA
484 if ((tmp & (7 << 29)) == (3 << 29) &&
485 (tmp & (0x1f << 24)) < (0x1d << 24)) {
486 OUT_RING(tmp);
1da177e4 487 j++;
b5e89ed5
DA
488 } else
489 printk("constext state dropped!!!\n");
1da177e4
LT
490 }
491
492 if (j & 1)
b5e89ed5 493 OUT_RING(0);
1da177e4
LT
494
495 ADVANCE_LP_RING();
496}
497
aca791c2 498static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
1da177e4 499{
b5e89ed5 500 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
501 int i, j = 0;
502 unsigned int tmp;
503 RING_LOCALS;
504
b5e89ed5 505 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
1da177e4 506
b5e89ed5
DA
507 OUT_RING(GFX_OP_MAP_INFO);
508 OUT_RING(code[I810_TEXREG_MI1]);
509 OUT_RING(code[I810_TEXREG_MI2]);
510 OUT_RING(code[I810_TEXREG_MI3]);
1da177e4 511
b5e89ed5 512 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
1da177e4
LT
513 tmp = code[i];
514
b5e89ed5
DA
515 if ((tmp & (7 << 29)) == (3 << 29) &&
516 (tmp & (0x1f << 24)) < (0x1d << 24)) {
517 OUT_RING(tmp);
1da177e4 518 j++;
b5e89ed5
DA
519 } else
520 printk("texture state dropped!!!\n");
1da177e4
LT
521 }
522
523 if (j & 1)
b5e89ed5 524 OUT_RING(0);
1da177e4
LT
525
526 ADVANCE_LP_RING();
527}
528
1da177e4
LT
529/* Need to do some additional checking when setting the dest buffer.
530 */
aca791c2 531static void i810EmitDestVerified(struct drm_device *dev,
b5e89ed5 532 volatile unsigned int *code)
1da177e4 533{
b5e89ed5 534 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
535 unsigned int tmp;
536 RING_LOCALS;
537
b5e89ed5 538 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT
539
540 tmp = code[I810_DESTREG_DI1];
541 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
b5e89ed5
DA
542 OUT_RING(CMD_OP_DESTBUFFER_INFO);
543 OUT_RING(tmp);
1da177e4 544 } else
b5e89ed5
DA
545 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
546 tmp, dev_priv->front_di1, dev_priv->back_di1);
1da177e4
LT
547
548 /* invarient:
549 */
b5e89ed5
DA
550 OUT_RING(CMD_OP_Z_BUFFER_INFO);
551 OUT_RING(dev_priv->zi1);
1da177e4 552
b5e89ed5
DA
553 OUT_RING(GFX_OP_DESTBUFFER_VARS);
554 OUT_RING(code[I810_DESTREG_DV1]);
1da177e4 555
b5e89ed5
DA
556 OUT_RING(GFX_OP_DRAWRECT_INFO);
557 OUT_RING(code[I810_DESTREG_DR1]);
558 OUT_RING(code[I810_DESTREG_DR2]);
559 OUT_RING(code[I810_DESTREG_DR3]);
560 OUT_RING(code[I810_DESTREG_DR4]);
561 OUT_RING(0);
1da177e4
LT
562
563 ADVANCE_LP_RING();
564}
565
aca791c2 566static void i810EmitState(struct drm_device *dev)
1da177e4 567{
b5e89ed5
DA
568 drm_i810_private_t *dev_priv = dev->dev_private;
569 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 570 unsigned int dirty = sarea_priv->dirty;
b5e89ed5 571
3e684eae 572 DRM_DEBUG("%x\n", dirty);
1da177e4
LT
573
574 if (dirty & I810_UPLOAD_BUFFERS) {
b5e89ed5 575 i810EmitDestVerified(dev, sarea_priv->BufferState);
1da177e4
LT
576 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
577 }
578
579 if (dirty & I810_UPLOAD_CTX) {
b5e89ed5 580 i810EmitContextVerified(dev, sarea_priv->ContextState);
1da177e4
LT
581 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
582 }
583
584 if (dirty & I810_UPLOAD_TEX0) {
b5e89ed5 585 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
1da177e4
LT
586 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
587 }
588
589 if (dirty & I810_UPLOAD_TEX1) {
b5e89ed5 590 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
1da177e4
LT
591 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
592 }
593}
594
1da177e4
LT
595/* need to verify
596 */
aca791c2 597static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
b5e89ed5
DA
598 unsigned int clear_color,
599 unsigned int clear_zval)
1da177e4 600{
b5e89ed5
DA
601 drm_i810_private_t *dev_priv = dev->dev_private;
602 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 603 int nbox = sarea_priv->nbox;
eddca551 604 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT
605 int pitch = dev_priv->pitch;
606 int cpp = 2;
607 int i;
608 RING_LOCALS;
b5e89ed5
DA
609
610 if (dev_priv->current_page == 1) {
611 unsigned int tmp = flags;
612
1da177e4 613 flags &= ~(I810_FRONT | I810_BACK);
b5e89ed5
DA
614 if (tmp & I810_FRONT)
615 flags |= I810_BACK;
616 if (tmp & I810_BACK)
617 flags |= I810_FRONT;
1da177e4
LT
618 }
619
b5e89ed5 620 i810_kernel_lost_context(dev);
1da177e4 621
b5e89ed5
DA
622 if (nbox > I810_NR_SAREA_CLIPRECTS)
623 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 624
b5e89ed5 625 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT
626 unsigned int x = pbox->x1;
627 unsigned int y = pbox->y1;
628 unsigned int width = (pbox->x2 - x) * cpp;
629 unsigned int height = pbox->y2 - y;
630 unsigned int start = y * pitch + x * cpp;
631
632 if (pbox->x1 > pbox->x2 ||
633 pbox->y1 > pbox->y2 ||
b5e89ed5 634 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT
635 continue;
636
b5e89ed5
DA
637 if (flags & I810_FRONT) {
638 BEGIN_LP_RING(6);
639 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
640 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
641 OUT_RING((height << 16) | width);
642 OUT_RING(start);
643 OUT_RING(clear_color);
644 OUT_RING(0);
1da177e4
LT
645 ADVANCE_LP_RING();
646 }
647
b5e89ed5
DA
648 if (flags & I810_BACK) {
649 BEGIN_LP_RING(6);
650 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
651 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
652 OUT_RING((height << 16) | width);
653 OUT_RING(dev_priv->back_offset + start);
654 OUT_RING(clear_color);
655 OUT_RING(0);
1da177e4
LT
656 ADVANCE_LP_RING();
657 }
658
b5e89ed5
DA
659 if (flags & I810_DEPTH) {
660 BEGIN_LP_RING(6);
661 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
662 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
663 OUT_RING((height << 16) | width);
664 OUT_RING(dev_priv->depth_offset + start);
665 OUT_RING(clear_zval);
666 OUT_RING(0);
1da177e4
LT
667 ADVANCE_LP_RING();
668 }
669 }
670}
671
aca791c2 672static void i810_dma_dispatch_swap(struct drm_device *dev)
1da177e4 673{
b5e89ed5
DA
674 drm_i810_private_t *dev_priv = dev->dev_private;
675 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 676 int nbox = sarea_priv->nbox;
eddca551 677 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT
678 int pitch = dev_priv->pitch;
679 int cpp = 2;
680 int i;
681 RING_LOCALS;
682
683 DRM_DEBUG("swapbuffers\n");
684
b5e89ed5 685 i810_kernel_lost_context(dev);
1da177e4 686
b5e89ed5
DA
687 if (nbox > I810_NR_SAREA_CLIPRECTS)
688 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 689
b5e89ed5 690 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT
691 unsigned int w = pbox->x2 - pbox->x1;
692 unsigned int h = pbox->y2 - pbox->y1;
b5e89ed5 693 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
1da177e4
LT
694 unsigned int start = dst;
695
696 if (pbox->x1 > pbox->x2 ||
697 pbox->y1 > pbox->y2 ||
b5e89ed5 698 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT
699 continue;
700
b5e89ed5
DA
701 BEGIN_LP_RING(6);
702 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
703 OUT_RING(pitch | (0xCC << 16));
704 OUT_RING((h << 16) | (w * cpp));
1da177e4 705 if (dev_priv->current_page == 0)
b5e89ed5 706 OUT_RING(dev_priv->front_offset + start);
1da177e4 707 else
b5e89ed5
DA
708 OUT_RING(dev_priv->back_offset + start);
709 OUT_RING(pitch);
1da177e4 710 if (dev_priv->current_page == 0)
b5e89ed5 711 OUT_RING(dev_priv->back_offset + start);
1da177e4 712 else
b5e89ed5 713 OUT_RING(dev_priv->front_offset + start);
1da177e4
LT
714 ADVANCE_LP_RING();
715 }
716}
717
aca791c2
NK
718static void i810_dma_dispatch_vertex(struct drm_device *dev,
719 struct drm_buf *buf, int discard, int used)
1da177e4 720{
b5e89ed5 721 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4 722 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 723 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
eddca551 724 struct drm_clip_rect *box = sarea_priv->boxes;
b5e89ed5 725 int nbox = sarea_priv->nbox;
1da177e4
LT
726 unsigned long address = (unsigned long)buf->bus_address;
727 unsigned long start = address - dev->agp->base;
728 int i = 0;
b5e89ed5 729 RING_LOCALS;
1da177e4 730
b5e89ed5 731 i810_kernel_lost_context(dev);
1da177e4 732
b5e89ed5 733 if (nbox > I810_NR_SAREA_CLIPRECTS)
1da177e4
LT
734 nbox = I810_NR_SAREA_CLIPRECTS;
735
b5e89ed5 736 if (used > 4 * 1024)
1da177e4
LT
737 used = 0;
738
739 if (sarea_priv->dirty)
b5e89ed5 740 i810EmitState(dev);
1da177e4
LT
741
742 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
743 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
744
b5e89ed5
DA
745 *(u32 *) buf_priv->kernel_virtual =
746 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
1da177e4
LT
747
748 if (used & 4) {
c7aed179 749 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
1da177e4
LT
750 used += 4;
751 }
752
753 i810_unmap_buffer(buf);
754 }
755
756 if (used) {
757 do {
758 if (i < nbox) {
759 BEGIN_LP_RING(4);
b5e89ed5
DA
760 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
761 SC_ENABLE);
762 OUT_RING(GFX_OP_SCISSOR_INFO);
763 OUT_RING(box[i].x1 | (box[i].y1 << 16));
764 OUT_RING((box[i].x2 -
765 1) | ((box[i].y2 - 1) << 16));
1da177e4
LT
766 ADVANCE_LP_RING();
767 }
768
769 BEGIN_LP_RING(4);
b5e89ed5
DA
770 OUT_RING(CMD_OP_BATCH_BUFFER);
771 OUT_RING(start | BB1_PROTECTED);
772 OUT_RING(start + used - 4);
773 OUT_RING(0);
1da177e4
LT
774 ADVANCE_LP_RING();
775
776 } while (++i < nbox);
777 }
778
779 if (discard) {
780 dev_priv->counter++;
781
b5e89ed5
DA
782 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
783 I810_BUF_HARDWARE);
1da177e4
LT
784
785 BEGIN_LP_RING(8);
b5e89ed5
DA
786 OUT_RING(CMD_STORE_DWORD_IDX);
787 OUT_RING(20);
788 OUT_RING(dev_priv->counter);
789 OUT_RING(CMD_STORE_DWORD_IDX);
790 OUT_RING(buf_priv->my_use_idx);
791 OUT_RING(I810_BUF_FREE);
792 OUT_RING(CMD_REPORT_HEAD);
793 OUT_RING(0);
1da177e4
LT
794 ADVANCE_LP_RING();
795 }
796}
797
aca791c2 798static void i810_dma_dispatch_flip(struct drm_device *dev)
1da177e4 799{
b5e89ed5 800 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
801 int pitch = dev_priv->pitch;
802 RING_LOCALS;
803
3e684eae 804 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
b5e89ed5
DA
805 dev_priv->current_page,
806 dev_priv->sarea_priv->pf_current_page);
807
808 i810_kernel_lost_context(dev);
1da177e4 809
b5e89ed5
DA
810 BEGIN_LP_RING(2);
811 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
812 OUT_RING(0);
1da177e4
LT
813 ADVANCE_LP_RING();
814
b5e89ed5 815 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT
816 /* On i815 at least ASYNC is buggy */
817 /* pitch<<5 is from 11.2.8 p158,
818 its the pitch / 8 then left shifted 8,
819 so (pitch >> 3) << 8 */
b5e89ed5
DA
820 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
821 if (dev_priv->current_page == 0) {
822 OUT_RING(dev_priv->back_offset);
1da177e4
LT
823 dev_priv->current_page = 1;
824 } else {
b5e89ed5 825 OUT_RING(dev_priv->front_offset);
1da177e4
LT
826 dev_priv->current_page = 0;
827 }
828 OUT_RING(0);
829 ADVANCE_LP_RING();
830
831 BEGIN_LP_RING(2);
b5e89ed5
DA
832 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
833 OUT_RING(0);
1da177e4
LT
834 ADVANCE_LP_RING();
835
836 /* Increment the frame counter. The client-side 3D driver must
837 * throttle the framerate by waiting for this value before
838 * performing the swapbuffer ioctl.
839 */
840 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
841
842}
843
aca791c2 844static void i810_dma_quiescent(struct drm_device *dev)
1da177e4 845{
b5e89ed5
DA
846 drm_i810_private_t *dev_priv = dev->dev_private;
847 RING_LOCALS;
1da177e4 848
b5e89ed5 849 i810_kernel_lost_context(dev);
1da177e4 850
b5e89ed5
DA
851 BEGIN_LP_RING(4);
852 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
853 OUT_RING(CMD_REPORT_HEAD);
854 OUT_RING(0);
855 OUT_RING(0);
856 ADVANCE_LP_RING();
1da177e4 857
b5e89ed5 858 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4
LT
859}
860
aca791c2 861static int i810_flush_queue(struct drm_device *dev)
1da177e4 862{
b5e89ed5 863 drm_i810_private_t *dev_priv = dev->dev_private;
cdd55a29 864 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
865 int i, ret = 0;
866 RING_LOCALS;
867
b5e89ed5 868 i810_kernel_lost_context(dev);
1da177e4 869
b5e89ed5
DA
870 BEGIN_LP_RING(2);
871 OUT_RING(CMD_REPORT_HEAD);
872 OUT_RING(0);
873 ADVANCE_LP_RING();
1da177e4 874
b5e89ed5 875 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4 876
b5e89ed5 877 for (i = 0; i < dma->buf_count; i++) {
056219e2 878 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 879 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4
LT
880
881 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
882 I810_BUF_FREE);
883
884 if (used == I810_BUF_HARDWARE)
885 DRM_DEBUG("reclaimed from HARDWARE\n");
886 if (used == I810_BUF_CLIENT)
887 DRM_DEBUG("still on client\n");
888 }
889
b5e89ed5 890 return ret;
1da177e4
LT
891}
892
893/* Must be called with the lock held */
aca791c2 894static void i810_reclaim_buffers(struct drm_device *dev,
6c340eac 895 struct drm_file *file_priv)
1da177e4 896{
cdd55a29 897 struct drm_device_dma *dma = dev->dma;
b5e89ed5 898 int i;
1da177e4 899
b5e89ed5
DA
900 if (!dma)
901 return;
902 if (!dev->dev_private)
903 return;
904 if (!dma->buflist)
905 return;
1da177e4 906
b5e89ed5 907 i810_flush_queue(dev);
1da177e4
LT
908
909 for (i = 0; i < dma->buf_count; i++) {
056219e2 910 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 911 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 912
6c340eac 913 if (buf->file_priv == file_priv && buf_priv) {
1da177e4
LT
914 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
915 I810_BUF_FREE);
916
917 if (used == I810_BUF_CLIENT)
918 DRM_DEBUG("reclaimed from client\n");
919 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
b5e89ed5 920 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
1da177e4
LT
921 }
922 }
923}
924
c153f45f
EA
925static int i810_flush_ioctl(struct drm_device *dev, void *data,
926 struct drm_file *file_priv)
1da177e4 927{
6c340eac 928 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 929
b5e89ed5
DA
930 i810_flush_queue(dev);
931 return 0;
1da177e4
LT
932}
933
c153f45f
EA
934static int i810_dma_vertex(struct drm_device *dev, void *data,
935 struct drm_file *file_priv)
1da177e4 936{
cdd55a29 937 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
938 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
939 u32 *hw_status = dev_priv->hw_status_page;
940 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
941 dev_priv->sarea_priv;
c153f45f 942 drm_i810_vertex_t *vertex = data;
1da177e4 943
6c340eac 944 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 945
3e684eae 946 DRM_DEBUG("idx %d used %d discard %d\n",
c153f45f 947 vertex->idx, vertex->used, vertex->discard);
1da177e4 948
c153f45f 949 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
1da177e4
LT
950 return -EINVAL;
951
b5e89ed5 952 i810_dma_dispatch_vertex(dev,
c153f45f
EA
953 dma->buflist[vertex->idx],
954 vertex->discard, vertex->used);
1da177e4 955
c153f45f 956 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
1da177e4 957 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
b5e89ed5
DA
958 sarea_priv->last_enqueue = dev_priv->counter - 1;
959 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
960
961 return 0;
962}
963
c153f45f
EA
964static int i810_clear_bufs(struct drm_device *dev, void *data,
965 struct drm_file *file_priv)
1da177e4 966{
c153f45f 967 drm_i810_clear_t *clear = data;
1da177e4 968
6c340eac 969 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 970
b5e89ed5 971 /* GH: Someone's doing nasty things... */
aca791c2 972 if (!dev->dev_private)
b5e89ed5 973 return -EINVAL;
1da177e4 974
c153f45f
EA
975 i810_dma_dispatch_clear(dev, clear->flags,
976 clear->clear_color, clear->clear_depth);
b5e89ed5 977 return 0;
1da177e4
LT
978}
979
c153f45f
EA
980static int i810_swap_bufs(struct drm_device *dev, void *data,
981 struct drm_file *file_priv)
1da177e4 982{
3e684eae 983 DRM_DEBUG("\n");
1da177e4 984
6c340eac 985 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 986
b5e89ed5
DA
987 i810_dma_dispatch_swap(dev);
988 return 0;
1da177e4
LT
989}
990
c153f45f
EA
991static int i810_getage(struct drm_device *dev, void *data,
992 struct drm_file *file_priv)
1da177e4 993{
b5e89ed5
DA
994 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
995 u32 *hw_status = dev_priv->hw_status_page;
996 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
997 dev_priv->sarea_priv;
998
999 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1000 return 0;
1001}
1002
c153f45f
EA
1003static int i810_getbuf(struct drm_device *dev, void *data,
1004 struct drm_file *file_priv)
1da177e4 1005{
b5e89ed5 1006 int retcode = 0;
c153f45f 1007 drm_i810_dma_t *d = data;
b5e89ed5
DA
1008 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1009 u32 *hw_status = dev_priv->hw_status_page;
1010 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1011 dev_priv->sarea_priv;
1012
6c340eac 1013 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1014
c153f45f 1015 d->granted = 0;
1da177e4 1016
c153f45f 1017 retcode = i810_dma_get_buffer(dev, d, file_priv);
1da177e4
LT
1018
1019 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
ba25f9dc 1020 task_pid_nr(current), retcode, d->granted);
1da177e4 1021
b5e89ed5 1022 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1023
1024 return retcode;
1025}
1026
c153f45f
EA
1027static int i810_copybuf(struct drm_device *dev, void *data,
1028 struct drm_file *file_priv)
1da177e4
LT
1029{
1030 /* Never copy - 2.4.x doesn't need it */
1031 return 0;
1032}
1033
c153f45f
EA
1034static int i810_docopy(struct drm_device *dev, void *data,
1035 struct drm_file *file_priv)
1da177e4
LT
1036{
1037 /* Never copy - 2.4.x doesn't need it */
1038 return 0;
1039}
1040
aca791c2 1041static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
b5e89ed5 1042 unsigned int last_render)
1da177e4
LT
1043{
1044 drm_i810_private_t *dev_priv = dev->dev_private;
1045 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1046 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1047 unsigned long address = (unsigned long)buf->bus_address;
1048 unsigned long start = address - dev->agp->base;
1049 int u;
1050 RING_LOCALS;
1051
1052 i810_kernel_lost_context(dev);
1053
b5e89ed5 1054 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
aca791c2 1055 if (u != I810_BUF_CLIENT)
1da177e4 1056 DRM_DEBUG("MC found buffer that isn't mine!\n");
1da177e4 1057
b5e89ed5 1058 if (used > 4 * 1024)
1da177e4
LT
1059 used = 0;
1060
1061 sarea_priv->dirty = 0x7f;
1062
3e684eae 1063 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1da177e4
LT
1064
1065 dev_priv->counter++;
1066 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1da177e4
LT
1067 DRM_DEBUG("start : %lx\n", start);
1068 DRM_DEBUG("used : %d\n", used);
1069 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1070
1071 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1072 if (used & 4) {
c7aed179 1073 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1da177e4
LT
1074 used += 4;
1075 }
1076
1077 i810_unmap_buffer(buf);
1078 }
1079 BEGIN_LP_RING(4);
b5e89ed5
DA
1080 OUT_RING(CMD_OP_BATCH_BUFFER);
1081 OUT_RING(start | BB1_PROTECTED);
1082 OUT_RING(start + used - 4);
1083 OUT_RING(0);
1da177e4
LT
1084 ADVANCE_LP_RING();
1085
1da177e4 1086 BEGIN_LP_RING(8);
b5e89ed5
DA
1087 OUT_RING(CMD_STORE_DWORD_IDX);
1088 OUT_RING(buf_priv->my_use_idx);
1089 OUT_RING(I810_BUF_FREE);
1090 OUT_RING(0);
1091
1092 OUT_RING(CMD_STORE_DWORD_IDX);
1093 OUT_RING(16);
1094 OUT_RING(last_render);
1095 OUT_RING(0);
1da177e4
LT
1096 ADVANCE_LP_RING();
1097}
1098
c153f45f
EA
1099static int i810_dma_mc(struct drm_device *dev, void *data,
1100 struct drm_file *file_priv)
1da177e4 1101{
cdd55a29 1102 struct drm_device_dma *dma = dev->dma;
b5e89ed5 1103 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4
LT
1104 u32 *hw_status = dev_priv->hw_status_page;
1105 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 1106 dev_priv->sarea_priv;
c153f45f 1107 drm_i810_mc_t *mc = data;
1da177e4 1108
6c340eac 1109 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1110
c153f45f 1111 if (mc->idx >= dma->buf_count || mc->idx < 0)
1da177e4
LT
1112 return -EINVAL;
1113
c153f45f
EA
1114 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1115 mc->last_render);
1da177e4 1116
c153f45f 1117 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1da177e4 1118 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
b5e89ed5
DA
1119 sarea_priv->last_enqueue = dev_priv->counter - 1;
1120 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1121
1122 return 0;
1123}
1124
c153f45f
EA
1125static int i810_rstatus(struct drm_device *dev, void *data,
1126 struct drm_file *file_priv)
1da177e4 1127{
b5e89ed5 1128 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1129
b5e89ed5 1130 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1da177e4
LT
1131}
1132
c153f45f
EA
1133static int i810_ov0_info(struct drm_device *dev, void *data,
1134 struct drm_file *file_priv)
1da177e4 1135{
b5e89ed5 1136 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
c153f45f
EA
1137 drm_i810_overlay_t *ov = data;
1138
1139 ov->offset = dev_priv->overlay_offset;
1140 ov->physical = dev_priv->overlay_physical;
1da177e4 1141
1da177e4
LT
1142 return 0;
1143}
1144
c153f45f
EA
1145static int i810_fstatus(struct drm_device *dev, void *data,
1146 struct drm_file *file_priv)
1da177e4 1147{
b5e89ed5 1148 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1149
6c340eac 1150 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4
LT
1151 return I810_READ(0x30008);
1152}
1153
c153f45f
EA
1154static int i810_ov0_flip(struct drm_device *dev, void *data,
1155 struct drm_file *file_priv)
1da177e4 1156{
b5e89ed5 1157 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1158
6c340eac 1159 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1160
aca791c2 1161 /* Tell the overlay to update */
b5e89ed5 1162 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1da177e4
LT
1163
1164 return 0;
1165}
1166
1da177e4 1167/* Not sure why this isn't set all the time:
b5e89ed5 1168 */
aca791c2 1169static void i810_do_init_pageflip(struct drm_device *dev)
1da177e4
LT
1170{
1171 drm_i810_private_t *dev_priv = dev->dev_private;
b5e89ed5 1172
3e684eae 1173 DRM_DEBUG("\n");
1da177e4
LT
1174 dev_priv->page_flipping = 1;
1175 dev_priv->current_page = 0;
1176 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1177}
1178
aca791c2 1179static int i810_do_cleanup_pageflip(struct drm_device *dev)
1da177e4
LT
1180{
1181 drm_i810_private_t *dev_priv = dev->dev_private;
1182
3e684eae 1183 DRM_DEBUG("\n");
1da177e4 1184 if (dev_priv->current_page != 0)
b5e89ed5 1185 i810_dma_dispatch_flip(dev);
1da177e4
LT
1186
1187 dev_priv->page_flipping = 0;
1188 return 0;
1189}
1190
c153f45f
EA
1191static int i810_flip_bufs(struct drm_device *dev, void *data,
1192 struct drm_file *file_priv)
1da177e4 1193{
1da177e4
LT
1194 drm_i810_private_t *dev_priv = dev->dev_private;
1195
3e684eae 1196 DRM_DEBUG("\n");
1da177e4 1197
6c340eac 1198 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1199
b5e89ed5
DA
1200 if (!dev_priv->page_flipping)
1201 i810_do_init_pageflip(dev);
1da177e4 1202
b5e89ed5
DA
1203 i810_dma_dispatch_flip(dev);
1204 return 0;
1da177e4
LT
1205}
1206
eddca551 1207int i810_driver_load(struct drm_device *dev, unsigned long flags)
22eae947
DA
1208{
1209 /* i810 has 4 more counters */
1210 dev->counters += 4;
1211 dev->types[6] = _DRM_STAT_IRQ;
1212 dev->types[7] = _DRM_STAT_PRIMARY;
1213 dev->types[8] = _DRM_STAT_SECONDARY;
1214 dev->types[9] = _DRM_STAT_DMA;
1215
1216 return 0;
1217}
1218
aca791c2 1219void i810_driver_lastclose(struct drm_device *dev)
1da177e4 1220{
b5e89ed5 1221 i810_dma_cleanup(dev);
1da177e4
LT
1222}
1223
aca791c2 1224void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1da177e4
LT
1225{
1226 if (dev->dev_private) {
1227 drm_i810_private_t *dev_priv = dev->dev_private;
aca791c2 1228 if (dev_priv->page_flipping)
1da177e4 1229 i810_do_cleanup_pageflip(dev);
1da177e4
LT
1230 }
1231}
1232
aca791c2 1233void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
6c340eac 1234 struct drm_file *file_priv)
1da177e4 1235{
6c340eac 1236 i810_reclaim_buffers(dev, file_priv);
1da177e4
LT
1237}
1238
aca791c2 1239int i810_driver_dma_quiescent(struct drm_device *dev)
1da177e4 1240{
b5e89ed5 1241 i810_dma_quiescent(dev);
1da177e4
LT
1242 return 0;
1243}
1244
58374713
AB
1245/*
1246 * call the drm_ioctl under the big kernel lock because
1247 * to lock against the i810_mmap_buffers function.
1248 */
1249long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1250{
1251 int ret;
1252 lock_kernel();
1253 ret = drm_ioctl(file, cmd, arg);
1254 unlock_kernel();
1255 return ret;
1256}
1257
c153f45f 1258struct drm_ioctl_desc i810_ioctls[] = {
1b2f1489
DA
1259 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1260 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1261 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1262 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1263 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1264 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1265 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1266 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1267 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1268 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1269 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1270 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1271 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1272 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1273 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1da177e4
LT
1274};
1275
1276int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
cda17380
DA
1277
1278/**
1279 * Determine if the device really is AGP or not.
1280 *
1281 * All Intel graphics chipsets are treated as AGP, even if they are really
1282 * PCI-e.
1283 *
1284 * \param dev The device to be tested.
1285 *
1286 * \returns
1287 * A value of 1 is always retured to indictate every i810 is AGP.
1288 */
aca791c2 1289int i810_driver_device_is_agp(struct drm_device *dev)
cda17380
DA
1290{
1291 return 1;
1292}