[net-next-2.6.git] / drivers / dma / shdma.h

/*
 * Renesas SuperH DMA Engine support
 *
 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
 *
 * This is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 */
#ifndef __DMA_SHDMA_H
#define __DMA_SHDMA_H

#include <linux/dmaengine.h>
#include <linux/interrupt.h>
#include <linux/list.h>

#define SH_DMAC_MAX_CHANNELS 6
#define SH_DMA_SLAVE_NUMBER 256
#define SH_DMA_TCR_MAX 0x00FFFFFF	/* 16MB */

struct device;

struct sh_dmae_chan {
	dma_cookie_t completed_cookie;	/* The maximum cookie completed */
	spinlock_t desc_lock;		/* Descriptor operation lock */
	struct list_head ld_queue;	/* Link descriptors queue */
	struct list_head ld_free;	/* Link descriptors free */
	struct dma_chan common;		/* DMA common channel */
	struct device *dev;		/* Channel device */
	struct tasklet_struct tasklet;	/* Tasklet */
	int descs_allocated;		/* desc count */
	int xmit_shift;			/* log_2(bytes_per_xfer) */
	int irq;
	int id;				/* Raw id of this channel */
	u32 __iomem *base;
	char dev_id[16];		/* unique name per DMAC of channel */
};

struct sh_dmae_device {
	struct dma_device common;
	struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS];
	struct sh_dmae_pdata *pdata;
	u32 __iomem *chan_reg;
	u16 __iomem *dmars;
};

#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common)
#define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
#define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)

#endif	/* __DMA_SHDMA_H */
Commit	Line	Data
d8902adc NI	1	/*
	2	* Renesas SuperH DMA Engine support
	3	*
	4	* Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
	5	* Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
	6	*
	7	* This is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	*/
	13	#ifndef __DMA_SHDMA_H
	14	#define __DMA_SHDMA_H
	15
d8902adc	16	#include <linux/dmaengine.h>
3542a113 GL	17	#include <linux/interrupt.h>
3542a113 GL	18	#include <linux/list.h>
d8902adc	19
b2623a61	20	#define SH_DMAC_MAX_CHANNELS 6
02ca5083	21	#define SH_DMA_SLAVE_NUMBER 256
d8902adc NI	22	#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */
d8902adc NI	23
3542a113 GL	24	struct device;
3542a113 GL	25
d8902adc NI	26	struct sh_dmae_chan {
d8902adc NI	27	dma_cookie_t completed_cookie; /* The maximum cookie completed */
86d61b33 GL	28	spinlock_t desc_lock; /* Descriptor operation lock */
	29	struct list_head ld_queue; /* Link descriptors queue */
	30	struct list_head ld_free; /* Link descriptors free */
	31	struct dma_chan common; /* DMA common channel */
	32	struct device dev; / Channel device */
d8902adc	33	struct tasklet_struct tasklet; /* Tasklet */
86d61b33	34	int descs_allocated; /* desc count */
cfefe997	35	int xmit_shift; /* log_2(bytes_per_xfer) */
027811b9	36	int irq;
d8902adc	37	int id; /* Raw id of this channel */
027811b9	38	u32 __iomem *base;
86d61b33	39	char dev_id[16]; /* unique name per DMAC of channel */
d8902adc NI	40	};
	41
	42	struct sh_dmae_device {
	43	struct dma_device common;
8b1935e6	44	struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS];
027811b9 GL	45	struct sh_dmae_pdata *pdata;
	46	u32 __iomem *chan_reg;
	47	u16 __iomem *dmars;
d8902adc NI	48	};
	49
	50	#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common)
	51	#define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
	52	#define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
	53
	54	#endif /* __DMA_SHDMA_H */