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[CRYPTO] geode: use consistent IV copy
[net-next-2.6.git] / drivers / crypto / geode-aes.c
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1 /* Copyright (C) 2004-2006, Advanced Micro Devices, Inc.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
7 */
8
9#include <linux/module.h>
10#include <linux/kernel.h>
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11#include <linux/pci.h>
12#include <linux/pci_ids.h>
13#include <linux/crypto.h>
14#include <linux/spinlock.h>
15#include <crypto/algapi.h>
89e12654 16#include <crypto/aes.h>
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17
18#include <asm/io.h>
19#include <asm/delay.h>
20
21#include "geode-aes.h"
22
23/* Register definitions */
24
25#define AES_CTRLA_REG 0x0000
26
27#define AES_CTRL_START 0x01
28#define AES_CTRL_DECRYPT 0x00
29#define AES_CTRL_ENCRYPT 0x02
30#define AES_CTRL_WRKEY 0x04
31#define AES_CTRL_DCA 0x08
32#define AES_CTRL_SCA 0x10
33#define AES_CTRL_CBC 0x20
34
35#define AES_INTR_REG 0x0008
36
37#define AES_INTRA_PENDING (1 << 16)
38#define AES_INTRB_PENDING (1 << 17)
39
40#define AES_INTR_PENDING (AES_INTRA_PENDING | AES_INTRB_PENDING)
41#define AES_INTR_MASK 0x07
42
43#define AES_SOURCEA_REG 0x0010
44#define AES_DSTA_REG 0x0014
45#define AES_LENA_REG 0x0018
46#define AES_WRITEKEY0_REG 0x0030
47#define AES_WRITEIV0_REG 0x0040
48
49/* A very large counter that is used to gracefully bail out of an
50 * operation in case of trouble
51 */
52
53#define AES_OP_TIMEOUT 0x50000
54
55/* Static structures */
56
57static void __iomem * _iobase;
58static spinlock_t lock;
59
60/* Write a 128 bit field (either a writable key or IV) */
61static inline void
62_writefield(u32 offset, void *value)
63{
64 int i;
65 for(i = 0; i < 4; i++)
66 iowrite32(((u32 *) value)[i], _iobase + offset + (i * 4));
67}
68
69/* Read a 128 bit field (either a writable key or IV) */
70static inline void
71_readfield(u32 offset, void *value)
72{
73 int i;
74 for(i = 0; i < 4; i++)
75 ((u32 *) value)[i] = ioread32(_iobase + offset + (i * 4));
76}
77
78static int
79do_crypt(void *src, void *dst, int len, u32 flags)
80{
81 u32 status;
82 u32 counter = AES_OP_TIMEOUT;
83
84 iowrite32(virt_to_phys(src), _iobase + AES_SOURCEA_REG);
85 iowrite32(virt_to_phys(dst), _iobase + AES_DSTA_REG);
86 iowrite32(len, _iobase + AES_LENA_REG);
87
88 /* Start the operation */
89 iowrite32(AES_CTRL_START | flags, _iobase + AES_CTRLA_REG);
90
91 do
92 status = ioread32(_iobase + AES_INTR_REG);
93 while(!(status & AES_INTRA_PENDING) && --counter);
94
95 /* Clear the event */
96 iowrite32((status & 0xFF) | AES_INTRA_PENDING, _iobase + AES_INTR_REG);
97 return counter ? 0 : 1;
98}
99
ab782705 100static unsigned int
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101geode_aes_crypt(struct geode_aes_op *op)
102{
9fe757b0 103 u32 flags = 0;
5efee174 104 unsigned long iflags;
9fe757b0 105
761e7846 106 if (op->len == 0)
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107 return 0;
108
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109 /* If the source and destination is the same, then
110 * we need to turn on the coherent flags, otherwise
111 * we don't need to worry
112 */
113
2e21630d 114 flags |= (AES_CTRL_DCA | AES_CTRL_SCA);
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115
116 if (op->dir == AES_DIR_ENCRYPT)
117 flags |= AES_CTRL_ENCRYPT;
118
119 /* Start the critical section */
120
121 spin_lock_irqsave(&lock, iflags);
122
123 if (op->mode == AES_MODE_CBC) {
124 flags |= AES_CTRL_CBC;
125 _writefield(AES_WRITEIV0_REG, op->iv);
126 }
127
761e7846 128 if (!(op->flags & AES_FLAGS_HIDDENKEY)) {
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129 flags |= AES_CTRL_WRKEY;
130 _writefield(AES_WRITEKEY0_REG, op->key);
131 }
132
133 do_crypt(op->src, op->dst, op->len, flags);
134
135 if (op->mode == AES_MODE_CBC)
136 _readfield(AES_WRITEIV0_REG, op->iv);
137
138 spin_unlock_irqrestore(&lock, iflags);
139
140 return op->len;
141}
142
143/* CRYPTO-API Functions */
144
145static int
146geode_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int len)
147{
148 struct geode_aes_op *op = crypto_tfm_ctx(tfm);
149
150 if (len != AES_KEY_LENGTH) {
151 tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
152 return -EINVAL;
153 }
154
155 memcpy(op->key, key, len);
156 return 0;
157}
158
159static void
160geode_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
161{
162 struct geode_aes_op *op = crypto_tfm_ctx(tfm);
163
164 if ((out == NULL) || (in == NULL))
165 return;
166
167 op->src = (void *) in;
168 op->dst = (void *) out;
169 op->mode = AES_MODE_ECB;
170 op->flags = 0;
171 op->len = AES_MIN_BLOCK_SIZE;
172 op->dir = AES_DIR_ENCRYPT;
173
174 geode_aes_crypt(op);
175}
176
177
178static void
179geode_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
180{
181 struct geode_aes_op *op = crypto_tfm_ctx(tfm);
182
183 if ((out == NULL) || (in == NULL))
184 return;
185
186 op->src = (void *) in;
187 op->dst = (void *) out;
188 op->mode = AES_MODE_ECB;
189 op->flags = 0;
190 op->len = AES_MIN_BLOCK_SIZE;
191 op->dir = AES_DIR_DECRYPT;
192
193 geode_aes_crypt(op);
194}
195
196
197static struct crypto_alg geode_alg = {
198 .cra_name = "aes",
199 .cra_driver_name = "geode-aes-128",
200 .cra_priority = 300,
201 .cra_alignmask = 15,
202 .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
203 .cra_blocksize = AES_MIN_BLOCK_SIZE,
204 .cra_ctxsize = sizeof(struct geode_aes_op),
205 .cra_module = THIS_MODULE,
206 .cra_list = LIST_HEAD_INIT(geode_alg.cra_list),
207 .cra_u = {
208 .cipher = {
209 .cia_min_keysize = AES_KEY_LENGTH,
210 .cia_max_keysize = AES_KEY_LENGTH,
211 .cia_setkey = geode_setkey,
212 .cia_encrypt = geode_encrypt,
213 .cia_decrypt = geode_decrypt
214 }
215 }
216};
217
218static int
219geode_cbc_decrypt(struct blkcipher_desc *desc,
220 struct scatterlist *dst, struct scatterlist *src,
221 unsigned int nbytes)
222{
223 struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
224 struct blkcipher_walk walk;
225 int err, ret;
226
227 blkcipher_walk_init(&walk, dst, src, nbytes);
228 err = blkcipher_walk_virt(desc, &walk);
2d506d4f 229 memcpy(op->iv, walk.iv, AES_IV_LENGTH);
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230
231 while((nbytes = walk.nbytes)) {
232 op->src = walk.src.virt.addr,
233 op->dst = walk.dst.virt.addr;
234 op->mode = AES_MODE_CBC;
235 op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
236 op->dir = AES_DIR_DECRYPT;
237
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238 ret = geode_aes_crypt(op);
239
9fe757b0 240 nbytes -= ret;
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241 err = blkcipher_walk_done(desc, &walk, nbytes);
242 }
243
2d506d4f 244 memcpy(walk.iv, op->iv, AES_IV_LENGTH);
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245 return err;
246}
247
248static int
249geode_cbc_encrypt(struct blkcipher_desc *desc,
250 struct scatterlist *dst, struct scatterlist *src,
251 unsigned int nbytes)
252{
253 struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
254 struct blkcipher_walk walk;
255 int err, ret;
256
257 blkcipher_walk_init(&walk, dst, src, nbytes);
258 err = blkcipher_walk_virt(desc, &walk);
2d506d4f 259 memcpy(op->iv, walk.iv, AES_IV_LENGTH);
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260
261 while((nbytes = walk.nbytes)) {
262 op->src = walk.src.virt.addr,
263 op->dst = walk.dst.virt.addr;
264 op->mode = AES_MODE_CBC;
265 op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
266 op->dir = AES_DIR_ENCRYPT;
267
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268 ret = geode_aes_crypt(op);
269 nbytes -= ret;
270 err = blkcipher_walk_done(desc, &walk, nbytes);
271 }
272
2d506d4f 273 memcpy(walk.iv, op->iv, AES_IV_LENGTH);
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274 return err;
275}
276
277static struct crypto_alg geode_cbc_alg = {
278 .cra_name = "cbc(aes)",
279 .cra_driver_name = "cbc-aes-geode-128",
280 .cra_priority = 400,
281 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
282 .cra_blocksize = AES_MIN_BLOCK_SIZE,
283 .cra_ctxsize = sizeof(struct geode_aes_op),
284 .cra_alignmask = 15,
285 .cra_type = &crypto_blkcipher_type,
286 .cra_module = THIS_MODULE,
287 .cra_list = LIST_HEAD_INIT(geode_cbc_alg.cra_list),
288 .cra_u = {
289 .blkcipher = {
290 .min_keysize = AES_KEY_LENGTH,
291 .max_keysize = AES_KEY_LENGTH,
292 .setkey = geode_setkey,
293 .encrypt = geode_cbc_encrypt,
294 .decrypt = geode_cbc_decrypt,
761e7846 295 .ivsize = AES_IV_LENGTH,
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296 }
297 }
298};
299
300static int
301geode_ecb_decrypt(struct blkcipher_desc *desc,
302 struct scatterlist *dst, struct scatterlist *src,
303 unsigned int nbytes)
304{
305 struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
306 struct blkcipher_walk walk;
307 int err, ret;
308
309 blkcipher_walk_init(&walk, dst, src, nbytes);
310 err = blkcipher_walk_virt(desc, &walk);
311
312 while((nbytes = walk.nbytes)) {
313 op->src = walk.src.virt.addr,
314 op->dst = walk.dst.virt.addr;
315 op->mode = AES_MODE_ECB;
316 op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
317 op->dir = AES_DIR_DECRYPT;
318
319 ret = geode_aes_crypt(op);
320 nbytes -= ret;
321 err = blkcipher_walk_done(desc, &walk, nbytes);
322 }
323
324 return err;
325}
326
327static int
328geode_ecb_encrypt(struct blkcipher_desc *desc,
329 struct scatterlist *dst, struct scatterlist *src,
330 unsigned int nbytes)
331{
332 struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
333 struct blkcipher_walk walk;
334 int err, ret;
335
336 blkcipher_walk_init(&walk, dst, src, nbytes);
337 err = blkcipher_walk_virt(desc, &walk);
338
339 while((nbytes = walk.nbytes)) {
340 op->src = walk.src.virt.addr,
341 op->dst = walk.dst.virt.addr;
342 op->mode = AES_MODE_ECB;
343 op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
344 op->dir = AES_DIR_ENCRYPT;
345
346 ret = geode_aes_crypt(op);
347 nbytes -= ret;
348 ret = blkcipher_walk_done(desc, &walk, nbytes);
349 }
350
351 return err;
352}
353
354static struct crypto_alg geode_ecb_alg = {
355 .cra_name = "ecb(aes)",
356 .cra_driver_name = "ecb-aes-geode-128",
357 .cra_priority = 400,
358 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
359 .cra_blocksize = AES_MIN_BLOCK_SIZE,
360 .cra_ctxsize = sizeof(struct geode_aes_op),
361 .cra_alignmask = 15,
362 .cra_type = &crypto_blkcipher_type,
363 .cra_module = THIS_MODULE,
364 .cra_list = LIST_HEAD_INIT(geode_ecb_alg.cra_list),
365 .cra_u = {
366 .blkcipher = {
367 .min_keysize = AES_KEY_LENGTH,
368 .max_keysize = AES_KEY_LENGTH,
369 .setkey = geode_setkey,
370 .encrypt = geode_ecb_encrypt,
371 .decrypt = geode_ecb_decrypt,
372 }
373 }
374};
375
376static void
377geode_aes_remove(struct pci_dev *dev)
378{
379 crypto_unregister_alg(&geode_alg);
380 crypto_unregister_alg(&geode_ecb_alg);
381 crypto_unregister_alg(&geode_cbc_alg);
382
383 pci_iounmap(dev, _iobase);
384 _iobase = NULL;
385
386 pci_release_regions(dev);
387 pci_disable_device(dev);
388}
389
390
391static int
392geode_aes_probe(struct pci_dev *dev, const struct pci_device_id *id)
393{
394 int ret;
395
396 if ((ret = pci_enable_device(dev)))
397 return ret;
398
399 if ((ret = pci_request_regions(dev, "geode-aes-128")))
400 goto eenable;
401
402 _iobase = pci_iomap(dev, 0, 0);
403
404 if (_iobase == NULL) {
405 ret = -ENOMEM;
406 goto erequest;
407 }
408
409 spin_lock_init(&lock);
410
411 /* Clear any pending activity */
412 iowrite32(AES_INTR_PENDING | AES_INTR_MASK, _iobase + AES_INTR_REG);
413
414 if ((ret = crypto_register_alg(&geode_alg)))
415 goto eiomap;
416
417 if ((ret = crypto_register_alg(&geode_ecb_alg)))
418 goto ealg;
419
420 if ((ret = crypto_register_alg(&geode_cbc_alg)))
421 goto eecb;
422
423 printk(KERN_NOTICE "geode-aes: GEODE AES engine enabled.\n");
424 return 0;
425
426 eecb:
427 crypto_unregister_alg(&geode_ecb_alg);
428
429 ealg:
430 crypto_unregister_alg(&geode_alg);
431
432 eiomap:
433 pci_iounmap(dev, _iobase);
434
435 erequest:
436 pci_release_regions(dev);
437
438 eenable:
439 pci_disable_device(dev);
440
441 printk(KERN_ERR "geode-aes: GEODE AES initialization failed.\n");
442 return ret;
443}
444
445static struct pci_device_id geode_aes_tbl[] = {
446 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LX_AES, PCI_ANY_ID, PCI_ANY_ID} ,
447 { 0, }
448};
449
450MODULE_DEVICE_TABLE(pci, geode_aes_tbl);
451
452static struct pci_driver geode_aes_driver = {
453 .name = "Geode LX AES",
454 .id_table = geode_aes_tbl,
455 .probe = geode_aes_probe,
456 .remove = __devexit_p(geode_aes_remove)
457};
458
459static int __init
460geode_aes_init(void)
461{
09cb914f 462 return pci_register_driver(&geode_aes_driver);
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463}
464
465static void __exit
466geode_aes_exit(void)
467{
468 pci_unregister_driver(&geode_aes_driver);
469}
470
471MODULE_AUTHOR("Advanced Micro Devices, Inc.");
472MODULE_DESCRIPTION("Geode LX Hardware AES driver");
473MODULE_LICENSE("GPL");
474
475module_init(geode_aes_init);
476module_exit(geode_aes_exit);