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[net-next-2.6.git] / drivers / char / stallion.c
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1da177e4
LT		 1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1999 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/*****************************************************************************/
28
1da177e4 29#include <linux/module.h>
d43c36dc 30#include <linux/sched.h>
1da177e4
LT		 31#include <linux/slab.h>
32#include <linux/interrupt.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
35#include <linux/serial.h>
8561c44c 36#include <linux/seq_file.h>
1da177e4
LT		 37#include <linux/cd1400.h>
38#include <linux/sc26198.h>
39#include <linux/comstats.h>
40#include <linux/stallion.h>
41#include <linux/ioport.h>
42#include <linux/init.h>
43#include <linux/smp_lock.h>
1da177e4
LT		 44#include <linux/device.h>
45#include <linux/delay.h>
843b568c 46#include <linux/ctype.h>
1da177e4
LT		 47
48#include <asm/io.h>
49#include <asm/uaccess.h>
50
1da177e4 51#include <linux/pci.h>
1da177e4
LT		 52
53/*****************************************************************************/
54
55/*
56 * Define different board types. Use the standard Stallion "assigned"
57 * board numbers. Boards supported in this driver are abbreviated as
58 * EIO = EasyIO and ECH = EasyConnection 8/32.
59 */
60#define BRD_EASYIO 20
61#define BRD_ECH 21
62#define BRD_ECHMC 22
63#define BRD_ECHPCI 26
64#define BRD_ECH64PCI 27
65#define BRD_EASYIOPCI 28
66
843b568c 67struct stlconf {
6b2c9457 68 unsigned int brdtype;
1da177e4
LT		 69 int ioaddr1;
70 int ioaddr2;
71 unsigned long memaddr;
72 int irq;
73 int irqtype;
1da177e4
LT		 74};
75
843b568c 76static unsigned int stl_nrbrds;
1da177e4
LT		 77
78/*****************************************************************************/
79
80/*
81 * Define some important driver characteristics. Device major numbers
82 * allocated as per Linux Device Registry.
83 */
84#ifndef STL_SIOMEMMAJOR
85#define STL_SIOMEMMAJOR 28
86#endif
87#ifndef STL_SERIALMAJOR
88#define STL_SERIALMAJOR 24
89#endif
90#ifndef STL_CALLOUTMAJOR
91#define STL_CALLOUTMAJOR 25
92#endif
93
94/*
95 * Set the TX buffer size. Bigger is better, but we don't want
96 * to chew too much memory with buffers!
97 */
98#define STL_TXBUFLOW 512
99#define STL_TXBUFSIZE 4096
100
101/*****************************************************************************/
102
103/*
104 * Define our local driver identity first. Set up stuff to deal with
105 * all the local structures required by a serial tty driver.
106 */
107static char *stl_drvtitle = "Stallion Multiport Serial Driver";
108static char *stl_drvname = "stallion";
109static char *stl_drvversion = "5.6.0";
110
111static struct tty_driver *stl_serial;
112
1da177e4
LT		 113/*
114 * Define a local default termios struct. All ports will be created
115 * with this termios initially. Basically all it defines is a raw port
116 * at 9600, 8 data bits, 1 stop bit.
117 */
606d099c 118static struct ktermios stl_deftermios = {
1da177e4
LT		 119 .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL),
120 .c_cc = INIT_C_CC,
606d099c
AC		 121 .c_ispeed = 9600,
122 .c_ospeed = 9600,
1da177e4
LT		 123};
124
1da177e4
LT		 125/*
126 * Define global place to put buffer overflow characters.
127 */
128static char stl_unwanted[SC26198_RXFIFOSIZE];
129
130/*****************************************************************************/
131
79cfe7ab 132static DEFINE_MUTEX(stl_brdslock);
ca7ed0f2 133static struct stlbrd *stl_brds[STL_MAXBRDS];
1da177e4 134
31f35939
AC		 135static const struct tty_port_operations stl_port_ops;
136
1da177e4
LT		 137/*
138 * Per board state flags. Used with the state field of the board struct.
139 * Not really much here!
140 */
141#define BRD_FOUND 0x1
fc06b5cf
JS		 142#define STL_PROBED 0x2
143
1da177e4
LT		 144
145/*
146 * Define the port structure istate flags. These set of flags are
147 * modified at interrupt time - so setting and reseting them needs
148 * to be atomic. Use the bit clear/setting routines for this.
149 */
150#define ASYI_TXBUSY 1
151#define ASYI_TXLOW 2
ccfea3c9 152#define ASYI_TXFLOWED 3
1da177e4
LT		 153
154/*
155 * Define an array of board names as printable strings. Handy for
156 * referencing boards when printing trace and stuff.
157 */
158static char *stl_brdnames[] = {
615e4a71
JS		 159 NULL,
160 NULL,
161 NULL,
162 NULL,
163 NULL,
164 NULL,
165 NULL,
166 NULL,
167 NULL,
168 NULL,
169 NULL,
170 NULL,
171 NULL,
172 NULL,
173 NULL,
174 NULL,
175 NULL,
176 NULL,
177 NULL,
178 NULL,
1da177e4
LT		 179 "EasyIO",
180 "EC8/32-AT",
181 "EC8/32-MC",
615e4a71
JS		 182 NULL,
183 NULL,
184 NULL,
1da177e4
LT		 185 "EC8/32-PCI",
186 "EC8/64-PCI",
187 "EasyIO-PCI",
188};
189
190/*****************************************************************************/
191
192/*
193 * Define some string labels for arguments passed from the module
194 * load line. These allow for easy board definitions, and easy
195 * modification of the io, memory and irq resoucres.
196 */
6b2c9457 197static unsigned int stl_nargs;
1da177e4
LT		 198static char *board0[4];
199static char *board1[4];
200static char *board2[4];
201static char *board3[4];
202
203static char **stl_brdsp[] = {
204 (char **) &board0,
205 (char **) &board1,
206 (char **) &board2,
207 (char **) &board3
208};
209
210/*
211 * Define a set of common board names, and types. This is used to
212 * parse any module arguments.
213 */
214
ca7ed0f2 215static struct {
1da177e4
LT		 216 char *name;
217 int type;
ca7ed0f2 218} stl_brdstr[] = {
1da177e4
LT		 219 { "easyio", BRD_EASYIO },
220 { "eio", BRD_EASYIO },
221 { "20", BRD_EASYIO },
222 { "ec8/32", BRD_ECH },
223 { "ec8/32-at", BRD_ECH },
224 { "ec8/32-isa", BRD_ECH },
225 { "ech", BRD_ECH },
226 { "echat", BRD_ECH },
227 { "21", BRD_ECH },
228 { "ec8/32-mc", BRD_ECHMC },
229 { "ec8/32-mca", BRD_ECHMC },
230 { "echmc", BRD_ECHMC },
231 { "echmca", BRD_ECHMC },
232 { "22", BRD_ECHMC },
233 { "ec8/32-pc", BRD_ECHPCI },
234 { "ec8/32-pci", BRD_ECHPCI },
235 { "26", BRD_ECHPCI },
236 { "ec8/64-pc", BRD_ECH64PCI },
237 { "ec8/64-pci", BRD_ECH64PCI },
238 { "ech-pci", BRD_ECH64PCI },
239 { "echpci", BRD_ECH64PCI },
240 { "echpc", BRD_ECH64PCI },
241 { "27", BRD_ECH64PCI },
242 { "easyio-pc", BRD_EASYIOPCI },
243 { "easyio-pci", BRD_EASYIOPCI },
244 { "eio-pci", BRD_EASYIOPCI },
245 { "eiopci", BRD_EASYIOPCI },
246 { "28", BRD_EASYIOPCI },
247};
248
249/*
250 * Define the module agruments.
251 */
1da177e4
LT		 252
253module_param_array(board0, charp, &stl_nargs, 0);
254MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]");
255module_param_array(board1, charp, &stl_nargs, 0);
256MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]");
257module_param_array(board2, charp, &stl_nargs, 0);
258MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]");
259module_param_array(board3, charp, &stl_nargs, 0);
260MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]");
261
262/*****************************************************************************/
263
264/*
265 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
266 * to the directly accessible io ports of these boards (not the uarts -
267 * they are in cd1400.h and sc26198.h).
268 */
269#define EIO_8PORTRS 0x04
270#define EIO_4PORTRS 0x05
271#define EIO_8PORTDI 0x00
272#define EIO_8PORTM 0x06
273#define EIO_MK3 0x03
274#define EIO_IDBITMASK 0x07
275
276#define EIO_BRDMASK 0xf0
277#define ID_BRD4 0x10
278#define ID_BRD8 0x20
279#define ID_BRD16 0x30
280
281#define EIO_INTRPEND 0x08
282#define EIO_INTEDGE 0x00
283#define EIO_INTLEVEL 0x08
284#define EIO_0WS 0x10
285
286#define ECH_ID 0xa0
287#define ECH_IDBITMASK 0xe0
288#define ECH_BRDENABLE 0x08
289#define ECH_BRDDISABLE 0x00
290#define ECH_INTENABLE 0x01
291#define ECH_INTDISABLE 0x00
292#define ECH_INTLEVEL 0x02
293#define ECH_INTEDGE 0x00
294#define ECH_INTRPEND 0x01
295#define ECH_BRDRESET 0x01
296
297#define ECHMC_INTENABLE 0x01
298#define ECHMC_BRDRESET 0x02
299
300#define ECH_PNLSTATUS 2
301#define ECH_PNL16PORT 0x20
302#define ECH_PNLIDMASK 0x07
303#define ECH_PNLXPID 0x40
304#define ECH_PNLINTRPEND 0x80
305
306#define ECH_ADDR2MASK 0x1e0
307
308/*
309 * Define the vector mapping bits for the programmable interrupt board
310 * hardware. These bits encode the interrupt for the board to use - it
311 * is software selectable (except the EIO-8M).
312 */
313static unsigned char stl_vecmap[] = {
314 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
315 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
316};
317
b65b5b59
AC		 318/*
319 * Lock ordering is that you may not take stallion_lock holding
320 * brd_lock.
321 */
322
323static spinlock_t brd_lock; /* Guard the board mapping */
324static spinlock_t stallion_lock; /* Guard the tty driver */
325
1da177e4
LT		 326/*
327 * Set up enable and disable macros for the ECH boards. They require
328 * the secondary io address space to be activated and deactivated.
329 * This way all ECH boards can share their secondary io region.
330 * If this is an ECH-PCI board then also need to set the page pointer
331 * to point to the correct page.
332 */
333#define BRDENABLE(brdnr,pagenr) \
334 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
335 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \
336 stl_brds[(brdnr)]->ioctrl); \
337 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
338 outb((pagenr), stl_brds[(brdnr)]->ioctrl);
339
340#define BRDDISABLE(brdnr) \
341 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
342 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \
343 stl_brds[(brdnr)]->ioctrl);
344
345#define STL_CD1400MAXBAUD 230400
346#define STL_SC26198MAXBAUD 460800
347
348#define STL_BAUDBASE 115200
349#define STL_CLOSEDELAY (5 * HZ / 10)
350
351/*****************************************************************************/
352
1da177e4
LT		 353/*
354 * Define the Stallion PCI vendor and device IDs.
355 */
356#ifndef PCI_VENDOR_ID_STALLION
357#define PCI_VENDOR_ID_STALLION 0x124d
358#endif
359#ifndef PCI_DEVICE_ID_ECHPCI832
360#define PCI_DEVICE_ID_ECHPCI832 0x0000
361#endif
362#ifndef PCI_DEVICE_ID_ECHPCI864
363#define PCI_DEVICE_ID_ECHPCI864 0x0002
364#endif
365#ifndef PCI_DEVICE_ID_EIOPCI
366#define PCI_DEVICE_ID_EIOPCI 0x0003
367#endif
368
369/*
370 * Define structure to hold all Stallion PCI boards.
371 */
1da177e4 372
b1b84fe0
JS		 373static struct pci_device_id stl_pcibrds[] = {
374 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864),
375 .driver_data = BRD_ECH64PCI },
376 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI),
377 .driver_data = BRD_EASYIOPCI },
378 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832),
379 .driver_data = BRD_ECHPCI },
380 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410),
381 .driver_data = BRD_ECHPCI },
382 { }
383};
384MODULE_DEVICE_TABLE(pci, stl_pcibrds);
1da177e4
LT		 385
386/*****************************************************************************/
387
388/*
389 * Define macros to extract a brd/port number from a minor number.
390 */
391#define MINOR2BRD(min) (((min) & 0xc0) >> 6)
392#define MINOR2PORT(min) ((min) & 0x3f)
393
394/*
395 * Define a baud rate table that converts termios baud rate selector
396 * into the actual baud rate value. All baud rate calculations are
397 * based on the actual baud rate required.
398 */
399static unsigned int stl_baudrates[] = {
400 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
401 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600
402};
403
1da177e4
LT		 404/*****************************************************************************/
405
406/*
407 * Declare all those functions in this driver!
408 */
409
1da177e4 410static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg);
ca7ed0f2 411static int stl_brdinit(struct stlbrd *brdp);
d18a750f 412static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp);
ca7ed0f2 413static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp);
1da177e4 414
1da177e4
LT		 415/*
416 * CD1400 uart specific handling functions.
417 */
ca7ed0f2
JS		 418static void stl_cd1400setreg(struct stlport *portp, int regnr, int value);
419static int stl_cd1400getreg(struct stlport *portp, int regnr);
420static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value);
421static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
422static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 423static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 424static int stl_cd1400getsignals(struct stlport *portp);
425static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts);
426static void stl_cd1400ccrwait(struct stlport *portp);
427static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx);
428static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx);
429static void stl_cd1400disableintrs(struct stlport *portp);
430static void stl_cd1400sendbreak(struct stlport *portp, int len);
431static void stl_cd1400flowctrl(struct stlport *portp, int state);
432static void stl_cd1400sendflow(struct stlport *portp, int state);
433static void stl_cd1400flush(struct stlport *portp);
434static int stl_cd1400datastate(struct stlport *portp);
435static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase);
436static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase);
437static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr);
438static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr);
439static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr);
440
441static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr);
1da177e4
LT		 442
443/*
444 * SC26198 uart specific handling functions.
445 */
ca7ed0f2
JS		 446static void stl_sc26198setreg(struct stlport *portp, int regnr, int value);
447static int stl_sc26198getreg(struct stlport *portp, int regnr);
448static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value);
449static int stl_sc26198getglobreg(struct stlport *portp, int regnr);
450static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
451static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 452static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 453static int stl_sc26198getsignals(struct stlport *portp);
454static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts);
455static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx);
456static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx);
457static void stl_sc26198disableintrs(struct stlport *portp);
458static void stl_sc26198sendbreak(struct stlport *portp, int len);
459static void stl_sc26198flowctrl(struct stlport *portp, int state);
460static void stl_sc26198sendflow(struct stlport *portp, int state);
461static void stl_sc26198flush(struct stlport *portp);
462static int stl_sc26198datastate(struct stlport *portp);
463static void stl_sc26198wait(struct stlport *portp);
464static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty);
465static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase);
466static void stl_sc26198txisr(struct stlport *port);
467static void stl_sc26198rxisr(struct stlport *port, unsigned int iack);
468static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch);
469static void stl_sc26198rxbadchars(struct stlport *portp);
470static void stl_sc26198otherisr(struct stlport *port, unsigned int iack);
1da177e4
LT		 471
472/*****************************************************************************/
473
474/*
475 * Generic UART support structure.
476 */
477typedef struct uart {
ca7ed0f2
JS		 478 int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp);
479 void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 480 void (*setport)(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 481 int (*getsignals)(struct stlport *portp);
482 void (*setsignals)(struct stlport *portp, int dtr, int rts);
483 void (*enablerxtx)(struct stlport *portp, int rx, int tx);
484 void (*startrxtx)(struct stlport *portp, int rx, int tx);
485 void (*disableintrs)(struct stlport *portp);
486 void (*sendbreak)(struct stlport *portp, int len);
487 void (*flowctrl)(struct stlport *portp, int state);
488 void (*sendflow)(struct stlport *portp, int state);
489 void (*flush)(struct stlport *portp);
490 int (*datastate)(struct stlport *portp);
491 void (*intr)(struct stlpanel *panelp, unsigned int iobase);
1da177e4
LT		 492} uart_t;
493
494/*
495 * Define some macros to make calling these functions nice and clean.
496 */
497#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
498#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
499#define stl_setport (* ((uart_t *) portp->uartp)->setport)
500#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
501#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
502#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
503#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
504#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
505#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
506#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl)
507#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
508#define stl_flush (* ((uart_t *) portp->uartp)->flush)
509#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
510
511/*****************************************************************************/
512
513/*
514 * CD1400 UART specific data initialization.
515 */
516static uart_t stl_cd1400uart = {
517 stl_cd1400panelinit,
518 stl_cd1400portinit,
519 stl_cd1400setport,
520 stl_cd1400getsignals,
521 stl_cd1400setsignals,
522 stl_cd1400enablerxtx,
523 stl_cd1400startrxtx,
524 stl_cd1400disableintrs,
525 stl_cd1400sendbreak,
526 stl_cd1400flowctrl,
527 stl_cd1400sendflow,
528 stl_cd1400flush,
529 stl_cd1400datastate,
530 stl_cd1400eiointr
531};
532
533/*
534 * Define the offsets within the register bank of a cd1400 based panel.
535 * These io address offsets are common to the EasyIO board as well.
536 */
537#define EREG_ADDR 0
538#define EREG_DATA 4
539#define EREG_RXACK 5
540#define EREG_TXACK 6
541#define EREG_MDACK 7
542
543#define EREG_BANKSIZE 8
544
545#define CD1400_CLK 25000000
546#define CD1400_CLK8M 20000000
547
548/*
549 * Define the cd1400 baud rate clocks. These are used when calculating
550 * what clock and divisor to use for the required baud rate. Also
551 * define the maximum baud rate allowed, and the default base baud.
552 */
553static int stl_cd1400clkdivs[] = {
554 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
555};
556
557/*****************************************************************************/
558
559/*
560 * SC26198 UART specific data initization.
561 */
562static uart_t stl_sc26198uart = {
563 stl_sc26198panelinit,
564 stl_sc26198portinit,
565 stl_sc26198setport,
566 stl_sc26198getsignals,
567 stl_sc26198setsignals,
568 stl_sc26198enablerxtx,
569 stl_sc26198startrxtx,
570 stl_sc26198disableintrs,
571 stl_sc26198sendbreak,
572 stl_sc26198flowctrl,
573 stl_sc26198sendflow,
574 stl_sc26198flush,
575 stl_sc26198datastate,
576 stl_sc26198intr
577};
578
579/*
580 * Define the offsets within the register bank of a sc26198 based panel.
581 */
582#define XP_DATA 0
583#define XP_ADDR 1
584#define XP_MODID 2
585#define XP_STATUS 2
586#define XP_IACK 3
587
588#define XP_BANKSIZE 4
589
590/*
591 * Define the sc26198 baud rate table. Offsets within the table
592 * represent the actual baud rate selector of sc26198 registers.
593 */
594static unsigned int sc26198_baudtable[] = {
595 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
596 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
597 230400, 460800, 921600
598};
599
fe971071 600#define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable)
1da177e4
LT		 601
602/*****************************************************************************/
603
604/*
605 * Define the driver info for a user level control device. Used mainly
606 * to get at port stats - only not using the port device itself.
607 */
62322d25 608static const struct file_operations stl_fsiomem = {
1da177e4
LT		 609 .owner = THIS_MODULE,
610 .ioctl = stl_memioctl,
611};
612
ca8eca68 613static struct class *stallion_class;
1da177e4 614
ccfea3c9
JS		 615static void stl_cd_change(struct stlport *portp)
616{
617 unsigned int oldsigs = portp->sigs;
d18a750f 618 struct tty_struct *tty = tty_port_tty_get(&portp->port);
ccfea3c9 619
d18a750f 620 if (!tty)
ccfea3c9
JS		 621 return;
622
623 portp->sigs = stl_getsignals(portp);
624
625 if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0))
f8ae4764 626 wake_up_interruptible(&portp->port.open_wait);
ccfea3c9
JS		 627
628 if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0))
f8ae4764 629 if (portp->port.flags & ASYNC_CHECK_CD)
d18a750f
AC		 630 tty_hangup(tty);
631 tty_kref_put(tty);
ccfea3c9
JS		 632}
633
1da177e4
LT		 634/*
635 * Check for any arguments passed in on the module load command line.
636 */
637
1da177e4
LT		 638/*****************************************************************************/
639
1da177e4
LT		 640/*
641 * Parse the supplied argument string, into the board conf struct.
642 */
643
40e82652 644static int __init stl_parsebrd(struct stlconf *confp, char **argp)
1da177e4
LT		 645{
646 char *sp;
6b2c9457 647 unsigned int i;
1da177e4 648
a0564e14 649 pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp);
1da177e4 650
615e4a71 651 if ((argp[0] == NULL) || (*argp[0] == 0))
014c2544 652 return 0;
1da177e4 653
c62429d9 654 for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++)
843b568c 655 *sp = tolower(*sp);
1da177e4 656
c62429d9 657 for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++)
1da177e4
LT		 658 if (strcmp(stl_brdstr[i].name, argp[0]) == 0)
659 break;
c62429d9 660
fe971071 661 if (i == ARRAY_SIZE(stl_brdstr)) {
1da177e4 662 printk("STALLION: unknown board name, %s?\n", argp[0]);
fe971071 663 return 0;
1da177e4
LT		 664 }
665
666 confp->brdtype = stl_brdstr[i].type;
667
668 i = 1;
615e4a71 669 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 670 confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 671 i++;
672 if (confp->brdtype == BRD_ECH) {
615e4a71 673 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 674 confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 675 i++;
676 }
615e4a71 677 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 678 confp->irq = simple_strtoul(argp[i], NULL, 0);
014c2544 679 return 1;
1da177e4
LT		 680}
681
682/*****************************************************************************/
683
1da177e4
LT		 684/*
685 * Allocate a new board structure. Fill out the basic info in it.
686 */
687
ca7ed0f2 688static struct stlbrd *stl_allocbrd(void)
1da177e4 689{
ca7ed0f2 690 struct stlbrd *brdp;
1da177e4 691
ca7ed0f2 692 brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL);
b0b4ed72 693 if (!brdp) {
b65b5b59 694 printk("STALLION: failed to allocate memory (size=%Zd)\n",
ca7ed0f2 695 sizeof(struct stlbrd));
b0b4ed72 696 return NULL;
1da177e4
LT		 697 }
698
1da177e4 699 brdp->magic = STL_BOARDMAGIC;
014c2544 700 return brdp;
1da177e4
LT		 701}
702
703/*****************************************************************************/
704
705static int stl_open(struct tty_struct *tty, struct file *filp)
706{
ca7ed0f2
JS		 707 struct stlport *portp;
708 struct stlbrd *brdp;
4350f3ff 709 struct tty_port *port;
6b2c9457 710 unsigned int minordev, brdnr, panelnr;
4350f3ff 711 int portnr;
1da177e4 712
a0564e14 713 pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name);
1da177e4
LT		 714
715 minordev = tty->index;
716 brdnr = MINOR2BRD(minordev);
717 if (brdnr >= stl_nrbrds)
014c2544 718 return -ENODEV;
1da177e4 719 brdp = stl_brds[brdnr];
615e4a71 720 if (brdp == NULL)
014c2544 721 return -ENODEV;
4350f3ff 722
1da177e4 723 minordev = MINOR2PORT(minordev);
c62429d9 724 for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) {
615e4a71 725 if (brdp->panels[panelnr] == NULL)
1da177e4
LT		 726 break;
727 if (minordev < brdp->panels[panelnr]->nrports) {
728 portnr = minordev;
729 break;
730 }
731 minordev -= brdp->panels[panelnr]->nrports;
732 }
733 if (portnr < 0)
014c2544 734 return -ENODEV;
1da177e4
LT		 735
736 portp = brdp->panels[panelnr]->ports[portnr];
615e4a71 737 if (portp == NULL)
014c2544 738 return -ENODEV;
4350f3ff 739 port = &portp->port;
1da177e4
LT		 740
741/*
742 * On the first open of the device setup the port hardware, and
743 * initialize the per port data structure.
744 */
4350f3ff 745 tty_port_tty_set(port, tty);
1da177e4 746 tty->driver_data = portp;
4350f3ff 747 port->count++;
1da177e4 748
4350f3ff 749 if ((port->flags & ASYNC_INITIALIZED) == 0) {
b0b4ed72
TK		 750 if (!portp->tx.buf) {
751 portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
752 if (!portp->tx.buf)
014c2544 753 return -ENOMEM;
1da177e4
LT		 754 portp->tx.head = portp->tx.buf;
755 portp->tx.tail = portp->tx.buf;
756 }
757 stl_setport(portp, tty->termios);
758 portp->sigs = stl_getsignals(portp);
759 stl_setsignals(portp, 1, 1);
760 stl_enablerxtx(portp, 1, 1);
761 stl_startrxtx(portp, 1, 0);
762 clear_bit(TTY_IO_ERROR, &tty->flags);
4350f3ff 763 port->flags |= ASYNC_INITIALIZED;
1da177e4 764 }
4350f3ff 765 return tty_port_block_til_ready(port, tty, filp);
1da177e4
LT		 766}
767
768/*****************************************************************************/
769
31f35939
AC		 770static int stl_carrier_raised(struct tty_port *port)
771{
772 struct stlport *portp = container_of(port, struct stlport, port);
773 return (portp->sigs & TIOCM_CD) ? 1 : 0;
774}
775
fcc8ac18 776static void stl_dtr_rts(struct tty_port *port, int on)
1da177e4 777{
4350f3ff
AC		 778 struct stlport *portp = container_of(port, struct stlport, port);
779 /* Takes brd_lock internally */
fcc8ac18 780 stl_setsignals(portp, on, on);
1da177e4
LT		 781}
782
783/*****************************************************************************/
784
96b066b8
JS		 785static void stl_flushbuffer(struct tty_struct *tty)
786{
787 struct stlport *portp;
788
789 pr_debug("stl_flushbuffer(tty=%p)\n", tty);
790
96b066b8
JS		 791 portp = tty->driver_data;
792 if (portp == NULL)
793 return;
794
795 stl_flush(portp);
796 tty_wakeup(tty);
797}
798
799/*****************************************************************************/
800
801static void stl_waituntilsent(struct tty_struct *tty, int timeout)
802{
803 struct stlport *portp;
804 unsigned long tend;
805
806 pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout);
807
96b066b8
JS		 808 portp = tty->driver_data;
809 if (portp == NULL)
810 return;
811
812 if (timeout == 0)
813 timeout = HZ;
814 tend = jiffies + timeout;
815
978e595f 816 lock_kernel();
96b066b8
JS		 817 while (stl_datastate(portp)) {
818 if (signal_pending(current))
819 break;
820 msleep_interruptible(20);
821 if (time_after_eq(jiffies, tend))
822 break;
823 }
978e595f 824 unlock_kernel();
96b066b8
JS		 825}
826
827/*****************************************************************************/
828
1da177e4
LT		 829static void stl_close(struct tty_struct *tty, struct file *filp)
830{
ca7ed0f2 831 struct stlport *portp;
4350f3ff 832 struct tty_port *port;
1da177e4
LT		 833 unsigned long flags;
834
a0564e14 835 pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp);
1da177e4
LT		 836
837 portp = tty->driver_data;
a6614999
AC		 838 BUG_ON(portp == NULL);
839
4350f3ff 840 port = &portp->port;
1da177e4 841
a6614999 842 if (tty_port_close_start(port, tty, filp) == 0)
1da177e4 843 return;
1da177e4
LT		 844/*
845 * May want to wait for any data to drain before closing. The BUSY
846 * flag keeps track of whether we are still sending or not - it is
847 * very accurate for the cd1400, not quite so for the sc26198.
848 * (The sc26198 has no "end-of-data" interrupt only empty FIFO)
849 */
1da177e4
LT		 850 stl_waituntilsent(tty, (HZ / 2));
851
4350f3ff 852 spin_lock_irqsave(&port->lock, flags);
f8ae4764 853 portp->port.flags &= ~ASYNC_INITIALIZED;
4350f3ff 854 spin_unlock_irqrestore(&port->lock, flags);
b65b5b59 855
1da177e4
LT		 856 stl_disableintrs(portp);
857 if (tty->termios->c_cflag & HUPCL)
858 stl_setsignals(portp, 0, 0);
859 stl_enablerxtx(portp, 0, 0);
860 stl_flushbuffer(tty);
861 portp->istate = 0;
615e4a71 862 if (portp->tx.buf != NULL) {
1da177e4 863 kfree(portp->tx.buf);
615e4a71
JS		 864 portp->tx.buf = NULL;
865 portp->tx.head = NULL;
866 portp->tx.tail = NULL;
1da177e4 867 }
1da177e4 868
a6614999 869 tty_port_close_end(port, tty);
4350f3ff 870 tty_port_tty_set(port, NULL);
1da177e4
LT		 871}
872
873/*****************************************************************************/
874
875/*
876 * Write routine. Take data and stuff it in to the TX ring queue.
877 * If transmit interrupts are not running then start them.
878 */
879
880static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count)
881{
ca7ed0f2 882 struct stlport *portp;
1da177e4
LT		 883 unsigned int len, stlen;
884 unsigned char *chbuf;
885 char *head, *tail;
886
a0564e14 887 pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count);
1da177e4 888
1da177e4 889 portp = tty->driver_data;
615e4a71 890 if (portp == NULL)
014c2544 891 return 0;
615e4a71 892 if (portp->tx.buf == NULL)
014c2544 893 return 0;
1da177e4
LT		 894
895/*
896 * If copying direct from user space we must cater for page faults,
897 * causing us to "sleep" here for a while. To handle this copy in all
898 * the data we need now, into a local buffer. Then when we got it all
899 * copy it into the TX buffer.
900 */
901 chbuf = (unsigned char *) buf;
902
903 head = portp->tx.head;
904 tail = portp->tx.tail;
905 if (head >= tail) {
906 len = STL_TXBUFSIZE - (head - tail) - 1;
907 stlen = STL_TXBUFSIZE - (head - portp->tx.buf);
908 } else {
909 len = tail - head - 1;
910 stlen = len;
911 }
912
843b568c 913 len = min(len, (unsigned int)count);
1da177e4
LT		 914 count = 0;
915 while (len > 0) {
843b568c 916 stlen = min(len, stlen);
1da177e4
LT		 917 memcpy(head, chbuf, stlen);
918 len -= stlen;
919 chbuf += stlen;
920 count += stlen;
921 head += stlen;
922 if (head >= (portp->tx.buf + STL_TXBUFSIZE)) {
923 head = portp->tx.buf;
924 stlen = tail - head;
925 }
926 }
927 portp->tx.head = head;
928
929 clear_bit(ASYI_TXLOW, &portp->istate);
930 stl_startrxtx(portp, -1, 1);
931
014c2544 932 return count;
1da177e4
LT		 933}
934
935/*****************************************************************************/
936
4a561222 937static int stl_putchar(struct tty_struct *tty, unsigned char ch)
1da177e4 938{
ca7ed0f2 939 struct stlport *portp;
1da177e4
LT		 940 unsigned int len;
941 char *head, *tail;
942
a0564e14 943 pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 944
1da177e4 945 portp = tty->driver_data;
615e4a71 946 if (portp == NULL)
4a561222 947 return -EINVAL;
615e4a71 948 if (portp->tx.buf == NULL)
4a561222 949 return -EINVAL;
1da177e4
LT		 950
951 head = portp->tx.head;
952 tail = portp->tx.tail;
953
954 len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head);
955 len--;
956
957 if (len > 0) {
958 *head++ = ch;
959 if (head >= (portp->tx.buf + STL_TXBUFSIZE))
960 head = portp->tx.buf;
961 }
962 portp->tx.head = head;
4a561222 963 return 0;
1da177e4
LT		 964}
965
966/*****************************************************************************/
967
968/*
969 * If there are any characters in the buffer then make sure that TX
970 * interrupts are on and get'em out. Normally used after the putchar
971 * routine has been called.
972 */
973
974static void stl_flushchars(struct tty_struct *tty)
975{
ca7ed0f2 976 struct stlport *portp;
1da177e4 977
a0564e14 978 pr_debug("stl_flushchars(tty=%p)\n", tty);
1da177e4 979
1da177e4 980 portp = tty->driver_data;
615e4a71 981 if (portp == NULL)
1da177e4 982 return;
615e4a71 983 if (portp->tx.buf == NULL)
1da177e4
LT		 984 return;
985
1da177e4
LT		 986 stl_startrxtx(portp, -1, 1);
987}
988
989/*****************************************************************************/
990
991static int stl_writeroom(struct tty_struct *tty)
992{
ca7ed0f2 993 struct stlport *portp;
1da177e4
LT		 994 char *head, *tail;
995
a0564e14 996 pr_debug("stl_writeroom(tty=%p)\n", tty);
1da177e4 997
1da177e4 998 portp = tty->driver_data;
615e4a71 999 if (portp == NULL)
014c2544 1000 return 0;
615e4a71 1001 if (portp->tx.buf == NULL)
014c2544 1002 return 0;
1da177e4
LT		 1003
1004 head = portp->tx.head;
1005 tail = portp->tx.tail;
c62429d9 1006 return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1);
1da177e4
LT		 1007}
1008
1009/*****************************************************************************/
1010
1011/*
1012 * Return number of chars in the TX buffer. Normally we would just
1013 * calculate the number of chars in the buffer and return that, but if
1014 * the buffer is empty and TX interrupts are still on then we return
1015 * that the buffer still has 1 char in it. This way whoever called us
1016 * will not think that ALL chars have drained - since the UART still
1017 * must have some chars in it (we are busy after all).
1018 */
1019
1020static int stl_charsinbuffer(struct tty_struct *tty)
1021{
ca7ed0f2 1022 struct stlport *portp;
1da177e4
LT		 1023 unsigned int size;
1024 char *head, *tail;
1025
a0564e14 1026 pr_debug("stl_charsinbuffer(tty=%p)\n", tty);
1da177e4 1027
1da177e4 1028 portp = tty->driver_data;
615e4a71 1029 if (portp == NULL)
014c2544 1030 return 0;
615e4a71 1031 if (portp->tx.buf == NULL)
014c2544 1032 return 0;
1da177e4
LT		 1033
1034 head = portp->tx.head;
1035 tail = portp->tx.tail;
1036 size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
1037 if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate))
1038 size = 1;
014c2544 1039 return size;
1da177e4
LT		 1040}
1041
1042/*****************************************************************************/
1043
1044/*
1045 * Generate the serial struct info.
1046 */
1047
ca7ed0f2 1048static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1049{
1050 struct serial_struct sio;
ca7ed0f2 1051 struct stlbrd *brdp;
1da177e4 1052
a0564e14 1053 pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1054
1055 memset(&sio, 0, sizeof(struct serial_struct));
1056 sio.line = portp->portnr;
1057 sio.port = portp->ioaddr;
f8ae4764 1058 sio.flags = portp->port.flags;
1da177e4
LT		 1059 sio.baud_base = portp->baud_base;
1060 sio.close_delay = portp->close_delay;
1061 sio.closing_wait = portp->closing_wait;
1062 sio.custom_divisor = portp->custom_divisor;
1063 sio.hub6 = 0;
1064 if (portp->uartp == &stl_cd1400uart) {
1065 sio.type = PORT_CIRRUS;
1066 sio.xmit_fifo_size = CD1400_TXFIFOSIZE;
1067 } else {
1068 sio.type = PORT_UNKNOWN;
1069 sio.xmit_fifo_size = SC26198_TXFIFOSIZE;
1070 }
1071
1072 brdp = stl_brds[portp->brdnr];
615e4a71 1073 if (brdp != NULL)
1da177e4
LT		 1074 sio.irq = brdp->irq;
1075
1076 return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0;
1077}
1078
1079/*****************************************************************************/
1080
1081/*
1082 * Set port according to the serial struct info.
1083 * At this point we do not do any auto-configure stuff, so we will
1084 * just quietly ignore any requests to change irq, etc.
1085 */
1086
d18a750f 1087static int stl_setserial(struct tty_struct *tty, struct serial_struct __user *sp)
1da177e4 1088{
d18a750f 1089 struct stlport * portp = tty->driver_data;
1da177e4
LT		 1090 struct serial_struct sio;
1091
a0564e14 1092 pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1093
1094 if (copy_from_user(&sio, sp, sizeof(struct serial_struct)))
1095 return -EFAULT;
1096 if (!capable(CAP_SYS_ADMIN)) {
1097 if ((sio.baud_base != portp->baud_base) ||
1098 (sio.close_delay != portp->close_delay) ||
1099 ((sio.flags & ~ASYNC_USR_MASK) !=
f8ae4764 1100 (portp->port.flags & ~ASYNC_USR_MASK)))
014c2544 1101 return -EPERM;
1da177e4
LT		 1102 }
1103
f8ae4764 1104 portp->port.flags = (portp->port.flags & ~ASYNC_USR_MASK) |
1da177e4
LT		 1105 (sio.flags & ASYNC_USR_MASK);
1106 portp->baud_base = sio.baud_base;
1107 portp->close_delay = sio.close_delay;
1108 portp->closing_wait = sio.closing_wait;
1109 portp->custom_divisor = sio.custom_divisor;
d18a750f 1110 stl_setport(portp, tty->termios);
014c2544 1111 return 0;
1da177e4
LT		 1112}
1113
1114/*****************************************************************************/
1115
1116static int stl_tiocmget(struct tty_struct *tty, struct file *file)
1117{
ca7ed0f2 1118 struct stlport *portp;
1da177e4 1119
1da177e4 1120 portp = tty->driver_data;
615e4a71 1121 if (portp == NULL)
014c2544 1122 return -ENODEV;
1da177e4 1123 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1124 return -EIO;
1da177e4
LT		 1125
1126 return stl_getsignals(portp);
1127}
1128
1129static int stl_tiocmset(struct tty_struct *tty, struct file *file,
1130 unsigned int set, unsigned int clear)
1131{
ca7ed0f2 1132 struct stlport *portp;
1da177e4
LT		 1133 int rts = -1, dtr = -1;
1134
1da177e4 1135 portp = tty->driver_data;
615e4a71 1136 if (portp == NULL)
014c2544 1137 return -ENODEV;
1da177e4 1138 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1139 return -EIO;
1da177e4
LT		 1140
1141 if (set & TIOCM_RTS)
1142 rts = 1;
1143 if (set & TIOCM_DTR)
1144 dtr = 1;
1145 if (clear & TIOCM_RTS)
1146 rts = 0;
1147 if (clear & TIOCM_DTR)
1148 dtr = 0;
1149
1150 stl_setsignals(portp, dtr, rts);
1151 return 0;
1152}
1153
1154static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1155{
ca7ed0f2 1156 struct stlport *portp;
1da177e4
LT		 1157 int rc;
1158 void __user *argp = (void __user *)arg;
1159
a0564e14
JS		 1160 pr_debug("stl_ioctl(tty=%p,file=%p,cmd=%x,arg=%lx)\n", tty, file, cmd,
1161 arg);
1da177e4 1162
1da177e4 1163 portp = tty->driver_data;
615e4a71 1164 if (portp == NULL)
014c2544 1165 return -ENODEV;
1da177e4
LT		 1166
1167 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
c62429d9 1168 (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS))
1da177e4 1169 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1170 return -EIO;
1da177e4
LT		 1171
1172 rc = 0;
1173
f433c65b
AC		 1174 lock_kernel();
1175
1da177e4 1176 switch (cmd) {
1da177e4
LT		 1177 case TIOCGSERIAL:
1178 rc = stl_getserial(portp, argp);
1179 break;
1180 case TIOCSSERIAL:
d18a750f 1181 rc = stl_setserial(tty, argp);
1da177e4
LT		 1182 break;
1183 case COM_GETPORTSTATS:
d18a750f 1184 rc = stl_getportstats(tty, portp, argp);
1da177e4
LT		 1185 break;
1186 case COM_CLRPORTSTATS:
1187 rc = stl_clrportstats(portp, argp);
1188 break;
1189 case TIOCSERCONFIG:
1190 case TIOCSERGWILD:
1191 case TIOCSERSWILD:
1192 case TIOCSERGETLSR:
1193 case TIOCSERGSTRUCT:
1194 case TIOCSERGETMULTI:
1195 case TIOCSERSETMULTI:
1196 default:
1197 rc = -ENOIOCTLCMD;
1198 break;
1199 }
f433c65b 1200 unlock_kernel();
014c2544 1201 return rc;
1da177e4
LT		 1202}
1203
1204/*****************************************************************************/
1205
96b066b8
JS		 1206/*
1207 * Start the transmitter again. Just turn TX interrupts back on.
1208 */
1209
1210static void stl_start(struct tty_struct *tty)
1211{
1212 struct stlport *portp;
1213
1214 pr_debug("stl_start(tty=%p)\n", tty);
1215
96b066b8
JS		 1216 portp = tty->driver_data;
1217 if (portp == NULL)
1218 return;
1219 stl_startrxtx(portp, -1, 1);
1220}
1221
1222/*****************************************************************************/
1223
606d099c 1224static void stl_settermios(struct tty_struct *tty, struct ktermios *old)
1da177e4 1225{
ca7ed0f2 1226 struct stlport *portp;
606d099c 1227 struct ktermios *tiosp;
1da177e4 1228
a0564e14 1229 pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old);
1da177e4 1230
1da177e4 1231 portp = tty->driver_data;
615e4a71 1232 if (portp == NULL)
1da177e4
LT		 1233 return;
1234
1235 tiosp = tty->termios;
1236 if ((tiosp->c_cflag == old->c_cflag) &&
1237 (tiosp->c_iflag == old->c_iflag))
1238 return;
1239
1240 stl_setport(portp, tiosp);
1241 stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0),
1242 -1);
1243 if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) {
1244 tty->hw_stopped = 0;
1245 stl_start(tty);
1246 }
1247 if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL))
f8ae4764 1248 wake_up_interruptible(&portp->port.open_wait);
1da177e4
LT		 1249}
1250
1251/*****************************************************************************/
1252
1253/*
1254 * Attempt to flow control who ever is sending us data. Based on termios
1255 * settings use software or/and hardware flow control.
1256 */
1257
1258static void stl_throttle(struct tty_struct *tty)
1259{
ca7ed0f2 1260 struct stlport *portp;
1da177e4 1261
a0564e14 1262 pr_debug("stl_throttle(tty=%p)\n", tty);
1da177e4 1263
1da177e4 1264 portp = tty->driver_data;
615e4a71 1265 if (portp == NULL)
1da177e4
LT		 1266 return;
1267 stl_flowctrl(portp, 0);
1268}
1269
1270/*****************************************************************************/
1271
1272/*
1273 * Unflow control the device sending us data...
1274 */
1275
1276static void stl_unthrottle(struct tty_struct *tty)
1277{
ca7ed0f2 1278 struct stlport *portp;
1da177e4 1279
a0564e14 1280 pr_debug("stl_unthrottle(tty=%p)\n", tty);
1da177e4 1281
1da177e4 1282 portp = tty->driver_data;
615e4a71 1283 if (portp == NULL)
1da177e4
LT		 1284 return;
1285 stl_flowctrl(portp, 1);
1286}
1287
1288/*****************************************************************************/
1289
1290/*
1291 * Stop the transmitter. Basically to do this we will just turn TX
1292 * interrupts off.
1293 */
1294
1295static void stl_stop(struct tty_struct *tty)
1296{
ca7ed0f2 1297 struct stlport *portp;
1da177e4 1298
a0564e14 1299 pr_debug("stl_stop(tty=%p)\n", tty);
1da177e4 1300
1da177e4 1301 portp = tty->driver_data;
615e4a71 1302 if (portp == NULL)
1da177e4
LT		 1303 return;
1304 stl_startrxtx(portp, -1, 0);
1305}
1306
1307/*****************************************************************************/
1308
1da177e4
LT		 1309/*
1310 * Hangup this port. This is pretty much like closing the port, only
1311 * a little more brutal. No waiting for data to drain. Shutdown the
1312 * port and maybe drop signals.
1313 */
1314
1315static void stl_hangup(struct tty_struct *tty)
1316{
ca7ed0f2 1317 struct stlport *portp;
4350f3ff
AC		 1318 struct tty_port *port;
1319 unsigned long flags;
1da177e4 1320
a0564e14 1321 pr_debug("stl_hangup(tty=%p)\n", tty);
1da177e4 1322
1da177e4 1323 portp = tty->driver_data;
615e4a71 1324 if (portp == NULL)
1da177e4 1325 return;
4350f3ff
AC		 1326 port = &portp->port;
1327
1328 spin_lock_irqsave(&port->lock, flags);
1329 port->flags &= ~ASYNC_INITIALIZED;
1330 spin_unlock_irqrestore(&port->lock, flags);
1da177e4 1331
1da177e4
LT		 1332 stl_disableintrs(portp);
1333 if (tty->termios->c_cflag & HUPCL)
1334 stl_setsignals(portp, 0, 0);
1335 stl_enablerxtx(portp, 0, 0);
1336 stl_flushbuffer(tty);
1337 portp->istate = 0;
1338 set_bit(TTY_IO_ERROR, &tty->flags);
615e4a71 1339 if (portp->tx.buf != NULL) {
1da177e4 1340 kfree(portp->tx.buf);
615e4a71
JS		 1341 portp->tx.buf = NULL;
1342 portp->tx.head = NULL;
1343 portp->tx.tail = NULL;
1da177e4 1344 }
4350f3ff 1345 tty_port_hangup(port);
1da177e4
LT		 1346}
1347
1348/*****************************************************************************/
1349
4a561222 1350static int stl_breakctl(struct tty_struct *tty, int state)
1da177e4 1351{
ca7ed0f2 1352 struct stlport *portp;
1da177e4 1353
a0564e14 1354 pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state);
1da177e4 1355
1da177e4 1356 portp = tty->driver_data;
615e4a71 1357 if (portp == NULL)
4a561222 1358 return -EINVAL;
1da177e4
LT		 1359
1360 stl_sendbreak(portp, ((state == -1) ? 1 : 2));
4a561222 1361 return 0;
1da177e4
LT		 1362}
1363
1364/*****************************************************************************/
1365
1da177e4
LT		 1366static void stl_sendxchar(struct tty_struct *tty, char ch)
1367{
ca7ed0f2 1368 struct stlport *portp;
1da177e4 1369
a0564e14 1370 pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1371
1da177e4 1372 portp = tty->driver_data;
615e4a71 1373 if (portp == NULL)
1da177e4
LT		 1374 return;
1375
1376 if (ch == STOP_CHAR(tty))
1377 stl_sendflow(portp, 0);
1378 else if (ch == START_CHAR(tty))
1379 stl_sendflow(portp, 1);
1380 else
1381 stl_putchar(tty, ch);
1382}
1383
8561c44c 1384static void stl_portinfo(struct seq_file *m, struct stlport *portp, int portnr)
1da177e4 1385{
8561c44c
AD		 1386 int sigs;
1387 char sep;
1da177e4 1388
8561c44c 1389 seq_printf(m, "%d: uart:%s tx:%d rx:%d",
1da177e4
LT		 1390 portnr, (portp->hwid == 1) ? "SC26198" : "CD1400",
1391 (int) portp->stats.txtotal, (int) portp->stats.rxtotal);
1392
1393 if (portp->stats.rxframing)
8561c44c 1394 seq_printf(m, " fe:%d", (int) portp->stats.rxframing);
1da177e4 1395 if (portp->stats.rxparity)
8561c44c 1396 seq_printf(m, " pe:%d", (int) portp->stats.rxparity);
1da177e4 1397 if (portp->stats.rxbreaks)
8561c44c 1398 seq_printf(m, " brk:%d", (int) portp->stats.rxbreaks);
1da177e4 1399 if (portp->stats.rxoverrun)
8561c44c 1400 seq_printf(m, " oe:%d", (int) portp->stats.rxoverrun);
1da177e4
LT		 1401
1402 sigs = stl_getsignals(portp);
8561c44c
AD		 1403 sep = ' ';
1404 if (sigs & TIOCM_RTS) {
1405 seq_printf(m, "%c%s", sep, "RTS");
1406 sep = '|';
1407 }
1408 if (sigs & TIOCM_CTS) {
1409 seq_printf(m, "%c%s", sep, "CTS");
1410 sep = '|';
1411 }
1412 if (sigs & TIOCM_DTR) {
1413 seq_printf(m, "%c%s", sep, "DTR");
1414 sep = '|';
1415 }
1416 if (sigs & TIOCM_CD) {
1417 seq_printf(m, "%c%s", sep, "DCD");
1418 sep = '|';
1419 }
1420 if (sigs & TIOCM_DSR) {
1421 seq_printf(m, "%c%s", sep, "DSR");
1422 sep = '|';
1423 }
1424 seq_putc(m, '\n');
1da177e4
LT		 1425}
1426
1427/*****************************************************************************/
1428
1429/*
1430 * Port info, read from the /proc file system.
1431 */
1432
8561c44c 1433static int stl_proc_show(struct seq_file *m, void *v)
1da177e4 1434{
ca7ed0f2
JS		 1435 struct stlbrd *brdp;
1436 struct stlpanel *panelp;
1437 struct stlport *portp;
6b2c9457 1438 unsigned int brdnr, panelnr, portnr;
8561c44c 1439 int totalport;
1da177e4 1440
1da177e4 1441 totalport = 0;
8561c44c
AD		 1442
1443 seq_printf(m, "%s: version %s\n", stl_drvtitle, stl_drvversion);
1da177e4
LT		 1444
1445/*
1446 * We scan through for each board, panel and port. The offset is
1447 * calculated on the fly, and irrelevant ports are skipped.
1448 */
c62429d9 1449 for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) {
1da177e4 1450 brdp = stl_brds[brdnr];
615e4a71 1451 if (brdp == NULL)
1da177e4
LT		 1452 continue;
1453 if (brdp->state == 0)
1454 continue;
1455
1da177e4 1456 totalport = brdnr * STL_MAXPORTS;
c62429d9 1457 for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) {
1da177e4 1458 panelp = brdp->panels[panelnr];
615e4a71 1459 if (panelp == NULL)
1da177e4
LT		 1460 continue;
1461
c62429d9 1462 for (portnr = 0; portnr < panelp->nrports; portnr++,
1da177e4
LT		 1463 totalport++) {
1464 portp = panelp->ports[portnr];
615e4a71 1465 if (portp == NULL)
1da177e4 1466 continue;
8561c44c 1467 stl_portinfo(m, portp, totalport);
1da177e4
LT		 1468 }
1469 }
1470 }
8561c44c
AD		 1471 return 0;
1472}
1da177e4 1473
8561c44c
AD		 1474static int stl_proc_open(struct inode *inode, struct file *file)
1475{
1476 return single_open(file, stl_proc_show, NULL);
1da177e4
LT		 1477}
1478
8561c44c
AD		 1479static const struct file_operations stl_proc_fops = {
1480 .owner = THIS_MODULE,
1481 .open = stl_proc_open,
1482 .read = seq_read,
1483 .llseek = seq_lseek,
1484 .release = single_release,
1485};
1486
1da177e4
LT		 1487/*****************************************************************************/
1488
1489/*
1490 * All board interrupts are vectored through here first. This code then
1491 * calls off to the approrpriate board interrupt handlers.
1492 */
1493
7d12e780 1494static irqreturn_t stl_intr(int irq, void *dev_id)
1da177e4 1495{
ca7ed0f2 1496 struct stlbrd *brdp = dev_id;
1da177e4 1497
a6f97b29 1498 pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, brdp->irq);
1da177e4
LT		 1499
1500 return IRQ_RETVAL((* brdp->isr)(brdp));
1501}
1502
1503/*****************************************************************************/
1504
1505/*
1506 * Interrupt service routine for EasyIO board types.
1507 */
1508
ca7ed0f2 1509static int stl_eiointr(struct stlbrd *brdp)
1da177e4 1510{
ca7ed0f2 1511 struct stlpanel *panelp;
1da177e4
LT		 1512 unsigned int iobase;
1513 int handled = 0;
1514
b65b5b59 1515 spin_lock(&brd_lock);
1da177e4
LT		 1516 panelp = brdp->panels[0];
1517 iobase = panelp->iobase;
1518 while (inb(brdp->iostatus) & EIO_INTRPEND) {
1519 handled = 1;
1520 (* panelp->isr)(panelp, iobase);
1521 }
b65b5b59 1522 spin_unlock(&brd_lock);
1da177e4
LT		 1523 return handled;
1524}
1525
1526/*****************************************************************************/
1527
1528/*
1529 * Interrupt service routine for ECH-AT board types.
1530 */
1531
ca7ed0f2 1532static int stl_echatintr(struct stlbrd *brdp)
1da177e4 1533{
ca7ed0f2 1534 struct stlpanel *panelp;
6b2c9457 1535 unsigned int ioaddr, bnknr;
1da177e4
LT		 1536 int handled = 0;
1537
1538 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1539
1540 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1541 handled = 1;
c62429d9 1542 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1543 ioaddr = brdp->bnkstataddr[bnknr];
1544 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1545 panelp = brdp->bnk2panel[bnknr];
1546 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1547 }
1548 }
1549 }
1550
1551 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
1552
1553 return handled;
1554}
1555
1556/*****************************************************************************/
1557
1558/*
1559 * Interrupt service routine for ECH-MCA board types.
1560 */
1561
ca7ed0f2 1562static int stl_echmcaintr(struct stlbrd *brdp)
1da177e4 1563{
ca7ed0f2 1564 struct stlpanel *panelp;
6b2c9457 1565 unsigned int ioaddr, bnknr;
1da177e4
LT		 1566 int handled = 0;
1567
1568 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1569 handled = 1;
c62429d9 1570 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1571 ioaddr = brdp->bnkstataddr[bnknr];
1572 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1573 panelp = brdp->bnk2panel[bnknr];
1574 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1575 }
1576 }
1577 }
1578 return handled;
1579}
1580
1581/*****************************************************************************/
1582
1583/*
1584 * Interrupt service routine for ECH-PCI board types.
1585 */
1586
ca7ed0f2 1587static int stl_echpciintr(struct stlbrd *brdp)
1da177e4 1588{
ca7ed0f2 1589 struct stlpanel *panelp;
6b2c9457 1590 unsigned int ioaddr, bnknr, recheck;
1da177e4
LT		 1591 int handled = 0;
1592
1593 while (1) {
1594 recheck = 0;
c62429d9 1595 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1596 outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl);
1597 ioaddr = brdp->bnkstataddr[bnknr];
1598 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1599 panelp = brdp->bnk2panel[bnknr];
1600 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1601 recheck++;
1602 handled = 1;
1603 }
1604 }
1605 if (! recheck)
1606 break;
1607 }
1608 return handled;
1609}
1610
1611/*****************************************************************************/
1612
1613/*
1614 * Interrupt service routine for ECH-8/64-PCI board types.
1615 */
1616
ca7ed0f2 1617static int stl_echpci64intr(struct stlbrd *brdp)
1da177e4 1618{
ca7ed0f2 1619 struct stlpanel *panelp;
6b2c9457 1620 unsigned int ioaddr, bnknr;
1da177e4
LT		 1621 int handled = 0;
1622
1623 while (inb(brdp->ioctrl) & 0x1) {
1624 handled = 1;
c62429d9 1625 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1626 ioaddr = brdp->bnkstataddr[bnknr];
1627 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1628 panelp = brdp->bnk2panel[bnknr];
1629 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1630 }
1631 }
1632 }
1633
1634 return handled;
1635}
1636
1637/*****************************************************************************/
1638
1da177e4
LT		 1639/*
1640 * Initialize all the ports on a panel.
1641 */
1642
705c1862 1643static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4 1644{
6b2c9457
JS		 1645 struct stlport *portp;
1646 unsigned int i;
1647 int chipmask;
1da177e4 1648
a0564e14 1649 pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 1650
1651 chipmask = stl_panelinit(brdp, panelp);
1652
1653/*
1654 * All UART's are initialized (if found!). Now go through and setup
1655 * each ports data structures.
1656 */
c62429d9 1657 for (i = 0; i < panelp->nrports; i++) {
ca7ed0f2 1658 portp = kzalloc(sizeof(struct stlport), GFP_KERNEL);
b0b4ed72 1659 if (!portp) {
1da177e4 1660 printk("STALLION: failed to allocate memory "
ca7ed0f2 1661 "(size=%Zd)\n", sizeof(struct stlport));
1da177e4
LT		 1662 break;
1663 }
d18a750f 1664 tty_port_init(&portp->port);
31f35939 1665 portp->port.ops = &stl_port_ops;
1da177e4
LT		 1666 portp->magic = STL_PORTMAGIC;
1667 portp->portnr = i;
1668 portp->brdnr = panelp->brdnr;
1669 portp->panelnr = panelp->panelnr;
1670 portp->uartp = panelp->uartp;
1671 portp->clk = brdp->clk;
1672 portp->baud_base = STL_BAUDBASE;
1673 portp->close_delay = STL_CLOSEDELAY;
1674 portp->closing_wait = 30 * HZ;
f8ae4764
AC		 1675 init_waitqueue_head(&portp->port.open_wait);
1676 init_waitqueue_head(&portp->port.close_wait);
1da177e4
LT		 1677 portp->stats.brd = portp->brdnr;
1678 portp->stats.panel = portp->panelnr;
1679 portp->stats.port = portp->portnr;
1680 panelp->ports[i] = portp;
1681 stl_portinit(brdp, panelp, portp);
1682 }
1683
c62429d9 1684 return 0;
1da177e4
LT		 1685}
1686
3b85b341
JS		 1687static void stl_cleanup_panels(struct stlbrd *brdp)
1688{
1689 struct stlpanel *panelp;
1690 struct stlport *portp;
1691 unsigned int j, k;
d18a750f 1692 struct tty_struct *tty;
3b85b341
JS		 1693
1694 for (j = 0; j < STL_MAXPANELS; j++) {
1695 panelp = brdp->panels[j];
1696 if (panelp == NULL)
1697 continue;
1698 for (k = 0; k < STL_PORTSPERPANEL; k++) {
1699 portp = panelp->ports[k];
1700 if (portp == NULL)
1701 continue;
d18a750f
AC		 1702 tty = tty_port_tty_get(&portp->port);
1703 if (tty != NULL) {
1704 stl_hangup(tty);
1705 tty_kref_put(tty);
1706 }
3b85b341
JS		 1707 kfree(portp->tx.buf);
1708 kfree(portp);
1709 }
1710 kfree(panelp);
1711 }
1712}
1713
1da177e4
LT		 1714/*****************************************************************************/
1715
1716/*
1717 * Try to find and initialize an EasyIO board.
1718 */
1719
705c1862 1720static int __devinit stl_initeio(struct stlbrd *brdp)
1da177e4 1721{
ca7ed0f2 1722 struct stlpanel *panelp;
1da177e4
LT		 1723 unsigned int status;
1724 char *name;
3b85b341 1725 int retval;
1da177e4 1726
a0564e14 1727 pr_debug("stl_initeio(brdp=%p)\n", brdp);
1da177e4
LT		 1728
1729 brdp->ioctrl = brdp->ioaddr1 + 1;
1730 brdp->iostatus = brdp->ioaddr1 + 2;
1731
1732 status = inb(brdp->iostatus);
1733 if ((status & EIO_IDBITMASK) == EIO_MK3)
1734 brdp->ioctrl++;
1735
1736/*
1737 * Handle board specific stuff now. The real difference is PCI
1738 * or not PCI.
1739 */
1740 if (brdp->brdtype == BRD_EASYIOPCI) {
1741 brdp->iosize1 = 0x80;
1742 brdp->iosize2 = 0x80;
1743 name = "serial(EIO-PCI)";
1744 outb(0x41, (brdp->ioaddr2 + 0x4c));
1745 } else {
1746 brdp->iosize1 = 8;
1747 name = "serial(EIO)";
1748 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1749 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1750 printk("STALLION: invalid irq=%d for brd=%d\n",
1751 brdp->irq, brdp->brdnr);
3b85b341
JS		 1752 retval = -EINVAL;
1753 goto err;
1da177e4
LT		 1754 }
1755 outb((stl_vecmap[brdp->irq] | EIO_0WS |
1756 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)),
1757 brdp->ioctrl);
1758 }
1759
3b85b341 1760 retval = -EBUSY;
1da177e4
LT		 1761 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1762 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1763 "%x conflicts with another device\n", brdp->brdnr,
1764 brdp->ioaddr1);
3b85b341 1765 goto err;
1da177e4
LT		 1766 }
1767
1768 if (brdp->iosize2 > 0)
1769 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1770 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1771 "address %x conflicts with another device\n",
1772 brdp->brdnr, brdp->ioaddr2);
1773 printk(KERN_WARNING "STALLION: Warning, also "
1774 "releasing board %d I/O address %x \n",
1775 brdp->brdnr, brdp->ioaddr1);
3b85b341 1776 goto err_rel1;
1da177e4
LT		 1777 }
1778
1779/*
1780 * Everything looks OK, so let's go ahead and probe for the hardware.
1781 */
1782 brdp->clk = CD1400_CLK;
1783 brdp->isr = stl_eiointr;
1784
3b85b341 1785 retval = -ENODEV;
1da177e4
LT		 1786 switch (status & EIO_IDBITMASK) {
1787 case EIO_8PORTM:
1788 brdp->clk = CD1400_CLK8M;
1789 /* fall thru */
1790 case EIO_8PORTRS:
1791 case EIO_8PORTDI:
1792 brdp->nrports = 8;
1793 break;
1794 case EIO_4PORTRS:
1795 brdp->nrports = 4;
1796 break;
1797 case EIO_MK3:
1798 switch (status & EIO_BRDMASK) {
1799 case ID_BRD4:
1800 brdp->nrports = 4;
1801 break;
1802 case ID_BRD8:
1803 brdp->nrports = 8;
1804 break;
1805 case ID_BRD16:
1806 brdp->nrports = 16;
1807 break;
1808 default:
3b85b341 1809 goto err_rel2;
1da177e4
LT		 1810 }
1811 break;
1812 default:
3b85b341 1813 goto err_rel2;
1da177e4
LT		 1814 }
1815
1816/*
1817 * We have verified that the board is actually present, so now we
1818 * can complete the setup.
1819 */
1820
ca7ed0f2 1821 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1822 if (!panelp) {
1da177e4 1823 printk(KERN_WARNING "STALLION: failed to allocate memory "
ca7ed0f2 1824 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341
JS		 1825 retval = -ENOMEM;
1826 goto err_rel2;
1da177e4 1827 }
1da177e4
LT		 1828
1829 panelp->magic = STL_PANELMAGIC;
1830 panelp->brdnr = brdp->brdnr;
1831 panelp->panelnr = 0;
1832 panelp->nrports = brdp->nrports;
1833 panelp->iobase = brdp->ioaddr1;
1834 panelp->hwid = status;
1835 if ((status & EIO_IDBITMASK) == EIO_MK3) {
615e4a71 1836 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 1837 panelp->isr = stl_sc26198intr;
1838 } else {
615e4a71 1839 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 1840 panelp->isr = stl_cd1400eiointr;
1841 }
1842
1843 brdp->panels[0] = panelp;
1844 brdp->nrpanels = 1;
1845 brdp->state |= BRD_FOUND;
1846 brdp->hwid = status;
0f2ed4c6 1847 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 1848 printk("STALLION: failed to register interrupt "
1849 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 1850 retval = -ENODEV;
1851 goto err_fr;
1da177e4 1852 }
3b85b341
JS		 1853
1854 return 0;
1855err_fr:
1856 stl_cleanup_panels(brdp);
1857err_rel2:
1858 if (brdp->iosize2 > 0)
1859 release_region(brdp->ioaddr2, brdp->iosize2);
1860err_rel1:
1861 release_region(brdp->ioaddr1, brdp->iosize1);
1862err:
1863 return retval;
1da177e4
LT		 1864}
1865
1866/*****************************************************************************/
1867
1868/*
1869 * Try to find an ECH board and initialize it. This code is capable of
1870 * dealing with all types of ECH board.
1871 */
1872
705c1862 1873static int __devinit stl_initech(struct stlbrd *brdp)
1da177e4 1874{
ca7ed0f2 1875 struct stlpanel *panelp;
6b2c9457
JS		 1876 unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i;
1877 int retval;
1da177e4
LT		 1878 char *name;
1879
a0564e14 1880 pr_debug("stl_initech(brdp=%p)\n", brdp);
1da177e4
LT		 1881
1882 status = 0;
1883 conflict = 0;
1884
1885/*
1886 * Set up the initial board register contents for boards. This varies a
1887 * bit between the different board types. So we need to handle each
1888 * separately. Also do a check that the supplied IRQ is good.
1889 */
1890 switch (brdp->brdtype) {
1891
1892 case BRD_ECH:
1893 brdp->isr = stl_echatintr;
1894 brdp->ioctrl = brdp->ioaddr1 + 1;
1895 brdp->iostatus = brdp->ioaddr1 + 1;
1896 status = inb(brdp->iostatus);
3b85b341
JS		 1897 if ((status & ECH_IDBITMASK) != ECH_ID) {
1898 retval = -ENODEV;
1899 goto err;
1900 }
1da177e4
LT		 1901 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1902 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1903 printk("STALLION: invalid irq=%d for brd=%d\n",
1904 brdp->irq, brdp->brdnr);
3b85b341
JS		 1905 retval = -EINVAL;
1906 goto err;
1da177e4
LT		 1907 }
1908 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
1909 status |= (stl_vecmap[brdp->irq] << 1);
1910 outb((status | ECH_BRDRESET), brdp->ioaddr1);
1911 brdp->ioctrlval = ECH_INTENABLE |
1912 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
c62429d9 1913 for (i = 0; i < 10; i++)
1da177e4
LT		 1914 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1915 brdp->iosize1 = 2;
1916 brdp->iosize2 = 32;
1917 name = "serial(EC8/32)";
1918 outb(status, brdp->ioaddr1);
1919 break;
1920
1921 case BRD_ECHMC:
1922 brdp->isr = stl_echmcaintr;
1923 brdp->ioctrl = brdp->ioaddr1 + 0x20;
1924 brdp->iostatus = brdp->ioctrl;
1925 status = inb(brdp->iostatus);
3b85b341
JS		 1926 if ((status & ECH_IDBITMASK) != ECH_ID) {
1927 retval = -ENODEV;
1928 goto err;
1929 }
1da177e4
LT		 1930 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1931 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1932 printk("STALLION: invalid irq=%d for brd=%d\n",
1933 brdp->irq, brdp->brdnr);
3b85b341
JS		 1934 retval = -EINVAL;
1935 goto err;
1da177e4
LT		 1936 }
1937 outb(ECHMC_BRDRESET, brdp->ioctrl);
1938 outb(ECHMC_INTENABLE, brdp->ioctrl);
1939 brdp->iosize1 = 64;
1940 name = "serial(EC8/32-MC)";
1941 break;
1942
1943 case BRD_ECHPCI:
1944 brdp->isr = stl_echpciintr;
1945 brdp->ioctrl = brdp->ioaddr1 + 2;
1946 brdp->iosize1 = 4;
1947 brdp->iosize2 = 8;
1948 name = "serial(EC8/32-PCI)";
1949 break;
1950
1951 case BRD_ECH64PCI:
1952 brdp->isr = stl_echpci64intr;
1953 brdp->ioctrl = brdp->ioaddr2 + 0x40;
1954 outb(0x43, (brdp->ioaddr1 + 0x4c));
1955 brdp->iosize1 = 0x80;
1956 brdp->iosize2 = 0x80;
1957 name = "serial(EC8/64-PCI)";
1958 break;
1959
1960 default:
1961 printk("STALLION: unknown board type=%d\n", brdp->brdtype);
3b85b341
JS		 1962 retval = -EINVAL;
1963 goto err;
1da177e4
LT		 1964 }
1965
1966/*
1967 * Check boards for possible IO address conflicts and return fail status
1968 * if an IO conflict found.
1969 */
3b85b341 1970 retval = -EBUSY;
1da177e4
LT		 1971 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1972 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1973 "%x conflicts with another device\n", brdp->brdnr,
1974 brdp->ioaddr1);
3b85b341 1975 goto err;
1da177e4
LT		 1976 }
1977
1978 if (brdp->iosize2 > 0)
1979 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1980 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1981 "address %x conflicts with another device\n",
1982 brdp->brdnr, brdp->ioaddr2);
1983 printk(KERN_WARNING "STALLION: Warning, also "
1984 "releasing board %d I/O address %x \n",
1985 brdp->brdnr, brdp->ioaddr1);
3b85b341 1986 goto err_rel1;
1da177e4
LT		 1987 }
1988
1989/*
1990 * Scan through the secondary io address space looking for panels.
1991 * As we find'em allocate and initialize panel structures for each.
1992 */
1993 brdp->clk = CD1400_CLK;
1994 brdp->hwid = status;
1995
1996 ioaddr = brdp->ioaddr2;
1997 banknr = 0;
1998 panelnr = 0;
1999 nxtid = 0;
2000
c62429d9 2001 for (i = 0; i < STL_MAXPANELS; i++) {
1da177e4
LT		 2002 if (brdp->brdtype == BRD_ECHPCI) {
2003 outb(nxtid, brdp->ioctrl);
2004 ioaddr = brdp->ioaddr2;
2005 }
2006 status = inb(ioaddr + ECH_PNLSTATUS);
2007 if ((status & ECH_PNLIDMASK) != nxtid)
64834b22 2008 break;
ca7ed0f2 2009 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 2010 if (!panelp) {
1da177e4 2011 printk("STALLION: failed to allocate memory "
ca7ed0f2 2012 "(size=%Zd)\n", sizeof(struct stlpanel));
49277b1c 2013 retval = -ENOMEM;
3b85b341 2014 goto err_fr;
1da177e4 2015 }
1da177e4
LT		 2016 panelp->magic = STL_PANELMAGIC;
2017 panelp->brdnr = brdp->brdnr;
2018 panelp->panelnr = panelnr;
2019 panelp->iobase = ioaddr;
2020 panelp->pagenr = nxtid;
2021 panelp->hwid = status;
2022 brdp->bnk2panel[banknr] = panelp;
2023 brdp->bnkpageaddr[banknr] = nxtid;
2024 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
2025
2026 if (status & ECH_PNLXPID) {
615e4a71 2027 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 2028 panelp->isr = stl_sc26198intr;
2029 if (status & ECH_PNL16PORT) {
2030 panelp->nrports = 16;
2031 brdp->bnk2panel[banknr] = panelp;
2032 brdp->bnkpageaddr[banknr] = nxtid;
2033 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
2034 ECH_PNLSTATUS;
c62429d9 2035 } else
1da177e4 2036 panelp->nrports = 8;
1da177e4 2037 } else {
615e4a71 2038 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 2039 panelp->isr = stl_cd1400echintr;
2040 if (status & ECH_PNL16PORT) {
2041 panelp->nrports = 16;
2042 panelp->ackmask = 0x80;
2043 if (brdp->brdtype != BRD_ECHPCI)
2044 ioaddr += EREG_BANKSIZE;
2045 brdp->bnk2panel[banknr] = panelp;
2046 brdp->bnkpageaddr[banknr] = ++nxtid;
2047 brdp->bnkstataddr[banknr++] = ioaddr +
2048 ECH_PNLSTATUS;
2049 } else {
2050 panelp->nrports = 8;
2051 panelp->ackmask = 0xc0;
2052 }
2053 }
2054
2055 nxtid++;
2056 ioaddr += EREG_BANKSIZE;
2057 brdp->nrports += panelp->nrports;
2058 brdp->panels[panelnr++] = panelp;
2059 if ((brdp->brdtype != BRD_ECHPCI) &&
49277b1c
JS		 2060 (ioaddr >= (brdp->ioaddr2 + brdp->iosize2))) {
2061 retval = -EINVAL;
3b85b341 2062 goto err_fr;
49277b1c 2063 }
1da177e4
LT		 2064 }
2065
2066 brdp->nrpanels = panelnr;
2067 brdp->nrbnks = banknr;
2068 if (brdp->brdtype == BRD_ECH)
2069 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2070
2071 brdp->state |= BRD_FOUND;
0f2ed4c6 2072 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2073 printk("STALLION: failed to register interrupt "
2074 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2075 retval = -ENODEV;
2076 goto err_fr;
1da177e4
LT		 2077 }
2078
3b85b341
JS		 2079 return 0;
2080err_fr:
2081 stl_cleanup_panels(brdp);
2082 if (brdp->iosize2 > 0)
2083 release_region(brdp->ioaddr2, brdp->iosize2);
2084err_rel1:
2085 release_region(brdp->ioaddr1, brdp->iosize1);
2086err:
2087 return retval;
1da177e4
LT		 2088}
2089
2090/*****************************************************************************/
2091
2092/*
2093 * Initialize and configure the specified board.
2094 * Scan through all the boards in the configuration and see what we
2095 * can find. Handle EIO and the ECH boards a little differently here
2096 * since the initial search and setup is very different.
2097 */
2098
705c1862 2099static int __devinit stl_brdinit(struct stlbrd *brdp)
1da177e4 2100{
3b85b341 2101 int i, retval;
1da177e4 2102
a0564e14 2103 pr_debug("stl_brdinit(brdp=%p)\n", brdp);
1da177e4
LT		 2104
2105 switch (brdp->brdtype) {
2106 case BRD_EASYIO:
2107 case BRD_EASYIOPCI:
3b85b341
JS		 2108 retval = stl_initeio(brdp);
2109 if (retval)
2110 goto err;
1da177e4
LT		 2111 break;
2112 case BRD_ECH:
2113 case BRD_ECHMC:
2114 case BRD_ECHPCI:
2115 case BRD_ECH64PCI:
3b85b341
JS		 2116 retval = stl_initech(brdp);
2117 if (retval)
2118 goto err;
1da177e4
LT		 2119 break;
2120 default:
2121 printk("STALLION: board=%d is unknown board type=%d\n",
2122 brdp->brdnr, brdp->brdtype);
3b85b341
JS		 2123 retval = -ENODEV;
2124 goto err;
1da177e4
LT		 2125 }
2126
1da177e4
LT		 2127 if ((brdp->state & BRD_FOUND) == 0) {
2128 printk("STALLION: %s board not found, board=%d io=%x irq=%d\n",
2129 stl_brdnames[brdp->brdtype], brdp->brdnr,
2130 brdp->ioaddr1, brdp->irq);
3b85b341 2131 goto err_free;
1da177e4
LT		 2132 }
2133
c62429d9 2134 for (i = 0; i < STL_MAXPANELS; i++)
615e4a71 2135 if (brdp->panels[i] != NULL)
1da177e4
LT		 2136 stl_initports(brdp, brdp->panels[i]);
2137
2138 printk("STALLION: %s found, board=%d io=%x irq=%d "
2139 "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype],
2140 brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels,
2141 brdp->nrports);
3b85b341
JS		 2142
2143 return 0;
2144err_free:
2145 free_irq(brdp->irq, brdp);
2146
2147 stl_cleanup_panels(brdp);
2148
2149 release_region(brdp->ioaddr1, brdp->iosize1);
2150 if (brdp->iosize2 > 0)
2151 release_region(brdp->ioaddr2, brdp->iosize2);
3b85b341
JS		 2152err:
2153 return retval;
1da177e4
LT		 2154}
2155
2156/*****************************************************************************/
2157
2158/*
2159 * Find the next available board number that is free.
2160 */
2161
705c1862 2162static int __devinit stl_getbrdnr(void)
1da177e4 2163{
6b2c9457 2164 unsigned int i;
1da177e4 2165
c62429d9 2166 for (i = 0; i < STL_MAXBRDS; i++)
615e4a71 2167 if (stl_brds[i] == NULL) {
1da177e4
LT		 2168 if (i >= stl_nrbrds)
2169 stl_nrbrds = i + 1;
c62429d9 2170 return i;
1da177e4 2171 }
c62429d9
JS		 2172
2173 return -1;
1da177e4
LT		 2174}
2175
b1b84fe0 2176/*****************************************************************************/
1da177e4
LT		 2177/*
2178 * We have a Stallion board. Allocate a board structure and
2179 * initialize it. Read its IO and IRQ resources from PCI
2180 * configuration space.
2181 */
2182
b1b84fe0
JS		 2183static int __devinit stl_pciprobe(struct pci_dev *pdev,
2184 const struct pci_device_id *ent)
1da177e4 2185{
b1b84fe0 2186 struct stlbrd *brdp;
aeaccfe4 2187 unsigned int i, brdtype = ent->driver_data;
6b2c9457 2188 int brdnr, retval = -ENODEV;
1da177e4 2189
b1b84fe0 2190 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
3b85b341 2191 goto err;
b1b84fe0 2192
3b85b341
JS		 2193 retval = pci_enable_device(pdev);
2194 if (retval)
2195 goto err;
2196 brdp = stl_allocbrd();
2197 if (brdp == NULL) {
2198 retval = -ENOMEM;
2199 goto err;
2200 }
79cfe7ab 2201 mutex_lock(&stl_brdslock);
6b2c9457
JS		 2202 brdnr = stl_getbrdnr();
2203 if (brdnr < 0) {
fefaf9a7 2204 dev_err(&pdev->dev, "too many boards found, "
1da177e4 2205 "maximum supported %d\n", STL_MAXBRDS);
79cfe7ab 2206 mutex_unlock(&stl_brdslock);
49277b1c 2207 retval = -ENODEV;
3b85b341 2208 goto err_fr;
1da177e4 2209 }
6b2c9457 2210 brdp->brdnr = (unsigned int)brdnr;
79cfe7ab
JS		 2211 stl_brds[brdp->brdnr] = brdp;
2212 mutex_unlock(&stl_brdslock);
2213
1da177e4 2214 brdp->brdtype = brdtype;
fc06b5cf 2215 brdp->state |= STL_PROBED;
1da177e4 2216
1da177e4
LT		 2217/*
2218 * We have all resources from the board, so let's setup the actual
2219 * board structure now.
2220 */
2221 switch (brdtype) {
2222 case BRD_ECHPCI:
b1b84fe0
JS		 2223 brdp->ioaddr2 = pci_resource_start(pdev, 0);
2224 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2225 break;
2226 case BRD_ECH64PCI:
b1b84fe0
JS		 2227 brdp->ioaddr2 = pci_resource_start(pdev, 2);
2228 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2229 break;
2230 case BRD_EASYIOPCI:
b1b84fe0
JS		 2231 brdp->ioaddr1 = pci_resource_start(pdev, 2);
2232 brdp->ioaddr2 = pci_resource_start(pdev, 1);
1da177e4
LT		 2233 break;
2234 default:
fefaf9a7 2235 dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype);
1da177e4
LT		 2236 break;
2237 }
2238
b1b84fe0 2239 brdp->irq = pdev->irq;
3b85b341
JS		 2240 retval = stl_brdinit(brdp);
2241 if (retval)
79cfe7ab 2242 goto err_null;
1da177e4 2243
b1b84fe0
JS		 2244 pci_set_drvdata(pdev, brdp);
2245
aeaccfe4
JS		 2246 for (i = 0; i < brdp->nrports; i++)
2247 tty_register_device(stl_serial,
2248 brdp->brdnr * STL_MAXPORTS + i, &pdev->dev);
2249
3b85b341 2250 return 0;
79cfe7ab
JS		 2251err_null:
2252 stl_brds[brdp->brdnr] = NULL;
3b85b341
JS		 2253err_fr:
2254 kfree(brdp);
2255err:
2256 return retval;
1da177e4
LT		 2257}
2258
b1b84fe0 2259static void __devexit stl_pciremove(struct pci_dev *pdev)
1da177e4 2260{
b1b84fe0 2261 struct stlbrd *brdp = pci_get_drvdata(pdev);
aeaccfe4 2262 unsigned int i;
1da177e4 2263
b1b84fe0 2264 free_irq(brdp->irq, brdp);
1da177e4 2265
b1b84fe0 2266 stl_cleanup_panels(brdp);
1da177e4 2267
b1b84fe0
JS		 2268 release_region(brdp->ioaddr1, brdp->iosize1);
2269 if (brdp->iosize2 > 0)
2270 release_region(brdp->ioaddr2, brdp->iosize2);
1da177e4 2271
aeaccfe4
JS		 2272 for (i = 0; i < brdp->nrports; i++)
2273 tty_unregister_device(stl_serial,
2274 brdp->brdnr * STL_MAXPORTS + i);
2275
b1b84fe0
JS		 2276 stl_brds[brdp->brdnr] = NULL;
2277 kfree(brdp);
1da177e4
LT		 2278}
2279
b1b84fe0
JS		 2280static struct pci_driver stl_pcidriver = {
2281 .name = "stallion",
2282 .id_table = stl_pcibrds,
2283 .probe = stl_pciprobe,
2284 .remove = __devexit_p(stl_pciremove)
2285};
1da177e4
LT		 2286
2287/*****************************************************************************/
2288
1da177e4
LT		 2289/*
2290 * Return the board stats structure to user app.
2291 */
2292
2293static int stl_getbrdstats(combrd_t __user *bp)
2294{
6b2c9457 2295 combrd_t stl_brdstats;
ca7ed0f2
JS		 2296 struct stlbrd *brdp;
2297 struct stlpanel *panelp;
6b2c9457 2298 unsigned int i;
1da177e4
LT		 2299
2300 if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t)))
2301 return -EFAULT;
2302 if (stl_brdstats.brd >= STL_MAXBRDS)
c62429d9 2303 return -ENODEV;
1da177e4 2304 brdp = stl_brds[stl_brdstats.brd];
615e4a71 2305 if (brdp == NULL)
c62429d9 2306 return -ENODEV;
1da177e4
LT		 2307
2308 memset(&stl_brdstats, 0, sizeof(combrd_t));
2309 stl_brdstats.brd = brdp->brdnr;
2310 stl_brdstats.type = brdp->brdtype;
2311 stl_brdstats.hwid = brdp->hwid;
2312 stl_brdstats.state = brdp->state;
2313 stl_brdstats.ioaddr = brdp->ioaddr1;
2314 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2315 stl_brdstats.irq = brdp->irq;
2316 stl_brdstats.nrpanels = brdp->nrpanels;
2317 stl_brdstats.nrports = brdp->nrports;
c62429d9 2318 for (i = 0; i < brdp->nrpanels; i++) {
1da177e4
LT		 2319 panelp = brdp->panels[i];
2320 stl_brdstats.panels[i].panel = i;
2321 stl_brdstats.panels[i].hwid = panelp->hwid;
2322 stl_brdstats.panels[i].nrports = panelp->nrports;
2323 }
2324
2325 return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0;
2326}
2327
2328/*****************************************************************************/
2329
2330/*
2331 * Resolve the referenced port number into a port struct pointer.
2332 */
2333
ca7ed0f2 2334static struct stlport *stl_getport(int brdnr, int panelnr, int portnr)
1da177e4 2335{
ca7ed0f2
JS		 2336 struct stlbrd *brdp;
2337 struct stlpanel *panelp;
1da177e4 2338
c62429d9
JS		 2339 if (brdnr < 0 || brdnr >= STL_MAXBRDS)
2340 return NULL;
1da177e4 2341 brdp = stl_brds[brdnr];
615e4a71 2342 if (brdp == NULL)
c62429d9 2343 return NULL;
6b2c9457 2344 if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels)
c62429d9 2345 return NULL;
1da177e4 2346 panelp = brdp->panels[panelnr];
615e4a71 2347 if (panelp == NULL)
c62429d9 2348 return NULL;
6b2c9457 2349 if (portnr < 0 || (unsigned int)portnr >= panelp->nrports)
c62429d9
JS		 2350 return NULL;
2351 return panelp->ports[portnr];
1da177e4
LT		 2352}
2353
2354/*****************************************************************************/
2355
2356/*
2357 * Return the port stats structure to user app. A NULL port struct
2358 * pointer passed in means that we need to find out from the app
2359 * what port to get stats for (used through board control device).
2360 */
2361
d18a750f 2362static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp)
1da177e4 2363{
6b2c9457 2364 comstats_t stl_comstats;
1da177e4
LT		 2365 unsigned char *head, *tail;
2366 unsigned long flags;
2367
2368 if (!portp) {
2369 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2370 return -EFAULT;
2371 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2372 stl_comstats.port);
615e4a71 2373 if (portp == NULL)
c62429d9 2374 return -ENODEV;
1da177e4
LT		 2375 }
2376
2377 portp->stats.state = portp->istate;
f8ae4764 2378 portp->stats.flags = portp->port.flags;
1da177e4
LT		 2379 portp->stats.hwid = portp->hwid;
2380
2381 portp->stats.ttystate = 0;
2382 portp->stats.cflags = 0;
2383 portp->stats.iflags = 0;
2384 portp->stats.oflags = 0;
2385 portp->stats.lflags = 0;
2386 portp->stats.rxbuffered = 0;
2387
b65b5b59 2388 spin_lock_irqsave(&stallion_lock, flags);
d18a750f
AC		 2389 if (tty != NULL && portp->port.tty == tty) {
2390 portp->stats.ttystate = tty->flags;
2391 /* No longer available as a statistic */
2392 portp->stats.rxbuffered = 1; /*tty->flip.count; */
2393 if (tty->termios != NULL) {
2394 portp->stats.cflags = tty->termios->c_cflag;
2395 portp->stats.iflags = tty->termios->c_iflag;
2396 portp->stats.oflags = tty->termios->c_oflag;
2397 portp->stats.lflags = tty->termios->c_lflag;
1da177e4 2398 }
d18a750f 2399 }
b65b5b59 2400 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 2401
2402 head = portp->tx.head;
2403 tail = portp->tx.tail;
c62429d9
JS		 2404 portp->stats.txbuffered = (head >= tail) ? (head - tail) :
2405 (STL_TXBUFSIZE - (tail - head));
1da177e4
LT		 2406
2407 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2408
2409 return copy_to_user(cp, &portp->stats,
2410 sizeof(comstats_t)) ? -EFAULT : 0;
2411}
2412
2413/*****************************************************************************/
2414
2415/*
2416 * Clear the port stats structure. We also return it zeroed out...
2417 */
2418
ca7ed0f2 2419static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4 2420{
6b2c9457
JS		 2421 comstats_t stl_comstats;
2422
1da177e4
LT		 2423 if (!portp) {
2424 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2425 return -EFAULT;
2426 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2427 stl_comstats.port);
615e4a71 2428 if (portp == NULL)
c62429d9 2429 return -ENODEV;
1da177e4
LT		 2430 }
2431
2432 memset(&portp->stats, 0, sizeof(comstats_t));
2433 portp->stats.brd = portp->brdnr;
2434 portp->stats.panel = portp->panelnr;
2435 portp->stats.port = portp->portnr;
2436 return copy_to_user(cp, &portp->stats,
2437 sizeof(comstats_t)) ? -EFAULT : 0;
2438}
2439
2440/*****************************************************************************/
2441
2442/*
2443 * Return the entire driver ports structure to a user app.
2444 */
2445
ca7ed0f2 2446static int stl_getportstruct(struct stlport __user *arg)
1da177e4 2447{
6b2c9457 2448 struct stlport stl_dummyport;
ca7ed0f2 2449 struct stlport *portp;
1da177e4 2450
ca7ed0f2 2451 if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport)))
1da177e4
LT		 2452 return -EFAULT;
2453 portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr,
2454 stl_dummyport.portnr);
2455 if (!portp)
2456 return -ENODEV;
ca7ed0f2 2457 return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0;
1da177e4
LT		 2458}
2459
2460/*****************************************************************************/
2461
2462/*
2463 * Return the entire driver board structure to a user app.
2464 */
2465
ca7ed0f2 2466static int stl_getbrdstruct(struct stlbrd __user *arg)
1da177e4 2467{
6b2c9457 2468 struct stlbrd stl_dummybrd;
ca7ed0f2 2469 struct stlbrd *brdp;
1da177e4 2470
ca7ed0f2 2471 if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd)))
1da177e4 2472 return -EFAULT;
6b2c9457 2473 if (stl_dummybrd.brdnr >= STL_MAXBRDS)
1da177e4
LT		 2474 return -ENODEV;
2475 brdp = stl_brds[stl_dummybrd.brdnr];
2476 if (!brdp)
c62429d9 2477 return -ENODEV;
ca7ed0f2 2478 return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0;
1da177e4
LT		 2479}
2480
2481/*****************************************************************************/
2482
2483/*
2484 * The "staliomem" device is also required to do some special operations
2485 * on the board and/or ports. In this driver it is mostly used for stats
2486 * collection.
2487 */
2488
2489static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg)
2490{
2491 int brdnr, rc;
2492 void __user *argp = (void __user *)arg;
2493
a0564e14 2494 pr_debug("stl_memioctl(ip=%p,fp=%p,cmd=%x,arg=%lx)\n", ip, fp, cmd,arg);
1da177e4
LT		 2495
2496 brdnr = iminor(ip);
2497 if (brdnr >= STL_MAXBRDS)
c62429d9 2498 return -ENODEV;
1da177e4
LT		 2499 rc = 0;
2500
2501 switch (cmd) {
2502 case COM_GETPORTSTATS:
d18a750f 2503 rc = stl_getportstats(NULL, NULL, argp);
1da177e4
LT		 2504 break;
2505 case COM_CLRPORTSTATS:
2506 rc = stl_clrportstats(NULL, argp);
2507 break;
2508 case COM_GETBRDSTATS:
2509 rc = stl_getbrdstats(argp);
2510 break;
2511 case COM_READPORT:
2512 rc = stl_getportstruct(argp);
2513 break;
2514 case COM_READBOARD:
2515 rc = stl_getbrdstruct(argp);
2516 break;
2517 default:
2518 rc = -ENOIOCTLCMD;
2519 break;
2520 }
2521
c62429d9 2522 return rc;
1da177e4
LT		 2523}
2524
b68e31d0 2525static const struct tty_operations stl_ops = {
1da177e4
LT		 2526 .open = stl_open,
2527 .close = stl_close,
2528 .write = stl_write,
2529 .put_char = stl_putchar,
2530 .flush_chars = stl_flushchars,
2531 .write_room = stl_writeroom,
2532 .chars_in_buffer = stl_charsinbuffer,
2533 .ioctl = stl_ioctl,
2534 .set_termios = stl_settermios,
2535 .throttle = stl_throttle,
2536 .unthrottle = stl_unthrottle,
2537 .stop = stl_stop,
2538 .start = stl_start,
2539 .hangup = stl_hangup,
2540 .flush_buffer = stl_flushbuffer,
2541 .break_ctl = stl_breakctl,
2542 .wait_until_sent = stl_waituntilsent,
2543 .send_xchar = stl_sendxchar,
1da177e4
LT		 2544 .tiocmget = stl_tiocmget,
2545 .tiocmset = stl_tiocmset,
8561c44c 2546 .proc_fops = &stl_proc_fops,
1da177e4
LT		 2547};
2548
31f35939
AC		 2549static const struct tty_port_operations stl_port_ops = {
2550 .carrier_raised = stl_carrier_raised,
fcc8ac18 2551 .dtr_rts = stl_dtr_rts,
31f35939
AC		 2552};
2553
1da177e4
LT		 2554/*****************************************************************************/
2555/* CD1400 HARDWARE FUNCTIONS */
2556/*****************************************************************************/
2557
2558/*
2559 * These functions get/set/update the registers of the cd1400 UARTs.
2560 * Access to the cd1400 registers is via an address/data io port pair.
2561 * (Maybe should make this inline...)
2562 */
2563
ca7ed0f2 2564static int stl_cd1400getreg(struct stlport *portp, int regnr)
1da177e4
LT		 2565{
2566 outb((regnr + portp->uartaddr), portp->ioaddr);
014c2544 2567 return inb(portp->ioaddr + EREG_DATA);
1da177e4
LT		 2568}
2569
ca7ed0f2 2570static void stl_cd1400setreg(struct stlport *portp, int regnr, int value)
1da177e4 2571{
c62429d9 2572 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2573 outb(value, portp->ioaddr + EREG_DATA);
2574}
2575
ca7ed0f2 2576static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value)
1da177e4 2577{
c62429d9 2578 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2579 if (inb(portp->ioaddr + EREG_DATA) != value) {
2580 outb(value, portp->ioaddr + EREG_DATA);
014c2544 2581 return 1;
1da177e4 2582 }
014c2544 2583 return 0;
1da177e4
LT		 2584}
2585
2586/*****************************************************************************/
2587
2588/*
2589 * Inbitialize the UARTs in a panel. We don't care what sort of board
2590 * these ports are on - since the port io registers are almost
2591 * identical when dealing with ports.
2592 */
2593
ca7ed0f2 2594static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 2595{
2596 unsigned int gfrcr;
2597 int chipmask, i, j;
2598 int nrchips, uartaddr, ioaddr;
b65b5b59 2599 unsigned long flags;
1da177e4 2600
a0564e14 2601 pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4 2602
b65b5b59 2603 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2604 BRDENABLE(panelp->brdnr, panelp->pagenr);
2605
2606/*
2607 * Check that each chip is present and started up OK.
2608 */
2609 chipmask = 0;
2610 nrchips = panelp->nrports / CD1400_PORTS;
c62429d9 2611 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 2612 if (brdp->brdtype == BRD_ECHPCI) {
2613 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
2614 ioaddr = panelp->iobase;
c62429d9 2615 } else
1da177e4 2616 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
1da177e4
LT		 2617 uartaddr = (i & 0x01) ? 0x080 : 0;
2618 outb((GFRCR + uartaddr), ioaddr);
2619 outb(0, (ioaddr + EREG_DATA));
2620 outb((CCR + uartaddr), ioaddr);
2621 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2622 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2623 outb((GFRCR + uartaddr), ioaddr);
c62429d9 2624 for (j = 0; j < CCR_MAXWAIT; j++)
1da177e4
LT		 2625 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
2626 break;
c62429d9 2627
1da177e4
LT		 2628 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
2629 printk("STALLION: cd1400 not responding, "
2630 "brd=%d panel=%d chip=%d\n",
2631 panelp->brdnr, panelp->panelnr, i);
2632 continue;
2633 }
2634 chipmask |= (0x1 << i);
2635 outb((PPR + uartaddr), ioaddr);
2636 outb(PPR_SCALAR, (ioaddr + EREG_DATA));
2637 }
2638
2639 BRDDISABLE(panelp->brdnr);
b65b5b59 2640 spin_unlock_irqrestore(&brd_lock, flags);
014c2544 2641 return chipmask;
1da177e4
LT		 2642}
2643
2644/*****************************************************************************/
2645
2646/*
2647 * Initialize hardware specific port registers.
2648 */
2649
ca7ed0f2 2650static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 2651{
b65b5b59 2652 unsigned long flags;
a0564e14
JS		 2653 pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
2654 panelp, portp);
1da177e4 2655
615e4a71
JS		 2656 if ((brdp == NULL) || (panelp == NULL) ||
2657 (portp == NULL))
1da177e4
LT		 2658 return;
2659
b65b5b59 2660 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2661 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
2662 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
2663 portp->uartaddr = (portp->portnr & 0x04) << 5;
2664 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
2665
2666 BRDENABLE(portp->brdnr, portp->pagenr);
2667 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2668 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
2669 portp->hwid = stl_cd1400getreg(portp, GFRCR);
2670 BRDDISABLE(portp->brdnr);
b65b5b59 2671 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2672}
2673
2674/*****************************************************************************/
2675
2676/*
2677 * Wait for the command register to be ready. We will poll this,
2678 * since it won't usually take too long to be ready.
2679 */
2680
ca7ed0f2 2681static void stl_cd1400ccrwait(struct stlport *portp)
1da177e4
LT		 2682{
2683 int i;
2684
c62429d9
JS		 2685 for (i = 0; i < CCR_MAXWAIT; i++)
2686 if (stl_cd1400getreg(portp, CCR) == 0)
1da177e4 2687 return;
1da177e4
LT		 2688
2689 printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n",
2690 portp->portnr, portp->panelnr, portp->brdnr);
2691}
2692
2693/*****************************************************************************/
2694
2695/*
2696 * Set up the cd1400 registers for a port based on the termios port
2697 * settings.
2698 */
2699
606d099c 2700static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 2701{
ca7ed0f2 2702 struct stlbrd *brdp;
1da177e4
LT		 2703 unsigned long flags;
2704 unsigned int clkdiv, baudrate;
2705 unsigned char cor1, cor2, cor3;
2706 unsigned char cor4, cor5, ccr;
2707 unsigned char srer, sreron, sreroff;
2708 unsigned char mcor1, mcor2, rtpr;
2709 unsigned char clk, div;
2710
2711 cor1 = 0;
2712 cor2 = 0;
2713 cor3 = 0;
2714 cor4 = 0;
2715 cor5 = 0;
2716 ccr = 0;
2717 rtpr = 0;
2718 clk = 0;
2719 div = 0;
2720 mcor1 = 0;
2721 mcor2 = 0;
2722 sreron = 0;
2723 sreroff = 0;
2724
2725 brdp = stl_brds[portp->brdnr];
615e4a71 2726 if (brdp == NULL)
1da177e4
LT		 2727 return;
2728
2729/*
2730 * Set up the RX char ignore mask with those RX error types we
2731 * can ignore. We can get the cd1400 to help us out a little here,
2732 * it will ignore parity errors and breaks for us.
2733 */
2734 portp->rxignoremsk = 0;
2735 if (tiosp->c_iflag & IGNPAR) {
2736 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
2737 cor1 |= COR1_PARIGNORE;
2738 }
2739 if (tiosp->c_iflag & IGNBRK) {
2740 portp->rxignoremsk |= ST_BREAK;
2741 cor4 |= COR4_IGNBRK;
2742 }
2743
2744 portp->rxmarkmsk = ST_OVERRUN;
2745 if (tiosp->c_iflag & (INPCK | PARMRK))
2746 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
2747 if (tiosp->c_iflag & BRKINT)
2748 portp->rxmarkmsk |= ST_BREAK;
2749
2750/*
2751 * Go through the char size, parity and stop bits and set all the
2752 * option register appropriately.
2753 */
2754 switch (tiosp->c_cflag & CSIZE) {
2755 case CS5:
2756 cor1 |= COR1_CHL5;
2757 break;
2758 case CS6:
2759 cor1 |= COR1_CHL6;
2760 break;
2761 case CS7:
2762 cor1 |= COR1_CHL7;
2763 break;
2764 default:
2765 cor1 |= COR1_CHL8;
2766 break;
2767 }
2768
2769 if (tiosp->c_cflag & CSTOPB)
2770 cor1 |= COR1_STOP2;
2771 else
2772 cor1 |= COR1_STOP1;
2773
2774 if (tiosp->c_cflag & PARENB) {
2775 if (tiosp->c_cflag & PARODD)
2776 cor1 |= (COR1_PARENB | COR1_PARODD);
2777 else
2778 cor1 |= (COR1_PARENB | COR1_PAREVEN);
2779 } else {
2780 cor1 |= COR1_PARNONE;
2781 }
2782
2783/*
2784 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
2785 * space for hardware flow control and the like. This should be set to
2786 * VMIN. Also here we will set the RX data timeout to 10ms - this should
2787 * really be based on VTIME.
2788 */
2789 cor3 |= FIFO_RXTHRESHOLD;
2790 rtpr = 2;
2791
2792/*
2793 * Calculate the baud rate timers. For now we will just assume that
2794 * the input and output baud are the same. Could have used a baud
2795 * table here, but this way we can generate virtually any baud rate
2796 * we like!
2797 */
2798 baudrate = tiosp->c_cflag & CBAUD;
2799 if (baudrate & CBAUDEX) {
2800 baudrate &= ~CBAUDEX;
2801 if ((baudrate < 1) || (baudrate > 4))
2802 tiosp->c_cflag &= ~CBAUDEX;
2803 else
2804 baudrate += 15;
2805 }
2806 baudrate = stl_baudrates[baudrate];
2807 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 2808 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 2809 baudrate = 57600;
f8ae4764 2810 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 2811 baudrate = 115200;
f8ae4764 2812 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 2813 baudrate = 230400;
f8ae4764 2814 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 2815 baudrate = 460800;
f8ae4764 2816 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 2817 baudrate = (portp->baud_base / portp->custom_divisor);
2818 }
2819 if (baudrate > STL_CD1400MAXBAUD)
2820 baudrate = STL_CD1400MAXBAUD;
2821
2822 if (baudrate > 0) {
c62429d9
JS		 2823 for (clk = 0; clk < CD1400_NUMCLKS; clk++) {
2824 clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate;
1da177e4
LT		 2825 if (clkdiv < 0x100)
2826 break;
2827 }
2828 div = (unsigned char) clkdiv;
2829 }
2830
2831/*
2832 * Check what form of modem signaling is required and set it up.
2833 */
2834 if ((tiosp->c_cflag & CLOCAL) == 0) {
2835 mcor1 |= MCOR1_DCD;
2836 mcor2 |= MCOR2_DCD;
2837 sreron |= SRER_MODEM;
f8ae4764 2838 portp->port.flags |= ASYNC_CHECK_CD;
c62429d9 2839 } else
f8ae4764 2840 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 2841
2842/*
2843 * Setup cd1400 enhanced modes if we can. In particular we want to
2844 * handle as much of the flow control as possible automatically. As
2845 * well as saving a few CPU cycles it will also greatly improve flow
2846 * control reliability.
2847 */
2848 if (tiosp->c_iflag & IXON) {
2849 cor2 |= COR2_TXIBE;
2850 cor3 |= COR3_SCD12;
2851 if (tiosp->c_iflag & IXANY)
2852 cor2 |= COR2_IXM;
2853 }
2854
2855 if (tiosp->c_cflag & CRTSCTS) {
2856 cor2 |= COR2_CTSAE;
2857 mcor1 |= FIFO_RTSTHRESHOLD;
2858 }
2859
2860/*
2861 * All cd1400 register values calculated so go through and set
2862 * them all up.
2863 */
2864
a0564e14 2865 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 2866 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14 2867 pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n",
1da177e4 2868 cor1, cor2, cor3, cor4, cor5);
a0564e14 2869 pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
1da177e4 2870 mcor1, mcor2, rtpr, sreron, sreroff);
a0564e14
JS		 2871 pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
2872 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 2873 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
2874 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 2875
b65b5b59 2876 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2877 BRDENABLE(portp->brdnr, portp->pagenr);
2878 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
2879 srer = stl_cd1400getreg(portp, SRER);
2880 stl_cd1400setreg(portp, SRER, 0);
2881 if (stl_cd1400updatereg(portp, COR1, cor1))
2882 ccr = 1;
2883 if (stl_cd1400updatereg(portp, COR2, cor2))
2884 ccr = 1;
2885 if (stl_cd1400updatereg(portp, COR3, cor3))
2886 ccr = 1;
2887 if (ccr) {
2888 stl_cd1400ccrwait(portp);
2889 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
2890 }
2891 stl_cd1400setreg(portp, COR4, cor4);
2892 stl_cd1400setreg(portp, COR5, cor5);
2893 stl_cd1400setreg(portp, MCOR1, mcor1);
2894 stl_cd1400setreg(portp, MCOR2, mcor2);
2895 if (baudrate > 0) {
2896 stl_cd1400setreg(portp, TCOR, clk);
2897 stl_cd1400setreg(portp, TBPR, div);
2898 stl_cd1400setreg(portp, RCOR, clk);
2899 stl_cd1400setreg(portp, RBPR, div);
2900 }
2901 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
2902 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
2903 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
2904 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
2905 stl_cd1400setreg(portp, RTPR, rtpr);
2906 mcor1 = stl_cd1400getreg(portp, MSVR1);
2907 if (mcor1 & MSVR1_DCD)
2908 portp->sigs |= TIOCM_CD;
2909 else
2910 portp->sigs &= ~TIOCM_CD;
2911 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
2912 BRDDISABLE(portp->brdnr);
b65b5b59 2913 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2914}
2915
2916/*****************************************************************************/
2917
2918/*
2919 * Set the state of the DTR and RTS signals.
2920 */
2921
ca7ed0f2 2922static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 2923{
2924 unsigned char msvr1, msvr2;
2925 unsigned long flags;
2926
a0564e14
JS		 2927 pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n",
2928 portp, dtr, rts);
1da177e4
LT		 2929
2930 msvr1 = 0;
2931 msvr2 = 0;
2932 if (dtr > 0)
2933 msvr1 = MSVR1_DTR;
2934 if (rts > 0)
2935 msvr2 = MSVR2_RTS;
2936
b65b5b59 2937 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2938 BRDENABLE(portp->brdnr, portp->pagenr);
2939 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2940 if (rts >= 0)
2941 stl_cd1400setreg(portp, MSVR2, msvr2);
2942 if (dtr >= 0)
2943 stl_cd1400setreg(portp, MSVR1, msvr1);
2944 BRDDISABLE(portp->brdnr);
b65b5b59 2945 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2946}
2947
2948/*****************************************************************************/
2949
2950/*
2951 * Return the state of the signals.
2952 */
2953
ca7ed0f2 2954static int stl_cd1400getsignals(struct stlport *portp)
1da177e4
LT		 2955{
2956 unsigned char msvr1, msvr2;
2957 unsigned long flags;
2958 int sigs;
2959
a0564e14 2960 pr_debug("stl_cd1400getsignals(portp=%p)\n", portp);
1da177e4 2961
b65b5b59 2962 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2963 BRDENABLE(portp->brdnr, portp->pagenr);
2964 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2965 msvr1 = stl_cd1400getreg(portp, MSVR1);
2966 msvr2 = stl_cd1400getreg(portp, MSVR2);
2967 BRDDISABLE(portp->brdnr);
b65b5b59 2968 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2969
2970 sigs = 0;
2971 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
2972 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
2973 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
2974 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
2975#if 0
2976 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
2977 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
2978#else
2979 sigs |= TIOCM_DSR;
2980#endif
014c2544 2981 return sigs;
1da177e4
LT		 2982}
2983
2984/*****************************************************************************/
2985
2986/*
2987 * Enable/Disable the Transmitter and/or Receiver.
2988 */
2989
ca7ed0f2 2990static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 2991{
2992 unsigned char ccr;
2993 unsigned long flags;
2994
a0564e14
JS		 2995 pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
2996
1da177e4
LT		 2997 ccr = 0;
2998
2999 if (tx == 0)
3000 ccr |= CCR_TXDISABLE;
3001 else if (tx > 0)
3002 ccr |= CCR_TXENABLE;
3003 if (rx == 0)
3004 ccr |= CCR_RXDISABLE;
3005 else if (rx > 0)
3006 ccr |= CCR_RXENABLE;
3007
b65b5b59 3008 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3009 BRDENABLE(portp->brdnr, portp->pagenr);
3010 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3011 stl_cd1400ccrwait(portp);
3012 stl_cd1400setreg(portp, CCR, ccr);
3013 stl_cd1400ccrwait(portp);
3014 BRDDISABLE(portp->brdnr);
b65b5b59 3015 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3016}
3017
3018/*****************************************************************************/
3019
3020/*
3021 * Start/stop the Transmitter and/or Receiver.
3022 */
3023
ca7ed0f2 3024static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3025{
3026 unsigned char sreron, sreroff;
3027 unsigned long flags;
3028
a0564e14 3029 pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3030
3031 sreron = 0;
3032 sreroff = 0;
3033 if (tx == 0)
3034 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
3035 else if (tx == 1)
3036 sreron |= SRER_TXDATA;
3037 else if (tx >= 2)
3038 sreron |= SRER_TXEMPTY;
3039 if (rx == 0)
3040 sreroff |= SRER_RXDATA;
3041 else if (rx > 0)
3042 sreron |= SRER_RXDATA;
3043
b65b5b59 3044 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3045 BRDENABLE(portp->brdnr, portp->pagenr);
3046 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3047 stl_cd1400setreg(portp, SRER,
3048 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3049 BRDDISABLE(portp->brdnr);
3050 if (tx > 0)
3051 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3052 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3053}
3054
3055/*****************************************************************************/
3056
3057/*
3058 * Disable all interrupts from this port.
3059 */
3060
ca7ed0f2 3061static void stl_cd1400disableintrs(struct stlport *portp)
1da177e4
LT		 3062{
3063 unsigned long flags;
3064
a0564e14
JS		 3065 pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp);
3066
b65b5b59 3067 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3068 BRDENABLE(portp->brdnr, portp->pagenr);
3069 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3070 stl_cd1400setreg(portp, SRER, 0);
3071 BRDDISABLE(portp->brdnr);
b65b5b59 3072 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3073}
3074
3075/*****************************************************************************/
3076
ca7ed0f2 3077static void stl_cd1400sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3078{
3079 unsigned long flags;
3080
a0564e14 3081 pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3082
b65b5b59 3083 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3084 BRDENABLE(portp->brdnr, portp->pagenr);
3085 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3086 stl_cd1400setreg(portp, SRER,
3087 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3088 SRER_TXEMPTY));
3089 BRDDISABLE(portp->brdnr);
3090 portp->brklen = len;
3091 if (len == 1)
3092 portp->stats.txbreaks++;
b65b5b59 3093 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3094}
3095
3096/*****************************************************************************/
3097
3098/*
3099 * Take flow control actions...
3100 */
3101
ca7ed0f2 3102static void stl_cd1400flowctrl(struct stlport *portp, int state)
1da177e4
LT		 3103{
3104 struct tty_struct *tty;
3105 unsigned long flags;
3106
a0564e14 3107 pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 3108
615e4a71 3109 if (portp == NULL)
1da177e4 3110 return;
d18a750f 3111 tty = tty_port_tty_get(&portp->port);
615e4a71 3112 if (tty == NULL)
1da177e4
LT		 3113 return;
3114
b65b5b59 3115 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3116 BRDENABLE(portp->brdnr, portp->pagenr);
3117 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3118
3119 if (state) {
3120 if (tty->termios->c_iflag & IXOFF) {
3121 stl_cd1400ccrwait(portp);
3122 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3123 portp->stats.rxxon++;
3124 stl_cd1400ccrwait(portp);
3125 }
3126/*
3127 * Question: should we return RTS to what it was before? It may
3128 * have been set by an ioctl... Suppose not, since if you have
3129 * hardware flow control set then it is pretty silly to go and
3130 * set the RTS line by hand.
3131 */
3132 if (tty->termios->c_cflag & CRTSCTS) {
3133 stl_cd1400setreg(portp, MCOR1,
3134 (stl_cd1400getreg(portp, MCOR1) |
3135 FIFO_RTSTHRESHOLD));
3136 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3137 portp->stats.rxrtson++;
3138 }
3139 } else {
3140 if (tty->termios->c_iflag & IXOFF) {
3141 stl_cd1400ccrwait(portp);
3142 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3143 portp->stats.rxxoff++;
3144 stl_cd1400ccrwait(portp);
3145 }
3146 if (tty->termios->c_cflag & CRTSCTS) {
3147 stl_cd1400setreg(portp, MCOR1,
3148 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3149 stl_cd1400setreg(portp, MSVR2, 0);
3150 portp->stats.rxrtsoff++;
3151 }
3152 }
3153
3154 BRDDISABLE(portp->brdnr);
b65b5b59 3155 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3156 tty_kref_put(tty);
1da177e4
LT		 3157}
3158
3159/*****************************************************************************/
3160
3161/*
3162 * Send a flow control character...
3163 */
3164
ca7ed0f2 3165static void stl_cd1400sendflow(struct stlport *portp, int state)
1da177e4
LT		 3166{
3167 struct tty_struct *tty;
3168 unsigned long flags;
3169
a0564e14 3170 pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 3171
615e4a71 3172 if (portp == NULL)
1da177e4 3173 return;
d18a750f 3174 tty = tty_port_tty_get(&portp->port);
615e4a71 3175 if (tty == NULL)
1da177e4
LT		 3176 return;
3177
b65b5b59 3178 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3179 BRDENABLE(portp->brdnr, portp->pagenr);
3180 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3181 if (state) {
3182 stl_cd1400ccrwait(portp);
3183 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3184 portp->stats.rxxon++;
3185 stl_cd1400ccrwait(portp);
3186 } else {
3187 stl_cd1400ccrwait(portp);
3188 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3189 portp->stats.rxxoff++;
3190 stl_cd1400ccrwait(portp);
3191 }
3192 BRDDISABLE(portp->brdnr);
b65b5b59 3193 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3194 tty_kref_put(tty);
1da177e4
LT		 3195}
3196
3197/*****************************************************************************/
3198
ca7ed0f2 3199static void stl_cd1400flush(struct stlport *portp)
1da177e4
LT		 3200{
3201 unsigned long flags;
3202
a0564e14 3203 pr_debug("stl_cd1400flush(portp=%p)\n", portp);
1da177e4 3204
615e4a71 3205 if (portp == NULL)
1da177e4
LT		 3206 return;
3207
b65b5b59 3208 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3209 BRDENABLE(portp->brdnr, portp->pagenr);
3210 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3211 stl_cd1400ccrwait(portp);
3212 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
3213 stl_cd1400ccrwait(portp);
3214 portp->tx.tail = portp->tx.head;
3215 BRDDISABLE(portp->brdnr);
b65b5b59 3216 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3217}
3218
3219/*****************************************************************************/
3220
3221/*
3222 * Return the current state of data flow on this port. This is only
3223 * really interresting when determining if data has fully completed
3224 * transmission or not... This is easy for the cd1400, it accurately
3225 * maintains the busy port flag.
3226 */
3227
ca7ed0f2 3228static int stl_cd1400datastate(struct stlport *portp)
1da177e4 3229{
a0564e14 3230 pr_debug("stl_cd1400datastate(portp=%p)\n", portp);
1da177e4 3231
615e4a71 3232 if (portp == NULL)
014c2544 3233 return 0;
1da177e4 3234
014c2544 3235 return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0;
1da177e4
LT		 3236}
3237
3238/*****************************************************************************/
3239
3240/*
3241 * Interrupt service routine for cd1400 EasyIO boards.
3242 */
3243
ca7ed0f2 3244static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3245{
3246 unsigned char svrtype;
3247
a0564e14 3248 pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4 3249
b65b5b59 3250 spin_lock(&brd_lock);
1da177e4
LT		 3251 outb(SVRR, iobase);
3252 svrtype = inb(iobase + EREG_DATA);
3253 if (panelp->nrports > 4) {
3254 outb((SVRR + 0x80), iobase);
3255 svrtype |= inb(iobase + EREG_DATA);
3256 }
3257
3258 if (svrtype & SVRR_RX)
3259 stl_cd1400rxisr(panelp, iobase);
3260 else if (svrtype & SVRR_TX)
3261 stl_cd1400txisr(panelp, iobase);
3262 else if (svrtype & SVRR_MDM)
3263 stl_cd1400mdmisr(panelp, iobase);
b65b5b59
AC		 3264
3265 spin_unlock(&brd_lock);
1da177e4
LT		 3266}
3267
3268/*****************************************************************************/
3269
3270/*
3271 * Interrupt service routine for cd1400 panels.
3272 */
3273
ca7ed0f2 3274static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3275{
3276 unsigned char svrtype;
3277
a0564e14 3278 pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4
LT		 3279
3280 outb(SVRR, iobase);
3281 svrtype = inb(iobase + EREG_DATA);
3282 outb((SVRR + 0x80), iobase);
3283 svrtype |= inb(iobase + EREG_DATA);
3284 if (svrtype & SVRR_RX)
3285 stl_cd1400rxisr(panelp, iobase);
3286 else if (svrtype & SVRR_TX)
3287 stl_cd1400txisr(panelp, iobase);
3288 else if (svrtype & SVRR_MDM)
3289 stl_cd1400mdmisr(panelp, iobase);
3290}
3291
3292
3293/*****************************************************************************/
3294
3295/*
3296 * Unfortunately we need to handle breaks in the TX data stream, since
3297 * this is the only way to generate them on the cd1400.
3298 */
3299
60be4810 3300static int stl_cd1400breakisr(struct stlport *portp, int ioaddr)
1da177e4
LT		 3301{
3302 if (portp->brklen == 1) {
3303 outb((COR2 + portp->uartaddr), ioaddr);
3304 outb((inb(ioaddr + EREG_DATA) | COR2_ETC),
3305 (ioaddr + EREG_DATA));
3306 outb((TDR + portp->uartaddr), ioaddr);
3307 outb(ETC_CMD, (ioaddr + EREG_DATA));
3308 outb(ETC_STARTBREAK, (ioaddr + EREG_DATA));
3309 outb((SRER + portp->uartaddr), ioaddr);
3310 outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)),
3311 (ioaddr + EREG_DATA));
014c2544 3312 return 1;
1da177e4
LT		 3313 } else if (portp->brklen > 1) {
3314 outb((TDR + portp->uartaddr), ioaddr);
3315 outb(ETC_CMD, (ioaddr + EREG_DATA));
3316 outb(ETC_STOPBREAK, (ioaddr + EREG_DATA));
3317 portp->brklen = -1;
014c2544 3318 return 1;
1da177e4
LT		 3319 } else {
3320 outb((COR2 + portp->uartaddr), ioaddr);
3321 outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC),
3322 (ioaddr + EREG_DATA));
3323 portp->brklen = 0;
3324 }
014c2544 3325 return 0;
1da177e4
LT		 3326}
3327
3328/*****************************************************************************/
3329
3330/*
3331 * Transmit interrupt handler. This has gotta be fast! Handling TX
3332 * chars is pretty simple, stuff as many as possible from the TX buffer
3333 * into the cd1400 FIFO. Must also handle TX breaks here, since they
3334 * are embedded as commands in the data stream. Oh no, had to use a goto!
3335 * This could be optimized more, will do when I get time...
3336 * In practice it is possible that interrupts are enabled but that the
3337 * port has been hung up. Need to handle not having any TX buffer here,
3338 * this is done by using the side effect that head and tail will also
3339 * be NULL if the buffer has been freed.
3340 */
3341
ca7ed0f2 3342static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3343{
ca7ed0f2 3344 struct stlport *portp;
1da177e4
LT		 3345 int len, stlen;
3346 char *head, *tail;
3347 unsigned char ioack, srer;
d18a750f 3348 struct tty_struct *tty;
1da177e4 3349
a0564e14 3350 pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3351
3352 ioack = inb(ioaddr + EREG_TXACK);
3353 if (((ioack & panelp->ackmask) != 0) ||
3354 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
3355 printk("STALLION: bad TX interrupt ack value=%x\n", ioack);
3356 return;
3357 }
3358 portp = panelp->ports[(ioack >> 3)];
3359
3360/*
3361 * Unfortunately we need to handle breaks in the data stream, since
3362 * this is the only way to generate them on the cd1400. Do it now if
3363 * a break is to be sent.
3364 */
3365 if (portp->brklen != 0)
3366 if (stl_cd1400breakisr(portp, ioaddr))
3367 goto stl_txalldone;
3368
3369 head = portp->tx.head;
3370 tail = portp->tx.tail;
3371 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
3372 if ((len == 0) || ((len < STL_TXBUFLOW) &&
3373 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
3374 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 3375 tty = tty_port_tty_get(&portp->port);
3376 if (tty) {
3377 tty_wakeup(tty);
3378 tty_kref_put(tty);
3379 }
1da177e4
LT		 3380 }
3381
3382 if (len == 0) {
3383 outb((SRER + portp->uartaddr), ioaddr);
3384 srer = inb(ioaddr + EREG_DATA);
3385 if (srer & SRER_TXDATA) {
3386 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
3387 } else {
3388 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
3389 clear_bit(ASYI_TXBUSY, &portp->istate);
3390 }
3391 outb(srer, (ioaddr + EREG_DATA));
3392 } else {
843b568c 3393 len = min(len, CD1400_TXFIFOSIZE);
1da177e4 3394 portp->stats.txtotal += len;
319fe7c3
JS		 3395 stlen = min_t(unsigned int, len,
3396 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 3397 outb((TDR + portp->uartaddr), ioaddr);
3398 outsb((ioaddr + EREG_DATA), tail, stlen);
3399 len -= stlen;
3400 tail += stlen;
3401 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
3402 tail = portp->tx.buf;
3403 if (len > 0) {
3404 outsb((ioaddr + EREG_DATA), tail, len);
3405 tail += len;
3406 }
3407 portp->tx.tail = tail;
3408 }
3409
3410stl_txalldone:
3411 outb((EOSRR + portp->uartaddr), ioaddr);
3412 outb(0, (ioaddr + EREG_DATA));
3413}
3414
3415/*****************************************************************************/
3416
3417/*
3418 * Receive character interrupt handler. Determine if we have good chars
3419 * or bad chars and then process appropriately. Good chars are easy
3420 * just shove the lot into the RX buffer and set all status byte to 0.
3421 * If a bad RX char then process as required. This routine needs to be
3422 * fast! In practice it is possible that we get an interrupt on a port
3423 * that is closed. This can happen on hangups - since they completely
3424 * shutdown a port not in user context. Need to handle this case.
3425 */
3426
ca7ed0f2 3427static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3428{
ca7ed0f2 3429 struct stlport *portp;
1da177e4
LT		 3430 struct tty_struct *tty;
3431 unsigned int ioack, len, buflen;
3432 unsigned char status;
3433 char ch;
3434
a0564e14 3435 pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3436
3437 ioack = inb(ioaddr + EREG_RXACK);
3438 if ((ioack & panelp->ackmask) != 0) {
3439 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3440 return;
3441 }
3442 portp = panelp->ports[(ioack >> 3)];
d18a750f 3443 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 3444
3445 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
3446 outb((RDCR + portp->uartaddr), ioaddr);
3447 len = inb(ioaddr + EREG_DATA);
33f0f88f 3448 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 3449 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 3450 outb((RDSR + portp->uartaddr), ioaddr);
3451 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3452 portp->stats.rxlost += len;
3453 portp->stats.rxtotal += len;
3454 } else {
843b568c 3455 len = min(len, buflen);
1da177e4 3456 if (len > 0) {
33f0f88f 3457 unsigned char *ptr;
1da177e4 3458 outb((RDSR + portp->uartaddr), ioaddr);
33f0f88f
AC		 3459 tty_prepare_flip_string(tty, &ptr, len);
3460 insb((ioaddr + EREG_DATA), ptr, len);
1da177e4
LT		 3461 tty_schedule_flip(tty);
3462 portp->stats.rxtotal += len;
3463 }
3464 }
3465 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3466 outb((RDSR + portp->uartaddr), ioaddr);
3467 status = inb(ioaddr + EREG_DATA);
3468 ch = inb(ioaddr + EREG_DATA);
3469 if (status & ST_PARITY)
3470 portp->stats.rxparity++;
3471 if (status & ST_FRAMING)
3472 portp->stats.rxframing++;
3473 if (status & ST_OVERRUN)
3474 portp->stats.rxoverrun++;
3475 if (status & ST_BREAK)
3476 portp->stats.rxbreaks++;
3477 if (status & ST_SCHARMASK) {
3478 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3479 portp->stats.txxon++;
3480 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3481 portp->stats.txxoff++;
3482 goto stl_rxalldone;
3483 }
33f0f88f 3484 if (tty != NULL && (portp->rxignoremsk & status) == 0) {
1da177e4
LT		 3485 if (portp->rxmarkmsk & status) {
3486 if (status & ST_BREAK) {
3487 status = TTY_BREAK;
f8ae4764 3488 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 3489 do_SAK(tty);
3490 BRDENABLE(portp->brdnr, portp->pagenr);
3491 }
c62429d9 3492 } else if (status & ST_PARITY)
1da177e4 3493 status = TTY_PARITY;
c62429d9 3494 else if (status & ST_FRAMING)
1da177e4 3495 status = TTY_FRAME;
c62429d9 3496 else if(status & ST_OVERRUN)
1da177e4 3497 status = TTY_OVERRUN;
c62429d9 3498 else
1da177e4 3499 status = 0;
c62429d9 3500 } else
1da177e4 3501 status = 0;
33f0f88f
AC		 3502 tty_insert_flip_char(tty, ch, status);
3503 tty_schedule_flip(tty);
1da177e4
LT		 3504 }
3505 } else {
3506 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
d18a750f 3507 tty_kref_put(tty);
1da177e4
LT		 3508 return;
3509 }
3510
3511stl_rxalldone:
d18a750f 3512 tty_kref_put(tty);
1da177e4
LT		 3513 outb((EOSRR + portp->uartaddr), ioaddr);
3514 outb(0, (ioaddr + EREG_DATA));
3515}
3516
3517/*****************************************************************************/
3518
3519/*
3520 * Modem interrupt handler. The is called when the modem signal line
3521 * (DCD) has changed state. Leave most of the work to the off-level
3522 * processing routine.
3523 */
3524
ca7ed0f2 3525static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3526{
ca7ed0f2 3527 struct stlport *portp;
1da177e4
LT		 3528 unsigned int ioack;
3529 unsigned char misr;
3530
a0564e14 3531 pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp);
1da177e4
LT		 3532
3533 ioack = inb(ioaddr + EREG_MDACK);
3534 if (((ioack & panelp->ackmask) != 0) ||
3535 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3536 printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3537 return;
3538 }
3539 portp = panelp->ports[(ioack >> 3)];
3540
3541 outb((MISR + portp->uartaddr), ioaddr);
3542 misr = inb(ioaddr + EREG_DATA);
3543 if (misr & MISR_DCD) {
ccfea3c9 3544 stl_cd_change(portp);
1da177e4
LT		 3545 portp->stats.modem++;
3546 }
3547
3548 outb((EOSRR + portp->uartaddr), ioaddr);
3549 outb(0, (ioaddr + EREG_DATA));
3550}
3551
3552/*****************************************************************************/
3553/* SC26198 HARDWARE FUNCTIONS */
3554/*****************************************************************************/
3555
3556/*
3557 * These functions get/set/update the registers of the sc26198 UARTs.
3558 * Access to the sc26198 registers is via an address/data io port pair.
3559 * (Maybe should make this inline...)
3560 */
3561
ca7ed0f2 3562static int stl_sc26198getreg(struct stlport *portp, int regnr)
1da177e4
LT		 3563{
3564 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
014c2544 3565 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3566}
3567
ca7ed0f2 3568static void stl_sc26198setreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3569{
3570 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3571 outb(value, (portp->ioaddr + XP_DATA));
3572}
3573
ca7ed0f2 3574static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3575{
3576 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3577 if (inb(portp->ioaddr + XP_DATA) != value) {
3578 outb(value, (portp->ioaddr + XP_DATA));
014c2544 3579 return 1;
1da177e4 3580 }
014c2544 3581 return 0;
1da177e4
LT		 3582}
3583
3584/*****************************************************************************/
3585
3586/*
3587 * Functions to get and set the sc26198 global registers.
3588 */
3589
ca7ed0f2 3590static int stl_sc26198getglobreg(struct stlport *portp, int regnr)
1da177e4
LT		 3591{
3592 outb(regnr, (portp->ioaddr + XP_ADDR));
014c2544 3593 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3594}
3595
3596#if 0
ca7ed0f2 3597static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3598{
3599 outb(regnr, (portp->ioaddr + XP_ADDR));
3600 outb(value, (portp->ioaddr + XP_DATA));
3601}
3602#endif
3603
3604/*****************************************************************************/
3605
3606/*
3607 * Inbitialize the UARTs in a panel. We don't care what sort of board
3608 * these ports are on - since the port io registers are almost
3609 * identical when dealing with ports.
3610 */
3611
ca7ed0f2 3612static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 3613{
3614 int chipmask, i;
3615 int nrchips, ioaddr;
3616
a0564e14 3617 pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 3618
3619 BRDENABLE(panelp->brdnr, panelp->pagenr);
3620
3621/*
3622 * Check that each chip is present and started up OK.
3623 */
3624 chipmask = 0;
3625 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3626 if (brdp->brdtype == BRD_ECHPCI)
3627 outb(panelp->pagenr, brdp->ioctrl);
3628
c62429d9 3629 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 3630 ioaddr = panelp->iobase + (i * 4);
3631 outb(SCCR, (ioaddr + XP_ADDR));
3632 outb(CR_RESETALL, (ioaddr + XP_DATA));
3633 outb(TSTR, (ioaddr + XP_ADDR));
3634 if (inb(ioaddr + XP_DATA) != 0) {
3635 printk("STALLION: sc26198 not responding, "
3636 "brd=%d panel=%d chip=%d\n",
3637 panelp->brdnr, panelp->panelnr, i);
3638 continue;
3639 }
3640 chipmask |= (0x1 << i);
3641 outb(GCCR, (ioaddr + XP_ADDR));
3642 outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA));
3643 outb(WDTRCR, (ioaddr + XP_ADDR));
3644 outb(0xff, (ioaddr + XP_DATA));
3645 }
3646
3647 BRDDISABLE(panelp->brdnr);
014c2544 3648 return chipmask;
1da177e4
LT		 3649}
3650
3651/*****************************************************************************/
3652
3653/*
3654 * Initialize hardware specific port registers.
3655 */
3656
ca7ed0f2 3657static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 3658{
a0564e14
JS		 3659 pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
3660 panelp, portp);
1da177e4 3661
615e4a71
JS		 3662 if ((brdp == NULL) || (panelp == NULL) ||
3663 (portp == NULL))
1da177e4
LT		 3664 return;
3665
3666 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3667 portp->uartaddr = (portp->portnr & 0x07) << 4;
3668 portp->pagenr = panelp->pagenr;
3669 portp->hwid = 0x1;
3670
3671 BRDENABLE(portp->brdnr, portp->pagenr);
3672 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3673 BRDDISABLE(portp->brdnr);
3674}
3675
3676/*****************************************************************************/
3677
3678/*
3679 * Set up the sc26198 registers for a port based on the termios port
3680 * settings.
3681 */
3682
606d099c 3683static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 3684{
ca7ed0f2 3685 struct stlbrd *brdp;
1da177e4
LT		 3686 unsigned long flags;
3687 unsigned int baudrate;
3688 unsigned char mr0, mr1, mr2, clk;
3689 unsigned char imron, imroff, iopr, ipr;
3690
3691 mr0 = 0;
3692 mr1 = 0;
3693 mr2 = 0;
3694 clk = 0;
3695 iopr = 0;
3696 imron = 0;
3697 imroff = 0;
3698
3699 brdp = stl_brds[portp->brdnr];
615e4a71 3700 if (brdp == NULL)
1da177e4
LT		 3701 return;
3702
3703/*
3704 * Set up the RX char ignore mask with those RX error types we
3705 * can ignore.
3706 */
3707 portp->rxignoremsk = 0;
3708 if (tiosp->c_iflag & IGNPAR)
3709 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3710 SR_RXOVERRUN);
3711 if (tiosp->c_iflag & IGNBRK)
3712 portp->rxignoremsk |= SR_RXBREAK;
3713
3714 portp->rxmarkmsk = SR_RXOVERRUN;
3715 if (tiosp->c_iflag & (INPCK | PARMRK))
3716 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3717 if (tiosp->c_iflag & BRKINT)
3718 portp->rxmarkmsk |= SR_RXBREAK;
3719
3720/*
3721 * Go through the char size, parity and stop bits and set all the
3722 * option register appropriately.
3723 */
3724 switch (tiosp->c_cflag & CSIZE) {
3725 case CS5:
3726 mr1 |= MR1_CS5;
3727 break;
3728 case CS6:
3729 mr1 |= MR1_CS6;
3730 break;
3731 case CS7:
3732 mr1 |= MR1_CS7;
3733 break;
3734 default:
3735 mr1 |= MR1_CS8;
3736 break;
3737 }
3738
3739 if (tiosp->c_cflag & CSTOPB)
3740 mr2 |= MR2_STOP2;
3741 else
3742 mr2 |= MR2_STOP1;
3743
3744 if (tiosp->c_cflag & PARENB) {
3745 if (tiosp->c_cflag & PARODD)
3746 mr1 |= (MR1_PARENB | MR1_PARODD);
3747 else
3748 mr1 |= (MR1_PARENB | MR1_PAREVEN);
c62429d9 3749 } else
1da177e4 3750 mr1 |= MR1_PARNONE;
1da177e4
LT		 3751
3752 mr1 |= MR1_ERRBLOCK;
3753
3754/*
3755 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3756 * space for hardware flow control and the like. This should be set to
3757 * VMIN.
3758 */
3759 mr2 |= MR2_RXFIFOHALF;
3760
3761/*
3762 * Calculate the baud rate timers. For now we will just assume that
3763 * the input and output baud are the same. The sc26198 has a fixed
3764 * baud rate table, so only discrete baud rates possible.
3765 */
3766 baudrate = tiosp->c_cflag & CBAUD;
3767 if (baudrate & CBAUDEX) {
3768 baudrate &= ~CBAUDEX;
3769 if ((baudrate < 1) || (baudrate > 4))
3770 tiosp->c_cflag &= ~CBAUDEX;
3771 else
3772 baudrate += 15;
3773 }
3774 baudrate = stl_baudrates[baudrate];
3775 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 3776 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 3777 baudrate = 57600;
f8ae4764 3778 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 3779 baudrate = 115200;
f8ae4764 3780 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 3781 baudrate = 230400;
f8ae4764 3782 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 3783 baudrate = 460800;
f8ae4764 3784 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 3785 baudrate = (portp->baud_base / portp->custom_divisor);
3786 }
3787 if (baudrate > STL_SC26198MAXBAUD)
3788 baudrate = STL_SC26198MAXBAUD;
3789
c62429d9
JS		 3790 if (baudrate > 0)
3791 for (clk = 0; clk < SC26198_NRBAUDS; clk++)
1da177e4
LT		 3792 if (baudrate <= sc26198_baudtable[clk])
3793 break;
1da177e4
LT		 3794
3795/*
3796 * Check what form of modem signaling is required and set it up.
3797 */
3798 if (tiosp->c_cflag & CLOCAL) {
f8ae4764 3799 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 3800 } else {
3801 iopr |= IOPR_DCDCOS;
3802 imron |= IR_IOPORT;
f8ae4764 3803 portp->port.flags |= ASYNC_CHECK_CD;
1da177e4
LT		 3804 }
3805
3806/*
3807 * Setup sc26198 enhanced modes if we can. In particular we want to
3808 * handle as much of the flow control as possible automatically. As
3809 * well as saving a few CPU cycles it will also greatly improve flow
3810 * control reliability.
3811 */
3812 if (tiosp->c_iflag & IXON) {
3813 mr0 |= MR0_SWFTX | MR0_SWFT;
3814 imron |= IR_XONXOFF;
c62429d9 3815 } else
1da177e4 3816 imroff |= IR_XONXOFF;
c62429d9 3817
1da177e4
LT		 3818 if (tiosp->c_iflag & IXOFF)
3819 mr0 |= MR0_SWFRX;
3820
3821 if (tiosp->c_cflag & CRTSCTS) {
3822 mr2 |= MR2_AUTOCTS;
3823 mr1 |= MR1_AUTORTS;
3824 }
3825
3826/*
3827 * All sc26198 register values calculated so go through and set
3828 * them all up.
3829 */
3830
a0564e14 3831 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3832 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14
JS		 3833 pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
3834 pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
3835 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3836 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3837 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3838
b65b5b59 3839 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3840 BRDENABLE(portp->brdnr, portp->pagenr);
3841 stl_sc26198setreg(portp, IMR, 0);
3842 stl_sc26198updatereg(portp, MR0, mr0);
3843 stl_sc26198updatereg(portp, MR1, mr1);
3844 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
3845 stl_sc26198updatereg(portp, MR2, mr2);
3846 stl_sc26198updatereg(portp, IOPIOR,
3847 ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr));
3848
3849 if (baudrate > 0) {
3850 stl_sc26198setreg(portp, TXCSR, clk);
3851 stl_sc26198setreg(portp, RXCSR, clk);
3852 }
3853
3854 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
3855 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
3856
3857 ipr = stl_sc26198getreg(portp, IPR);
3858 if (ipr & IPR_DCD)
3859 portp->sigs &= ~TIOCM_CD;
3860 else
3861 portp->sigs |= TIOCM_CD;
3862
3863 portp->imr = (portp->imr & ~imroff) | imron;
3864 stl_sc26198setreg(portp, IMR, portp->imr);
3865 BRDDISABLE(portp->brdnr);
b65b5b59 3866 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3867}
3868
3869/*****************************************************************************/
3870
3871/*
3872 * Set the state of the DTR and RTS signals.
3873 */
3874
ca7ed0f2 3875static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 3876{
3877 unsigned char iopioron, iopioroff;
3878 unsigned long flags;
3879
a0564e14
JS		 3880 pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp,
3881 dtr, rts);
1da177e4
LT		 3882
3883 iopioron = 0;
3884 iopioroff = 0;
3885 if (dtr == 0)
3886 iopioroff |= IPR_DTR;
3887 else if (dtr > 0)
3888 iopioron |= IPR_DTR;
3889 if (rts == 0)
3890 iopioroff |= IPR_RTS;
3891 else if (rts > 0)
3892 iopioron |= IPR_RTS;
3893
b65b5b59 3894 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3895 BRDENABLE(portp->brdnr, portp->pagenr);
3896 stl_sc26198setreg(portp, IOPIOR,
3897 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
3898 BRDDISABLE(portp->brdnr);
b65b5b59 3899 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3900}
3901
3902/*****************************************************************************/
3903
3904/*
3905 * Return the state of the signals.
3906 */
3907
ca7ed0f2 3908static int stl_sc26198getsignals(struct stlport *portp)
1da177e4
LT		 3909{
3910 unsigned char ipr;
3911 unsigned long flags;
3912 int sigs;
3913
a0564e14 3914 pr_debug("stl_sc26198getsignals(portp=%p)\n", portp);
1da177e4 3915
b65b5b59 3916 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3917 BRDENABLE(portp->brdnr, portp->pagenr);
3918 ipr = stl_sc26198getreg(portp, IPR);
3919 BRDDISABLE(portp->brdnr);
b65b5b59 3920 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3921
3922 sigs = 0;
3923 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
3924 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
3925 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
3926 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
3927 sigs |= TIOCM_DSR;
014c2544 3928 return sigs;
1da177e4
LT		 3929}
3930
3931/*****************************************************************************/
3932
3933/*
3934 * Enable/Disable the Transmitter and/or Receiver.
3935 */
3936
ca7ed0f2 3937static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3938{
3939 unsigned char ccr;
3940 unsigned long flags;
3941
a0564e14 3942 pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx);
1da177e4
LT		 3943
3944 ccr = portp->crenable;
3945 if (tx == 0)
3946 ccr &= ~CR_TXENABLE;
3947 else if (tx > 0)
3948 ccr |= CR_TXENABLE;
3949 if (rx == 0)
3950 ccr &= ~CR_RXENABLE;
3951 else if (rx > 0)
3952 ccr |= CR_RXENABLE;
3953
b65b5b59 3954 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3955 BRDENABLE(portp->brdnr, portp->pagenr);
3956 stl_sc26198setreg(portp, SCCR, ccr);
3957 BRDDISABLE(portp->brdnr);
3958 portp->crenable = ccr;
b65b5b59 3959 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3960}
3961
3962/*****************************************************************************/
3963
3964/*
3965 * Start/stop the Transmitter and/or Receiver.
3966 */
3967
ca7ed0f2 3968static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3969{
3970 unsigned char imr;
3971 unsigned long flags;
3972
a0564e14 3973 pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3974
3975 imr = portp->imr;
3976 if (tx == 0)
3977 imr &= ~IR_TXRDY;
3978 else if (tx == 1)
3979 imr |= IR_TXRDY;
3980 if (rx == 0)
3981 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
3982 else if (rx > 0)
3983 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
3984
b65b5b59 3985 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3986 BRDENABLE(portp->brdnr, portp->pagenr);
3987 stl_sc26198setreg(portp, IMR, imr);
3988 BRDDISABLE(portp->brdnr);
3989 portp->imr = imr;
3990 if (tx > 0)
3991 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3992 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3993}
3994
3995/*****************************************************************************/
3996
3997/*
3998 * Disable all interrupts from this port.
3999 */
4000
ca7ed0f2 4001static void stl_sc26198disableintrs(struct stlport *portp)
1da177e4
LT		 4002{
4003 unsigned long flags;
4004
a0564e14 4005 pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp);
1da177e4 4006
b65b5b59 4007 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4008 BRDENABLE(portp->brdnr, portp->pagenr);
4009 portp->imr = 0;
4010 stl_sc26198setreg(portp, IMR, 0);
4011 BRDDISABLE(portp->brdnr);
b65b5b59 4012 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4013}
4014
4015/*****************************************************************************/
4016
ca7ed0f2 4017static void stl_sc26198sendbreak(struct stlport *portp, int len)
1da177e4
LT		 4018{
4019 unsigned long flags;
4020
a0564e14 4021 pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 4022
b65b5b59 4023 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4024 BRDENABLE(portp->brdnr, portp->pagenr);
4025 if (len == 1) {
4026 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
4027 portp->stats.txbreaks++;
c62429d9 4028 } else
1da177e4 4029 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
c62429d9 4030
1da177e4 4031 BRDDISABLE(portp->brdnr);
b65b5b59 4032 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4033}
4034
4035/*****************************************************************************/
4036
4037/*
4038 * Take flow control actions...
4039 */
4040
ca7ed0f2 4041static void stl_sc26198flowctrl(struct stlport *portp, int state)
1da177e4
LT		 4042{
4043 struct tty_struct *tty;
4044 unsigned long flags;
4045 unsigned char mr0;
4046
a0564e14 4047 pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 4048
615e4a71 4049 if (portp == NULL)
1da177e4 4050 return;
d18a750f 4051 tty = tty_port_tty_get(&portp->port);
615e4a71 4052 if (tty == NULL)
1da177e4
LT		 4053 return;
4054
b65b5b59 4055 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4056 BRDENABLE(portp->brdnr, portp->pagenr);
4057
4058 if (state) {
4059 if (tty->termios->c_iflag & IXOFF) {
4060 mr0 = stl_sc26198getreg(portp, MR0);
4061 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4062 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4063 mr0 |= MR0_SWFRX;
4064 portp->stats.rxxon++;
4065 stl_sc26198wait(portp);
4066 stl_sc26198setreg(portp, MR0, mr0);
4067 }
4068/*
4069 * Question: should we return RTS to what it was before? It may
4070 * have been set by an ioctl... Suppose not, since if you have
4071 * hardware flow control set then it is pretty silly to go and
4072 * set the RTS line by hand.
4073 */
4074 if (tty->termios->c_cflag & CRTSCTS) {
4075 stl_sc26198setreg(portp, MR1,
4076 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4077 stl_sc26198setreg(portp, IOPIOR,
4078 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4079 portp->stats.rxrtson++;
4080 }
4081 } else {
4082 if (tty->termios->c_iflag & IXOFF) {
4083 mr0 = stl_sc26198getreg(portp, MR0);
4084 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4085 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4086 mr0 &= ~MR0_SWFRX;
4087 portp->stats.rxxoff++;
4088 stl_sc26198wait(portp);
4089 stl_sc26198setreg(portp, MR0, mr0);
4090 }
4091 if (tty->termios->c_cflag & CRTSCTS) {
4092 stl_sc26198setreg(portp, MR1,
4093 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4094 stl_sc26198setreg(portp, IOPIOR,
4095 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4096 portp->stats.rxrtsoff++;
4097 }
4098 }
4099
4100 BRDDISABLE(portp->brdnr);
b65b5b59 4101 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4102 tty_kref_put(tty);
1da177e4
LT		 4103}
4104
4105/*****************************************************************************/
4106
4107/*
4108 * Send a flow control character.
4109 */
4110
ca7ed0f2 4111static void stl_sc26198sendflow(struct stlport *portp, int state)
1da177e4
LT		 4112{
4113 struct tty_struct *tty;
4114 unsigned long flags;
4115 unsigned char mr0;
4116
a0564e14 4117 pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 4118
615e4a71 4119 if (portp == NULL)
1da177e4 4120 return;
d18a750f 4121 tty = tty_port_tty_get(&portp->port);
615e4a71 4122 if (tty == NULL)
1da177e4
LT		 4123 return;
4124
b65b5b59 4125 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4126 BRDENABLE(portp->brdnr, portp->pagenr);
4127 if (state) {
4128 mr0 = stl_sc26198getreg(portp, MR0);
4129 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4130 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4131 mr0 |= MR0_SWFRX;
4132 portp->stats.rxxon++;
4133 stl_sc26198wait(portp);
4134 stl_sc26198setreg(portp, MR0, mr0);
4135 } else {
4136 mr0 = stl_sc26198getreg(portp, MR0);
4137 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4138 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4139 mr0 &= ~MR0_SWFRX;
4140 portp->stats.rxxoff++;
4141 stl_sc26198wait(portp);
4142 stl_sc26198setreg(portp, MR0, mr0);
4143 }
4144 BRDDISABLE(portp->brdnr);
b65b5b59 4145 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4146 tty_kref_put(tty);
1da177e4
LT		 4147}
4148
4149/*****************************************************************************/
4150
ca7ed0f2 4151static void stl_sc26198flush(struct stlport *portp)
1da177e4
LT		 4152{
4153 unsigned long flags;
4154
a0564e14 4155 pr_debug("stl_sc26198flush(portp=%p)\n", portp);
1da177e4 4156
615e4a71 4157 if (portp == NULL)
1da177e4
LT		 4158 return;
4159
b65b5b59 4160 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4161 BRDENABLE(portp->brdnr, portp->pagenr);
4162 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4163 stl_sc26198setreg(portp, SCCR, portp->crenable);
4164 BRDDISABLE(portp->brdnr);
4165 portp->tx.tail = portp->tx.head;
b65b5b59 4166 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4167}
4168
4169/*****************************************************************************/
4170
4171/*
4172 * Return the current state of data flow on this port. This is only
4173 * really interresting when determining if data has fully completed
4174 * transmission or not... The sc26198 interrupt scheme cannot
4175 * determine when all data has actually drained, so we need to
4176 * check the port statusy register to be sure.
4177 */
4178
ca7ed0f2 4179static int stl_sc26198datastate(struct stlport *portp)
1da177e4
LT		 4180{
4181 unsigned long flags;
4182 unsigned char sr;
4183
a0564e14 4184 pr_debug("stl_sc26198datastate(portp=%p)\n", portp);
1da177e4 4185
615e4a71 4186 if (portp == NULL)
014c2544 4187 return 0;
1da177e4 4188 if (test_bit(ASYI_TXBUSY, &portp->istate))
014c2544 4189 return 1;
1da177e4 4190
b65b5b59 4191 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4192 BRDENABLE(portp->brdnr, portp->pagenr);
4193 sr = stl_sc26198getreg(portp, SR);
4194 BRDDISABLE(portp->brdnr);
b65b5b59 4195 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4 4196
014c2544 4197 return (sr & SR_TXEMPTY) ? 0 : 1;
1da177e4
LT		 4198}
4199
4200/*****************************************************************************/
4201
4202/*
4203 * Delay for a small amount of time, to give the sc26198 a chance
4204 * to process a command...
4205 */
4206
ca7ed0f2 4207static void stl_sc26198wait(struct stlport *portp)
1da177e4
LT		 4208{
4209 int i;
4210
a0564e14 4211 pr_debug("stl_sc26198wait(portp=%p)\n", portp);
1da177e4 4212
615e4a71 4213 if (portp == NULL)
1da177e4
LT		 4214 return;
4215
c62429d9 4216 for (i = 0; i < 20; i++)
1da177e4
LT		 4217 stl_sc26198getglobreg(portp, TSTR);
4218}
4219
4220/*****************************************************************************/
4221
4222/*
4223 * If we are TX flow controlled and in IXANY mode then we may
4224 * need to unflow control here. We gotta do this because of the
4225 * automatic flow control modes of the sc26198.
4226 */
4227
60be4810 4228static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty)
1da177e4
LT		 4229{
4230 unsigned char mr0;
4231
4232 mr0 = stl_sc26198getreg(portp, MR0);
4233 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4234 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4235 stl_sc26198wait(portp);
4236 stl_sc26198setreg(portp, MR0, mr0);
4237 clear_bit(ASYI_TXFLOWED, &portp->istate);
4238}
4239
4240/*****************************************************************************/
4241
4242/*
4243 * Interrupt service routine for sc26198 panels.
4244 */
4245
ca7ed0f2 4246static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase)
1da177e4 4247{
ca7ed0f2 4248 struct stlport *portp;
1da177e4
LT		 4249 unsigned int iack;
4250
b65b5b59
AC		 4251 spin_lock(&brd_lock);
4252
1da177e4
LT		 4253/*
4254 * Work around bug in sc26198 chip... Cannot have A6 address
4255 * line of UART high, else iack will be returned as 0.
4256 */
4257 outb(0, (iobase + 1));
4258
4259 iack = inb(iobase + XP_IACK);
4260 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4261
4262 if (iack & IVR_RXDATA)
4263 stl_sc26198rxisr(portp, iack);
4264 else if (iack & IVR_TXDATA)
4265 stl_sc26198txisr(portp);
4266 else
4267 stl_sc26198otherisr(portp, iack);
b65b5b59
AC		 4268
4269 spin_unlock(&brd_lock);
1da177e4
LT		 4270}
4271
4272/*****************************************************************************/
4273
4274/*
4275 * Transmit interrupt handler. This has gotta be fast! Handling TX
4276 * chars is pretty simple, stuff as many as possible from the TX buffer
4277 * into the sc26198 FIFO.
4278 * In practice it is possible that interrupts are enabled but that the
4279 * port has been hung up. Need to handle not having any TX buffer here,
4280 * this is done by using the side effect that head and tail will also
4281 * be NULL if the buffer has been freed.
4282 */
4283
ca7ed0f2 4284static void stl_sc26198txisr(struct stlport *portp)
1da177e4 4285{
d18a750f 4286 struct tty_struct *tty;
1da177e4
LT		 4287 unsigned int ioaddr;
4288 unsigned char mr0;
4289 int len, stlen;
4290 char *head, *tail;
4291
a0564e14 4292 pr_debug("stl_sc26198txisr(portp=%p)\n", portp);
1da177e4
LT		 4293
4294 ioaddr = portp->ioaddr;
4295 head = portp->tx.head;
4296 tail = portp->tx.tail;
4297 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4298 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4299 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
4300 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 4301 tty = tty_port_tty_get(&portp->port);
4302 if (tty) {
4303 tty_wakeup(tty);
4304 tty_kref_put(tty);
4305 }
1da177e4
LT		 4306 }
4307
4308 if (len == 0) {
4309 outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR));
4310 mr0 = inb(ioaddr + XP_DATA);
4311 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4312 portp->imr &= ~IR_TXRDY;
4313 outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR));
4314 outb(portp->imr, (ioaddr + XP_DATA));
4315 clear_bit(ASYI_TXBUSY, &portp->istate);
4316 } else {
4317 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4318 outb(mr0, (ioaddr + XP_DATA));
4319 }
4320 } else {
843b568c 4321 len = min(len, SC26198_TXFIFOSIZE);
1da177e4 4322 portp->stats.txtotal += len;
319fe7c3
JS		 4323 stlen = min_t(unsigned int, len,
4324 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 4325 outb(GTXFIFO, (ioaddr + XP_ADDR));
4326 outsb((ioaddr + XP_DATA), tail, stlen);
4327 len -= stlen;
4328 tail += stlen;
4329 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4330 tail = portp->tx.buf;
4331 if (len > 0) {
4332 outsb((ioaddr + XP_DATA), tail, len);
4333 tail += len;
4334 }
4335 portp->tx.tail = tail;
4336 }
4337}
4338
4339/*****************************************************************************/
4340
4341/*
4342 * Receive character interrupt handler. Determine if we have good chars
4343 * or bad chars and then process appropriately. Good chars are easy
4344 * just shove the lot into the RX buffer and set all status byte to 0.
4345 * If a bad RX char then process as required. This routine needs to be
4346 * fast! In practice it is possible that we get an interrupt on a port
4347 * that is closed. This can happen on hangups - since they completely
4348 * shutdown a port not in user context. Need to handle this case.
4349 */
4350
ca7ed0f2 4351static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4352{
4353 struct tty_struct *tty;
4354 unsigned int len, buflen, ioaddr;
4355
a0564e14 4356 pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4 4357
d18a750f 4358 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4359 ioaddr = portp->ioaddr;
4360 outb(GIBCR, (ioaddr + XP_ADDR));
4361 len = inb(ioaddr + XP_DATA) + 1;
4362
4363 if ((iack & IVR_TYPEMASK) == IVR_RXDATA) {
33f0f88f 4364 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 4365 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 4366 outb(GRXFIFO, (ioaddr + XP_ADDR));
4367 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4368 portp->stats.rxlost += len;
4369 portp->stats.rxtotal += len;
4370 } else {
843b568c 4371 len = min(len, buflen);
1da177e4 4372 if (len > 0) {
33f0f88f 4373 unsigned char *ptr;
1da177e4 4374 outb(GRXFIFO, (ioaddr + XP_ADDR));
33f0f88f
AC		 4375 tty_prepare_flip_string(tty, &ptr, len);
4376 insb((ioaddr + XP_DATA), ptr, len);
1da177e4
LT		 4377 tty_schedule_flip(tty);
4378 portp->stats.rxtotal += len;
4379 }
4380 }
4381 } else {
4382 stl_sc26198rxbadchars(portp);
4383 }
4384
4385/*
4386 * If we are TX flow controlled and in IXANY mode then we may need
4387 * to unflow control here. We gotta do this because of the automatic
4388 * flow control modes of the sc26198.
4389 */
4390 if (test_bit(ASYI_TXFLOWED, &portp->istate)) {
615e4a71
JS		 4391 if ((tty != NULL) &&
4392 (tty->termios != NULL) &&
1da177e4
LT		 4393 (tty->termios->c_iflag & IXANY)) {
4394 stl_sc26198txunflow(portp, tty);
4395 }
4396 }
d18a750f 4397 tty_kref_put(tty);
1da177e4
LT		 4398}
4399
4400/*****************************************************************************/
4401
4402/*
4403 * Process an RX bad character.
4404 */
4405
60be4810 4406static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch)
1da177e4
LT		 4407{
4408 struct tty_struct *tty;
4409 unsigned int ioaddr;
4410
d18a750f 4411 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4412 ioaddr = portp->ioaddr;
4413
4414 if (status & SR_RXPARITY)
4415 portp->stats.rxparity++;
4416 if (status & SR_RXFRAMING)
4417 portp->stats.rxframing++;
4418 if (status & SR_RXOVERRUN)
4419 portp->stats.rxoverrun++;
4420 if (status & SR_RXBREAK)
4421 portp->stats.rxbreaks++;
4422
615e4a71 4423 if ((tty != NULL) &&
1da177e4
LT		 4424 ((portp->rxignoremsk & status) == 0)) {
4425 if (portp->rxmarkmsk & status) {
4426 if (status & SR_RXBREAK) {
4427 status = TTY_BREAK;
f8ae4764 4428 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 4429 do_SAK(tty);
4430 BRDENABLE(portp->brdnr, portp->pagenr);
4431 }
c62429d9 4432 } else if (status & SR_RXPARITY)
1da177e4 4433 status = TTY_PARITY;
c62429d9 4434 else if (status & SR_RXFRAMING)
1da177e4 4435 status = TTY_FRAME;
c62429d9 4436 else if(status & SR_RXOVERRUN)
1da177e4 4437 status = TTY_OVERRUN;
c62429d9 4438 else
1da177e4 4439 status = 0;
c62429d9 4440 } else
1da177e4 4441 status = 0;
1da177e4 4442
33f0f88f
AC		 4443 tty_insert_flip_char(tty, ch, status);
4444 tty_schedule_flip(tty);
1da177e4
LT		 4445
4446 if (status == 0)
4447 portp->stats.rxtotal++;
4448 }
d18a750f 4449 tty_kref_put(tty);
1da177e4
LT		 4450}
4451
4452/*****************************************************************************/
4453
4454/*
4455 * Process all characters in the RX FIFO of the UART. Check all char
4456 * status bytes as well, and process as required. We need to check
4457 * all bytes in the FIFO, in case some more enter the FIFO while we
4458 * are here. To get the exact character error type we need to switch
4459 * into CHAR error mode (that is why we need to make sure we empty
4460 * the FIFO).
4461 */
4462
ca7ed0f2 4463static void stl_sc26198rxbadchars(struct stlport *portp)
1da177e4
LT		 4464{
4465 unsigned char status, mr1;
4466 char ch;
4467
4468/*
4469 * To get the precise error type for each character we must switch
4470 * back into CHAR error mode.
4471 */
4472 mr1 = stl_sc26198getreg(portp, MR1);
4473 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4474
4475 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4476 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4477 ch = stl_sc26198getreg(portp, RXFIFO);
4478 stl_sc26198rxbadch(portp, status, ch);
4479 }
4480
4481/*
4482 * To get correct interrupt class we must switch back into BLOCK
4483 * error mode.
4484 */
4485 stl_sc26198setreg(portp, MR1, mr1);
4486}
4487
4488/*****************************************************************************/
4489
4490/*
4491 * Other interrupt handler. This includes modem signals, flow
4492 * control actions, etc. Most stuff is left to off-level interrupt
4493 * processing time.
4494 */
4495
ca7ed0f2 4496static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4497{
4498 unsigned char cir, ipr, xisr;
4499
a0564e14 4500 pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4501
4502 cir = stl_sc26198getglobreg(portp, CIR);
4503
4504 switch (cir & CIR_SUBTYPEMASK) {
4505 case CIR_SUBCOS:
4506 ipr = stl_sc26198getreg(portp, IPR);
4507 if (ipr & IPR_DCDCHANGE) {
ccfea3c9 4508 stl_cd_change(portp);
1da177e4
LT		 4509 portp->stats.modem++;
4510 }
4511 break;
4512 case CIR_SUBXONXOFF:
4513 xisr = stl_sc26198getreg(portp, XISR);
4514 if (xisr & XISR_RXXONGOT) {
4515 set_bit(ASYI_TXFLOWED, &portp->istate);
4516 portp->stats.txxoff++;
4517 }
4518 if (xisr & XISR_RXXOFFGOT) {
4519 clear_bit(ASYI_TXFLOWED, &portp->istate);
4520 portp->stats.txxon++;
4521 }
4522 break;
4523 case CIR_SUBBREAK:
4524 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4525 stl_sc26198rxbadchars(portp);
4526 break;
4527 default:
4528 break;
4529 }
4530}
4531
fc06b5cf
JS		 4532static void stl_free_isabrds(void)
4533{
4534 struct stlbrd *brdp;
4535 unsigned int i;
4536
4537 for (i = 0; i < stl_nrbrds; i++) {
4538 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4539 continue;
4540
4541 free_irq(brdp->irq, brdp);
4542
4543 stl_cleanup_panels(brdp);
4544
4545 release_region(brdp->ioaddr1, brdp->iosize1);
4546 if (brdp->iosize2 > 0)
4547 release_region(brdp->ioaddr2, brdp->iosize2);
4548
4549 kfree(brdp);
4550 stl_brds[i] = NULL;
4551 }
4552}
4553
23b85a15
JS		 4554/*
4555 * Loadable module initialization stuff.
4556 */
4557static int __init stallion_module_init(void)
4558{
843b568c
JS		 4559 struct stlbrd *brdp;
4560 struct stlconf conf;
aeaccfe4 4561 unsigned int i, j;
fc06b5cf 4562 int retval;
23b85a15
JS		 4563
4564 printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion);
4565
4566 spin_lock_init(&stallion_lock);
4567 spin_lock_init(&brd_lock);
4568
e415109f
JS		 4569 stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS);
4570 if (!stl_serial) {
4571 retval = -ENOMEM;
4572 goto err;
4573 }
4574
4575 stl_serial->owner = THIS_MODULE;
4576 stl_serial->driver_name = stl_drvname;
4577 stl_serial->name = "ttyE";
4578 stl_serial->major = STL_SERIALMAJOR;
4579 stl_serial->minor_start = 0;
4580 stl_serial->type = TTY_DRIVER_TYPE_SERIAL;
4581 stl_serial->subtype = SERIAL_TYPE_NORMAL;
4582 stl_serial->init_termios = stl_deftermios;
4583 stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4584 tty_set_operations(stl_serial, &stl_ops);
4585
4586 retval = tty_register_driver(stl_serial);
4587 if (retval) {
4588 printk("STALLION: failed to register serial driver\n");
4589 goto err_frtty;
4590 }
4591
843b568c
JS		 4592/*
4593 * Find any dynamically supported boards. That is via module load
4594 * line options.
4595 */
4596 for (i = stl_nrbrds; i < stl_nargs; i++) {
4597 memset(&conf, 0, sizeof(conf));
4598 if (stl_parsebrd(&conf, stl_brdsp[i]) == 0)
4599 continue;
4600 if ((brdp = stl_allocbrd()) == NULL)
4601 continue;
4602 brdp->brdnr = i;
4603 brdp->brdtype = conf.brdtype;
4604 brdp->ioaddr1 = conf.ioaddr1;
4605 brdp->ioaddr2 = conf.ioaddr2;
4606 brdp->irq = conf.irq;
4607 brdp->irqtype = conf.irqtype;
b08b5ad9
IK		 4608 stl_brds[brdp->brdnr] = brdp;
4609 if (stl_brdinit(brdp)) {
4610 stl_brds[brdp->brdnr] = NULL;
843b568c 4611 kfree(brdp);
b08b5ad9 4612 } else {
aeaccfe4
JS		 4613 for (j = 0; j < brdp->nrports; j++)
4614 tty_register_device(stl_serial,
4615 brdp->brdnr * STL_MAXPORTS + j, NULL);
843b568c 4616 stl_nrbrds = i + 1;
79cfe7ab 4617 }
843b568c 4618 }
23b85a15 4619
79cfe7ab 4620 /* this has to be _after_ isa finding because of locking */
b1b84fe0 4621 retval = pci_register_driver(&stl_pcidriver);
e415109f
JS		 4622 if (retval && stl_nrbrds == 0) {
4623 printk(KERN_ERR "STALLION: can't register pci driver\n");
4624 goto err_unrtty;
fc06b5cf 4625 }
23b85a15
JS		 4626
4627/*
4628 * Set up a character driver for per board stuff. This is mainly used
4629 * to do stats ioctls on the ports.
4630 */
4631 if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem))
4632 printk("STALLION: failed to register serial board device\n");
4633
4634 stallion_class = class_create(THIS_MODULE, "staliomem");
e415109f
JS		 4635 if (IS_ERR(stallion_class))
4636 printk("STALLION: failed to create class\n");
23b85a15 4637 for (i = 0; i < 4; i++)
03457cd4
GKH		 4638 device_create(stallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i),
4639 NULL, "staliomem%d", i);
23b85a15 4640
23b85a15 4641 return 0;
e415109f
JS		 4642err_unrtty:
4643 tty_unregister_driver(stl_serial);
4644err_frtty:
fc06b5cf 4645 put_tty_driver(stl_serial);
b1b84fe0
JS		 4646err:
4647 return retval;
23b85a15
JS		 4648}
4649
4650static void __exit stallion_module_exit(void)
4651{
aeaccfe4
JS		 4652 struct stlbrd *brdp;
4653 unsigned int i, j;
23b85a15
JS		 4654
4655 pr_debug("cleanup_module()\n");
4656
4657 printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle,
4658 stl_drvversion);
4659
4660/*
4661 * Free up all allocated resources used by the ports. This includes
4662 * memory and interrupts. As part of this process we will also do
4663 * a hangup on every open port - to try to flush out any processes
4664 * hanging onto ports.
4665 */
aeaccfe4
JS		 4666 for (i = 0; i < stl_nrbrds; i++) {
4667 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4668 continue;
4669 for (j = 0; j < brdp->nrports; j++)
4670 tty_unregister_device(stl_serial,
4671 brdp->brdnr * STL_MAXPORTS + j);
4672 }
fc06b5cf 4673
23b85a15 4674 for (i = 0; i < 4; i++)
07c015e7 4675 device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
68fc4fab 4676 unregister_chrdev(STL_SIOMEMMAJOR, "staliomem");
23b85a15
JS		 4677 class_destroy(stallion_class);
4678
b1b84fe0
JS		 4679 pci_unregister_driver(&stl_pcidriver);
4680
fc06b5cf 4681 stl_free_isabrds();
e415109f
JS		 4682
4683 tty_unregister_driver(stl_serial);
4684 put_tty_driver(stl_serial);
23b85a15
JS		 4685}
4686
4687module_init(stallion_module_init);
4688module_exit(stallion_module_exit);
4689
4690MODULE_AUTHOR("Greg Ungerer");
4691MODULE_DESCRIPTION("Stallion Multiport Serial Driver");
4692MODULE_LICENSE("GPL");
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