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ACPI: add missing __percpu markup in arch/x86/kernel/acpi/cstate.c
[net-next-2.6.git] / drivers / char / stallion.c
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1da177e4
LT		 1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1999 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/*****************************************************************************/
28
1da177e4 29#include <linux/module.h>
d43c36dc 30#include <linux/sched.h>
1da177e4
LT		 31#include <linux/slab.h>
32#include <linux/interrupt.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
35#include <linux/serial.h>
8561c44c 36#include <linux/seq_file.h>
1da177e4
LT		 37#include <linux/cd1400.h>
38#include <linux/sc26198.h>
39#include <linux/comstats.h>
40#include <linux/stallion.h>
41#include <linux/ioport.h>
42#include <linux/init.h>
43#include <linux/smp_lock.h>
1da177e4
LT		 44#include <linux/device.h>
45#include <linux/delay.h>
843b568c 46#include <linux/ctype.h>
1da177e4
LT		 47
48#include <asm/io.h>
49#include <asm/uaccess.h>
50
1da177e4 51#include <linux/pci.h>
1da177e4
LT		 52
53/*****************************************************************************/
54
55/*
56 * Define different board types. Use the standard Stallion "assigned"
57 * board numbers. Boards supported in this driver are abbreviated as
58 * EIO = EasyIO and ECH = EasyConnection 8/32.
59 */
60#define BRD_EASYIO 20
61#define BRD_ECH 21
62#define BRD_ECHMC 22
63#define BRD_ECHPCI 26
64#define BRD_ECH64PCI 27
65#define BRD_EASYIOPCI 28
66
843b568c 67struct stlconf {
6b2c9457 68 unsigned int brdtype;
1da177e4
LT		 69 int ioaddr1;
70 int ioaddr2;
71 unsigned long memaddr;
72 int irq;
73 int irqtype;
1da177e4
LT		 74};
75
843b568c 76static unsigned int stl_nrbrds;
1da177e4
LT		 77
78/*****************************************************************************/
79
80/*
81 * Define some important driver characteristics. Device major numbers
82 * allocated as per Linux Device Registry.
83 */
84#ifndef STL_SIOMEMMAJOR
85#define STL_SIOMEMMAJOR 28
86#endif
87#ifndef STL_SERIALMAJOR
88#define STL_SERIALMAJOR 24
89#endif
90#ifndef STL_CALLOUTMAJOR
91#define STL_CALLOUTMAJOR 25
92#endif
93
94/*
95 * Set the TX buffer size. Bigger is better, but we don't want
96 * to chew too much memory with buffers!
97 */
98#define STL_TXBUFLOW 512
99#define STL_TXBUFSIZE 4096
100
101/*****************************************************************************/
102
103/*
104 * Define our local driver identity first. Set up stuff to deal with
105 * all the local structures required by a serial tty driver.
106 */
107static char *stl_drvtitle = "Stallion Multiport Serial Driver";
108static char *stl_drvname = "stallion";
109static char *stl_drvversion = "5.6.0";
110
111static struct tty_driver *stl_serial;
112
1da177e4
LT		 113/*
114 * Define a local default termios struct. All ports will be created
115 * with this termios initially. Basically all it defines is a raw port
116 * at 9600, 8 data bits, 1 stop bit.
117 */
606d099c 118static struct ktermios stl_deftermios = {
1da177e4
LT		 119 .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL),
120 .c_cc = INIT_C_CC,
606d099c
AC		 121 .c_ispeed = 9600,
122 .c_ospeed = 9600,
1da177e4
LT		 123};
124
1da177e4
LT		 125/*
126 * Define global place to put buffer overflow characters.
127 */
128static char stl_unwanted[SC26198_RXFIFOSIZE];
129
130/*****************************************************************************/
131
79cfe7ab 132static DEFINE_MUTEX(stl_brdslock);
ca7ed0f2 133static struct stlbrd *stl_brds[STL_MAXBRDS];
1da177e4 134
31f35939
AC		 135static const struct tty_port_operations stl_port_ops;
136
1da177e4
LT		 137/*
138 * Per board state flags. Used with the state field of the board struct.
139 * Not really much here!
140 */
141#define BRD_FOUND 0x1
fc06b5cf
JS		 142#define STL_PROBED 0x2
143
1da177e4
LT		 144
145/*
146 * Define the port structure istate flags. These set of flags are
147 * modified at interrupt time - so setting and reseting them needs
148 * to be atomic. Use the bit clear/setting routines for this.
149 */
150#define ASYI_TXBUSY 1
151#define ASYI_TXLOW 2
ccfea3c9 152#define ASYI_TXFLOWED 3
1da177e4
LT		 153
154/*
155 * Define an array of board names as printable strings. Handy for
156 * referencing boards when printing trace and stuff.
157 */
158static char *stl_brdnames[] = {
615e4a71
JS		 159 NULL,
160 NULL,
161 NULL,
162 NULL,
163 NULL,
164 NULL,
165 NULL,
166 NULL,
167 NULL,
168 NULL,
169 NULL,
170 NULL,
171 NULL,
172 NULL,
173 NULL,
174 NULL,
175 NULL,
176 NULL,
177 NULL,
178 NULL,
1da177e4
LT		 179 "EasyIO",
180 "EC8/32-AT",
181 "EC8/32-MC",
615e4a71
JS		 182 NULL,
183 NULL,
184 NULL,
1da177e4
LT		 185 "EC8/32-PCI",
186 "EC8/64-PCI",
187 "EasyIO-PCI",
188};
189
190/*****************************************************************************/
191
192/*
193 * Define some string labels for arguments passed from the module
194 * load line. These allow for easy board definitions, and easy
195 * modification of the io, memory and irq resoucres.
196 */
6b2c9457 197static unsigned int stl_nargs;
1da177e4
LT		 198static char *board0[4];
199static char *board1[4];
200static char *board2[4];
201static char *board3[4];
202
203static char **stl_brdsp[] = {
204 (char **) &board0,
205 (char **) &board1,
206 (char **) &board2,
207 (char **) &board3
208};
209
210/*
211 * Define a set of common board names, and types. This is used to
212 * parse any module arguments.
213 */
214
ca7ed0f2 215static struct {
1da177e4
LT		 216 char *name;
217 int type;
ca7ed0f2 218} stl_brdstr[] = {
1da177e4
LT		 219 { "easyio", BRD_EASYIO },
220 { "eio", BRD_EASYIO },
221 { "20", BRD_EASYIO },
222 { "ec8/32", BRD_ECH },
223 { "ec8/32-at", BRD_ECH },
224 { "ec8/32-isa", BRD_ECH },
225 { "ech", BRD_ECH },
226 { "echat", BRD_ECH },
227 { "21", BRD_ECH },
228 { "ec8/32-mc", BRD_ECHMC },
229 { "ec8/32-mca", BRD_ECHMC },
230 { "echmc", BRD_ECHMC },
231 { "echmca", BRD_ECHMC },
232 { "22", BRD_ECHMC },
233 { "ec8/32-pc", BRD_ECHPCI },
234 { "ec8/32-pci", BRD_ECHPCI },
235 { "26", BRD_ECHPCI },
236 { "ec8/64-pc", BRD_ECH64PCI },
237 { "ec8/64-pci", BRD_ECH64PCI },
238 { "ech-pci", BRD_ECH64PCI },
239 { "echpci", BRD_ECH64PCI },
240 { "echpc", BRD_ECH64PCI },
241 { "27", BRD_ECH64PCI },
242 { "easyio-pc", BRD_EASYIOPCI },
243 { "easyio-pci", BRD_EASYIOPCI },
244 { "eio-pci", BRD_EASYIOPCI },
245 { "eiopci", BRD_EASYIOPCI },
246 { "28", BRD_EASYIOPCI },
247};
248
249/*
250 * Define the module agruments.
251 */
1da177e4
LT		 252
253module_param_array(board0, charp, &stl_nargs, 0);
254MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]");
255module_param_array(board1, charp, &stl_nargs, 0);
256MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]");
257module_param_array(board2, charp, &stl_nargs, 0);
258MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]");
259module_param_array(board3, charp, &stl_nargs, 0);
260MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]");
261
262/*****************************************************************************/
263
264/*
265 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
266 * to the directly accessible io ports of these boards (not the uarts -
267 * they are in cd1400.h and sc26198.h).
268 */
269#define EIO_8PORTRS 0x04
270#define EIO_4PORTRS 0x05
271#define EIO_8PORTDI 0x00
272#define EIO_8PORTM 0x06
273#define EIO_MK3 0x03
274#define EIO_IDBITMASK 0x07
275
276#define EIO_BRDMASK 0xf0
277#define ID_BRD4 0x10
278#define ID_BRD8 0x20
279#define ID_BRD16 0x30
280
281#define EIO_INTRPEND 0x08
282#define EIO_INTEDGE 0x00
283#define EIO_INTLEVEL 0x08
284#define EIO_0WS 0x10
285
286#define ECH_ID 0xa0
287#define ECH_IDBITMASK 0xe0
288#define ECH_BRDENABLE 0x08
289#define ECH_BRDDISABLE 0x00
290#define ECH_INTENABLE 0x01
291#define ECH_INTDISABLE 0x00
292#define ECH_INTLEVEL 0x02
293#define ECH_INTEDGE 0x00
294#define ECH_INTRPEND 0x01
295#define ECH_BRDRESET 0x01
296
297#define ECHMC_INTENABLE 0x01
298#define ECHMC_BRDRESET 0x02
299
300#define ECH_PNLSTATUS 2
301#define ECH_PNL16PORT 0x20
302#define ECH_PNLIDMASK 0x07
303#define ECH_PNLXPID 0x40
304#define ECH_PNLINTRPEND 0x80
305
306#define ECH_ADDR2MASK 0x1e0
307
308/*
309 * Define the vector mapping bits for the programmable interrupt board
310 * hardware. These bits encode the interrupt for the board to use - it
311 * is software selectable (except the EIO-8M).
312 */
313static unsigned char stl_vecmap[] = {
314 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
315 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
316};
317
b65b5b59
AC		 318/*
319 * Lock ordering is that you may not take stallion_lock holding
320 * brd_lock.
321 */
322
323static spinlock_t brd_lock; /* Guard the board mapping */
324static spinlock_t stallion_lock; /* Guard the tty driver */
325
1da177e4
LT		 326/*
327 * Set up enable and disable macros for the ECH boards. They require
328 * the secondary io address space to be activated and deactivated.
329 * This way all ECH boards can share their secondary io region.
330 * If this is an ECH-PCI board then also need to set the page pointer
331 * to point to the correct page.
332 */
333#define BRDENABLE(brdnr,pagenr) \
334 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
335 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \
336 stl_brds[(brdnr)]->ioctrl); \
337 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
338 outb((pagenr), stl_brds[(brdnr)]->ioctrl);
339
340#define BRDDISABLE(brdnr) \
341 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
342 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \
343 stl_brds[(brdnr)]->ioctrl);
344
345#define STL_CD1400MAXBAUD 230400
346#define STL_SC26198MAXBAUD 460800
347
348#define STL_BAUDBASE 115200
349#define STL_CLOSEDELAY (5 * HZ / 10)
350
351/*****************************************************************************/
352
1da177e4
LT		 353/*
354 * Define the Stallion PCI vendor and device IDs.
355 */
356#ifndef PCI_VENDOR_ID_STALLION
357#define PCI_VENDOR_ID_STALLION 0x124d
358#endif
359#ifndef PCI_DEVICE_ID_ECHPCI832
360#define PCI_DEVICE_ID_ECHPCI832 0x0000
361#endif
362#ifndef PCI_DEVICE_ID_ECHPCI864
363#define PCI_DEVICE_ID_ECHPCI864 0x0002
364#endif
365#ifndef PCI_DEVICE_ID_EIOPCI
366#define PCI_DEVICE_ID_EIOPCI 0x0003
367#endif
368
369/*
370 * Define structure to hold all Stallion PCI boards.
371 */
1da177e4 372
b1b84fe0
JS		 373static struct pci_device_id stl_pcibrds[] = {
374 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864),
375 .driver_data = BRD_ECH64PCI },
376 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI),
377 .driver_data = BRD_EASYIOPCI },
378 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832),
379 .driver_data = BRD_ECHPCI },
380 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410),
381 .driver_data = BRD_ECHPCI },
382 { }
383};
384MODULE_DEVICE_TABLE(pci, stl_pcibrds);
1da177e4
LT		 385
386/*****************************************************************************/
387
388/*
389 * Define macros to extract a brd/port number from a minor number.
390 */
391#define MINOR2BRD(min) (((min) & 0xc0) >> 6)
392#define MINOR2PORT(min) ((min) & 0x3f)
393
394/*
395 * Define a baud rate table that converts termios baud rate selector
396 * into the actual baud rate value. All baud rate calculations are
397 * based on the actual baud rate required.
398 */
399static unsigned int stl_baudrates[] = {
400 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
401 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600
402};
403
1da177e4
LT		 404/*****************************************************************************/
405
406/*
407 * Declare all those functions in this driver!
408 */
409
894cb917 410static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg);
ca7ed0f2 411static int stl_brdinit(struct stlbrd *brdp);
d18a750f 412static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp);
ca7ed0f2 413static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp);
1da177e4 414
1da177e4
LT		 415/*
416 * CD1400 uart specific handling functions.
417 */
ca7ed0f2
JS		 418static void stl_cd1400setreg(struct stlport *portp, int regnr, int value);
419static int stl_cd1400getreg(struct stlport *portp, int regnr);
420static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value);
421static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
422static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 423static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 424static int stl_cd1400getsignals(struct stlport *portp);
425static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts);
426static void stl_cd1400ccrwait(struct stlport *portp);
427static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx);
428static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx);
429static void stl_cd1400disableintrs(struct stlport *portp);
430static void stl_cd1400sendbreak(struct stlport *portp, int len);
431static void stl_cd1400flowctrl(struct stlport *portp, int state);
432static void stl_cd1400sendflow(struct stlport *portp, int state);
433static void stl_cd1400flush(struct stlport *portp);
434static int stl_cd1400datastate(struct stlport *portp);
435static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase);
436static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase);
437static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr);
438static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr);
439static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr);
440
441static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr);
1da177e4
LT		 442
443/*
444 * SC26198 uart specific handling functions.
445 */
ca7ed0f2
JS		 446static void stl_sc26198setreg(struct stlport *portp, int regnr, int value);
447static int stl_sc26198getreg(struct stlport *portp, int regnr);
448static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value);
449static int stl_sc26198getglobreg(struct stlport *portp, int regnr);
450static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
451static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 452static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 453static int stl_sc26198getsignals(struct stlport *portp);
454static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts);
455static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx);
456static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx);
457static void stl_sc26198disableintrs(struct stlport *portp);
458static void stl_sc26198sendbreak(struct stlport *portp, int len);
459static void stl_sc26198flowctrl(struct stlport *portp, int state);
460static void stl_sc26198sendflow(struct stlport *portp, int state);
461static void stl_sc26198flush(struct stlport *portp);
462static int stl_sc26198datastate(struct stlport *portp);
463static void stl_sc26198wait(struct stlport *portp);
464static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty);
465static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase);
466static void stl_sc26198txisr(struct stlport *port);
467static void stl_sc26198rxisr(struct stlport *port, unsigned int iack);
468static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch);
469static void stl_sc26198rxbadchars(struct stlport *portp);
470static void stl_sc26198otherisr(struct stlport *port, unsigned int iack);
1da177e4
LT		 471
472/*****************************************************************************/
473
474/*
475 * Generic UART support structure.
476 */
477typedef struct uart {
ca7ed0f2
JS		 478 int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp);
479 void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 480 void (*setport)(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 481 int (*getsignals)(struct stlport *portp);
482 void (*setsignals)(struct stlport *portp, int dtr, int rts);
483 void (*enablerxtx)(struct stlport *portp, int rx, int tx);
484 void (*startrxtx)(struct stlport *portp, int rx, int tx);
485 void (*disableintrs)(struct stlport *portp);
486 void (*sendbreak)(struct stlport *portp, int len);
487 void (*flowctrl)(struct stlport *portp, int state);
488 void (*sendflow)(struct stlport *portp, int state);
489 void (*flush)(struct stlport *portp);
490 int (*datastate)(struct stlport *portp);
491 void (*intr)(struct stlpanel *panelp, unsigned int iobase);
1da177e4
LT		 492} uart_t;
493
494/*
495 * Define some macros to make calling these functions nice and clean.
496 */
497#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
498#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
499#define stl_setport (* ((uart_t *) portp->uartp)->setport)
500#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
501#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
502#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
503#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
504#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
505#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
506#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl)
507#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
508#define stl_flush (* ((uart_t *) portp->uartp)->flush)
509#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
510
511/*****************************************************************************/
512
513/*
514 * CD1400 UART specific data initialization.
515 */
516static uart_t stl_cd1400uart = {
517 stl_cd1400panelinit,
518 stl_cd1400portinit,
519 stl_cd1400setport,
520 stl_cd1400getsignals,
521 stl_cd1400setsignals,
522 stl_cd1400enablerxtx,
523 stl_cd1400startrxtx,
524 stl_cd1400disableintrs,
525 stl_cd1400sendbreak,
526 stl_cd1400flowctrl,
527 stl_cd1400sendflow,
528 stl_cd1400flush,
529 stl_cd1400datastate,
530 stl_cd1400eiointr
531};
532
533/*
534 * Define the offsets within the register bank of a cd1400 based panel.
535 * These io address offsets are common to the EasyIO board as well.
536 */
537#define EREG_ADDR 0
538#define EREG_DATA 4
539#define EREG_RXACK 5
540#define EREG_TXACK 6
541#define EREG_MDACK 7
542
543#define EREG_BANKSIZE 8
544
545#define CD1400_CLK 25000000
546#define CD1400_CLK8M 20000000
547
548/*
549 * Define the cd1400 baud rate clocks. These are used when calculating
550 * what clock and divisor to use for the required baud rate. Also
551 * define the maximum baud rate allowed, and the default base baud.
552 */
553static int stl_cd1400clkdivs[] = {
554 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
555};
556
557/*****************************************************************************/
558
559/*
560 * SC26198 UART specific data initization.
561 */
562static uart_t stl_sc26198uart = {
563 stl_sc26198panelinit,
564 stl_sc26198portinit,
565 stl_sc26198setport,
566 stl_sc26198getsignals,
567 stl_sc26198setsignals,
568 stl_sc26198enablerxtx,
569 stl_sc26198startrxtx,
570 stl_sc26198disableintrs,
571 stl_sc26198sendbreak,
572 stl_sc26198flowctrl,
573 stl_sc26198sendflow,
574 stl_sc26198flush,
575 stl_sc26198datastate,
576 stl_sc26198intr
577};
578
579/*
580 * Define the offsets within the register bank of a sc26198 based panel.
581 */
582#define XP_DATA 0
583#define XP_ADDR 1
584#define XP_MODID 2
585#define XP_STATUS 2
586#define XP_IACK 3
587
588#define XP_BANKSIZE 4
589
590/*
591 * Define the sc26198 baud rate table. Offsets within the table
592 * represent the actual baud rate selector of sc26198 registers.
593 */
594static unsigned int sc26198_baudtable[] = {
595 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
596 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
597 230400, 460800, 921600
598};
599
fe971071 600#define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable)
1da177e4
LT		 601
602/*****************************************************************************/
603
604/*
605 * Define the driver info for a user level control device. Used mainly
606 * to get at port stats - only not using the port device itself.
607 */
62322d25 608static const struct file_operations stl_fsiomem = {
1da177e4 609 .owner = THIS_MODULE,
894cb917 610 .unlocked_ioctl = stl_memioctl,
1da177e4
LT		 611};
612
ca8eca68 613static struct class *stallion_class;
1da177e4 614
ccfea3c9
JS		 615static void stl_cd_change(struct stlport *portp)
616{
617 unsigned int oldsigs = portp->sigs;
d18a750f 618 struct tty_struct *tty = tty_port_tty_get(&portp->port);
ccfea3c9 619
d18a750f 620 if (!tty)
ccfea3c9
JS		 621 return;
622
623 portp->sigs = stl_getsignals(portp);
624
625 if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0))
f8ae4764 626 wake_up_interruptible(&portp->port.open_wait);
ccfea3c9
JS		 627
628 if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0))
f8ae4764 629 if (portp->port.flags & ASYNC_CHECK_CD)
d18a750f
AC		 630 tty_hangup(tty);
631 tty_kref_put(tty);
ccfea3c9
JS		 632}
633
1da177e4
LT		 634/*
635 * Check for any arguments passed in on the module load command line.
636 */
637
1da177e4
LT		 638/*****************************************************************************/
639
1da177e4
LT		 640/*
641 * Parse the supplied argument string, into the board conf struct.
642 */
643
40e82652 644static int __init stl_parsebrd(struct stlconf *confp, char **argp)
1da177e4
LT		 645{
646 char *sp;
6b2c9457 647 unsigned int i;
1da177e4 648
a0564e14 649 pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp);
1da177e4 650
615e4a71 651 if ((argp[0] == NULL) || (*argp[0] == 0))
014c2544 652 return 0;
1da177e4 653
c62429d9 654 for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++)
843b568c 655 *sp = tolower(*sp);
1da177e4 656
c62429d9 657 for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++)
1da177e4
LT		 658 if (strcmp(stl_brdstr[i].name, argp[0]) == 0)
659 break;
c62429d9 660
fe971071 661 if (i == ARRAY_SIZE(stl_brdstr)) {
1da177e4 662 printk("STALLION: unknown board name, %s?\n", argp[0]);
fe971071 663 return 0;
1da177e4
LT		 664 }
665
666 confp->brdtype = stl_brdstr[i].type;
667
668 i = 1;
615e4a71 669 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 670 confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 671 i++;
672 if (confp->brdtype == BRD_ECH) {
615e4a71 673 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 674 confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 675 i++;
676 }
615e4a71 677 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 678 confp->irq = simple_strtoul(argp[i], NULL, 0);
014c2544 679 return 1;
1da177e4
LT		 680}
681
682/*****************************************************************************/
683
1da177e4
LT		 684/*
685 * Allocate a new board structure. Fill out the basic info in it.
686 */
687
ca7ed0f2 688static struct stlbrd *stl_allocbrd(void)
1da177e4 689{
ca7ed0f2 690 struct stlbrd *brdp;
1da177e4 691
ca7ed0f2 692 brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL);
b0b4ed72 693 if (!brdp) {
b65b5b59 694 printk("STALLION: failed to allocate memory (size=%Zd)\n",
ca7ed0f2 695 sizeof(struct stlbrd));
b0b4ed72 696 return NULL;
1da177e4
LT		 697 }
698
1da177e4 699 brdp->magic = STL_BOARDMAGIC;
014c2544 700 return brdp;
1da177e4
LT		 701}
702
703/*****************************************************************************/
704
047e9658
AC		 705static int stl_activate(struct tty_port *port, struct tty_struct *tty)
706{
707 struct stlport *portp = container_of(port, struct stlport, port);
708 if (!portp->tx.buf) {
709 portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
710 if (!portp->tx.buf)
711 return -ENOMEM;
712 portp->tx.head = portp->tx.buf;
713 portp->tx.tail = portp->tx.buf;
714 }
715 stl_setport(portp, tty->termios);
716 portp->sigs = stl_getsignals(portp);
717 stl_setsignals(portp, 1, 1);
718 stl_enablerxtx(portp, 1, 1);
719 stl_startrxtx(portp, 1, 0);
720 return 0;
721}
722
1da177e4
LT		 723static int stl_open(struct tty_struct *tty, struct file *filp)
724{
ca7ed0f2
JS		 725 struct stlport *portp;
726 struct stlbrd *brdp;
6b2c9457 727 unsigned int minordev, brdnr, panelnr;
4350f3ff 728 int portnr;
1da177e4 729
a0564e14 730 pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name);
1da177e4
LT		 731
732 minordev = tty->index;
733 brdnr = MINOR2BRD(minordev);
734 if (brdnr >= stl_nrbrds)
014c2544 735 return -ENODEV;
1da177e4 736 brdp = stl_brds[brdnr];
615e4a71 737 if (brdp == NULL)
014c2544 738 return -ENODEV;
4350f3ff 739
1da177e4 740 minordev = MINOR2PORT(minordev);
c62429d9 741 for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) {
615e4a71 742 if (brdp->panels[panelnr] == NULL)
1da177e4
LT		 743 break;
744 if (minordev < brdp->panels[panelnr]->nrports) {
745 portnr = minordev;
746 break;
747 }
748 minordev -= brdp->panels[panelnr]->nrports;
749 }
750 if (portnr < 0)
014c2544 751 return -ENODEV;
1da177e4
LT		 752
753 portp = brdp->panels[panelnr]->ports[portnr];
615e4a71 754 if (portp == NULL)
014c2544 755 return -ENODEV;
a2d1e351
AC		 756
757 tty->driver_data = portp;
047e9658 758 return tty_port_open(&portp->port, tty, filp);
1da177e4 759
1da177e4
LT		 760}
761
762/*****************************************************************************/
763
31f35939
AC		 764static int stl_carrier_raised(struct tty_port *port)
765{
766 struct stlport *portp = container_of(port, struct stlport, port);
767 return (portp->sigs & TIOCM_CD) ? 1 : 0;
768}
769
fcc8ac18 770static void stl_dtr_rts(struct tty_port *port, int on)
1da177e4 771{
4350f3ff
AC		 772 struct stlport *portp = container_of(port, struct stlport, port);
773 /* Takes brd_lock internally */
fcc8ac18 774 stl_setsignals(portp, on, on);
1da177e4
LT		 775}
776
777/*****************************************************************************/
778
96b066b8
JS		 779static void stl_flushbuffer(struct tty_struct *tty)
780{
781 struct stlport *portp;
782
783 pr_debug("stl_flushbuffer(tty=%p)\n", tty);
784
96b066b8
JS		 785 portp = tty->driver_data;
786 if (portp == NULL)
787 return;
788
789 stl_flush(portp);
790 tty_wakeup(tty);
791}
792
793/*****************************************************************************/
794
795static void stl_waituntilsent(struct tty_struct *tty, int timeout)
796{
797 struct stlport *portp;
798 unsigned long tend;
799
800 pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout);
801
96b066b8
JS		 802 portp = tty->driver_data;
803 if (portp == NULL)
804 return;
805
806 if (timeout == 0)
807 timeout = HZ;
808 tend = jiffies + timeout;
809
810 while (stl_datastate(portp)) {
811 if (signal_pending(current))
812 break;
813 msleep_interruptible(20);
814 if (time_after_eq(jiffies, tend))
815 break;
816 }
817}
818
819/*****************************************************************************/
820
047e9658 821static void stl_shutdown(struct tty_port *port)
1da177e4 822{
047e9658 823 struct stlport *portp = container_of(port, struct stlport, port);
1da177e4 824 stl_disableintrs(portp);
1da177e4 825 stl_enablerxtx(portp, 0, 0);
047e9658 826 stl_flush(portp);
1da177e4 827 portp->istate = 0;
615e4a71 828 if (portp->tx.buf != NULL) {
1da177e4 829 kfree(portp->tx.buf);
615e4a71
JS		 830 portp->tx.buf = NULL;
831 portp->tx.head = NULL;
832 portp->tx.tail = NULL;
1da177e4 833 }
047e9658
AC		 834}
835
836static void stl_close(struct tty_struct *tty, struct file *filp)
837{
838 struct stlport*portp;
839 pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp);
1da177e4 840
047e9658 841 portp = tty->driver_data;
a2d1e351
AC		 842 if(portp == NULL)
843 return;
047e9658 844 tty_port_close(&portp->port, tty, filp);
1da177e4
LT		 845}
846
847/*****************************************************************************/
848
849/*
850 * Write routine. Take data and stuff it in to the TX ring queue.
851 * If transmit interrupts are not running then start them.
852 */
853
854static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count)
855{
ca7ed0f2 856 struct stlport *portp;
1da177e4
LT		 857 unsigned int len, stlen;
858 unsigned char *chbuf;
859 char *head, *tail;
860
a0564e14 861 pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count);
1da177e4 862
1da177e4 863 portp = tty->driver_data;
615e4a71 864 if (portp == NULL)
014c2544 865 return 0;
615e4a71 866 if (portp->tx.buf == NULL)
014c2544 867 return 0;
1da177e4
LT		 868
869/*
870 * If copying direct from user space we must cater for page faults,
871 * causing us to "sleep" here for a while. To handle this copy in all
872 * the data we need now, into a local buffer. Then when we got it all
873 * copy it into the TX buffer.
874 */
875 chbuf = (unsigned char *) buf;
876
877 head = portp->tx.head;
878 tail = portp->tx.tail;
879 if (head >= tail) {
880 len = STL_TXBUFSIZE - (head - tail) - 1;
881 stlen = STL_TXBUFSIZE - (head - portp->tx.buf);
882 } else {
883 len = tail - head - 1;
884 stlen = len;
885 }
886
843b568c 887 len = min(len, (unsigned int)count);
1da177e4
LT		 888 count = 0;
889 while (len > 0) {
843b568c 890 stlen = min(len, stlen);
1da177e4
LT		 891 memcpy(head, chbuf, stlen);
892 len -= stlen;
893 chbuf += stlen;
894 count += stlen;
895 head += stlen;
896 if (head >= (portp->tx.buf + STL_TXBUFSIZE)) {
897 head = portp->tx.buf;
898 stlen = tail - head;
899 }
900 }
901 portp->tx.head = head;
902
903 clear_bit(ASYI_TXLOW, &portp->istate);
904 stl_startrxtx(portp, -1, 1);
905
014c2544 906 return count;
1da177e4
LT		 907}
908
909/*****************************************************************************/
910
4a561222 911static int stl_putchar(struct tty_struct *tty, unsigned char ch)
1da177e4 912{
ca7ed0f2 913 struct stlport *portp;
1da177e4
LT		 914 unsigned int len;
915 char *head, *tail;
916
a0564e14 917 pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 918
1da177e4 919 portp = tty->driver_data;
615e4a71 920 if (portp == NULL)
4a561222 921 return -EINVAL;
615e4a71 922 if (portp->tx.buf == NULL)
4a561222 923 return -EINVAL;
1da177e4
LT		 924
925 head = portp->tx.head;
926 tail = portp->tx.tail;
927
928 len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head);
929 len--;
930
931 if (len > 0) {
932 *head++ = ch;
933 if (head >= (portp->tx.buf + STL_TXBUFSIZE))
934 head = portp->tx.buf;
935 }
936 portp->tx.head = head;
4a561222 937 return 0;
1da177e4
LT		 938}
939
940/*****************************************************************************/
941
942/*
943 * If there are any characters in the buffer then make sure that TX
944 * interrupts are on and get'em out. Normally used after the putchar
945 * routine has been called.
946 */
947
948static void stl_flushchars(struct tty_struct *tty)
949{
ca7ed0f2 950 struct stlport *portp;
1da177e4 951
a0564e14 952 pr_debug("stl_flushchars(tty=%p)\n", tty);
1da177e4 953
1da177e4 954 portp = tty->driver_data;
615e4a71 955 if (portp == NULL)
1da177e4 956 return;
615e4a71 957 if (portp->tx.buf == NULL)
1da177e4
LT		 958 return;
959
1da177e4
LT		 960 stl_startrxtx(portp, -1, 1);
961}
962
963/*****************************************************************************/
964
965static int stl_writeroom(struct tty_struct *tty)
966{
ca7ed0f2 967 struct stlport *portp;
1da177e4
LT		 968 char *head, *tail;
969
a0564e14 970 pr_debug("stl_writeroom(tty=%p)\n", tty);
1da177e4 971
1da177e4 972 portp = tty->driver_data;
615e4a71 973 if (portp == NULL)
014c2544 974 return 0;
615e4a71 975 if (portp->tx.buf == NULL)
014c2544 976 return 0;
1da177e4
LT		 977
978 head = portp->tx.head;
979 tail = portp->tx.tail;
c62429d9 980 return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1);
1da177e4
LT		 981}
982
983/*****************************************************************************/
984
985/*
986 * Return number of chars in the TX buffer. Normally we would just
987 * calculate the number of chars in the buffer and return that, but if
988 * the buffer is empty and TX interrupts are still on then we return
989 * that the buffer still has 1 char in it. This way whoever called us
990 * will not think that ALL chars have drained - since the UART still
991 * must have some chars in it (we are busy after all).
992 */
993
994static int stl_charsinbuffer(struct tty_struct *tty)
995{
ca7ed0f2 996 struct stlport *portp;
1da177e4
LT		 997 unsigned int size;
998 char *head, *tail;
999
a0564e14 1000 pr_debug("stl_charsinbuffer(tty=%p)\n", tty);
1da177e4 1001
1da177e4 1002 portp = tty->driver_data;
615e4a71 1003 if (portp == NULL)
014c2544 1004 return 0;
615e4a71 1005 if (portp->tx.buf == NULL)
014c2544 1006 return 0;
1da177e4
LT		 1007
1008 head = portp->tx.head;
1009 tail = portp->tx.tail;
1010 size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
1011 if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate))
1012 size = 1;
014c2544 1013 return size;
1da177e4
LT		 1014}
1015
1016/*****************************************************************************/
1017
1018/*
1019 * Generate the serial struct info.
1020 */
1021
ca7ed0f2 1022static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1023{
1024 struct serial_struct sio;
ca7ed0f2 1025 struct stlbrd *brdp;
1da177e4 1026
a0564e14 1027 pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1028
1029 memset(&sio, 0, sizeof(struct serial_struct));
b4eda9cb
AC		 1030
1031 mutex_lock(&portp->port.mutex);
1da177e4
LT		 1032 sio.line = portp->portnr;
1033 sio.port = portp->ioaddr;
f8ae4764 1034 sio.flags = portp->port.flags;
1da177e4
LT		 1035 sio.baud_base = portp->baud_base;
1036 sio.close_delay = portp->close_delay;
1037 sio.closing_wait = portp->closing_wait;
1038 sio.custom_divisor = portp->custom_divisor;
1039 sio.hub6 = 0;
1040 if (portp->uartp == &stl_cd1400uart) {
1041 sio.type = PORT_CIRRUS;
1042 sio.xmit_fifo_size = CD1400_TXFIFOSIZE;
1043 } else {
1044 sio.type = PORT_UNKNOWN;
1045 sio.xmit_fifo_size = SC26198_TXFIFOSIZE;
1046 }
1047
1048 brdp = stl_brds[portp->brdnr];
615e4a71 1049 if (brdp != NULL)
1da177e4 1050 sio.irq = brdp->irq;
b4eda9cb 1051 mutex_unlock(&portp->port.mutex);
1da177e4
LT		 1052
1053 return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0;
1054}
1055
1056/*****************************************************************************/
1057
1058/*
1059 * Set port according to the serial struct info.
1060 * At this point we do not do any auto-configure stuff, so we will
1061 * just quietly ignore any requests to change irq, etc.
1062 */
1063
d18a750f 1064static int stl_setserial(struct tty_struct *tty, struct serial_struct __user *sp)
1da177e4 1065{
d18a750f 1066 struct stlport * portp = tty->driver_data;
1da177e4
LT		 1067 struct serial_struct sio;
1068
a0564e14 1069 pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1070
1071 if (copy_from_user(&sio, sp, sizeof(struct serial_struct)))
1072 return -EFAULT;
b4eda9cb 1073 mutex_lock(&portp->port.mutex);
1da177e4
LT		 1074 if (!capable(CAP_SYS_ADMIN)) {
1075 if ((sio.baud_base != portp->baud_base) ||
1076 (sio.close_delay != portp->close_delay) ||
1077 ((sio.flags & ~ASYNC_USR_MASK) !=
b4eda9cb
AC		 1078 (portp->port.flags & ~ASYNC_USR_MASK))) {
1079 mutex_unlock(&portp->port.mutex);
014c2544 1080 return -EPERM;
b4eda9cb 1081 }
1da177e4
LT		 1082 }
1083
f8ae4764 1084 portp->port.flags = (portp->port.flags & ~ASYNC_USR_MASK) |
1da177e4
LT		 1085 (sio.flags & ASYNC_USR_MASK);
1086 portp->baud_base = sio.baud_base;
1087 portp->close_delay = sio.close_delay;
1088 portp->closing_wait = sio.closing_wait;
1089 portp->custom_divisor = sio.custom_divisor;
b4eda9cb 1090 mutex_unlock(&portp->port.mutex);
d18a750f 1091 stl_setport(portp, tty->termios);
014c2544 1092 return 0;
1da177e4
LT		 1093}
1094
1095/*****************************************************************************/
1096
1097static int stl_tiocmget(struct tty_struct *tty, struct file *file)
1098{
ca7ed0f2 1099 struct stlport *portp;
1da177e4 1100
1da177e4 1101 portp = tty->driver_data;
615e4a71 1102 if (portp == NULL)
014c2544 1103 return -ENODEV;
1da177e4 1104 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1105 return -EIO;
1da177e4
LT		 1106
1107 return stl_getsignals(portp);
1108}
1109
1110static int stl_tiocmset(struct tty_struct *tty, struct file *file,
1111 unsigned int set, unsigned int clear)
1112{
ca7ed0f2 1113 struct stlport *portp;
1da177e4
LT		 1114 int rts = -1, dtr = -1;
1115
1da177e4 1116 portp = tty->driver_data;
615e4a71 1117 if (portp == NULL)
014c2544 1118 return -ENODEV;
1da177e4 1119 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1120 return -EIO;
1da177e4
LT		 1121
1122 if (set & TIOCM_RTS)
1123 rts = 1;
1124 if (set & TIOCM_DTR)
1125 dtr = 1;
1126 if (clear & TIOCM_RTS)
1127 rts = 0;
1128 if (clear & TIOCM_DTR)
1129 dtr = 0;
1130
1131 stl_setsignals(portp, dtr, rts);
1132 return 0;
1133}
1134
1135static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1136{
ca7ed0f2 1137 struct stlport *portp;
1da177e4
LT		 1138 int rc;
1139 void __user *argp = (void __user *)arg;
1140
a0564e14
JS		 1141 pr_debug("stl_ioctl(tty=%p,file=%p,cmd=%x,arg=%lx)\n", tty, file, cmd,
1142 arg);
1da177e4 1143
1da177e4 1144 portp = tty->driver_data;
615e4a71 1145 if (portp == NULL)
014c2544 1146 return -ENODEV;
1da177e4
LT		 1147
1148 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
c62429d9 1149 (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS))
1da177e4 1150 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1151 return -EIO;
1da177e4
LT		 1152
1153 rc = 0;
1154
1155 switch (cmd) {
1da177e4
LT		 1156 case TIOCGSERIAL:
1157 rc = stl_getserial(portp, argp);
1158 break;
1159 case TIOCSSERIAL:
d18a750f 1160 rc = stl_setserial(tty, argp);
1da177e4
LT		 1161 break;
1162 case COM_GETPORTSTATS:
d18a750f 1163 rc = stl_getportstats(tty, portp, argp);
1da177e4
LT		 1164 break;
1165 case COM_CLRPORTSTATS:
1166 rc = stl_clrportstats(portp, argp);
1167 break;
1168 case TIOCSERCONFIG:
1169 case TIOCSERGWILD:
1170 case TIOCSERSWILD:
1171 case TIOCSERGETLSR:
1172 case TIOCSERGSTRUCT:
1173 case TIOCSERGETMULTI:
1174 case TIOCSERSETMULTI:
1175 default:
1176 rc = -ENOIOCTLCMD;
1177 break;
1178 }
014c2544 1179 return rc;
1da177e4
LT		 1180}
1181
1182/*****************************************************************************/
1183
96b066b8
JS		 1184/*
1185 * Start the transmitter again. Just turn TX interrupts back on.
1186 */
1187
1188static void stl_start(struct tty_struct *tty)
1189{
1190 struct stlport *portp;
1191
1192 pr_debug("stl_start(tty=%p)\n", tty);
1193
96b066b8
JS		 1194 portp = tty->driver_data;
1195 if (portp == NULL)
1196 return;
1197 stl_startrxtx(portp, -1, 1);
1198}
1199
1200/*****************************************************************************/
1201
606d099c 1202static void stl_settermios(struct tty_struct *tty, struct ktermios *old)
1da177e4 1203{
ca7ed0f2 1204 struct stlport *portp;
606d099c 1205 struct ktermios *tiosp;
1da177e4 1206
a0564e14 1207 pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old);
1da177e4 1208
1da177e4 1209 portp = tty->driver_data;
615e4a71 1210 if (portp == NULL)
1da177e4
LT		 1211 return;
1212
1213 tiosp = tty->termios;
1214 if ((tiosp->c_cflag == old->c_cflag) &&
1215 (tiosp->c_iflag == old->c_iflag))
1216 return;
1217
1218 stl_setport(portp, tiosp);
1219 stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0),
1220 -1);
1221 if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) {
1222 tty->hw_stopped = 0;
1223 stl_start(tty);
1224 }
1225 if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL))
f8ae4764 1226 wake_up_interruptible(&portp->port.open_wait);
1da177e4
LT		 1227}
1228
1229/*****************************************************************************/
1230
1231/*
1232 * Attempt to flow control who ever is sending us data. Based on termios
1233 * settings use software or/and hardware flow control.
1234 */
1235
1236static void stl_throttle(struct tty_struct *tty)
1237{
ca7ed0f2 1238 struct stlport *portp;
1da177e4 1239
a0564e14 1240 pr_debug("stl_throttle(tty=%p)\n", tty);
1da177e4 1241
1da177e4 1242 portp = tty->driver_data;
615e4a71 1243 if (portp == NULL)
1da177e4
LT		 1244 return;
1245 stl_flowctrl(portp, 0);
1246}
1247
1248/*****************************************************************************/
1249
1250/*
1251 * Unflow control the device sending us data...
1252 */
1253
1254static void stl_unthrottle(struct tty_struct *tty)
1255{
ca7ed0f2 1256 struct stlport *portp;
1da177e4 1257
a0564e14 1258 pr_debug("stl_unthrottle(tty=%p)\n", tty);
1da177e4 1259
1da177e4 1260 portp = tty->driver_data;
615e4a71 1261 if (portp == NULL)
1da177e4
LT		 1262 return;
1263 stl_flowctrl(portp, 1);
1264}
1265
1266/*****************************************************************************/
1267
1268/*
1269 * Stop the transmitter. Basically to do this we will just turn TX
1270 * interrupts off.
1271 */
1272
1273static void stl_stop(struct tty_struct *tty)
1274{
ca7ed0f2 1275 struct stlport *portp;
1da177e4 1276
a0564e14 1277 pr_debug("stl_stop(tty=%p)\n", tty);
1da177e4 1278
1da177e4 1279 portp = tty->driver_data;
615e4a71 1280 if (portp == NULL)
1da177e4
LT		 1281 return;
1282 stl_startrxtx(portp, -1, 0);
1283}
1284
1285/*****************************************************************************/
1286
1da177e4
LT		 1287/*
1288 * Hangup this port. This is pretty much like closing the port, only
1289 * a little more brutal. No waiting for data to drain. Shutdown the
1290 * port and maybe drop signals.
1291 */
1292
1293static void stl_hangup(struct tty_struct *tty)
1294{
047e9658 1295 struct stlport *portp = tty->driver_data;
a0564e14 1296 pr_debug("stl_hangup(tty=%p)\n", tty);
1da177e4 1297
615e4a71 1298 if (portp == NULL)
1da177e4 1299 return;
047e9658 1300 tty_port_hangup(&portp->port);
1da177e4
LT		 1301}
1302
1303/*****************************************************************************/
1304
4a561222 1305static int stl_breakctl(struct tty_struct *tty, int state)
1da177e4 1306{
ca7ed0f2 1307 struct stlport *portp;
1da177e4 1308
a0564e14 1309 pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state);
1da177e4 1310
1da177e4 1311 portp = tty->driver_data;
615e4a71 1312 if (portp == NULL)
4a561222 1313 return -EINVAL;
1da177e4
LT		 1314
1315 stl_sendbreak(portp, ((state == -1) ? 1 : 2));
4a561222 1316 return 0;
1da177e4
LT		 1317}
1318
1319/*****************************************************************************/
1320
1da177e4
LT		 1321static void stl_sendxchar(struct tty_struct *tty, char ch)
1322{
ca7ed0f2 1323 struct stlport *portp;
1da177e4 1324
a0564e14 1325 pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1326
1da177e4 1327 portp = tty->driver_data;
615e4a71 1328 if (portp == NULL)
1da177e4
LT		 1329 return;
1330
1331 if (ch == STOP_CHAR(tty))
1332 stl_sendflow(portp, 0);
1333 else if (ch == START_CHAR(tty))
1334 stl_sendflow(portp, 1);
1335 else
1336 stl_putchar(tty, ch);
1337}
1338
8561c44c 1339static void stl_portinfo(struct seq_file *m, struct stlport *portp, int portnr)
1da177e4 1340{
8561c44c
AD		 1341 int sigs;
1342 char sep;
1da177e4 1343
8561c44c 1344 seq_printf(m, "%d: uart:%s tx:%d rx:%d",
1da177e4
LT		 1345 portnr, (portp->hwid == 1) ? "SC26198" : "CD1400",
1346 (int) portp->stats.txtotal, (int) portp->stats.rxtotal);
1347
1348 if (portp->stats.rxframing)
8561c44c 1349 seq_printf(m, " fe:%d", (int) portp->stats.rxframing);
1da177e4 1350 if (portp->stats.rxparity)
8561c44c 1351 seq_printf(m, " pe:%d", (int) portp->stats.rxparity);
1da177e4 1352 if (portp->stats.rxbreaks)
8561c44c 1353 seq_printf(m, " brk:%d", (int) portp->stats.rxbreaks);
1da177e4 1354 if (portp->stats.rxoverrun)
8561c44c 1355 seq_printf(m, " oe:%d", (int) portp->stats.rxoverrun);
1da177e4
LT		 1356
1357 sigs = stl_getsignals(portp);
8561c44c
AD		 1358 sep = ' ';
1359 if (sigs & TIOCM_RTS) {
1360 seq_printf(m, "%c%s", sep, "RTS");
1361 sep = '|';
1362 }
1363 if (sigs & TIOCM_CTS) {
1364 seq_printf(m, "%c%s", sep, "CTS");
1365 sep = '|';
1366 }
1367 if (sigs & TIOCM_DTR) {
1368 seq_printf(m, "%c%s", sep, "DTR");
1369 sep = '|';
1370 }
1371 if (sigs & TIOCM_CD) {
1372 seq_printf(m, "%c%s", sep, "DCD");
1373 sep = '|';
1374 }
1375 if (sigs & TIOCM_DSR) {
1376 seq_printf(m, "%c%s", sep, "DSR");
1377 sep = '|';
1378 }
1379 seq_putc(m, '\n');
1da177e4
LT		 1380}
1381
1382/*****************************************************************************/
1383
1384/*
1385 * Port info, read from the /proc file system.
1386 */
1387
8561c44c 1388static int stl_proc_show(struct seq_file *m, void *v)
1da177e4 1389{
ca7ed0f2
JS		 1390 struct stlbrd *brdp;
1391 struct stlpanel *panelp;
1392 struct stlport *portp;
6b2c9457 1393 unsigned int brdnr, panelnr, portnr;
8561c44c 1394 int totalport;
1da177e4 1395
1da177e4 1396 totalport = 0;
8561c44c
AD		 1397
1398 seq_printf(m, "%s: version %s\n", stl_drvtitle, stl_drvversion);
1da177e4
LT		 1399
1400/*
1401 * We scan through for each board, panel and port. The offset is
1402 * calculated on the fly, and irrelevant ports are skipped.
1403 */
c62429d9 1404 for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) {
1da177e4 1405 brdp = stl_brds[brdnr];
615e4a71 1406 if (brdp == NULL)
1da177e4
LT		 1407 continue;
1408 if (brdp->state == 0)
1409 continue;
1410
1da177e4 1411 totalport = brdnr * STL_MAXPORTS;
c62429d9 1412 for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) {
1da177e4 1413 panelp = brdp->panels[panelnr];
615e4a71 1414 if (panelp == NULL)
1da177e4
LT		 1415 continue;
1416
c62429d9 1417 for (portnr = 0; portnr < panelp->nrports; portnr++,
1da177e4
LT		 1418 totalport++) {
1419 portp = panelp->ports[portnr];
615e4a71 1420 if (portp == NULL)
1da177e4 1421 continue;
8561c44c 1422 stl_portinfo(m, portp, totalport);
1da177e4
LT		 1423 }
1424 }
1425 }
8561c44c
AD		 1426 return 0;
1427}
1da177e4 1428
8561c44c
AD		 1429static int stl_proc_open(struct inode *inode, struct file *file)
1430{
1431 return single_open(file, stl_proc_show, NULL);
1da177e4
LT		 1432}
1433
8561c44c
AD		 1434static const struct file_operations stl_proc_fops = {
1435 .owner = THIS_MODULE,
1436 .open = stl_proc_open,
1437 .read = seq_read,
1438 .llseek = seq_lseek,
1439 .release = single_release,
1440};
1441
1da177e4
LT		 1442/*****************************************************************************/
1443
1444/*
1445 * All board interrupts are vectored through here first. This code then
1446 * calls off to the approrpriate board interrupt handlers.
1447 */
1448
7d12e780 1449static irqreturn_t stl_intr(int irq, void *dev_id)
1da177e4 1450{
ca7ed0f2 1451 struct stlbrd *brdp = dev_id;
1da177e4 1452
a6f97b29 1453 pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, brdp->irq);
1da177e4
LT		 1454
1455 return IRQ_RETVAL((* brdp->isr)(brdp));
1456}
1457
1458/*****************************************************************************/
1459
1460/*
1461 * Interrupt service routine for EasyIO board types.
1462 */
1463
ca7ed0f2 1464static int stl_eiointr(struct stlbrd *brdp)
1da177e4 1465{
ca7ed0f2 1466 struct stlpanel *panelp;
1da177e4
LT		 1467 unsigned int iobase;
1468 int handled = 0;
1469
b65b5b59 1470 spin_lock(&brd_lock);
1da177e4
LT		 1471 panelp = brdp->panels[0];
1472 iobase = panelp->iobase;
1473 while (inb(brdp->iostatus) & EIO_INTRPEND) {
1474 handled = 1;
1475 (* panelp->isr)(panelp, iobase);
1476 }
b65b5b59 1477 spin_unlock(&brd_lock);
1da177e4
LT		 1478 return handled;
1479}
1480
1481/*****************************************************************************/
1482
1483/*
1484 * Interrupt service routine for ECH-AT board types.
1485 */
1486
ca7ed0f2 1487static int stl_echatintr(struct stlbrd *brdp)
1da177e4 1488{
ca7ed0f2 1489 struct stlpanel *panelp;
6b2c9457 1490 unsigned int ioaddr, bnknr;
1da177e4
LT		 1491 int handled = 0;
1492
1493 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1494
1495 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1496 handled = 1;
c62429d9 1497 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1498 ioaddr = brdp->bnkstataddr[bnknr];
1499 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1500 panelp = brdp->bnk2panel[bnknr];
1501 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1502 }
1503 }
1504 }
1505
1506 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
1507
1508 return handled;
1509}
1510
1511/*****************************************************************************/
1512
1513/*
1514 * Interrupt service routine for ECH-MCA board types.
1515 */
1516
ca7ed0f2 1517static int stl_echmcaintr(struct stlbrd *brdp)
1da177e4 1518{
ca7ed0f2 1519 struct stlpanel *panelp;
6b2c9457 1520 unsigned int ioaddr, bnknr;
1da177e4
LT		 1521 int handled = 0;
1522
1523 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1524 handled = 1;
c62429d9 1525 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1526 ioaddr = brdp->bnkstataddr[bnknr];
1527 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1528 panelp = brdp->bnk2panel[bnknr];
1529 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1530 }
1531 }
1532 }
1533 return handled;
1534}
1535
1536/*****************************************************************************/
1537
1538/*
1539 * Interrupt service routine for ECH-PCI board types.
1540 */
1541
ca7ed0f2 1542static int stl_echpciintr(struct stlbrd *brdp)
1da177e4 1543{
ca7ed0f2 1544 struct stlpanel *panelp;
6b2c9457 1545 unsigned int ioaddr, bnknr, recheck;
1da177e4
LT		 1546 int handled = 0;
1547
1548 while (1) {
1549 recheck = 0;
c62429d9 1550 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1551 outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl);
1552 ioaddr = brdp->bnkstataddr[bnknr];
1553 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1554 panelp = brdp->bnk2panel[bnknr];
1555 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1556 recheck++;
1557 handled = 1;
1558 }
1559 }
1560 if (! recheck)
1561 break;
1562 }
1563 return handled;
1564}
1565
1566/*****************************************************************************/
1567
1568/*
1569 * Interrupt service routine for ECH-8/64-PCI board types.
1570 */
1571
ca7ed0f2 1572static int stl_echpci64intr(struct stlbrd *brdp)
1da177e4 1573{
ca7ed0f2 1574 struct stlpanel *panelp;
6b2c9457 1575 unsigned int ioaddr, bnknr;
1da177e4
LT		 1576 int handled = 0;
1577
1578 while (inb(brdp->ioctrl) & 0x1) {
1579 handled = 1;
c62429d9 1580 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1581 ioaddr = brdp->bnkstataddr[bnknr];
1582 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1583 panelp = brdp->bnk2panel[bnknr];
1584 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1585 }
1586 }
1587 }
1588
1589 return handled;
1590}
1591
1592/*****************************************************************************/
1593
1da177e4
LT		 1594/*
1595 * Initialize all the ports on a panel.
1596 */
1597
705c1862 1598static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4 1599{
6b2c9457
JS		 1600 struct stlport *portp;
1601 unsigned int i;
1602 int chipmask;
1da177e4 1603
a0564e14 1604 pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 1605
1606 chipmask = stl_panelinit(brdp, panelp);
1607
1608/*
1609 * All UART's are initialized (if found!). Now go through and setup
1610 * each ports data structures.
1611 */
c62429d9 1612 for (i = 0; i < panelp->nrports; i++) {
ca7ed0f2 1613 portp = kzalloc(sizeof(struct stlport), GFP_KERNEL);
b0b4ed72 1614 if (!portp) {
1da177e4 1615 printk("STALLION: failed to allocate memory "
ca7ed0f2 1616 "(size=%Zd)\n", sizeof(struct stlport));
1da177e4
LT		 1617 break;
1618 }
d18a750f 1619 tty_port_init(&portp->port);
31f35939 1620 portp->port.ops = &stl_port_ops;
1da177e4
LT		 1621 portp->magic = STL_PORTMAGIC;
1622 portp->portnr = i;
1623 portp->brdnr = panelp->brdnr;
1624 portp->panelnr = panelp->panelnr;
1625 portp->uartp = panelp->uartp;
1626 portp->clk = brdp->clk;
1627 portp->baud_base = STL_BAUDBASE;
1628 portp->close_delay = STL_CLOSEDELAY;
1629 portp->closing_wait = 30 * HZ;
f8ae4764
AC		 1630 init_waitqueue_head(&portp->port.open_wait);
1631 init_waitqueue_head(&portp->port.close_wait);
1da177e4
LT		 1632 portp->stats.brd = portp->brdnr;
1633 portp->stats.panel = portp->panelnr;
1634 portp->stats.port = portp->portnr;
1635 panelp->ports[i] = portp;
1636 stl_portinit(brdp, panelp, portp);
1637 }
1638
c62429d9 1639 return 0;
1da177e4
LT		 1640}
1641
3b85b341
JS		 1642static void stl_cleanup_panels(struct stlbrd *brdp)
1643{
1644 struct stlpanel *panelp;
1645 struct stlport *portp;
1646 unsigned int j, k;
d18a750f 1647 struct tty_struct *tty;
3b85b341
JS		 1648
1649 for (j = 0; j < STL_MAXPANELS; j++) {
1650 panelp = brdp->panels[j];
1651 if (panelp == NULL)
1652 continue;
1653 for (k = 0; k < STL_PORTSPERPANEL; k++) {
1654 portp = panelp->ports[k];
1655 if (portp == NULL)
1656 continue;
d18a750f
AC		 1657 tty = tty_port_tty_get(&portp->port);
1658 if (tty != NULL) {
1659 stl_hangup(tty);
1660 tty_kref_put(tty);
1661 }
3b85b341
JS		 1662 kfree(portp->tx.buf);
1663 kfree(portp);
1664 }
1665 kfree(panelp);
1666 }
1667}
1668
1da177e4
LT		 1669/*****************************************************************************/
1670
1671/*
1672 * Try to find and initialize an EasyIO board.
1673 */
1674
705c1862 1675static int __devinit stl_initeio(struct stlbrd *brdp)
1da177e4 1676{
ca7ed0f2 1677 struct stlpanel *panelp;
1da177e4
LT		 1678 unsigned int status;
1679 char *name;
3b85b341 1680 int retval;
1da177e4 1681
a0564e14 1682 pr_debug("stl_initeio(brdp=%p)\n", brdp);
1da177e4
LT		 1683
1684 brdp->ioctrl = brdp->ioaddr1 + 1;
1685 brdp->iostatus = brdp->ioaddr1 + 2;
1686
1687 status = inb(brdp->iostatus);
1688 if ((status & EIO_IDBITMASK) == EIO_MK3)
1689 brdp->ioctrl++;
1690
1691/*
1692 * Handle board specific stuff now. The real difference is PCI
1693 * or not PCI.
1694 */
1695 if (brdp->brdtype == BRD_EASYIOPCI) {
1696 brdp->iosize1 = 0x80;
1697 brdp->iosize2 = 0x80;
1698 name = "serial(EIO-PCI)";
1699 outb(0x41, (brdp->ioaddr2 + 0x4c));
1700 } else {
1701 brdp->iosize1 = 8;
1702 name = "serial(EIO)";
1703 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1704 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1705 printk("STALLION: invalid irq=%d for brd=%d\n",
1706 brdp->irq, brdp->brdnr);
3b85b341
JS		 1707 retval = -EINVAL;
1708 goto err;
1da177e4
LT		 1709 }
1710 outb((stl_vecmap[brdp->irq] | EIO_0WS |
1711 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)),
1712 brdp->ioctrl);
1713 }
1714
3b85b341 1715 retval = -EBUSY;
1da177e4
LT		 1716 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1717 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1718 "%x conflicts with another device\n", brdp->brdnr,
1719 brdp->ioaddr1);
3b85b341 1720 goto err;
1da177e4
LT		 1721 }
1722
1723 if (brdp->iosize2 > 0)
1724 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1725 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1726 "address %x conflicts with another device\n",
1727 brdp->brdnr, brdp->ioaddr2);
1728 printk(KERN_WARNING "STALLION: Warning, also "
1729 "releasing board %d I/O address %x \n",
1730 brdp->brdnr, brdp->ioaddr1);
3b85b341 1731 goto err_rel1;
1da177e4
LT		 1732 }
1733
1734/*
1735 * Everything looks OK, so let's go ahead and probe for the hardware.
1736 */
1737 brdp->clk = CD1400_CLK;
1738 brdp->isr = stl_eiointr;
1739
3b85b341 1740 retval = -ENODEV;
1da177e4
LT		 1741 switch (status & EIO_IDBITMASK) {
1742 case EIO_8PORTM:
1743 brdp->clk = CD1400_CLK8M;
1744 /* fall thru */
1745 case EIO_8PORTRS:
1746 case EIO_8PORTDI:
1747 brdp->nrports = 8;
1748 break;
1749 case EIO_4PORTRS:
1750 brdp->nrports = 4;
1751 break;
1752 case EIO_MK3:
1753 switch (status & EIO_BRDMASK) {
1754 case ID_BRD4:
1755 brdp->nrports = 4;
1756 break;
1757 case ID_BRD8:
1758 brdp->nrports = 8;
1759 break;
1760 case ID_BRD16:
1761 brdp->nrports = 16;
1762 break;
1763 default:
3b85b341 1764 goto err_rel2;
1da177e4
LT		 1765 }
1766 break;
1767 default:
3b85b341 1768 goto err_rel2;
1da177e4
LT		 1769 }
1770
1771/*
1772 * We have verified that the board is actually present, so now we
1773 * can complete the setup.
1774 */
1775
ca7ed0f2 1776 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1777 if (!panelp) {
1da177e4 1778 printk(KERN_WARNING "STALLION: failed to allocate memory "
ca7ed0f2 1779 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341
JS		 1780 retval = -ENOMEM;
1781 goto err_rel2;
1da177e4 1782 }
1da177e4
LT		 1783
1784 panelp->magic = STL_PANELMAGIC;
1785 panelp->brdnr = brdp->brdnr;
1786 panelp->panelnr = 0;
1787 panelp->nrports = brdp->nrports;
1788 panelp->iobase = brdp->ioaddr1;
1789 panelp->hwid = status;
1790 if ((status & EIO_IDBITMASK) == EIO_MK3) {
615e4a71 1791 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 1792 panelp->isr = stl_sc26198intr;
1793 } else {
615e4a71 1794 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 1795 panelp->isr = stl_cd1400eiointr;
1796 }
1797
1798 brdp->panels[0] = panelp;
1799 brdp->nrpanels = 1;
1800 brdp->state |= BRD_FOUND;
1801 brdp->hwid = status;
0f2ed4c6 1802 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 1803 printk("STALLION: failed to register interrupt "
1804 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 1805 retval = -ENODEV;
1806 goto err_fr;
1da177e4 1807 }
3b85b341
JS		 1808
1809 return 0;
1810err_fr:
1811 stl_cleanup_panels(brdp);
1812err_rel2:
1813 if (brdp->iosize2 > 0)
1814 release_region(brdp->ioaddr2, brdp->iosize2);
1815err_rel1:
1816 release_region(brdp->ioaddr1, brdp->iosize1);
1817err:
1818 return retval;
1da177e4
LT		 1819}
1820
1821/*****************************************************************************/
1822
1823/*
1824 * Try to find an ECH board and initialize it. This code is capable of
1825 * dealing with all types of ECH board.
1826 */
1827
705c1862 1828static int __devinit stl_initech(struct stlbrd *brdp)
1da177e4 1829{
ca7ed0f2 1830 struct stlpanel *panelp;
6b2c9457
JS		 1831 unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i;
1832 int retval;
1da177e4
LT		 1833 char *name;
1834
a0564e14 1835 pr_debug("stl_initech(brdp=%p)\n", brdp);
1da177e4
LT		 1836
1837 status = 0;
1838 conflict = 0;
1839
1840/*
1841 * Set up the initial board register contents for boards. This varies a
1842 * bit between the different board types. So we need to handle each
1843 * separately. Also do a check that the supplied IRQ is good.
1844 */
1845 switch (brdp->brdtype) {
1846
1847 case BRD_ECH:
1848 brdp->isr = stl_echatintr;
1849 brdp->ioctrl = brdp->ioaddr1 + 1;
1850 brdp->iostatus = brdp->ioaddr1 + 1;
1851 status = inb(brdp->iostatus);
3b85b341
JS		 1852 if ((status & ECH_IDBITMASK) != ECH_ID) {
1853 retval = -ENODEV;
1854 goto err;
1855 }
1da177e4
LT		 1856 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1857 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1858 printk("STALLION: invalid irq=%d for brd=%d\n",
1859 brdp->irq, brdp->brdnr);
3b85b341
JS		 1860 retval = -EINVAL;
1861 goto err;
1da177e4
LT		 1862 }
1863 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
1864 status |= (stl_vecmap[brdp->irq] << 1);
1865 outb((status | ECH_BRDRESET), brdp->ioaddr1);
1866 brdp->ioctrlval = ECH_INTENABLE |
1867 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
c62429d9 1868 for (i = 0; i < 10; i++)
1da177e4
LT		 1869 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1870 brdp->iosize1 = 2;
1871 brdp->iosize2 = 32;
1872 name = "serial(EC8/32)";
1873 outb(status, brdp->ioaddr1);
1874 break;
1875
1876 case BRD_ECHMC:
1877 brdp->isr = stl_echmcaintr;
1878 brdp->ioctrl = brdp->ioaddr1 + 0x20;
1879 brdp->iostatus = brdp->ioctrl;
1880 status = inb(brdp->iostatus);
3b85b341
JS		 1881 if ((status & ECH_IDBITMASK) != ECH_ID) {
1882 retval = -ENODEV;
1883 goto err;
1884 }
1da177e4
LT		 1885 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1886 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1887 printk("STALLION: invalid irq=%d for brd=%d\n",
1888 brdp->irq, brdp->brdnr);
3b85b341
JS		 1889 retval = -EINVAL;
1890 goto err;
1da177e4
LT		 1891 }
1892 outb(ECHMC_BRDRESET, brdp->ioctrl);
1893 outb(ECHMC_INTENABLE, brdp->ioctrl);
1894 brdp->iosize1 = 64;
1895 name = "serial(EC8/32-MC)";
1896 break;
1897
1898 case BRD_ECHPCI:
1899 brdp->isr = stl_echpciintr;
1900 brdp->ioctrl = brdp->ioaddr1 + 2;
1901 brdp->iosize1 = 4;
1902 brdp->iosize2 = 8;
1903 name = "serial(EC8/32-PCI)";
1904 break;
1905
1906 case BRD_ECH64PCI:
1907 brdp->isr = stl_echpci64intr;
1908 brdp->ioctrl = brdp->ioaddr2 + 0x40;
1909 outb(0x43, (brdp->ioaddr1 + 0x4c));
1910 brdp->iosize1 = 0x80;
1911 brdp->iosize2 = 0x80;
1912 name = "serial(EC8/64-PCI)";
1913 break;
1914
1915 default:
1916 printk("STALLION: unknown board type=%d\n", brdp->brdtype);
3b85b341
JS		 1917 retval = -EINVAL;
1918 goto err;
1da177e4
LT		 1919 }
1920
1921/*
1922 * Check boards for possible IO address conflicts and return fail status
1923 * if an IO conflict found.
1924 */
3b85b341 1925 retval = -EBUSY;
1da177e4
LT		 1926 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1927 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1928 "%x conflicts with another device\n", brdp->brdnr,
1929 brdp->ioaddr1);
3b85b341 1930 goto err;
1da177e4
LT		 1931 }
1932
1933 if (brdp->iosize2 > 0)
1934 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1935 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1936 "address %x conflicts with another device\n",
1937 brdp->brdnr, brdp->ioaddr2);
1938 printk(KERN_WARNING "STALLION: Warning, also "
1939 "releasing board %d I/O address %x \n",
1940 brdp->brdnr, brdp->ioaddr1);
3b85b341 1941 goto err_rel1;
1da177e4
LT		 1942 }
1943
1944/*
1945 * Scan through the secondary io address space looking for panels.
1946 * As we find'em allocate and initialize panel structures for each.
1947 */
1948 brdp->clk = CD1400_CLK;
1949 brdp->hwid = status;
1950
1951 ioaddr = brdp->ioaddr2;
1952 banknr = 0;
1953 panelnr = 0;
1954 nxtid = 0;
1955
c62429d9 1956 for (i = 0; i < STL_MAXPANELS; i++) {
1da177e4
LT		 1957 if (brdp->brdtype == BRD_ECHPCI) {
1958 outb(nxtid, brdp->ioctrl);
1959 ioaddr = brdp->ioaddr2;
1960 }
1961 status = inb(ioaddr + ECH_PNLSTATUS);
1962 if ((status & ECH_PNLIDMASK) != nxtid)
64834b22 1963 break;
ca7ed0f2 1964 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1965 if (!panelp) {
1da177e4 1966 printk("STALLION: failed to allocate memory "
ca7ed0f2 1967 "(size=%Zd)\n", sizeof(struct stlpanel));
49277b1c 1968 retval = -ENOMEM;
3b85b341 1969 goto err_fr;
1da177e4 1970 }
1da177e4
LT		 1971 panelp->magic = STL_PANELMAGIC;
1972 panelp->brdnr = brdp->brdnr;
1973 panelp->panelnr = panelnr;
1974 panelp->iobase = ioaddr;
1975 panelp->pagenr = nxtid;
1976 panelp->hwid = status;
1977 brdp->bnk2panel[banknr] = panelp;
1978 brdp->bnkpageaddr[banknr] = nxtid;
1979 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
1980
1981 if (status & ECH_PNLXPID) {
615e4a71 1982 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 1983 panelp->isr = stl_sc26198intr;
1984 if (status & ECH_PNL16PORT) {
1985 panelp->nrports = 16;
1986 brdp->bnk2panel[banknr] = panelp;
1987 brdp->bnkpageaddr[banknr] = nxtid;
1988 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
1989 ECH_PNLSTATUS;
c62429d9 1990 } else
1da177e4 1991 panelp->nrports = 8;
1da177e4 1992 } else {
615e4a71 1993 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 1994 panelp->isr = stl_cd1400echintr;
1995 if (status & ECH_PNL16PORT) {
1996 panelp->nrports = 16;
1997 panelp->ackmask = 0x80;
1998 if (brdp->brdtype != BRD_ECHPCI)
1999 ioaddr += EREG_BANKSIZE;
2000 brdp->bnk2panel[banknr] = panelp;
2001 brdp->bnkpageaddr[banknr] = ++nxtid;
2002 brdp->bnkstataddr[banknr++] = ioaddr +
2003 ECH_PNLSTATUS;
2004 } else {
2005 panelp->nrports = 8;
2006 panelp->ackmask = 0xc0;
2007 }
2008 }
2009
2010 nxtid++;
2011 ioaddr += EREG_BANKSIZE;
2012 brdp->nrports += panelp->nrports;
2013 brdp->panels[panelnr++] = panelp;
2014 if ((brdp->brdtype != BRD_ECHPCI) &&
49277b1c
JS		 2015 (ioaddr >= (brdp->ioaddr2 + brdp->iosize2))) {
2016 retval = -EINVAL;
3b85b341 2017 goto err_fr;
49277b1c 2018 }
1da177e4
LT		 2019 }
2020
2021 brdp->nrpanels = panelnr;
2022 brdp->nrbnks = banknr;
2023 if (brdp->brdtype == BRD_ECH)
2024 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2025
2026 brdp->state |= BRD_FOUND;
0f2ed4c6 2027 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2028 printk("STALLION: failed to register interrupt "
2029 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2030 retval = -ENODEV;
2031 goto err_fr;
1da177e4
LT		 2032 }
2033
3b85b341
JS		 2034 return 0;
2035err_fr:
2036 stl_cleanup_panels(brdp);
2037 if (brdp->iosize2 > 0)
2038 release_region(brdp->ioaddr2, brdp->iosize2);
2039err_rel1:
2040 release_region(brdp->ioaddr1, brdp->iosize1);
2041err:
2042 return retval;
1da177e4
LT		 2043}
2044
2045/*****************************************************************************/
2046
2047/*
2048 * Initialize and configure the specified board.
2049 * Scan through all the boards in the configuration and see what we
2050 * can find. Handle EIO and the ECH boards a little differently here
2051 * since the initial search and setup is very different.
2052 */
2053
705c1862 2054static int __devinit stl_brdinit(struct stlbrd *brdp)
1da177e4 2055{
3b85b341 2056 int i, retval;
1da177e4 2057
a0564e14 2058 pr_debug("stl_brdinit(brdp=%p)\n", brdp);
1da177e4
LT		 2059
2060 switch (brdp->brdtype) {
2061 case BRD_EASYIO:
2062 case BRD_EASYIOPCI:
3b85b341
JS		 2063 retval = stl_initeio(brdp);
2064 if (retval)
2065 goto err;
1da177e4
LT		 2066 break;
2067 case BRD_ECH:
2068 case BRD_ECHMC:
2069 case BRD_ECHPCI:
2070 case BRD_ECH64PCI:
3b85b341
JS		 2071 retval = stl_initech(brdp);
2072 if (retval)
2073 goto err;
1da177e4
LT		 2074 break;
2075 default:
2076 printk("STALLION: board=%d is unknown board type=%d\n",
2077 brdp->brdnr, brdp->brdtype);
3b85b341
JS		 2078 retval = -ENODEV;
2079 goto err;
1da177e4
LT		 2080 }
2081
1da177e4
LT		 2082 if ((brdp->state & BRD_FOUND) == 0) {
2083 printk("STALLION: %s board not found, board=%d io=%x irq=%d\n",
2084 stl_brdnames[brdp->brdtype], brdp->brdnr,
2085 brdp->ioaddr1, brdp->irq);
3b85b341 2086 goto err_free;
1da177e4
LT		 2087 }
2088
c62429d9 2089 for (i = 0; i < STL_MAXPANELS; i++)
615e4a71 2090 if (brdp->panels[i] != NULL)
1da177e4
LT		 2091 stl_initports(brdp, brdp->panels[i]);
2092
2093 printk("STALLION: %s found, board=%d io=%x irq=%d "
2094 "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype],
2095 brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels,
2096 brdp->nrports);
3b85b341
JS		 2097
2098 return 0;
2099err_free:
2100 free_irq(brdp->irq, brdp);
2101
2102 stl_cleanup_panels(brdp);
2103
2104 release_region(brdp->ioaddr1, brdp->iosize1);
2105 if (brdp->iosize2 > 0)
2106 release_region(brdp->ioaddr2, brdp->iosize2);
3b85b341
JS		 2107err:
2108 return retval;
1da177e4
LT		 2109}
2110
2111/*****************************************************************************/
2112
2113/*
2114 * Find the next available board number that is free.
2115 */
2116
705c1862 2117static int __devinit stl_getbrdnr(void)
1da177e4 2118{
6b2c9457 2119 unsigned int i;
1da177e4 2120
c62429d9 2121 for (i = 0; i < STL_MAXBRDS; i++)
615e4a71 2122 if (stl_brds[i] == NULL) {
1da177e4
LT		 2123 if (i >= stl_nrbrds)
2124 stl_nrbrds = i + 1;
c62429d9 2125 return i;
1da177e4 2126 }
c62429d9
JS		 2127
2128 return -1;
1da177e4
LT		 2129}
2130
b1b84fe0 2131/*****************************************************************************/
1da177e4
LT		 2132/*
2133 * We have a Stallion board. Allocate a board structure and
2134 * initialize it. Read its IO and IRQ resources from PCI
2135 * configuration space.
2136 */
2137
b1b84fe0
JS		 2138static int __devinit stl_pciprobe(struct pci_dev *pdev,
2139 const struct pci_device_id *ent)
1da177e4 2140{
b1b84fe0 2141 struct stlbrd *brdp;
aeaccfe4 2142 unsigned int i, brdtype = ent->driver_data;
6b2c9457 2143 int brdnr, retval = -ENODEV;
1da177e4 2144
b1b84fe0 2145 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
3b85b341 2146 goto err;
b1b84fe0 2147
3b85b341
JS		 2148 retval = pci_enable_device(pdev);
2149 if (retval)
2150 goto err;
2151 brdp = stl_allocbrd();
2152 if (brdp == NULL) {
2153 retval = -ENOMEM;
2154 goto err;
2155 }
79cfe7ab 2156 mutex_lock(&stl_brdslock);
6b2c9457
JS		 2157 brdnr = stl_getbrdnr();
2158 if (brdnr < 0) {
fefaf9a7 2159 dev_err(&pdev->dev, "too many boards found, "
1da177e4 2160 "maximum supported %d\n", STL_MAXBRDS);
79cfe7ab 2161 mutex_unlock(&stl_brdslock);
49277b1c 2162 retval = -ENODEV;
3b85b341 2163 goto err_fr;
1da177e4 2164 }
6b2c9457 2165 brdp->brdnr = (unsigned int)brdnr;
79cfe7ab
JS		 2166 stl_brds[brdp->brdnr] = brdp;
2167 mutex_unlock(&stl_brdslock);
2168
1da177e4 2169 brdp->brdtype = brdtype;
fc06b5cf 2170 brdp->state |= STL_PROBED;
1da177e4 2171
1da177e4
LT		 2172/*
2173 * We have all resources from the board, so let's setup the actual
2174 * board structure now.
2175 */
2176 switch (brdtype) {
2177 case BRD_ECHPCI:
b1b84fe0
JS		 2178 brdp->ioaddr2 = pci_resource_start(pdev, 0);
2179 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2180 break;
2181 case BRD_ECH64PCI:
b1b84fe0
JS		 2182 brdp->ioaddr2 = pci_resource_start(pdev, 2);
2183 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2184 break;
2185 case BRD_EASYIOPCI:
b1b84fe0
JS		 2186 brdp->ioaddr1 = pci_resource_start(pdev, 2);
2187 brdp->ioaddr2 = pci_resource_start(pdev, 1);
1da177e4
LT		 2188 break;
2189 default:
fefaf9a7 2190 dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype);
1da177e4
LT		 2191 break;
2192 }
2193
b1b84fe0 2194 brdp->irq = pdev->irq;
3b85b341
JS		 2195 retval = stl_brdinit(brdp);
2196 if (retval)
79cfe7ab 2197 goto err_null;
1da177e4 2198
b1b84fe0
JS		 2199 pci_set_drvdata(pdev, brdp);
2200
aeaccfe4
JS		 2201 for (i = 0; i < brdp->nrports; i++)
2202 tty_register_device(stl_serial,
2203 brdp->brdnr * STL_MAXPORTS + i, &pdev->dev);
2204
3b85b341 2205 return 0;
79cfe7ab
JS		 2206err_null:
2207 stl_brds[brdp->brdnr] = NULL;
3b85b341
JS		 2208err_fr:
2209 kfree(brdp);
2210err:
2211 return retval;
1da177e4
LT		 2212}
2213
b1b84fe0 2214static void __devexit stl_pciremove(struct pci_dev *pdev)
1da177e4 2215{
b1b84fe0 2216 struct stlbrd *brdp = pci_get_drvdata(pdev);
aeaccfe4 2217 unsigned int i;
1da177e4 2218
b1b84fe0 2219 free_irq(brdp->irq, brdp);
1da177e4 2220
b1b84fe0 2221 stl_cleanup_panels(brdp);
1da177e4 2222
b1b84fe0
JS		 2223 release_region(brdp->ioaddr1, brdp->iosize1);
2224 if (brdp->iosize2 > 0)
2225 release_region(brdp->ioaddr2, brdp->iosize2);
1da177e4 2226
aeaccfe4
JS		 2227 for (i = 0; i < brdp->nrports; i++)
2228 tty_unregister_device(stl_serial,
2229 brdp->brdnr * STL_MAXPORTS + i);
2230
b1b84fe0
JS		 2231 stl_brds[brdp->brdnr] = NULL;
2232 kfree(brdp);
1da177e4
LT		 2233}
2234
b1b84fe0
JS		 2235static struct pci_driver stl_pcidriver = {
2236 .name = "stallion",
2237 .id_table = stl_pcibrds,
2238 .probe = stl_pciprobe,
2239 .remove = __devexit_p(stl_pciremove)
2240};
1da177e4
LT		 2241
2242/*****************************************************************************/
2243
1da177e4
LT		 2244/*
2245 * Return the board stats structure to user app.
2246 */
2247
2248static int stl_getbrdstats(combrd_t __user *bp)
2249{
6b2c9457 2250 combrd_t stl_brdstats;
ca7ed0f2
JS		 2251 struct stlbrd *brdp;
2252 struct stlpanel *panelp;
6b2c9457 2253 unsigned int i;
1da177e4
LT		 2254
2255 if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t)))
2256 return -EFAULT;
2257 if (stl_brdstats.brd >= STL_MAXBRDS)
c62429d9 2258 return -ENODEV;
1da177e4 2259 brdp = stl_brds[stl_brdstats.brd];
615e4a71 2260 if (brdp == NULL)
c62429d9 2261 return -ENODEV;
1da177e4
LT		 2262
2263 memset(&stl_brdstats, 0, sizeof(combrd_t));
2264 stl_brdstats.brd = brdp->brdnr;
2265 stl_brdstats.type = brdp->brdtype;
2266 stl_brdstats.hwid = brdp->hwid;
2267 stl_brdstats.state = brdp->state;
2268 stl_brdstats.ioaddr = brdp->ioaddr1;
2269 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2270 stl_brdstats.irq = brdp->irq;
2271 stl_brdstats.nrpanels = brdp->nrpanels;
2272 stl_brdstats.nrports = brdp->nrports;
c62429d9 2273 for (i = 0; i < brdp->nrpanels; i++) {
1da177e4
LT		 2274 panelp = brdp->panels[i];
2275 stl_brdstats.panels[i].panel = i;
2276 stl_brdstats.panels[i].hwid = panelp->hwid;
2277 stl_brdstats.panels[i].nrports = panelp->nrports;
2278 }
2279
2280 return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0;
2281}
2282
2283/*****************************************************************************/
2284
2285/*
2286 * Resolve the referenced port number into a port struct pointer.
2287 */
2288
ca7ed0f2 2289static struct stlport *stl_getport(int brdnr, int panelnr, int portnr)
1da177e4 2290{
ca7ed0f2
JS		 2291 struct stlbrd *brdp;
2292 struct stlpanel *panelp;
1da177e4 2293
c62429d9
JS		 2294 if (brdnr < 0 || brdnr >= STL_MAXBRDS)
2295 return NULL;
1da177e4 2296 brdp = stl_brds[brdnr];
615e4a71 2297 if (brdp == NULL)
c62429d9 2298 return NULL;
6b2c9457 2299 if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels)
c62429d9 2300 return NULL;
1da177e4 2301 panelp = brdp->panels[panelnr];
615e4a71 2302 if (panelp == NULL)
c62429d9 2303 return NULL;
6b2c9457 2304 if (portnr < 0 || (unsigned int)portnr >= panelp->nrports)
c62429d9
JS		 2305 return NULL;
2306 return panelp->ports[portnr];
1da177e4
LT		 2307}
2308
2309/*****************************************************************************/
2310
2311/*
2312 * Return the port stats structure to user app. A NULL port struct
2313 * pointer passed in means that we need to find out from the app
2314 * what port to get stats for (used through board control device).
2315 */
2316
d18a750f 2317static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp)
1da177e4 2318{
6b2c9457 2319 comstats_t stl_comstats;
1da177e4
LT		 2320 unsigned char *head, *tail;
2321 unsigned long flags;
2322
2323 if (!portp) {
2324 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2325 return -EFAULT;
2326 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2327 stl_comstats.port);
615e4a71 2328 if (portp == NULL)
c62429d9 2329 return -ENODEV;
1da177e4
LT		 2330 }
2331
b4eda9cb 2332 mutex_lock(&portp->port.mutex);
1da177e4 2333 portp->stats.state = portp->istate;
f8ae4764 2334 portp->stats.flags = portp->port.flags;
1da177e4
LT		 2335 portp->stats.hwid = portp->hwid;
2336
2337 portp->stats.ttystate = 0;
2338 portp->stats.cflags = 0;
2339 portp->stats.iflags = 0;
2340 portp->stats.oflags = 0;
2341 portp->stats.lflags = 0;
2342 portp->stats.rxbuffered = 0;
2343
b65b5b59 2344 spin_lock_irqsave(&stallion_lock, flags);
d18a750f
AC		 2345 if (tty != NULL && portp->port.tty == tty) {
2346 portp->stats.ttystate = tty->flags;
2347 /* No longer available as a statistic */
2348 portp->stats.rxbuffered = 1; /*tty->flip.count; */
2349 if (tty->termios != NULL) {
2350 portp->stats.cflags = tty->termios->c_cflag;
2351 portp->stats.iflags = tty->termios->c_iflag;
2352 portp->stats.oflags = tty->termios->c_oflag;
2353 portp->stats.lflags = tty->termios->c_lflag;
1da177e4 2354 }
d18a750f 2355 }
b65b5b59 2356 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 2357
2358 head = portp->tx.head;
2359 tail = portp->tx.tail;
c62429d9
JS		 2360 portp->stats.txbuffered = (head >= tail) ? (head - tail) :
2361 (STL_TXBUFSIZE - (tail - head));
1da177e4
LT		 2362
2363 portp->stats.signals = (unsigned long) stl_getsignals(portp);
b4eda9cb 2364 mutex_unlock(&portp->port.mutex);
1da177e4
LT		 2365
2366 return copy_to_user(cp, &portp->stats,
2367 sizeof(comstats_t)) ? -EFAULT : 0;
2368}
2369
2370/*****************************************************************************/
2371
2372/*
2373 * Clear the port stats structure. We also return it zeroed out...
2374 */
2375
ca7ed0f2 2376static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4 2377{
6b2c9457
JS		 2378 comstats_t stl_comstats;
2379
1da177e4
LT		 2380 if (!portp) {
2381 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2382 return -EFAULT;
2383 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2384 stl_comstats.port);
615e4a71 2385 if (portp == NULL)
c62429d9 2386 return -ENODEV;
1da177e4
LT		 2387 }
2388
b4eda9cb 2389 mutex_lock(&portp->port.mutex);
1da177e4
LT		 2390 memset(&portp->stats, 0, sizeof(comstats_t));
2391 portp->stats.brd = portp->brdnr;
2392 portp->stats.panel = portp->panelnr;
2393 portp->stats.port = portp->portnr;
b4eda9cb 2394 mutex_unlock(&portp->port.mutex);
1da177e4
LT		 2395 return copy_to_user(cp, &portp->stats,
2396 sizeof(comstats_t)) ? -EFAULT : 0;
2397}
2398
2399/*****************************************************************************/
2400
2401/*
2402 * Return the entire driver ports structure to a user app.
2403 */
2404
ca7ed0f2 2405static int stl_getportstruct(struct stlport __user *arg)
1da177e4 2406{
6b2c9457 2407 struct stlport stl_dummyport;
ca7ed0f2 2408 struct stlport *portp;
1da177e4 2409
ca7ed0f2 2410 if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport)))
1da177e4
LT		 2411 return -EFAULT;
2412 portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr,
2413 stl_dummyport.portnr);
2414 if (!portp)
2415 return -ENODEV;
ca7ed0f2 2416 return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0;
1da177e4
LT		 2417}
2418
2419/*****************************************************************************/
2420
2421/*
2422 * Return the entire driver board structure to a user app.
2423 */
2424
ca7ed0f2 2425static int stl_getbrdstruct(struct stlbrd __user *arg)
1da177e4 2426{
6b2c9457 2427 struct stlbrd stl_dummybrd;
ca7ed0f2 2428 struct stlbrd *brdp;
1da177e4 2429
ca7ed0f2 2430 if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd)))
1da177e4 2431 return -EFAULT;
6b2c9457 2432 if (stl_dummybrd.brdnr >= STL_MAXBRDS)
1da177e4
LT		 2433 return -ENODEV;
2434 brdp = stl_brds[stl_dummybrd.brdnr];
2435 if (!brdp)
c62429d9 2436 return -ENODEV;
ca7ed0f2 2437 return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0;
1da177e4
LT		 2438}
2439
2440/*****************************************************************************/
2441
2442/*
2443 * The "staliomem" device is also required to do some special operations
2444 * on the board and/or ports. In this driver it is mostly used for stats
2445 * collection.
2446 */
2447
894cb917 2448static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg)
1da177e4
LT		 2449{
2450 int brdnr, rc;
2451 void __user *argp = (void __user *)arg;
2452
894cb917 2453 pr_debug("stl_memioctl(fp=%p,cmd=%x,arg=%lx)\n", fp, cmd,arg);
1da177e4 2454
894cb917 2455 brdnr = iminor(fp->f_dentry->d_inode);
1da177e4 2456 if (brdnr >= STL_MAXBRDS)
c62429d9 2457 return -ENODEV;
1da177e4
LT		 2458 rc = 0;
2459
2460 switch (cmd) {
2461 case COM_GETPORTSTATS:
d18a750f 2462 rc = stl_getportstats(NULL, NULL, argp);
1da177e4
LT		 2463 break;
2464 case COM_CLRPORTSTATS:
2465 rc = stl_clrportstats(NULL, argp);
2466 break;
2467 case COM_GETBRDSTATS:
2468 rc = stl_getbrdstats(argp);
2469 break;
2470 case COM_READPORT:
2471 rc = stl_getportstruct(argp);
2472 break;
2473 case COM_READBOARD:
2474 rc = stl_getbrdstruct(argp);
2475 break;
2476 default:
2477 rc = -ENOIOCTLCMD;
2478 break;
2479 }
c62429d9 2480 return rc;
1da177e4
LT		 2481}
2482
b68e31d0 2483static const struct tty_operations stl_ops = {
1da177e4
LT		 2484 .open = stl_open,
2485 .close = stl_close,
2486 .write = stl_write,
2487 .put_char = stl_putchar,
2488 .flush_chars = stl_flushchars,
2489 .write_room = stl_writeroom,
2490 .chars_in_buffer = stl_charsinbuffer,
2491 .ioctl = stl_ioctl,
2492 .set_termios = stl_settermios,
2493 .throttle = stl_throttle,
2494 .unthrottle = stl_unthrottle,
2495 .stop = stl_stop,
2496 .start = stl_start,
2497 .hangup = stl_hangup,
2498 .flush_buffer = stl_flushbuffer,
2499 .break_ctl = stl_breakctl,
2500 .wait_until_sent = stl_waituntilsent,
2501 .send_xchar = stl_sendxchar,
1da177e4
LT		 2502 .tiocmget = stl_tiocmget,
2503 .tiocmset = stl_tiocmset,
8561c44c 2504 .proc_fops = &stl_proc_fops,
1da177e4
LT		 2505};
2506
31f35939
AC		 2507static const struct tty_port_operations stl_port_ops = {
2508 .carrier_raised = stl_carrier_raised,
fcc8ac18 2509 .dtr_rts = stl_dtr_rts,
047e9658
AC		 2510 .activate = stl_activate,
2511 .shutdown = stl_shutdown,
31f35939
AC		 2512};
2513
1da177e4
LT		 2514/*****************************************************************************/
2515/* CD1400 HARDWARE FUNCTIONS */
2516/*****************************************************************************/
2517
2518/*
2519 * These functions get/set/update the registers of the cd1400 UARTs.
2520 * Access to the cd1400 registers is via an address/data io port pair.
2521 * (Maybe should make this inline...)
2522 */
2523
ca7ed0f2 2524static int stl_cd1400getreg(struct stlport *portp, int regnr)
1da177e4
LT		 2525{
2526 outb((regnr + portp->uartaddr), portp->ioaddr);
014c2544 2527 return inb(portp->ioaddr + EREG_DATA);
1da177e4
LT		 2528}
2529
ca7ed0f2 2530static void stl_cd1400setreg(struct stlport *portp, int regnr, int value)
1da177e4 2531{
c62429d9 2532 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2533 outb(value, portp->ioaddr + EREG_DATA);
2534}
2535
ca7ed0f2 2536static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value)
1da177e4 2537{
c62429d9 2538 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2539 if (inb(portp->ioaddr + EREG_DATA) != value) {
2540 outb(value, portp->ioaddr + EREG_DATA);
014c2544 2541 return 1;
1da177e4 2542 }
014c2544 2543 return 0;
1da177e4
LT		 2544}
2545
2546/*****************************************************************************/
2547
2548/*
2549 * Inbitialize the UARTs in a panel. We don't care what sort of board
2550 * these ports are on - since the port io registers are almost
2551 * identical when dealing with ports.
2552 */
2553
ca7ed0f2 2554static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 2555{
2556 unsigned int gfrcr;
2557 int chipmask, i, j;
2558 int nrchips, uartaddr, ioaddr;
b65b5b59 2559 unsigned long flags;
1da177e4 2560
a0564e14 2561 pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4 2562
b65b5b59 2563 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2564 BRDENABLE(panelp->brdnr, panelp->pagenr);
2565
2566/*
2567 * Check that each chip is present and started up OK.
2568 */
2569 chipmask = 0;
2570 nrchips = panelp->nrports / CD1400_PORTS;
c62429d9 2571 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 2572 if (brdp->brdtype == BRD_ECHPCI) {
2573 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
2574 ioaddr = panelp->iobase;
c62429d9 2575 } else
1da177e4 2576 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
1da177e4
LT		 2577 uartaddr = (i & 0x01) ? 0x080 : 0;
2578 outb((GFRCR + uartaddr), ioaddr);
2579 outb(0, (ioaddr + EREG_DATA));
2580 outb((CCR + uartaddr), ioaddr);
2581 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2582 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2583 outb((GFRCR + uartaddr), ioaddr);
c62429d9 2584 for (j = 0; j < CCR_MAXWAIT; j++)
1da177e4
LT		 2585 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
2586 break;
c62429d9 2587
1da177e4
LT		 2588 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
2589 printk("STALLION: cd1400 not responding, "
2590 "brd=%d panel=%d chip=%d\n",
2591 panelp->brdnr, panelp->panelnr, i);
2592 continue;
2593 }
2594 chipmask |= (0x1 << i);
2595 outb((PPR + uartaddr), ioaddr);
2596 outb(PPR_SCALAR, (ioaddr + EREG_DATA));
2597 }
2598
2599 BRDDISABLE(panelp->brdnr);
b65b5b59 2600 spin_unlock_irqrestore(&brd_lock, flags);
014c2544 2601 return chipmask;
1da177e4
LT		 2602}
2603
2604/*****************************************************************************/
2605
2606/*
2607 * Initialize hardware specific port registers.
2608 */
2609
ca7ed0f2 2610static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 2611{
b65b5b59 2612 unsigned long flags;
a0564e14
JS		 2613 pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
2614 panelp, portp);
1da177e4 2615
615e4a71
JS		 2616 if ((brdp == NULL) || (panelp == NULL) ||
2617 (portp == NULL))
1da177e4
LT		 2618 return;
2619
b65b5b59 2620 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2621 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
2622 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
2623 portp->uartaddr = (portp->portnr & 0x04) << 5;
2624 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
2625
2626 BRDENABLE(portp->brdnr, portp->pagenr);
2627 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2628 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
2629 portp->hwid = stl_cd1400getreg(portp, GFRCR);
2630 BRDDISABLE(portp->brdnr);
b65b5b59 2631 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2632}
2633
2634/*****************************************************************************/
2635
2636/*
2637 * Wait for the command register to be ready. We will poll this,
2638 * since it won't usually take too long to be ready.
2639 */
2640
ca7ed0f2 2641static void stl_cd1400ccrwait(struct stlport *portp)
1da177e4
LT		 2642{
2643 int i;
2644
c62429d9
JS		 2645 for (i = 0; i < CCR_MAXWAIT; i++)
2646 if (stl_cd1400getreg(portp, CCR) == 0)
1da177e4 2647 return;
1da177e4
LT		 2648
2649 printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n",
2650 portp->portnr, portp->panelnr, portp->brdnr);
2651}
2652
2653/*****************************************************************************/
2654
2655/*
2656 * Set up the cd1400 registers for a port based on the termios port
2657 * settings.
2658 */
2659
606d099c 2660static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 2661{
ca7ed0f2 2662 struct stlbrd *brdp;
1da177e4
LT		 2663 unsigned long flags;
2664 unsigned int clkdiv, baudrate;
2665 unsigned char cor1, cor2, cor3;
2666 unsigned char cor4, cor5, ccr;
2667 unsigned char srer, sreron, sreroff;
2668 unsigned char mcor1, mcor2, rtpr;
2669 unsigned char clk, div;
2670
2671 cor1 = 0;
2672 cor2 = 0;
2673 cor3 = 0;
2674 cor4 = 0;
2675 cor5 = 0;
2676 ccr = 0;
2677 rtpr = 0;
2678 clk = 0;
2679 div = 0;
2680 mcor1 = 0;
2681 mcor2 = 0;
2682 sreron = 0;
2683 sreroff = 0;
2684
2685 brdp = stl_brds[portp->brdnr];
615e4a71 2686 if (brdp == NULL)
1da177e4
LT		 2687 return;
2688
2689/*
2690 * Set up the RX char ignore mask with those RX error types we
2691 * can ignore. We can get the cd1400 to help us out a little here,
2692 * it will ignore parity errors and breaks for us.
2693 */
2694 portp->rxignoremsk = 0;
2695 if (tiosp->c_iflag & IGNPAR) {
2696 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
2697 cor1 |= COR1_PARIGNORE;
2698 }
2699 if (tiosp->c_iflag & IGNBRK) {
2700 portp->rxignoremsk |= ST_BREAK;
2701 cor4 |= COR4_IGNBRK;
2702 }
2703
2704 portp->rxmarkmsk = ST_OVERRUN;
2705 if (tiosp->c_iflag & (INPCK | PARMRK))
2706 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
2707 if (tiosp->c_iflag & BRKINT)
2708 portp->rxmarkmsk |= ST_BREAK;
2709
2710/*
2711 * Go through the char size, parity and stop bits and set all the
2712 * option register appropriately.
2713 */
2714 switch (tiosp->c_cflag & CSIZE) {
2715 case CS5:
2716 cor1 |= COR1_CHL5;
2717 break;
2718 case CS6:
2719 cor1 |= COR1_CHL6;
2720 break;
2721 case CS7:
2722 cor1 |= COR1_CHL7;
2723 break;
2724 default:
2725 cor1 |= COR1_CHL8;
2726 break;
2727 }
2728
2729 if (tiosp->c_cflag & CSTOPB)
2730 cor1 |= COR1_STOP2;
2731 else
2732 cor1 |= COR1_STOP1;
2733
2734 if (tiosp->c_cflag & PARENB) {
2735 if (tiosp->c_cflag & PARODD)
2736 cor1 |= (COR1_PARENB | COR1_PARODD);
2737 else
2738 cor1 |= (COR1_PARENB | COR1_PAREVEN);
2739 } else {
2740 cor1 |= COR1_PARNONE;
2741 }
2742
2743/*
2744 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
2745 * space for hardware flow control and the like. This should be set to
2746 * VMIN. Also here we will set the RX data timeout to 10ms - this should
2747 * really be based on VTIME.
2748 */
2749 cor3 |= FIFO_RXTHRESHOLD;
2750 rtpr = 2;
2751
2752/*
2753 * Calculate the baud rate timers. For now we will just assume that
2754 * the input and output baud are the same. Could have used a baud
2755 * table here, but this way we can generate virtually any baud rate
2756 * we like!
2757 */
2758 baudrate = tiosp->c_cflag & CBAUD;
2759 if (baudrate & CBAUDEX) {
2760 baudrate &= ~CBAUDEX;
2761 if ((baudrate < 1) || (baudrate > 4))
2762 tiosp->c_cflag &= ~CBAUDEX;
2763 else
2764 baudrate += 15;
2765 }
2766 baudrate = stl_baudrates[baudrate];
2767 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 2768 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 2769 baudrate = 57600;
f8ae4764 2770 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 2771 baudrate = 115200;
f8ae4764 2772 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 2773 baudrate = 230400;
f8ae4764 2774 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 2775 baudrate = 460800;
f8ae4764 2776 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 2777 baudrate = (portp->baud_base / portp->custom_divisor);
2778 }
2779 if (baudrate > STL_CD1400MAXBAUD)
2780 baudrate = STL_CD1400MAXBAUD;
2781
2782 if (baudrate > 0) {
c62429d9
JS		 2783 for (clk = 0; clk < CD1400_NUMCLKS; clk++) {
2784 clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate;
1da177e4
LT		 2785 if (clkdiv < 0x100)
2786 break;
2787 }
2788 div = (unsigned char) clkdiv;
2789 }
2790
2791/*
2792 * Check what form of modem signaling is required and set it up.
2793 */
2794 if ((tiosp->c_cflag & CLOCAL) == 0) {
2795 mcor1 |= MCOR1_DCD;
2796 mcor2 |= MCOR2_DCD;
2797 sreron |= SRER_MODEM;
f8ae4764 2798 portp->port.flags |= ASYNC_CHECK_CD;
c62429d9 2799 } else
f8ae4764 2800 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 2801
2802/*
2803 * Setup cd1400 enhanced modes if we can. In particular we want to
2804 * handle as much of the flow control as possible automatically. As
2805 * well as saving a few CPU cycles it will also greatly improve flow
2806 * control reliability.
2807 */
2808 if (tiosp->c_iflag & IXON) {
2809 cor2 |= COR2_TXIBE;
2810 cor3 |= COR3_SCD12;
2811 if (tiosp->c_iflag & IXANY)
2812 cor2 |= COR2_IXM;
2813 }
2814
2815 if (tiosp->c_cflag & CRTSCTS) {
2816 cor2 |= COR2_CTSAE;
2817 mcor1 |= FIFO_RTSTHRESHOLD;
2818 }
2819
2820/*
2821 * All cd1400 register values calculated so go through and set
2822 * them all up.
2823 */
2824
a0564e14 2825 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 2826 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14 2827 pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n",
1da177e4 2828 cor1, cor2, cor3, cor4, cor5);
a0564e14 2829 pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
1da177e4 2830 mcor1, mcor2, rtpr, sreron, sreroff);
a0564e14
JS		 2831 pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
2832 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 2833 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
2834 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 2835
b65b5b59 2836 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2837 BRDENABLE(portp->brdnr, portp->pagenr);
2838 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
2839 srer = stl_cd1400getreg(portp, SRER);
2840 stl_cd1400setreg(portp, SRER, 0);
2841 if (stl_cd1400updatereg(portp, COR1, cor1))
2842 ccr = 1;
2843 if (stl_cd1400updatereg(portp, COR2, cor2))
2844 ccr = 1;
2845 if (stl_cd1400updatereg(portp, COR3, cor3))
2846 ccr = 1;
2847 if (ccr) {
2848 stl_cd1400ccrwait(portp);
2849 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
2850 }
2851 stl_cd1400setreg(portp, COR4, cor4);
2852 stl_cd1400setreg(portp, COR5, cor5);
2853 stl_cd1400setreg(portp, MCOR1, mcor1);
2854 stl_cd1400setreg(portp, MCOR2, mcor2);
2855 if (baudrate > 0) {
2856 stl_cd1400setreg(portp, TCOR, clk);
2857 stl_cd1400setreg(portp, TBPR, div);
2858 stl_cd1400setreg(portp, RCOR, clk);
2859 stl_cd1400setreg(portp, RBPR, div);
2860 }
2861 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
2862 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
2863 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
2864 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
2865 stl_cd1400setreg(portp, RTPR, rtpr);
2866 mcor1 = stl_cd1400getreg(portp, MSVR1);
2867 if (mcor1 & MSVR1_DCD)
2868 portp->sigs |= TIOCM_CD;
2869 else
2870 portp->sigs &= ~TIOCM_CD;
2871 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
2872 BRDDISABLE(portp->brdnr);
b65b5b59 2873 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2874}
2875
2876/*****************************************************************************/
2877
2878/*
2879 * Set the state of the DTR and RTS signals.
2880 */
2881
ca7ed0f2 2882static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 2883{
2884 unsigned char msvr1, msvr2;
2885 unsigned long flags;
2886
a0564e14
JS		 2887 pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n",
2888 portp, dtr, rts);
1da177e4
LT		 2889
2890 msvr1 = 0;
2891 msvr2 = 0;
2892 if (dtr > 0)
2893 msvr1 = MSVR1_DTR;
2894 if (rts > 0)
2895 msvr2 = MSVR2_RTS;
2896
b65b5b59 2897 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2898 BRDENABLE(portp->brdnr, portp->pagenr);
2899 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2900 if (rts >= 0)
2901 stl_cd1400setreg(portp, MSVR2, msvr2);
2902 if (dtr >= 0)
2903 stl_cd1400setreg(portp, MSVR1, msvr1);
2904 BRDDISABLE(portp->brdnr);
b65b5b59 2905 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2906}
2907
2908/*****************************************************************************/
2909
2910/*
2911 * Return the state of the signals.
2912 */
2913
ca7ed0f2 2914static int stl_cd1400getsignals(struct stlport *portp)
1da177e4
LT		 2915{
2916 unsigned char msvr1, msvr2;
2917 unsigned long flags;
2918 int sigs;
2919
a0564e14 2920 pr_debug("stl_cd1400getsignals(portp=%p)\n", portp);
1da177e4 2921
b65b5b59 2922 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2923 BRDENABLE(portp->brdnr, portp->pagenr);
2924 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2925 msvr1 = stl_cd1400getreg(portp, MSVR1);
2926 msvr2 = stl_cd1400getreg(portp, MSVR2);
2927 BRDDISABLE(portp->brdnr);
b65b5b59 2928 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2929
2930 sigs = 0;
2931 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
2932 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
2933 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
2934 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
2935#if 0
2936 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
2937 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
2938#else
2939 sigs |= TIOCM_DSR;
2940#endif
014c2544 2941 return sigs;
1da177e4
LT		 2942}
2943
2944/*****************************************************************************/
2945
2946/*
2947 * Enable/Disable the Transmitter and/or Receiver.
2948 */
2949
ca7ed0f2 2950static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 2951{
2952 unsigned char ccr;
2953 unsigned long flags;
2954
a0564e14
JS		 2955 pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
2956
1da177e4
LT		 2957 ccr = 0;
2958
2959 if (tx == 0)
2960 ccr |= CCR_TXDISABLE;
2961 else if (tx > 0)
2962 ccr |= CCR_TXENABLE;
2963 if (rx == 0)
2964 ccr |= CCR_RXDISABLE;
2965 else if (rx > 0)
2966 ccr |= CCR_RXENABLE;
2967
b65b5b59 2968 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2969 BRDENABLE(portp->brdnr, portp->pagenr);
2970 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2971 stl_cd1400ccrwait(portp);
2972 stl_cd1400setreg(portp, CCR, ccr);
2973 stl_cd1400ccrwait(portp);
2974 BRDDISABLE(portp->brdnr);
b65b5b59 2975 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2976}
2977
2978/*****************************************************************************/
2979
2980/*
2981 * Start/stop the Transmitter and/or Receiver.
2982 */
2983
ca7ed0f2 2984static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 2985{
2986 unsigned char sreron, sreroff;
2987 unsigned long flags;
2988
a0564e14 2989 pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 2990
2991 sreron = 0;
2992 sreroff = 0;
2993 if (tx == 0)
2994 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
2995 else if (tx == 1)
2996 sreron |= SRER_TXDATA;
2997 else if (tx >= 2)
2998 sreron |= SRER_TXEMPTY;
2999 if (rx == 0)
3000 sreroff |= SRER_RXDATA;
3001 else if (rx > 0)
3002 sreron |= SRER_RXDATA;
3003
b65b5b59 3004 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3005 BRDENABLE(portp->brdnr, portp->pagenr);
3006 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3007 stl_cd1400setreg(portp, SRER,
3008 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3009 BRDDISABLE(portp->brdnr);
3010 if (tx > 0)
3011 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3012 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3013}
3014
3015/*****************************************************************************/
3016
3017/*
3018 * Disable all interrupts from this port.
3019 */
3020
ca7ed0f2 3021static void stl_cd1400disableintrs(struct stlport *portp)
1da177e4
LT		 3022{
3023 unsigned long flags;
3024
a0564e14
JS		 3025 pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp);
3026
b65b5b59 3027 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3028 BRDENABLE(portp->brdnr, portp->pagenr);
3029 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3030 stl_cd1400setreg(portp, SRER, 0);
3031 BRDDISABLE(portp->brdnr);
b65b5b59 3032 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3033}
3034
3035/*****************************************************************************/
3036
ca7ed0f2 3037static void stl_cd1400sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3038{
3039 unsigned long flags;
3040
a0564e14 3041 pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3042
b65b5b59 3043 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3044 BRDENABLE(portp->brdnr, portp->pagenr);
3045 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3046 stl_cd1400setreg(portp, SRER,
3047 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3048 SRER_TXEMPTY));
3049 BRDDISABLE(portp->brdnr);
3050 portp->brklen = len;
3051 if (len == 1)
3052 portp->stats.txbreaks++;
b65b5b59 3053 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3054}
3055
3056/*****************************************************************************/
3057
3058/*
3059 * Take flow control actions...
3060 */
3061
ca7ed0f2 3062static void stl_cd1400flowctrl(struct stlport *portp, int state)
1da177e4
LT		 3063{
3064 struct tty_struct *tty;
3065 unsigned long flags;
3066
a0564e14 3067 pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 3068
615e4a71 3069 if (portp == NULL)
1da177e4 3070 return;
d18a750f 3071 tty = tty_port_tty_get(&portp->port);
615e4a71 3072 if (tty == NULL)
1da177e4
LT		 3073 return;
3074
b65b5b59 3075 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3076 BRDENABLE(portp->brdnr, portp->pagenr);
3077 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3078
3079 if (state) {
3080 if (tty->termios->c_iflag & IXOFF) {
3081 stl_cd1400ccrwait(portp);
3082 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3083 portp->stats.rxxon++;
3084 stl_cd1400ccrwait(portp);
3085 }
3086/*
3087 * Question: should we return RTS to what it was before? It may
3088 * have been set by an ioctl... Suppose not, since if you have
3089 * hardware flow control set then it is pretty silly to go and
3090 * set the RTS line by hand.
3091 */
3092 if (tty->termios->c_cflag & CRTSCTS) {
3093 stl_cd1400setreg(portp, MCOR1,
3094 (stl_cd1400getreg(portp, MCOR1) |
3095 FIFO_RTSTHRESHOLD));
3096 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3097 portp->stats.rxrtson++;
3098 }
3099 } else {
3100 if (tty->termios->c_iflag & IXOFF) {
3101 stl_cd1400ccrwait(portp);
3102 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3103 portp->stats.rxxoff++;
3104 stl_cd1400ccrwait(portp);
3105 }
3106 if (tty->termios->c_cflag & CRTSCTS) {
3107 stl_cd1400setreg(portp, MCOR1,
3108 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3109 stl_cd1400setreg(portp, MSVR2, 0);
3110 portp->stats.rxrtsoff++;
3111 }
3112 }
3113
3114 BRDDISABLE(portp->brdnr);
b65b5b59 3115 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3116 tty_kref_put(tty);
1da177e4
LT		 3117}
3118
3119/*****************************************************************************/
3120
3121/*
3122 * Send a flow control character...
3123 */
3124
ca7ed0f2 3125static void stl_cd1400sendflow(struct stlport *portp, int state)
1da177e4
LT		 3126{
3127 struct tty_struct *tty;
3128 unsigned long flags;
3129
a0564e14 3130 pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 3131
615e4a71 3132 if (portp == NULL)
1da177e4 3133 return;
d18a750f 3134 tty = tty_port_tty_get(&portp->port);
615e4a71 3135 if (tty == NULL)
1da177e4
LT		 3136 return;
3137
b65b5b59 3138 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3139 BRDENABLE(portp->brdnr, portp->pagenr);
3140 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3141 if (state) {
3142 stl_cd1400ccrwait(portp);
3143 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3144 portp->stats.rxxon++;
3145 stl_cd1400ccrwait(portp);
3146 } else {
3147 stl_cd1400ccrwait(portp);
3148 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3149 portp->stats.rxxoff++;
3150 stl_cd1400ccrwait(portp);
3151 }
3152 BRDDISABLE(portp->brdnr);
b65b5b59 3153 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3154 tty_kref_put(tty);
1da177e4
LT		 3155}
3156
3157/*****************************************************************************/
3158
ca7ed0f2 3159static void stl_cd1400flush(struct stlport *portp)
1da177e4
LT		 3160{
3161 unsigned long flags;
3162
a0564e14 3163 pr_debug("stl_cd1400flush(portp=%p)\n", portp);
1da177e4 3164
615e4a71 3165 if (portp == NULL)
1da177e4
LT		 3166 return;
3167
b65b5b59 3168 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3169 BRDENABLE(portp->brdnr, portp->pagenr);
3170 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3171 stl_cd1400ccrwait(portp);
3172 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
3173 stl_cd1400ccrwait(portp);
3174 portp->tx.tail = portp->tx.head;
3175 BRDDISABLE(portp->brdnr);
b65b5b59 3176 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3177}
3178
3179/*****************************************************************************/
3180
3181/*
3182 * Return the current state of data flow on this port. This is only
3183 * really interresting when determining if data has fully completed
3184 * transmission or not... This is easy for the cd1400, it accurately
3185 * maintains the busy port flag.
3186 */
3187
ca7ed0f2 3188static int stl_cd1400datastate(struct stlport *portp)
1da177e4 3189{
a0564e14 3190 pr_debug("stl_cd1400datastate(portp=%p)\n", portp);
1da177e4 3191
615e4a71 3192 if (portp == NULL)
014c2544 3193 return 0;
1da177e4 3194
014c2544 3195 return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0;
1da177e4
LT		 3196}
3197
3198/*****************************************************************************/
3199
3200/*
3201 * Interrupt service routine for cd1400 EasyIO boards.
3202 */
3203
ca7ed0f2 3204static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3205{
3206 unsigned char svrtype;
3207
a0564e14 3208 pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4 3209
b65b5b59 3210 spin_lock(&brd_lock);
1da177e4
LT		 3211 outb(SVRR, iobase);
3212 svrtype = inb(iobase + EREG_DATA);
3213 if (panelp->nrports > 4) {
3214 outb((SVRR + 0x80), iobase);
3215 svrtype |= inb(iobase + EREG_DATA);
3216 }
3217
3218 if (svrtype & SVRR_RX)
3219 stl_cd1400rxisr(panelp, iobase);
3220 else if (svrtype & SVRR_TX)
3221 stl_cd1400txisr(panelp, iobase);
3222 else if (svrtype & SVRR_MDM)
3223 stl_cd1400mdmisr(panelp, iobase);
b65b5b59
AC		 3224
3225 spin_unlock(&brd_lock);
1da177e4
LT		 3226}
3227
3228/*****************************************************************************/
3229
3230/*
3231 * Interrupt service routine for cd1400 panels.
3232 */
3233
ca7ed0f2 3234static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3235{
3236 unsigned char svrtype;
3237
a0564e14 3238 pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4
LT		 3239
3240 outb(SVRR, iobase);
3241 svrtype = inb(iobase + EREG_DATA);
3242 outb((SVRR + 0x80), iobase);
3243 svrtype |= inb(iobase + EREG_DATA);
3244 if (svrtype & SVRR_RX)
3245 stl_cd1400rxisr(panelp, iobase);
3246 else if (svrtype & SVRR_TX)
3247 stl_cd1400txisr(panelp, iobase);
3248 else if (svrtype & SVRR_MDM)
3249 stl_cd1400mdmisr(panelp, iobase);
3250}
3251
3252
3253/*****************************************************************************/
3254
3255/*
3256 * Unfortunately we need to handle breaks in the TX data stream, since
3257 * this is the only way to generate them on the cd1400.
3258 */
3259
60be4810 3260static int stl_cd1400breakisr(struct stlport *portp, int ioaddr)
1da177e4
LT		 3261{
3262 if (portp->brklen == 1) {
3263 outb((COR2 + portp->uartaddr), ioaddr);
3264 outb((inb(ioaddr + EREG_DATA) | COR2_ETC),
3265 (ioaddr + EREG_DATA));
3266 outb((TDR + portp->uartaddr), ioaddr);
3267 outb(ETC_CMD, (ioaddr + EREG_DATA));
3268 outb(ETC_STARTBREAK, (ioaddr + EREG_DATA));
3269 outb((SRER + portp->uartaddr), ioaddr);
3270 outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)),
3271 (ioaddr + EREG_DATA));
014c2544 3272 return 1;
1da177e4
LT		 3273 } else if (portp->brklen > 1) {
3274 outb((TDR + portp->uartaddr), ioaddr);
3275 outb(ETC_CMD, (ioaddr + EREG_DATA));
3276 outb(ETC_STOPBREAK, (ioaddr + EREG_DATA));
3277 portp->brklen = -1;
014c2544 3278 return 1;
1da177e4
LT		 3279 } else {
3280 outb((COR2 + portp->uartaddr), ioaddr);
3281 outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC),
3282 (ioaddr + EREG_DATA));
3283 portp->brklen = 0;
3284 }
014c2544 3285 return 0;
1da177e4
LT		 3286}
3287
3288/*****************************************************************************/
3289
3290/*
3291 * Transmit interrupt handler. This has gotta be fast! Handling TX
3292 * chars is pretty simple, stuff as many as possible from the TX buffer
3293 * into the cd1400 FIFO. Must also handle TX breaks here, since they
3294 * are embedded as commands in the data stream. Oh no, had to use a goto!
3295 * This could be optimized more, will do when I get time...
3296 * In practice it is possible that interrupts are enabled but that the
3297 * port has been hung up. Need to handle not having any TX buffer here,
3298 * this is done by using the side effect that head and tail will also
3299 * be NULL if the buffer has been freed.
3300 */
3301
ca7ed0f2 3302static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3303{
ca7ed0f2 3304 struct stlport *portp;
1da177e4
LT		 3305 int len, stlen;
3306 char *head, *tail;
3307 unsigned char ioack, srer;
d18a750f 3308 struct tty_struct *tty;
1da177e4 3309
a0564e14 3310 pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3311
3312 ioack = inb(ioaddr + EREG_TXACK);
3313 if (((ioack & panelp->ackmask) != 0) ||
3314 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
3315 printk("STALLION: bad TX interrupt ack value=%x\n", ioack);
3316 return;
3317 }
3318 portp = panelp->ports[(ioack >> 3)];
3319
3320/*
3321 * Unfortunately we need to handle breaks in the data stream, since
3322 * this is the only way to generate them on the cd1400. Do it now if
3323 * a break is to be sent.
3324 */
3325 if (portp->brklen != 0)
3326 if (stl_cd1400breakisr(portp, ioaddr))
3327 goto stl_txalldone;
3328
3329 head = portp->tx.head;
3330 tail = portp->tx.tail;
3331 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
3332 if ((len == 0) || ((len < STL_TXBUFLOW) &&
3333 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
3334 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 3335 tty = tty_port_tty_get(&portp->port);
3336 if (tty) {
3337 tty_wakeup(tty);
3338 tty_kref_put(tty);
3339 }
1da177e4
LT		 3340 }
3341
3342 if (len == 0) {
3343 outb((SRER + portp->uartaddr), ioaddr);
3344 srer = inb(ioaddr + EREG_DATA);
3345 if (srer & SRER_TXDATA) {
3346 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
3347 } else {
3348 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
3349 clear_bit(ASYI_TXBUSY, &portp->istate);
3350 }
3351 outb(srer, (ioaddr + EREG_DATA));
3352 } else {
843b568c 3353 len = min(len, CD1400_TXFIFOSIZE);
1da177e4 3354 portp->stats.txtotal += len;
319fe7c3
JS		 3355 stlen = min_t(unsigned int, len,
3356 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 3357 outb((TDR + portp->uartaddr), ioaddr);
3358 outsb((ioaddr + EREG_DATA), tail, stlen);
3359 len -= stlen;
3360 tail += stlen;
3361 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
3362 tail = portp->tx.buf;
3363 if (len > 0) {
3364 outsb((ioaddr + EREG_DATA), tail, len);
3365 tail += len;
3366 }
3367 portp->tx.tail = tail;
3368 }
3369
3370stl_txalldone:
3371 outb((EOSRR + portp->uartaddr), ioaddr);
3372 outb(0, (ioaddr + EREG_DATA));
3373}
3374
3375/*****************************************************************************/
3376
3377/*
3378 * Receive character interrupt handler. Determine if we have good chars
3379 * or bad chars and then process appropriately. Good chars are easy
3380 * just shove the lot into the RX buffer and set all status byte to 0.
3381 * If a bad RX char then process as required. This routine needs to be
3382 * fast! In practice it is possible that we get an interrupt on a port
3383 * that is closed. This can happen on hangups - since they completely
3384 * shutdown a port not in user context. Need to handle this case.
3385 */
3386
ca7ed0f2 3387static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3388{
ca7ed0f2 3389 struct stlport *portp;
1da177e4
LT		 3390 struct tty_struct *tty;
3391 unsigned int ioack, len, buflen;
3392 unsigned char status;
3393 char ch;
3394
a0564e14 3395 pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3396
3397 ioack = inb(ioaddr + EREG_RXACK);
3398 if ((ioack & panelp->ackmask) != 0) {
3399 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3400 return;
3401 }
3402 portp = panelp->ports[(ioack >> 3)];
d18a750f 3403 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 3404
3405 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
3406 outb((RDCR + portp->uartaddr), ioaddr);
3407 len = inb(ioaddr + EREG_DATA);
33f0f88f 3408 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 3409 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 3410 outb((RDSR + portp->uartaddr), ioaddr);
3411 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3412 portp->stats.rxlost += len;
3413 portp->stats.rxtotal += len;
3414 } else {
843b568c 3415 len = min(len, buflen);
1da177e4 3416 if (len > 0) {
33f0f88f 3417 unsigned char *ptr;
1da177e4 3418 outb((RDSR + portp->uartaddr), ioaddr);
33f0f88f
AC		 3419 tty_prepare_flip_string(tty, &ptr, len);
3420 insb((ioaddr + EREG_DATA), ptr, len);
1da177e4
LT		 3421 tty_schedule_flip(tty);
3422 portp->stats.rxtotal += len;
3423 }
3424 }
3425 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3426 outb((RDSR + portp->uartaddr), ioaddr);
3427 status = inb(ioaddr + EREG_DATA);
3428 ch = inb(ioaddr + EREG_DATA);
3429 if (status & ST_PARITY)
3430 portp->stats.rxparity++;
3431 if (status & ST_FRAMING)
3432 portp->stats.rxframing++;
3433 if (status & ST_OVERRUN)
3434 portp->stats.rxoverrun++;
3435 if (status & ST_BREAK)
3436 portp->stats.rxbreaks++;
3437 if (status & ST_SCHARMASK) {
3438 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3439 portp->stats.txxon++;
3440 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3441 portp->stats.txxoff++;
3442 goto stl_rxalldone;
3443 }
33f0f88f 3444 if (tty != NULL && (portp->rxignoremsk & status) == 0) {
1da177e4
LT		 3445 if (portp->rxmarkmsk & status) {
3446 if (status & ST_BREAK) {
3447 status = TTY_BREAK;
f8ae4764 3448 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 3449 do_SAK(tty);
3450 BRDENABLE(portp->brdnr, portp->pagenr);
3451 }
c62429d9 3452 } else if (status & ST_PARITY)
1da177e4 3453 status = TTY_PARITY;
c62429d9 3454 else if (status & ST_FRAMING)
1da177e4 3455 status = TTY_FRAME;
c62429d9 3456 else if(status & ST_OVERRUN)
1da177e4 3457 status = TTY_OVERRUN;
c62429d9 3458 else
1da177e4 3459 status = 0;
c62429d9 3460 } else
1da177e4 3461 status = 0;
33f0f88f
AC		 3462 tty_insert_flip_char(tty, ch, status);
3463 tty_schedule_flip(tty);
1da177e4
LT		 3464 }
3465 } else {
3466 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
d18a750f 3467 tty_kref_put(tty);
1da177e4
LT		 3468 return;
3469 }
3470
3471stl_rxalldone:
d18a750f 3472 tty_kref_put(tty);
1da177e4
LT		 3473 outb((EOSRR + portp->uartaddr), ioaddr);
3474 outb(0, (ioaddr + EREG_DATA));
3475}
3476
3477/*****************************************************************************/
3478
3479/*
3480 * Modem interrupt handler. The is called when the modem signal line
3481 * (DCD) has changed state. Leave most of the work to the off-level
3482 * processing routine.
3483 */
3484
ca7ed0f2 3485static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3486{
ca7ed0f2 3487 struct stlport *portp;
1da177e4
LT		 3488 unsigned int ioack;
3489 unsigned char misr;
3490
a0564e14 3491 pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp);
1da177e4
LT		 3492
3493 ioack = inb(ioaddr + EREG_MDACK);
3494 if (((ioack & panelp->ackmask) != 0) ||
3495 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3496 printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3497 return;
3498 }
3499 portp = panelp->ports[(ioack >> 3)];
3500
3501 outb((MISR + portp->uartaddr), ioaddr);
3502 misr = inb(ioaddr + EREG_DATA);
3503 if (misr & MISR_DCD) {
ccfea3c9 3504 stl_cd_change(portp);
1da177e4
LT		 3505 portp->stats.modem++;
3506 }
3507
3508 outb((EOSRR + portp->uartaddr), ioaddr);
3509 outb(0, (ioaddr + EREG_DATA));
3510}
3511
3512/*****************************************************************************/
3513/* SC26198 HARDWARE FUNCTIONS */
3514/*****************************************************************************/
3515
3516/*
3517 * These functions get/set/update the registers of the sc26198 UARTs.
3518 * Access to the sc26198 registers is via an address/data io port pair.
3519 * (Maybe should make this inline...)
3520 */
3521
ca7ed0f2 3522static int stl_sc26198getreg(struct stlport *portp, int regnr)
1da177e4
LT		 3523{
3524 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
014c2544 3525 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3526}
3527
ca7ed0f2 3528static void stl_sc26198setreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3529{
3530 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3531 outb(value, (portp->ioaddr + XP_DATA));
3532}
3533
ca7ed0f2 3534static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3535{
3536 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3537 if (inb(portp->ioaddr + XP_DATA) != value) {
3538 outb(value, (portp->ioaddr + XP_DATA));
014c2544 3539 return 1;
1da177e4 3540 }
014c2544 3541 return 0;
1da177e4
LT		 3542}
3543
3544/*****************************************************************************/
3545
3546/*
3547 * Functions to get and set the sc26198 global registers.
3548 */
3549
ca7ed0f2 3550static int stl_sc26198getglobreg(struct stlport *portp, int regnr)
1da177e4
LT		 3551{
3552 outb(regnr, (portp->ioaddr + XP_ADDR));
014c2544 3553 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3554}
3555
3556#if 0
ca7ed0f2 3557static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3558{
3559 outb(regnr, (portp->ioaddr + XP_ADDR));
3560 outb(value, (portp->ioaddr + XP_DATA));
3561}
3562#endif
3563
3564/*****************************************************************************/
3565
3566/*
3567 * Inbitialize the UARTs in a panel. We don't care what sort of board
3568 * these ports are on - since the port io registers are almost
3569 * identical when dealing with ports.
3570 */
3571
ca7ed0f2 3572static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 3573{
3574 int chipmask, i;
3575 int nrchips, ioaddr;
3576
a0564e14 3577 pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 3578
3579 BRDENABLE(panelp->brdnr, panelp->pagenr);
3580
3581/*
3582 * Check that each chip is present and started up OK.
3583 */
3584 chipmask = 0;
3585 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3586 if (brdp->brdtype == BRD_ECHPCI)
3587 outb(panelp->pagenr, brdp->ioctrl);
3588
c62429d9 3589 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 3590 ioaddr = panelp->iobase + (i * 4);
3591 outb(SCCR, (ioaddr + XP_ADDR));
3592 outb(CR_RESETALL, (ioaddr + XP_DATA));
3593 outb(TSTR, (ioaddr + XP_ADDR));
3594 if (inb(ioaddr + XP_DATA) != 0) {
3595 printk("STALLION: sc26198 not responding, "
3596 "brd=%d panel=%d chip=%d\n",
3597 panelp->brdnr, panelp->panelnr, i);
3598 continue;
3599 }
3600 chipmask |= (0x1 << i);
3601 outb(GCCR, (ioaddr + XP_ADDR));
3602 outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA));
3603 outb(WDTRCR, (ioaddr + XP_ADDR));
3604 outb(0xff, (ioaddr + XP_DATA));
3605 }
3606
3607 BRDDISABLE(panelp->brdnr);
014c2544 3608 return chipmask;
1da177e4
LT		 3609}
3610
3611/*****************************************************************************/
3612
3613/*
3614 * Initialize hardware specific port registers.
3615 */
3616
ca7ed0f2 3617static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 3618{
a0564e14
JS		 3619 pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
3620 panelp, portp);
1da177e4 3621
615e4a71
JS		 3622 if ((brdp == NULL) || (panelp == NULL) ||
3623 (portp == NULL))
1da177e4
LT		 3624 return;
3625
3626 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3627 portp->uartaddr = (portp->portnr & 0x07) << 4;
3628 portp->pagenr = panelp->pagenr;
3629 portp->hwid = 0x1;
3630
3631 BRDENABLE(portp->brdnr, portp->pagenr);
3632 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3633 BRDDISABLE(portp->brdnr);
3634}
3635
3636/*****************************************************************************/
3637
3638/*
3639 * Set up the sc26198 registers for a port based on the termios port
3640 * settings.
3641 */
3642
606d099c 3643static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 3644{
ca7ed0f2 3645 struct stlbrd *brdp;
1da177e4
LT		 3646 unsigned long flags;
3647 unsigned int baudrate;
3648 unsigned char mr0, mr1, mr2, clk;
3649 unsigned char imron, imroff, iopr, ipr;
3650
3651 mr0 = 0;
3652 mr1 = 0;
3653 mr2 = 0;
3654 clk = 0;
3655 iopr = 0;
3656 imron = 0;
3657 imroff = 0;
3658
3659 brdp = stl_brds[portp->brdnr];
615e4a71 3660 if (brdp == NULL)
1da177e4
LT		 3661 return;
3662
3663/*
3664 * Set up the RX char ignore mask with those RX error types we
3665 * can ignore.
3666 */
3667 portp->rxignoremsk = 0;
3668 if (tiosp->c_iflag & IGNPAR)
3669 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3670 SR_RXOVERRUN);
3671 if (tiosp->c_iflag & IGNBRK)
3672 portp->rxignoremsk |= SR_RXBREAK;
3673
3674 portp->rxmarkmsk = SR_RXOVERRUN;
3675 if (tiosp->c_iflag & (INPCK | PARMRK))
3676 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3677 if (tiosp->c_iflag & BRKINT)
3678 portp->rxmarkmsk |= SR_RXBREAK;
3679
3680/*
3681 * Go through the char size, parity and stop bits and set all the
3682 * option register appropriately.
3683 */
3684 switch (tiosp->c_cflag & CSIZE) {
3685 case CS5:
3686 mr1 |= MR1_CS5;
3687 break;
3688 case CS6:
3689 mr1 |= MR1_CS6;
3690 break;
3691 case CS7:
3692 mr1 |= MR1_CS7;
3693 break;
3694 default:
3695 mr1 |= MR1_CS8;
3696 break;
3697 }
3698
3699 if (tiosp->c_cflag & CSTOPB)
3700 mr2 |= MR2_STOP2;
3701 else
3702 mr2 |= MR2_STOP1;
3703
3704 if (tiosp->c_cflag & PARENB) {
3705 if (tiosp->c_cflag & PARODD)
3706 mr1 |= (MR1_PARENB | MR1_PARODD);
3707 else
3708 mr1 |= (MR1_PARENB | MR1_PAREVEN);
c62429d9 3709 } else
1da177e4 3710 mr1 |= MR1_PARNONE;
1da177e4
LT		 3711
3712 mr1 |= MR1_ERRBLOCK;
3713
3714/*
3715 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3716 * space for hardware flow control and the like. This should be set to
3717 * VMIN.
3718 */
3719 mr2 |= MR2_RXFIFOHALF;
3720
3721/*
3722 * Calculate the baud rate timers. For now we will just assume that
3723 * the input and output baud are the same. The sc26198 has a fixed
3724 * baud rate table, so only discrete baud rates possible.
3725 */
3726 baudrate = tiosp->c_cflag & CBAUD;
3727 if (baudrate & CBAUDEX) {
3728 baudrate &= ~CBAUDEX;
3729 if ((baudrate < 1) || (baudrate > 4))
3730 tiosp->c_cflag &= ~CBAUDEX;
3731 else
3732 baudrate += 15;
3733 }
3734 baudrate = stl_baudrates[baudrate];
3735 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 3736 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 3737 baudrate = 57600;
f8ae4764 3738 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 3739 baudrate = 115200;
f8ae4764 3740 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 3741 baudrate = 230400;
f8ae4764 3742 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 3743 baudrate = 460800;
f8ae4764 3744 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 3745 baudrate = (portp->baud_base / portp->custom_divisor);
3746 }
3747 if (baudrate > STL_SC26198MAXBAUD)
3748 baudrate = STL_SC26198MAXBAUD;
3749
c62429d9
JS		 3750 if (baudrate > 0)
3751 for (clk = 0; clk < SC26198_NRBAUDS; clk++)
1da177e4
LT		 3752 if (baudrate <= sc26198_baudtable[clk])
3753 break;
1da177e4
LT		 3754
3755/*
3756 * Check what form of modem signaling is required and set it up.
3757 */
3758 if (tiosp->c_cflag & CLOCAL) {
f8ae4764 3759 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 3760 } else {
3761 iopr |= IOPR_DCDCOS;
3762 imron |= IR_IOPORT;
f8ae4764 3763 portp->port.flags |= ASYNC_CHECK_CD;
1da177e4
LT		 3764 }
3765
3766/*
3767 * Setup sc26198 enhanced modes if we can. In particular we want to
3768 * handle as much of the flow control as possible automatically. As
3769 * well as saving a few CPU cycles it will also greatly improve flow
3770 * control reliability.
3771 */
3772 if (tiosp->c_iflag & IXON) {
3773 mr0 |= MR0_SWFTX | MR0_SWFT;
3774 imron |= IR_XONXOFF;
c62429d9 3775 } else
1da177e4 3776 imroff |= IR_XONXOFF;
c62429d9 3777
1da177e4
LT		 3778 if (tiosp->c_iflag & IXOFF)
3779 mr0 |= MR0_SWFRX;
3780
3781 if (tiosp->c_cflag & CRTSCTS) {
3782 mr2 |= MR2_AUTOCTS;
3783 mr1 |= MR1_AUTORTS;
3784 }
3785
3786/*
3787 * All sc26198 register values calculated so go through and set
3788 * them all up.
3789 */
3790
a0564e14 3791 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3792 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14
JS		 3793 pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
3794 pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
3795 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3796 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3797 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3798
b65b5b59 3799 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3800 BRDENABLE(portp->brdnr, portp->pagenr);
3801 stl_sc26198setreg(portp, IMR, 0);
3802 stl_sc26198updatereg(portp, MR0, mr0);
3803 stl_sc26198updatereg(portp, MR1, mr1);
3804 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
3805 stl_sc26198updatereg(portp, MR2, mr2);
3806 stl_sc26198updatereg(portp, IOPIOR,
3807 ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr));
3808
3809 if (baudrate > 0) {
3810 stl_sc26198setreg(portp, TXCSR, clk);
3811 stl_sc26198setreg(portp, RXCSR, clk);
3812 }
3813
3814 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
3815 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
3816
3817 ipr = stl_sc26198getreg(portp, IPR);
3818 if (ipr & IPR_DCD)
3819 portp->sigs &= ~TIOCM_CD;
3820 else
3821 portp->sigs |= TIOCM_CD;
3822
3823 portp->imr = (portp->imr & ~imroff) | imron;
3824 stl_sc26198setreg(portp, IMR, portp->imr);
3825 BRDDISABLE(portp->brdnr);
b65b5b59 3826 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3827}
3828
3829/*****************************************************************************/
3830
3831/*
3832 * Set the state of the DTR and RTS signals.
3833 */
3834
ca7ed0f2 3835static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 3836{
3837 unsigned char iopioron, iopioroff;
3838 unsigned long flags;
3839
a0564e14
JS		 3840 pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp,
3841 dtr, rts);
1da177e4
LT		 3842
3843 iopioron = 0;
3844 iopioroff = 0;
3845 if (dtr == 0)
3846 iopioroff |= IPR_DTR;
3847 else if (dtr > 0)
3848 iopioron |= IPR_DTR;
3849 if (rts == 0)
3850 iopioroff |= IPR_RTS;
3851 else if (rts > 0)
3852 iopioron |= IPR_RTS;
3853
b65b5b59 3854 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3855 BRDENABLE(portp->brdnr, portp->pagenr);
3856 stl_sc26198setreg(portp, IOPIOR,
3857 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
3858 BRDDISABLE(portp->brdnr);
b65b5b59 3859 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3860}
3861
3862/*****************************************************************************/
3863
3864/*
3865 * Return the state of the signals.
3866 */
3867
ca7ed0f2 3868static int stl_sc26198getsignals(struct stlport *portp)
1da177e4
LT		 3869{
3870 unsigned char ipr;
3871 unsigned long flags;
3872 int sigs;
3873
a0564e14 3874 pr_debug("stl_sc26198getsignals(portp=%p)\n", portp);
1da177e4 3875
b65b5b59 3876 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3877 BRDENABLE(portp->brdnr, portp->pagenr);
3878 ipr = stl_sc26198getreg(portp, IPR);
3879 BRDDISABLE(portp->brdnr);
b65b5b59 3880 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3881
3882 sigs = 0;
3883 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
3884 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
3885 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
3886 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
3887 sigs |= TIOCM_DSR;
014c2544 3888 return sigs;
1da177e4
LT		 3889}
3890
3891/*****************************************************************************/
3892
3893/*
3894 * Enable/Disable the Transmitter and/or Receiver.
3895 */
3896
ca7ed0f2 3897static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3898{
3899 unsigned char ccr;
3900 unsigned long flags;
3901
a0564e14 3902 pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx);
1da177e4
LT		 3903
3904 ccr = portp->crenable;
3905 if (tx == 0)
3906 ccr &= ~CR_TXENABLE;
3907 else if (tx > 0)
3908 ccr |= CR_TXENABLE;
3909 if (rx == 0)
3910 ccr &= ~CR_RXENABLE;
3911 else if (rx > 0)
3912 ccr |= CR_RXENABLE;
3913
b65b5b59 3914 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3915 BRDENABLE(portp->brdnr, portp->pagenr);
3916 stl_sc26198setreg(portp, SCCR, ccr);
3917 BRDDISABLE(portp->brdnr);
3918 portp->crenable = ccr;
b65b5b59 3919 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3920}
3921
3922/*****************************************************************************/
3923
3924/*
3925 * Start/stop the Transmitter and/or Receiver.
3926 */
3927
ca7ed0f2 3928static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3929{
3930 unsigned char imr;
3931 unsigned long flags;
3932
a0564e14 3933 pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3934
3935 imr = portp->imr;
3936 if (tx == 0)
3937 imr &= ~IR_TXRDY;
3938 else if (tx == 1)
3939 imr |= IR_TXRDY;
3940 if (rx == 0)
3941 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
3942 else if (rx > 0)
3943 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
3944
b65b5b59 3945 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3946 BRDENABLE(portp->brdnr, portp->pagenr);
3947 stl_sc26198setreg(portp, IMR, imr);
3948 BRDDISABLE(portp->brdnr);
3949 portp->imr = imr;
3950 if (tx > 0)
3951 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3952 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3953}
3954
3955/*****************************************************************************/
3956
3957/*
3958 * Disable all interrupts from this port.
3959 */
3960
ca7ed0f2 3961static void stl_sc26198disableintrs(struct stlport *portp)
1da177e4
LT		 3962{
3963 unsigned long flags;
3964
a0564e14 3965 pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp);
1da177e4 3966
b65b5b59 3967 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3968 BRDENABLE(portp->brdnr, portp->pagenr);
3969 portp->imr = 0;
3970 stl_sc26198setreg(portp, IMR, 0);
3971 BRDDISABLE(portp->brdnr);
b65b5b59 3972 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3973}
3974
3975/*****************************************************************************/
3976
ca7ed0f2 3977static void stl_sc26198sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3978{
3979 unsigned long flags;
3980
a0564e14 3981 pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3982
b65b5b59 3983 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3984 BRDENABLE(portp->brdnr, portp->pagenr);
3985 if (len == 1) {
3986 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
3987 portp->stats.txbreaks++;
c62429d9 3988 } else
1da177e4 3989 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
c62429d9 3990
1da177e4 3991 BRDDISABLE(portp->brdnr);
b65b5b59 3992 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3993}
3994
3995/*****************************************************************************/
3996
3997/*
3998 * Take flow control actions...
3999 */
4000
ca7ed0f2 4001static void stl_sc26198flowctrl(struct stlport *portp, int state)
1da177e4
LT		 4002{
4003 struct tty_struct *tty;
4004 unsigned long flags;
4005 unsigned char mr0;
4006
a0564e14 4007 pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 4008
615e4a71 4009 if (portp == NULL)
1da177e4 4010 return;
d18a750f 4011 tty = tty_port_tty_get(&portp->port);
615e4a71 4012 if (tty == NULL)
1da177e4
LT		 4013 return;
4014
b65b5b59 4015 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4016 BRDENABLE(portp->brdnr, portp->pagenr);
4017
4018 if (state) {
4019 if (tty->termios->c_iflag & IXOFF) {
4020 mr0 = stl_sc26198getreg(portp, MR0);
4021 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4022 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4023 mr0 |= MR0_SWFRX;
4024 portp->stats.rxxon++;
4025 stl_sc26198wait(portp);
4026 stl_sc26198setreg(portp, MR0, mr0);
4027 }
4028/*
4029 * Question: should we return RTS to what it was before? It may
4030 * have been set by an ioctl... Suppose not, since if you have
4031 * hardware flow control set then it is pretty silly to go and
4032 * set the RTS line by hand.
4033 */
4034 if (tty->termios->c_cflag & CRTSCTS) {
4035 stl_sc26198setreg(portp, MR1,
4036 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4037 stl_sc26198setreg(portp, IOPIOR,
4038 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4039 portp->stats.rxrtson++;
4040 }
4041 } else {
4042 if (tty->termios->c_iflag & IXOFF) {
4043 mr0 = stl_sc26198getreg(portp, MR0);
4044 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4045 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4046 mr0 &= ~MR0_SWFRX;
4047 portp->stats.rxxoff++;
4048 stl_sc26198wait(portp);
4049 stl_sc26198setreg(portp, MR0, mr0);
4050 }
4051 if (tty->termios->c_cflag & CRTSCTS) {
4052 stl_sc26198setreg(portp, MR1,
4053 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4054 stl_sc26198setreg(portp, IOPIOR,
4055 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4056 portp->stats.rxrtsoff++;
4057 }
4058 }
4059
4060 BRDDISABLE(portp->brdnr);
b65b5b59 4061 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4062 tty_kref_put(tty);
1da177e4
LT		 4063}
4064
4065/*****************************************************************************/
4066
4067/*
4068 * Send a flow control character.
4069 */
4070
ca7ed0f2 4071static void stl_sc26198sendflow(struct stlport *portp, int state)
1da177e4
LT		 4072{
4073 struct tty_struct *tty;
4074 unsigned long flags;
4075 unsigned char mr0;
4076
a0564e14 4077 pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 4078
615e4a71 4079 if (portp == NULL)
1da177e4 4080 return;
d18a750f 4081 tty = tty_port_tty_get(&portp->port);
615e4a71 4082 if (tty == NULL)
1da177e4
LT		 4083 return;
4084
b65b5b59 4085 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4086 BRDENABLE(portp->brdnr, portp->pagenr);
4087 if (state) {
4088 mr0 = stl_sc26198getreg(portp, MR0);
4089 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4090 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4091 mr0 |= MR0_SWFRX;
4092 portp->stats.rxxon++;
4093 stl_sc26198wait(portp);
4094 stl_sc26198setreg(portp, MR0, mr0);
4095 } else {
4096 mr0 = stl_sc26198getreg(portp, MR0);
4097 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4098 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4099 mr0 &= ~MR0_SWFRX;
4100 portp->stats.rxxoff++;
4101 stl_sc26198wait(portp);
4102 stl_sc26198setreg(portp, MR0, mr0);
4103 }
4104 BRDDISABLE(portp->brdnr);
b65b5b59 4105 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4106 tty_kref_put(tty);
1da177e4
LT		 4107}
4108
4109/*****************************************************************************/
4110
ca7ed0f2 4111static void stl_sc26198flush(struct stlport *portp)
1da177e4
LT		 4112{
4113 unsigned long flags;
4114
a0564e14 4115 pr_debug("stl_sc26198flush(portp=%p)\n", portp);
1da177e4 4116
615e4a71 4117 if (portp == NULL)
1da177e4
LT		 4118 return;
4119
b65b5b59 4120 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4121 BRDENABLE(portp->brdnr, portp->pagenr);
4122 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4123 stl_sc26198setreg(portp, SCCR, portp->crenable);
4124 BRDDISABLE(portp->brdnr);
4125 portp->tx.tail = portp->tx.head;
b65b5b59 4126 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4127}
4128
4129/*****************************************************************************/
4130
4131/*
4132 * Return the current state of data flow on this port. This is only
4133 * really interresting when determining if data has fully completed
4134 * transmission or not... The sc26198 interrupt scheme cannot
4135 * determine when all data has actually drained, so we need to
4136 * check the port statusy register to be sure.
4137 */
4138
ca7ed0f2 4139static int stl_sc26198datastate(struct stlport *portp)
1da177e4
LT		 4140{
4141 unsigned long flags;
4142 unsigned char sr;
4143
a0564e14 4144 pr_debug("stl_sc26198datastate(portp=%p)\n", portp);
1da177e4 4145
615e4a71 4146 if (portp == NULL)
014c2544 4147 return 0;
1da177e4 4148 if (test_bit(ASYI_TXBUSY, &portp->istate))
014c2544 4149 return 1;
1da177e4 4150
b65b5b59 4151 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4152 BRDENABLE(portp->brdnr, portp->pagenr);
4153 sr = stl_sc26198getreg(portp, SR);
4154 BRDDISABLE(portp->brdnr);
b65b5b59 4155 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4 4156
014c2544 4157 return (sr & SR_TXEMPTY) ? 0 : 1;
1da177e4
LT		 4158}
4159
4160/*****************************************************************************/
4161
4162/*
4163 * Delay for a small amount of time, to give the sc26198 a chance
4164 * to process a command...
4165 */
4166
ca7ed0f2 4167static void stl_sc26198wait(struct stlport *portp)
1da177e4
LT		 4168{
4169 int i;
4170
a0564e14 4171 pr_debug("stl_sc26198wait(portp=%p)\n", portp);
1da177e4 4172
615e4a71 4173 if (portp == NULL)
1da177e4
LT		 4174 return;
4175
c62429d9 4176 for (i = 0; i < 20; i++)
1da177e4
LT		 4177 stl_sc26198getglobreg(portp, TSTR);
4178}
4179
4180/*****************************************************************************/
4181
4182/*
4183 * If we are TX flow controlled and in IXANY mode then we may
4184 * need to unflow control here. We gotta do this because of the
4185 * automatic flow control modes of the sc26198.
4186 */
4187
60be4810 4188static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty)
1da177e4
LT		 4189{
4190 unsigned char mr0;
4191
4192 mr0 = stl_sc26198getreg(portp, MR0);
4193 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4194 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4195 stl_sc26198wait(portp);
4196 stl_sc26198setreg(portp, MR0, mr0);
4197 clear_bit(ASYI_TXFLOWED, &portp->istate);
4198}
4199
4200/*****************************************************************************/
4201
4202/*
4203 * Interrupt service routine for sc26198 panels.
4204 */
4205
ca7ed0f2 4206static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase)
1da177e4 4207{
ca7ed0f2 4208 struct stlport *portp;
1da177e4
LT		 4209 unsigned int iack;
4210
b65b5b59
AC		 4211 spin_lock(&brd_lock);
4212
1da177e4
LT		 4213/*
4214 * Work around bug in sc26198 chip... Cannot have A6 address
4215 * line of UART high, else iack will be returned as 0.
4216 */
4217 outb(0, (iobase + 1));
4218
4219 iack = inb(iobase + XP_IACK);
4220 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4221
4222 if (iack & IVR_RXDATA)
4223 stl_sc26198rxisr(portp, iack);
4224 else if (iack & IVR_TXDATA)
4225 stl_sc26198txisr(portp);
4226 else
4227 stl_sc26198otherisr(portp, iack);
b65b5b59
AC		 4228
4229 spin_unlock(&brd_lock);
1da177e4
LT		 4230}
4231
4232/*****************************************************************************/
4233
4234/*
4235 * Transmit interrupt handler. This has gotta be fast! Handling TX
4236 * chars is pretty simple, stuff as many as possible from the TX buffer
4237 * into the sc26198 FIFO.
4238 * In practice it is possible that interrupts are enabled but that the
4239 * port has been hung up. Need to handle not having any TX buffer here,
4240 * this is done by using the side effect that head and tail will also
4241 * be NULL if the buffer has been freed.
4242 */
4243
ca7ed0f2 4244static void stl_sc26198txisr(struct stlport *portp)
1da177e4 4245{
d18a750f 4246 struct tty_struct *tty;
1da177e4
LT		 4247 unsigned int ioaddr;
4248 unsigned char mr0;
4249 int len, stlen;
4250 char *head, *tail;
4251
a0564e14 4252 pr_debug("stl_sc26198txisr(portp=%p)\n", portp);
1da177e4
LT		 4253
4254 ioaddr = portp->ioaddr;
4255 head = portp->tx.head;
4256 tail = portp->tx.tail;
4257 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4258 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4259 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
4260 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 4261 tty = tty_port_tty_get(&portp->port);
4262 if (tty) {
4263 tty_wakeup(tty);
4264 tty_kref_put(tty);
4265 }
1da177e4
LT		 4266 }
4267
4268 if (len == 0) {
4269 outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR));
4270 mr0 = inb(ioaddr + XP_DATA);
4271 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4272 portp->imr &= ~IR_TXRDY;
4273 outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR));
4274 outb(portp->imr, (ioaddr + XP_DATA));
4275 clear_bit(ASYI_TXBUSY, &portp->istate);
4276 } else {
4277 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4278 outb(mr0, (ioaddr + XP_DATA));
4279 }
4280 } else {
843b568c 4281 len = min(len, SC26198_TXFIFOSIZE);
1da177e4 4282 portp->stats.txtotal += len;
319fe7c3
JS		 4283 stlen = min_t(unsigned int, len,
4284 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 4285 outb(GTXFIFO, (ioaddr + XP_ADDR));
4286 outsb((ioaddr + XP_DATA), tail, stlen);
4287 len -= stlen;
4288 tail += stlen;
4289 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4290 tail = portp->tx.buf;
4291 if (len > 0) {
4292 outsb((ioaddr + XP_DATA), tail, len);
4293 tail += len;
4294 }
4295 portp->tx.tail = tail;
4296 }
4297}
4298
4299/*****************************************************************************/
4300
4301/*
4302 * Receive character interrupt handler. Determine if we have good chars
4303 * or bad chars and then process appropriately. Good chars are easy
4304 * just shove the lot into the RX buffer and set all status byte to 0.
4305 * If a bad RX char then process as required. This routine needs to be
4306 * fast! In practice it is possible that we get an interrupt on a port
4307 * that is closed. This can happen on hangups - since they completely
4308 * shutdown a port not in user context. Need to handle this case.
4309 */
4310
ca7ed0f2 4311static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4312{
4313 struct tty_struct *tty;
4314 unsigned int len, buflen, ioaddr;
4315
a0564e14 4316 pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4 4317
d18a750f 4318 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4319 ioaddr = portp->ioaddr;
4320 outb(GIBCR, (ioaddr + XP_ADDR));
4321 len = inb(ioaddr + XP_DATA) + 1;
4322
4323 if ((iack & IVR_TYPEMASK) == IVR_RXDATA) {
33f0f88f 4324 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 4325 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 4326 outb(GRXFIFO, (ioaddr + XP_ADDR));
4327 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4328 portp->stats.rxlost += len;
4329 portp->stats.rxtotal += len;
4330 } else {
843b568c 4331 len = min(len, buflen);
1da177e4 4332 if (len > 0) {
33f0f88f 4333 unsigned char *ptr;
1da177e4 4334 outb(GRXFIFO, (ioaddr + XP_ADDR));
33f0f88f
AC		 4335 tty_prepare_flip_string(tty, &ptr, len);
4336 insb((ioaddr + XP_DATA), ptr, len);
1da177e4
LT		 4337 tty_schedule_flip(tty);
4338 portp->stats.rxtotal += len;
4339 }
4340 }
4341 } else {
4342 stl_sc26198rxbadchars(portp);
4343 }
4344
4345/*
4346 * If we are TX flow controlled and in IXANY mode then we may need
4347 * to unflow control here. We gotta do this because of the automatic
4348 * flow control modes of the sc26198.
4349 */
4350 if (test_bit(ASYI_TXFLOWED, &portp->istate)) {
615e4a71
JS		 4351 if ((tty != NULL) &&
4352 (tty->termios != NULL) &&
1da177e4
LT		 4353 (tty->termios->c_iflag & IXANY)) {
4354 stl_sc26198txunflow(portp, tty);
4355 }
4356 }
d18a750f 4357 tty_kref_put(tty);
1da177e4
LT		 4358}
4359
4360/*****************************************************************************/
4361
4362/*
4363 * Process an RX bad character.
4364 */
4365
60be4810 4366static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch)
1da177e4
LT		 4367{
4368 struct tty_struct *tty;
4369 unsigned int ioaddr;
4370
d18a750f 4371 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4372 ioaddr = portp->ioaddr;
4373
4374 if (status & SR_RXPARITY)
4375 portp->stats.rxparity++;
4376 if (status & SR_RXFRAMING)
4377 portp->stats.rxframing++;
4378 if (status & SR_RXOVERRUN)
4379 portp->stats.rxoverrun++;
4380 if (status & SR_RXBREAK)
4381 portp->stats.rxbreaks++;
4382
615e4a71 4383 if ((tty != NULL) &&
1da177e4
LT		 4384 ((portp->rxignoremsk & status) == 0)) {
4385 if (portp->rxmarkmsk & status) {
4386 if (status & SR_RXBREAK) {
4387 status = TTY_BREAK;
f8ae4764 4388 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 4389 do_SAK(tty);
4390 BRDENABLE(portp->brdnr, portp->pagenr);
4391 }
c62429d9 4392 } else if (status & SR_RXPARITY)
1da177e4 4393 status = TTY_PARITY;
c62429d9 4394 else if (status & SR_RXFRAMING)
1da177e4 4395 status = TTY_FRAME;
c62429d9 4396 else if(status & SR_RXOVERRUN)
1da177e4 4397 status = TTY_OVERRUN;
c62429d9 4398 else
1da177e4 4399 status = 0;
c62429d9 4400 } else
1da177e4 4401 status = 0;
1da177e4 4402
33f0f88f
AC		 4403 tty_insert_flip_char(tty, ch, status);
4404 tty_schedule_flip(tty);
1da177e4
LT		 4405
4406 if (status == 0)
4407 portp->stats.rxtotal++;
4408 }
d18a750f 4409 tty_kref_put(tty);
1da177e4
LT		 4410}
4411
4412/*****************************************************************************/
4413
4414/*
4415 * Process all characters in the RX FIFO of the UART. Check all char
4416 * status bytes as well, and process as required. We need to check
4417 * all bytes in the FIFO, in case some more enter the FIFO while we
4418 * are here. To get the exact character error type we need to switch
4419 * into CHAR error mode (that is why we need to make sure we empty
4420 * the FIFO).
4421 */
4422
ca7ed0f2 4423static void stl_sc26198rxbadchars(struct stlport *portp)
1da177e4
LT		 4424{
4425 unsigned char status, mr1;
4426 char ch;
4427
4428/*
4429 * To get the precise error type for each character we must switch
4430 * back into CHAR error mode.
4431 */
4432 mr1 = stl_sc26198getreg(portp, MR1);
4433 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4434
4435 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4436 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4437 ch = stl_sc26198getreg(portp, RXFIFO);
4438 stl_sc26198rxbadch(portp, status, ch);
4439 }
4440
4441/*
4442 * To get correct interrupt class we must switch back into BLOCK
4443 * error mode.
4444 */
4445 stl_sc26198setreg(portp, MR1, mr1);
4446}
4447
4448/*****************************************************************************/
4449
4450/*
4451 * Other interrupt handler. This includes modem signals, flow
4452 * control actions, etc. Most stuff is left to off-level interrupt
4453 * processing time.
4454 */
4455
ca7ed0f2 4456static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4457{
4458 unsigned char cir, ipr, xisr;
4459
a0564e14 4460 pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4461
4462 cir = stl_sc26198getglobreg(portp, CIR);
4463
4464 switch (cir & CIR_SUBTYPEMASK) {
4465 case CIR_SUBCOS:
4466 ipr = stl_sc26198getreg(portp, IPR);
4467 if (ipr & IPR_DCDCHANGE) {
ccfea3c9 4468 stl_cd_change(portp);
1da177e4
LT		 4469 portp->stats.modem++;
4470 }
4471 break;
4472 case CIR_SUBXONXOFF:
4473 xisr = stl_sc26198getreg(portp, XISR);
4474 if (xisr & XISR_RXXONGOT) {
4475 set_bit(ASYI_TXFLOWED, &portp->istate);
4476 portp->stats.txxoff++;
4477 }
4478 if (xisr & XISR_RXXOFFGOT) {
4479 clear_bit(ASYI_TXFLOWED, &portp->istate);
4480 portp->stats.txxon++;
4481 }
4482 break;
4483 case CIR_SUBBREAK:
4484 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4485 stl_sc26198rxbadchars(portp);
4486 break;
4487 default:
4488 break;
4489 }
4490}
4491
fc06b5cf
JS		 4492static void stl_free_isabrds(void)
4493{
4494 struct stlbrd *brdp;
4495 unsigned int i;
4496
4497 for (i = 0; i < stl_nrbrds; i++) {
4498 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4499 continue;
4500
4501 free_irq(brdp->irq, brdp);
4502
4503 stl_cleanup_panels(brdp);
4504
4505 release_region(brdp->ioaddr1, brdp->iosize1);
4506 if (brdp->iosize2 > 0)
4507 release_region(brdp->ioaddr2, brdp->iosize2);
4508
4509 kfree(brdp);
4510 stl_brds[i] = NULL;
4511 }
4512}
4513
23b85a15
JS		 4514/*
4515 * Loadable module initialization stuff.
4516 */
4517static int __init stallion_module_init(void)
4518{
843b568c
JS		 4519 struct stlbrd *brdp;
4520 struct stlconf conf;
aeaccfe4 4521 unsigned int i, j;
fc06b5cf 4522 int retval;
23b85a15
JS		 4523
4524 printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion);
4525
4526 spin_lock_init(&stallion_lock);
4527 spin_lock_init(&brd_lock);
4528
e415109f
JS		 4529 stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS);
4530 if (!stl_serial) {
4531 retval = -ENOMEM;
4532 goto err;
4533 }
4534
4535 stl_serial->owner = THIS_MODULE;
4536 stl_serial->driver_name = stl_drvname;
4537 stl_serial->name = "ttyE";
4538 stl_serial->major = STL_SERIALMAJOR;
4539 stl_serial->minor_start = 0;
4540 stl_serial->type = TTY_DRIVER_TYPE_SERIAL;
4541 stl_serial->subtype = SERIAL_TYPE_NORMAL;
4542 stl_serial->init_termios = stl_deftermios;
4543 stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4544 tty_set_operations(stl_serial, &stl_ops);
4545
4546 retval = tty_register_driver(stl_serial);
4547 if (retval) {
4548 printk("STALLION: failed to register serial driver\n");
4549 goto err_frtty;
4550 }
4551
843b568c
JS		 4552/*
4553 * Find any dynamically supported boards. That is via module load
4554 * line options.
4555 */
4556 for (i = stl_nrbrds; i < stl_nargs; i++) {
4557 memset(&conf, 0, sizeof(conf));
4558 if (stl_parsebrd(&conf, stl_brdsp[i]) == 0)
4559 continue;
4560 if ((brdp = stl_allocbrd()) == NULL)
4561 continue;
4562 brdp->brdnr = i;
4563 brdp->brdtype = conf.brdtype;
4564 brdp->ioaddr1 = conf.ioaddr1;
4565 brdp->ioaddr2 = conf.ioaddr2;
4566 brdp->irq = conf.irq;
4567 brdp->irqtype = conf.irqtype;
b08b5ad9
IK		 4568 stl_brds[brdp->brdnr] = brdp;
4569 if (stl_brdinit(brdp)) {
4570 stl_brds[brdp->brdnr] = NULL;
843b568c 4571 kfree(brdp);
b08b5ad9 4572 } else {
aeaccfe4
JS		 4573 for (j = 0; j < brdp->nrports; j++)
4574 tty_register_device(stl_serial,
4575 brdp->brdnr * STL_MAXPORTS + j, NULL);
843b568c 4576 stl_nrbrds = i + 1;
79cfe7ab 4577 }
843b568c 4578 }
23b85a15 4579
79cfe7ab 4580 /* this has to be _after_ isa finding because of locking */
b1b84fe0 4581 retval = pci_register_driver(&stl_pcidriver);
e415109f
JS		 4582 if (retval && stl_nrbrds == 0) {
4583 printk(KERN_ERR "STALLION: can't register pci driver\n");
4584 goto err_unrtty;
fc06b5cf 4585 }
23b85a15
JS		 4586
4587/*
4588 * Set up a character driver for per board stuff. This is mainly used
4589 * to do stats ioctls on the ports.
4590 */
4591 if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem))
4592 printk("STALLION: failed to register serial board device\n");
4593
4594 stallion_class = class_create(THIS_MODULE, "staliomem");
e415109f
JS		 4595 if (IS_ERR(stallion_class))
4596 printk("STALLION: failed to create class\n");
23b85a15 4597 for (i = 0; i < 4; i++)
03457cd4
GKH		 4598 device_create(stallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i),
4599 NULL, "staliomem%d", i);
23b85a15 4600
23b85a15 4601 return 0;
e415109f
JS		 4602err_unrtty:
4603 tty_unregister_driver(stl_serial);
4604err_frtty:
fc06b5cf 4605 put_tty_driver(stl_serial);
b1b84fe0
JS		 4606err:
4607 return retval;
23b85a15
JS		 4608}
4609
4610static void __exit stallion_module_exit(void)
4611{
aeaccfe4
JS		 4612 struct stlbrd *brdp;
4613 unsigned int i, j;
23b85a15
JS		 4614
4615 pr_debug("cleanup_module()\n");
4616
4617 printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle,
4618 stl_drvversion);
4619
4620/*
4621 * Free up all allocated resources used by the ports. This includes
4622 * memory and interrupts. As part of this process we will also do
4623 * a hangup on every open port - to try to flush out any processes
4624 * hanging onto ports.
4625 */
aeaccfe4
JS		 4626 for (i = 0; i < stl_nrbrds; i++) {
4627 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4628 continue;
4629 for (j = 0; j < brdp->nrports; j++)
4630 tty_unregister_device(stl_serial,
4631 brdp->brdnr * STL_MAXPORTS + j);
4632 }
fc06b5cf 4633
23b85a15 4634 for (i = 0; i < 4; i++)
07c015e7 4635 device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
68fc4fab 4636 unregister_chrdev(STL_SIOMEMMAJOR, "staliomem");
23b85a15
JS		 4637 class_destroy(stallion_class);
4638
b1b84fe0
JS		 4639 pci_unregister_driver(&stl_pcidriver);
4640
fc06b5cf 4641 stl_free_isabrds();
e415109f
JS		 4642
4643 tty_unregister_driver(stl_serial);
4644 put_tty_driver(stl_serial);
23b85a15
JS		 4645}
4646
4647module_init(stallion_module_init);
4648module_exit(stallion_module_exit);
4649
4650MODULE_AUTHOR("Greg Ungerer");
4651MODULE_DESCRIPTION("Stallion Multiport Serial Driver");
4652MODULE_LICENSE("GPL");
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