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[PATCH] pcmcia: add pcmcia_disable_device
[net-next-2.6.git] / drivers / char / pcmcia / synclink_cs.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
a7482a2e 4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
1da177e4
LT		 5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30#if defined(__i386__)
31# define BREAKPOINT() asm(" int $3");
32#else
33# define BREAKPOINT() { }
34#endif
35
36#define MAX_DEVICE_COUNT 4
37
38#include <linux/config.h>
39#include <linux/module.h>
40#include <linux/errno.h>
41#include <linux/signal.h>
42#include <linux/sched.h>
43#include <linux/timer.h>
44#include <linux/time.h>
45#include <linux/interrupt.h>
46#include <linux/pci.h>
47#include <linux/tty.h>
48#include <linux/tty_flip.h>
49#include <linux/serial.h>
50#include <linux/major.h>
51#include <linux/string.h>
52#include <linux/fcntl.h>
53#include <linux/ptrace.h>
54#include <linux/ioport.h>
55#include <linux/mm.h>
56#include <linux/slab.h>
57#include <linux/netdevice.h>
58#include <linux/vmalloc.h>
59#include <linux/init.h>
60#include <asm/serial.h>
61#include <linux/delay.h>
62#include <linux/ioctl.h>
63
64#include <asm/system.h>
65#include <asm/io.h>
66#include <asm/irq.h>
67#include <asm/dma.h>
68#include <linux/bitops.h>
69#include <asm/types.h>
70#include <linux/termios.h>
71#include <linux/workqueue.h>
72#include <linux/hdlc.h>
73
1da177e4
LT		 74#include <pcmcia/cs_types.h>
75#include <pcmcia/cs.h>
76#include <pcmcia/cistpl.h>
77#include <pcmcia/cisreg.h>
78#include <pcmcia/ds.h>
79
80#ifdef CONFIG_HDLC_MODULE
81#define CONFIG_HDLC 1
82#endif
83
84#define GET_USER(error,value,addr) error = get_user(value,addr)
85#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86#define PUT_USER(error,value,addr) error = put_user(value,addr)
87#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89#include <asm/uaccess.h>
90
91#include "linux/synclink.h"
92
93static MGSL_PARAMS default_params = {
94 MGSL_MODE_HDLC, /* unsigned long mode */
95 0, /* unsigned char loopback; */
96 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
97 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
98 0, /* unsigned long clock_speed; */
99 0xff, /* unsigned char addr_filter; */
100 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
101 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
102 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
103 9600, /* unsigned long data_rate; */
104 8, /* unsigned char data_bits; */
105 1, /* unsigned char stop_bits; */
106 ASYNC_PARITY_NONE /* unsigned char parity; */
107};
108
109typedef struct
110{
111 int count;
112 unsigned char status;
113 char data[1];
114} RXBUF;
115
116/* The queue of BH actions to be performed */
117
118#define BH_RECEIVE 1
119#define BH_TRANSMIT 2
120#define BH_STATUS 4
121
122#define IO_PIN_SHUTDOWN_LIMIT 100
123
124#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
125
126struct _input_signal_events {
127 int ri_up;
128 int ri_down;
129 int dsr_up;
130 int dsr_down;
131 int dcd_up;
132 int dcd_down;
133 int cts_up;
134 int cts_down;
135};
136
137
138/*
139 * Device instance data structure
140 */
141
142typedef struct _mgslpc_info {
143 void *if_ptr; /* General purpose pointer (used by SPPP) */
144 int magic;
145 int flags;
146 int count; /* count of opens */
147 int line;
148 unsigned short close_delay;
149 unsigned short closing_wait; /* time to wait before closing */
150
151 struct mgsl_icount icount;
152
153 struct tty_struct *tty;
154 int timeout;
155 int x_char; /* xon/xoff character */
156 int blocked_open; /* # of blocked opens */
157 unsigned char read_status_mask;
158 unsigned char ignore_status_mask;
159
160 unsigned char *tx_buf;
161 int tx_put;
162 int tx_get;
163 int tx_count;
164
165 /* circular list of fixed length rx buffers */
166
167 unsigned char *rx_buf; /* memory allocated for all rx buffers */
168 int rx_buf_total_size; /* size of memory allocated for rx buffers */
169 int rx_put; /* index of next empty rx buffer */
170 int rx_get; /* index of next full rx buffer */
171 int rx_buf_size; /* size in bytes of single rx buffer */
172 int rx_buf_count; /* total number of rx buffers */
173 int rx_frame_count; /* number of full rx buffers */
174
175 wait_queue_head_t open_wait;
176 wait_queue_head_t close_wait;
177
178 wait_queue_head_t status_event_wait_q;
179 wait_queue_head_t event_wait_q;
180 struct timer_list tx_timer; /* HDLC transmit timeout timer */
181 struct _mgslpc_info *next_device; /* device list link */
182
183 unsigned short imra_value;
184 unsigned short imrb_value;
185 unsigned char pim_value;
186
187 spinlock_t lock;
188 struct work_struct task; /* task structure for scheduling bh */
189
190 u32 max_frame_size;
191
192 u32 pending_bh;
193
194 int bh_running;
195 int bh_requested;
196
197 int dcd_chkcount; /* check counts to prevent */
198 int cts_chkcount; /* too many IRQs if a signal */
199 int dsr_chkcount; /* is floating */
200 int ri_chkcount;
201
202 int rx_enabled;
203 int rx_overflow;
204
205 int tx_enabled;
206 int tx_active;
207 int tx_aborting;
208 u32 idle_mode;
209
210 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
211
212 char device_name[25]; /* device instance name */
213
214 unsigned int io_base; /* base I/O address of adapter */
215 unsigned int irq_level;
216
217 MGSL_PARAMS params; /* communications parameters */
218
219 unsigned char serial_signals; /* current serial signal states */
220
221 char irq_occurred; /* for diagnostics use */
222 char testing_irq;
223 unsigned int init_error; /* startup error (DIAGS) */
224
225 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
226 BOOLEAN drop_rts_on_tx_done;
227
228 struct _input_signal_events input_signal_events;
229
230 /* PCMCIA support */
231 dev_link_t link;
232 dev_node_t node;
233 int stop;
234
235 /* SPPP/Cisco HDLC device parts */
236 int netcount;
237 int dosyncppp;
238 spinlock_t netlock;
239
240#ifdef CONFIG_HDLC
241 struct net_device *netdev;
242#endif
243
244} MGSLPC_INFO;
245
246#define MGSLPC_MAGIC 0x5402
247
248/*
249 * The size of the serial xmit buffer is 1 page, or 4096 bytes
250 */
251#define TXBUFSIZE 4096
252
253
254#define CHA 0x00 /* channel A offset */
255#define CHB 0x40 /* channel B offset */
256
257/*
258 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
259 */
260#undef PVR
261
262#define RXFIFO 0
263#define TXFIFO 0
264#define STAR 0x20
265#define CMDR 0x20
266#define RSTA 0x21
267#define PRE 0x21
268#define MODE 0x22
269#define TIMR 0x23
270#define XAD1 0x24
271#define XAD2 0x25
272#define RAH1 0x26
273#define RAH2 0x27
274#define DAFO 0x27
275#define RAL1 0x28
276#define RFC 0x28
277#define RHCR 0x29
278#define RAL2 0x29
279#define RBCL 0x2a
280#define XBCL 0x2a
281#define RBCH 0x2b
282#define XBCH 0x2b
283#define CCR0 0x2c
284#define CCR1 0x2d
285#define CCR2 0x2e
286#define CCR3 0x2f
287#define VSTR 0x34
288#define BGR 0x34
289#define RLCR 0x35
290#define AML 0x36
291#define AMH 0x37
292#define GIS 0x38
293#define IVA 0x38
294#define IPC 0x39
295#define ISR 0x3a
296#define IMR 0x3a
297#define PVR 0x3c
298#define PIS 0x3d
299#define PIM 0x3d
300#define PCR 0x3e
301#define CCR4 0x3f
302
303// IMR/ISR
304
305#define IRQ_BREAK_ON BIT15 // rx break detected
306#define IRQ_DATAOVERRUN BIT14 // receive data overflow
307#define IRQ_ALLSENT BIT13 // all sent
308#define IRQ_UNDERRUN BIT12 // transmit data underrun
309#define IRQ_TIMER BIT11 // timer interrupt
310#define IRQ_CTS BIT10 // CTS status change
311#define IRQ_TXREPEAT BIT9 // tx message repeat
312#define IRQ_TXFIFO BIT8 // transmit pool ready
313#define IRQ_RXEOM BIT7 // receive message end
314#define IRQ_EXITHUNT BIT6 // receive frame start
315#define IRQ_RXTIME BIT6 // rx char timeout
316#define IRQ_DCD BIT2 // carrier detect status change
317#define IRQ_OVERRUN BIT1 // receive frame overflow
318#define IRQ_RXFIFO BIT0 // receive pool full
319
320// STAR
321
322#define XFW BIT6 // transmit FIFO write enable
323#define CEC BIT2 // command executing
324#define CTS BIT1 // CTS state
325
326#define PVR_DTR BIT0
327#define PVR_DSR BIT1
328#define PVR_RI BIT2
329#define PVR_AUTOCTS BIT3
330#define PVR_RS232 0x20 /* 0010b */
331#define PVR_V35 0xe0 /* 1110b */
332#define PVR_RS422 0x40 /* 0100b */
333
334/* Register access functions */
335
336#define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
337#define read_reg(info, reg) inb((info)->io_base + (reg))
338
339#define read_reg16(info, reg) inw((info)->io_base + (reg))
340#define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
341
342#define set_reg_bits(info, reg, mask) \
343 write_reg(info, (reg), \
344 (unsigned char) (read_reg(info, (reg)) | (mask)))
345#define clear_reg_bits(info, reg, mask) \
346 write_reg(info, (reg), \
347 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
348/*
349 * interrupt enable/disable routines
350 */
351static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
352{
353 if (channel == CHA) {
354 info->imra_value |= mask;
355 write_reg16(info, CHA + IMR, info->imra_value);
356 } else {
357 info->imrb_value |= mask;
358 write_reg16(info, CHB + IMR, info->imrb_value);
359 }
360}
361static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
362{
363 if (channel == CHA) {
364 info->imra_value &= ~mask;
365 write_reg16(info, CHA + IMR, info->imra_value);
366 } else {
367 info->imrb_value &= ~mask;
368 write_reg16(info, CHB + IMR, info->imrb_value);
369 }
370}
371
372#define port_irq_disable(info, mask) \
373 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
374
375#define port_irq_enable(info, mask) \
376 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
377
378static void rx_start(MGSLPC_INFO *info);
379static void rx_stop(MGSLPC_INFO *info);
380
381static void tx_start(MGSLPC_INFO *info);
382static void tx_stop(MGSLPC_INFO *info);
383static void tx_set_idle(MGSLPC_INFO *info);
384
385static void get_signals(MGSLPC_INFO *info);
386static void set_signals(MGSLPC_INFO *info);
387
388static void reset_device(MGSLPC_INFO *info);
389
390static void hdlc_mode(MGSLPC_INFO *info);
391static void async_mode(MGSLPC_INFO *info);
392
393static void tx_timeout(unsigned long context);
394
395static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
396
397#ifdef CONFIG_HDLC
398#define dev_to_port(D) (dev_to_hdlc(D)->priv)
399static void hdlcdev_tx_done(MGSLPC_INFO *info);
400static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
401static int hdlcdev_init(MGSLPC_INFO *info);
402static void hdlcdev_exit(MGSLPC_INFO *info);
403#endif
404
405static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
406
407static BOOLEAN register_test(MGSLPC_INFO *info);
408static BOOLEAN irq_test(MGSLPC_INFO *info);
409static int adapter_test(MGSLPC_INFO *info);
410
411static int claim_resources(MGSLPC_INFO *info);
412static void release_resources(MGSLPC_INFO *info);
413static void mgslpc_add_device(MGSLPC_INFO *info);
414static void mgslpc_remove_device(MGSLPC_INFO *info);
415
416static int rx_get_frame(MGSLPC_INFO *info);
417static void rx_reset_buffers(MGSLPC_INFO *info);
418static int rx_alloc_buffers(MGSLPC_INFO *info);
419static void rx_free_buffers(MGSLPC_INFO *info);
420
421static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
422
423/*
424 * Bottom half interrupt handlers
425 */
426static void bh_handler(void* Context);
427static void bh_transmit(MGSLPC_INFO *info);
428static void bh_status(MGSLPC_INFO *info);
429
430/*
431 * ioctl handlers
432 */
433static int tiocmget(struct tty_struct *tty, struct file *file);
434static int tiocmset(struct tty_struct *tty, struct file *file,
435 unsigned int set, unsigned int clear);
436static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
437static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
438static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
439static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
440static int set_txidle(MGSLPC_INFO *info, int idle_mode);
441static int set_txenable(MGSLPC_INFO *info, int enable);
442static int tx_abort(MGSLPC_INFO *info);
443static int set_rxenable(MGSLPC_INFO *info, int enable);
444static int wait_events(MGSLPC_INFO *info, int __user *mask);
445
446static MGSLPC_INFO *mgslpc_device_list = NULL;
447static int mgslpc_device_count = 0;
448
449/*
450 * Set this param to non-zero to load eax with the
451 * .text section address and breakpoint on module load.
452 * This is useful for use with gdb and add-symbol-file command.
453 */
454static int break_on_load=0;
455
456/*
457 * Driver major number, defaults to zero to get auto
458 * assigned major number. May be forced as module parameter.
459 */
460static int ttymajor=0;
461
462static int debug_level = 0;
463static int maxframe[MAX_DEVICE_COUNT] = {0,};
464static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
465
466module_param(break_on_load, bool, 0);
467module_param(ttymajor, int, 0);
468module_param(debug_level, int, 0);
469module_param_array(maxframe, int, NULL, 0);
470module_param_array(dosyncppp, int, NULL, 0);
471
472MODULE_LICENSE("GPL");
473
474static char *driver_name = "SyncLink PC Card driver";
a7482a2e 475static char *driver_version = "$Revision: 4.34 $";
1da177e4
LT		 476
477static struct tty_driver *serial_driver;
478
479/* number of characters left in xmit buffer before we ask for more */
480#define WAKEUP_CHARS 256
481
482static void mgslpc_change_params(MGSLPC_INFO *info);
483static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
484
485/* PCMCIA prototypes */
486
487static void mgslpc_config(dev_link_t *link);
488static void mgslpc_release(u_long arg);
cc3b4866 489static void mgslpc_detach(struct pcmcia_device *p_dev);
1da177e4 490
1da177e4
LT		 491/*
492 * 1st function defined in .text section. Calling this function in
493 * init_module() followed by a breakpoint allows a remote debugger
494 * (gdb) to get the .text address for the add-symbol-file command.
495 * This allows remote debugging of dynamically loadable modules.
496 */
497static void* mgslpc_get_text_ptr(void)
498{
499 return mgslpc_get_text_ptr;
500}
501
502/**
503 * line discipline callback wrappers
504 *
505 * The wrappers maintain line discipline references
506 * while calling into the line discipline.
507 *
508 * ldisc_flush_buffer - flush line discipline receive buffers
509 * ldisc_receive_buf - pass receive data to line discipline
510 */
511
512static void ldisc_flush_buffer(struct tty_struct *tty)
513{
514 struct tty_ldisc *ld = tty_ldisc_ref(tty);
515 if (ld) {
516 if (ld->flush_buffer)
517 ld->flush_buffer(tty);
518 tty_ldisc_deref(ld);
519 }
520}
521
522static void ldisc_receive_buf(struct tty_struct *tty,
523 const __u8 *data, char *flags, int count)
524{
525 struct tty_ldisc *ld;
526 if (!tty)
527 return;
528 ld = tty_ldisc_ref(tty);
529 if (ld) {
530 if (ld->receive_buf)
531 ld->receive_buf(tty, data, flags, count);
532 tty_ldisc_deref(ld);
533 }
534}
535
f8cfa618 536static int mgslpc_attach(struct pcmcia_device *p_dev)
1da177e4
LT		 537{
538 MGSLPC_INFO *info;
539 dev_link_t *link;
1da177e4
LT		 540
541 if (debug_level >= DEBUG_LEVEL_INFO)
542 printk("mgslpc_attach\n");
543
544 info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
545 if (!info) {
546 printk("Error can't allocate device instance data\n");
f8cfa618 547 return -ENOMEM;
1da177e4
LT		 548 }
549
550 memset(info, 0, sizeof(MGSLPC_INFO));
551 info->magic = MGSLPC_MAGIC;
552 INIT_WORK(&info->task, bh_handler, info);
553 info->max_frame_size = 4096;
554 info->close_delay = 5*HZ/10;
555 info->closing_wait = 30*HZ;
556 init_waitqueue_head(&info->open_wait);
557 init_waitqueue_head(&info->close_wait);
558 init_waitqueue_head(&info->status_event_wait_q);
559 init_waitqueue_head(&info->event_wait_q);
560 spin_lock_init(&info->lock);
561 spin_lock_init(&info->netlock);
562 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
563 info->idle_mode = HDLC_TXIDLE_FLAGS;
564 info->imra_value = 0xffff;
565 info->imrb_value = 0xffff;
566 info->pim_value = 0xff;
567
568 link = &info->link;
569 link->priv = info;
570
571 /* Initialize the dev_link_t structure */
572
573 /* Interrupt setup */
574 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
0c7ab676 575 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
1da177e4
LT		 576 link->irq.Handler = NULL;
577
578 link->conf.Attributes = 0;
579 link->conf.Vcc = 50;
580 link->conf.IntType = INT_MEMORY_AND_IO;
581
f8cfa618
DB		 582 link->handle = p_dev;
583 p_dev->instance = link;
1da177e4 584
f8cfa618
DB		 585 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
586 mgslpc_config(link);
1da177e4
LT		 587
588 mgslpc_add_device(info);
589
f8cfa618 590 return 0;
1da177e4
LT		 591}
592
593/* Card has been inserted.
594 */
595
596#define CS_CHECK(fn, ret) \
597do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
598
599static void mgslpc_config(dev_link_t *link)
600{
601 client_handle_t handle = link->handle;
602 MGSLPC_INFO *info = link->priv;
603 tuple_t tuple;
604 cisparse_t parse;
605 int last_fn, last_ret;
606 u_char buf[64];
607 config_info_t conf;
608 cistpl_cftable_entry_t dflt = { 0 };
609 cistpl_cftable_entry_t *cfg;
610
611 if (debug_level >= DEBUG_LEVEL_INFO)
612 printk("mgslpc_config(0x%p)\n", link);
613
614 /* read CONFIG tuple to find its configuration registers */
615 tuple.DesiredTuple = CISTPL_CONFIG;
616 tuple.Attributes = 0;
617 tuple.TupleData = buf;
618 tuple.TupleDataMax = sizeof(buf);
619 tuple.TupleOffset = 0;
620 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
621 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
622 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
623 link->conf.ConfigBase = parse.config.base;
624 link->conf.Present = parse.config.rmask[0];
625
626 /* Configure card */
627 link->state |= DEV_CONFIG;
628
629 /* Look up the current Vcc */
630 CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(handle, &conf));
631 link->conf.Vcc = conf.Vcc;
632
633 /* get CIS configuration entry */
634
635 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
636 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
637
638 cfg = &(parse.cftable_entry);
639 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
640 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
641
642 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
643 if (cfg->index == 0)
644 goto cs_failed;
645
646 link->conf.ConfigIndex = cfg->index;
647 link->conf.Attributes |= CONF_ENABLE_IRQ;
648
649 /* IO window settings */
650 link->io.NumPorts1 = 0;
651 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
652 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
653 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
654 if (!(io->flags & CISTPL_IO_8BIT))
655 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
656 if (!(io->flags & CISTPL_IO_16BIT))
657 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
658 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
659 link->io.BasePort1 = io->win[0].base;
660 link->io.NumPorts1 = io->win[0].len;
661 CS_CHECK(RequestIO, pcmcia_request_io(link->handle, &link->io));
662 }
663
664 link->conf.Attributes = CONF_ENABLE_IRQ;
665 link->conf.Vcc = 50;
666 link->conf.IntType = INT_MEMORY_AND_IO;
667 link->conf.ConfigIndex = 8;
668 link->conf.Present = PRESENT_OPTION;
669
670 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
671 link->irq.Handler = mgslpc_isr;
672 link->irq.Instance = info;
673 CS_CHECK(RequestIRQ, pcmcia_request_irq(link->handle, &link->irq));
674
675 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link->handle, &link->conf));
676
677 info->io_base = link->io.BasePort1;
678 info->irq_level = link->irq.AssignedIRQ;
679
680 /* add to linked list of devices */
681 sprintf(info->node.dev_name, "mgslpc0");
682 info->node.major = info->node.minor = 0;
683 link->dev = &info->node;
684
685 printk(KERN_INFO "%s: index 0x%02x:",
686 info->node.dev_name, link->conf.ConfigIndex);
687 if (link->conf.Attributes & CONF_ENABLE_IRQ)
688 printk(", irq %d", link->irq.AssignedIRQ);
689 if (link->io.NumPorts1)
690 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
691 link->io.BasePort1+link->io.NumPorts1-1);
692 printk("\n");
693
694 link->state &= ~DEV_CONFIG_PENDING;
695 return;
696
697cs_failed:
698 cs_error(link->handle, last_fn, last_ret);
699 mgslpc_release((u_long)link);
700}
701
702/* Card has been removed.
703 * Unregister device and release PCMCIA configuration.
704 * If device is open, postpone until it is closed.
705 */
706static void mgslpc_release(u_long arg)
707{
708 dev_link_t *link = (dev_link_t *)arg;
709
710 if (debug_level >= DEBUG_LEVEL_INFO)
711 printk("mgslpc_release(0x%p)\n", link);
712
5f2a71fc 713 pcmcia_disable_device(link->handle);
1da177e4
LT		 714}
715
cc3b4866 716static void mgslpc_detach(struct pcmcia_device *p_dev)
1da177e4 717{
cc3b4866 718 dev_link_t *link = dev_to_instance(p_dev);
1da177e4
LT		 719
720 if (debug_level >= DEBUG_LEVEL_INFO)
721 printk("mgslpc_detach(0x%p)\n", link);
cc3b4866 722
1da177e4 723 if (link->state & DEV_CONFIG) {
cc3b4866
DB		 724 ((MGSLPC_INFO *)link->priv)->stop = 1;
725 mgslpc_release((u_long)link);
1da177e4
LT		 726 }
727
1da177e4
LT		 728 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
729}
730
98e4c28b
DB		 731static int mgslpc_suspend(struct pcmcia_device *dev)
732{
733 dev_link_t *link = dev_to_instance(dev);
734 MGSLPC_INFO *info = link->priv;
735
736 link->state |= DEV_SUSPEND;
737 info->stop = 1;
738 if (link->state & DEV_CONFIG)
739 pcmcia_release_configuration(link->handle);
740
741 return 0;
742}
743
744static int mgslpc_resume(struct pcmcia_device *dev)
745{
746 dev_link_t *link = dev_to_instance(dev);
747 MGSLPC_INFO *info = link->priv;
748
749 link->state &= ~DEV_SUSPEND;
750 if (link->state & DEV_CONFIG)
751 pcmcia_request_configuration(link->handle, &link->conf);
752 info->stop = 0;
753
754 return 0;
755}
756
757
1da177e4
LT		 758static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
759 char *name, const char *routine)
760{
761#ifdef MGSLPC_PARANOIA_CHECK
762 static const char *badmagic =
763 "Warning: bad magic number for mgsl struct (%s) in %s\n";
764 static const char *badinfo =
765 "Warning: null mgslpc_info for (%s) in %s\n";
766
767 if (!info) {
768 printk(badinfo, name, routine);
769 return 1;
770 }
771 if (info->magic != MGSLPC_MAGIC) {
772 printk(badmagic, name, routine);
773 return 1;
774 }
775#else
776 if (!info)
777 return 1;
778#endif
779 return 0;
780}
781
782
783#define CMD_RXFIFO BIT7 // release current rx FIFO
784#define CMD_RXRESET BIT6 // receiver reset
785#define CMD_RXFIFO_READ BIT5
786#define CMD_START_TIMER BIT4
787#define CMD_TXFIFO BIT3 // release current tx FIFO
788#define CMD_TXEOM BIT1 // transmit end message
789#define CMD_TXRESET BIT0 // transmit reset
790
791static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
792{
793 int i = 0;
794 /* wait for command completion */
795 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
796 udelay(1);
797 if (i++ == 1000)
798 return FALSE;
799 }
800 return TRUE;
801}
802
803static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
804{
805 wait_command_complete(info, channel);
806 write_reg(info, (unsigned char) (channel + CMDR), cmd);
807}
808
809static void tx_pause(struct tty_struct *tty)
810{
811 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
812 unsigned long flags;
813
814 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
815 return;
816 if (debug_level >= DEBUG_LEVEL_INFO)
817 printk("tx_pause(%s)\n",info->device_name);
818
819 spin_lock_irqsave(&info->lock,flags);
820 if (info->tx_enabled)
821 tx_stop(info);
822 spin_unlock_irqrestore(&info->lock,flags);
823}
824
825static void tx_release(struct tty_struct *tty)
826{
827 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
828 unsigned long flags;
829
830 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
831 return;
832 if (debug_level >= DEBUG_LEVEL_INFO)
833 printk("tx_release(%s)\n",info->device_name);
834
835 spin_lock_irqsave(&info->lock,flags);
836 if (!info->tx_enabled)
837 tx_start(info);
838 spin_unlock_irqrestore(&info->lock,flags);
839}
840
841/* Return next bottom half action to perform.
842 * or 0 if nothing to do.
843 */
844static int bh_action(MGSLPC_INFO *info)
845{
846 unsigned long flags;
847 int rc = 0;
848
849 spin_lock_irqsave(&info->lock,flags);
850
851 if (info->pending_bh & BH_RECEIVE) {
852 info->pending_bh &= ~BH_RECEIVE;
853 rc = BH_RECEIVE;
854 } else if (info->pending_bh & BH_TRANSMIT) {
855 info->pending_bh &= ~BH_TRANSMIT;
856 rc = BH_TRANSMIT;
857 } else if (info->pending_bh & BH_STATUS) {
858 info->pending_bh &= ~BH_STATUS;
859 rc = BH_STATUS;
860 }
861
862 if (!rc) {
863 /* Mark BH routine as complete */
864 info->bh_running = 0;
865 info->bh_requested = 0;
866 }
867
868 spin_unlock_irqrestore(&info->lock,flags);
869
870 return rc;
871}
872
873void bh_handler(void* Context)
874{
875 MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
876 int action;
877
878 if (!info)
879 return;
880
881 if (debug_level >= DEBUG_LEVEL_BH)
882 printk( "%s(%d):bh_handler(%s) entry\n",
883 __FILE__,__LINE__,info->device_name);
884
885 info->bh_running = 1;
886
887 while((action = bh_action(info)) != 0) {
888
889 /* Process work item */
890 if ( debug_level >= DEBUG_LEVEL_BH )
891 printk( "%s(%d):bh_handler() work item action=%d\n",
892 __FILE__,__LINE__,action);
893
894 switch (action) {
895
896 case BH_RECEIVE:
897 while(rx_get_frame(info));
898 break;
899 case BH_TRANSMIT:
900 bh_transmit(info);
901 break;
902 case BH_STATUS:
903 bh_status(info);
904 break;
905 default:
906 /* unknown work item ID */
907 printk("Unknown work item ID=%08X!\n", action);
908 break;
909 }
910 }
911
912 if (debug_level >= DEBUG_LEVEL_BH)
913 printk( "%s(%d):bh_handler(%s) exit\n",
914 __FILE__,__LINE__,info->device_name);
915}
916
917void bh_transmit(MGSLPC_INFO *info)
918{
919 struct tty_struct *tty = info->tty;
920 if (debug_level >= DEBUG_LEVEL_BH)
921 printk("bh_transmit() entry on %s\n", info->device_name);
922
923 if (tty) {
924 tty_wakeup(tty);
925 wake_up_interruptible(&tty->write_wait);
926 }
927}
928
929void bh_status(MGSLPC_INFO *info)
930{
931 info->ri_chkcount = 0;
932 info->dsr_chkcount = 0;
933 info->dcd_chkcount = 0;
934 info->cts_chkcount = 0;
935}
936
937/* eom: non-zero = end of frame */
938static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
939{
940 unsigned char data[2];
941 unsigned char fifo_count, read_count, i;
942 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
943
944 if (debug_level >= DEBUG_LEVEL_ISR)
945 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
946
947 if (!info->rx_enabled)
948 return;
949
950 if (info->rx_frame_count >= info->rx_buf_count) {
951 /* no more free buffers */
952 issue_command(info, CHA, CMD_RXRESET);
953 info->pending_bh |= BH_RECEIVE;
954 info->rx_overflow = 1;
955 info->icount.buf_overrun++;
956 return;
957 }
958
959 if (eom) {
960 /* end of frame, get FIFO count from RBCL register */
961 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
962 fifo_count = 32;
963 } else
964 fifo_count = 32;
965
966 do {
967 if (fifo_count == 1) {
968 read_count = 1;
969 data[0] = read_reg(info, CHA + RXFIFO);
970 } else {
971 read_count = 2;
972 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
973 }
974 fifo_count -= read_count;
975 if (!fifo_count && eom)
976 buf->status = data[--read_count];
977
978 for (i = 0; i < read_count; i++) {
979 if (buf->count >= info->max_frame_size) {
980 /* frame too large, reset receiver and reset current buffer */
981 issue_command(info, CHA, CMD_RXRESET);
982 buf->count = 0;
983 return;
984 }
985 *(buf->data + buf->count) = data[i];
986 buf->count++;
987 }
988 } while (fifo_count);
989
990 if (eom) {
991 info->pending_bh |= BH_RECEIVE;
992 info->rx_frame_count++;
993 info->rx_put++;
994 if (info->rx_put >= info->rx_buf_count)
995 info->rx_put = 0;
996 }
997 issue_command(info, CHA, CMD_RXFIFO);
998}
999
1000static void rx_ready_async(MGSLPC_INFO *info, int tcd)
1001{
33f0f88f 1002 unsigned char data, status, flag;
1da177e4 1003 int fifo_count;
33f0f88f 1004 int work = 0;
1da177e4
LT		 1005 struct tty_struct *tty = info->tty;
1006 struct mgsl_icount *icount = &info->icount;
1007
1008 if (tcd) {
1009 /* early termination, get FIFO count from RBCL register */
1010 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
1011
1012 /* Zero fifo count could mean 0 or 32 bytes available.
1013 * If BIT5 of STAR is set then at least 1 byte is available.
1014 */
1015 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
1016 fifo_count = 32;
1017 } else
1018 fifo_count = 32;
33f0f88f
AC		 1019
1020 tty_buffer_request_room(tty, fifo_count);
1da177e4
LT		 1021 /* Flush received async data to receive data buffer. */
1022 while (fifo_count) {
1023 data = read_reg(info, CHA + RXFIFO);
1024 status = read_reg(info, CHA + RXFIFO);
1025 fifo_count -= 2;
1026
1da177e4 1027 icount->rx++;
33f0f88f 1028 flag = TTY_NORMAL;
1da177e4
LT		 1029
1030 // if no frameing/crc error then save data
1031 // BIT7:parity error
1032 // BIT6:framing error
1033
1034 if (status & (BIT7 + BIT6)) {
1035 if (status & BIT7)
1036 icount->parity++;
1037 else
1038 icount->frame++;
1039
1040 /* discard char if tty control flags say so */
1041 if (status & info->ignore_status_mask)
1042 continue;
1043
1044 status &= info->read_status_mask;
1045
1046 if (status & BIT7)
33f0f88f 1047 flag = TTY_PARITY;
1da177e4 1048 else if (status & BIT6)
33f0f88f 1049 flag = TTY_FRAME;
1da177e4 1050 }
33f0f88f 1051 work += tty_insert_flip_char(tty, data, flag);
1da177e4
LT		 1052 }
1053 issue_command(info, CHA, CMD_RXFIFO);
1054
1055 if (debug_level >= DEBUG_LEVEL_ISR) {
33f0f88f
AC		 1056 printk("%s(%d):rx_ready_async",
1057 __FILE__,__LINE__);
1da177e4
LT		 1058 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1059 __FILE__,__LINE__,icount->rx,icount->brk,
1060 icount->parity,icount->frame,icount->overrun);
1061 }
1062
33f0f88f 1063 if (work)
1da177e4
LT		 1064 tty_flip_buffer_push(tty);
1065}
1066
1067
1068static void tx_done(MGSLPC_INFO *info)
1069{
1070 if (!info->tx_active)
1071 return;
1072
1073 info->tx_active = 0;
1074 info->tx_aborting = 0;
1075
1076 if (info->params.mode == MGSL_MODE_ASYNC)
1077 return;
1078
1079 info->tx_count = info->tx_put = info->tx_get = 0;
1080 del_timer(&info->tx_timer);
1081
1082 if (info->drop_rts_on_tx_done) {
1083 get_signals(info);
1084 if (info->serial_signals & SerialSignal_RTS) {
1085 info->serial_signals &= ~SerialSignal_RTS;
1086 set_signals(info);
1087 }
1088 info->drop_rts_on_tx_done = 0;
1089 }
1090
1091#ifdef CONFIG_HDLC
1092 if (info->netcount)
1093 hdlcdev_tx_done(info);
1094 else
1095#endif
1096 {
1097 if (info->tty->stopped || info->tty->hw_stopped) {
1098 tx_stop(info);
1099 return;
1100 }
1101 info->pending_bh |= BH_TRANSMIT;
1102 }
1103}
1104
1105static void tx_ready(MGSLPC_INFO *info)
1106{
1107 unsigned char fifo_count = 32;
1108 int c;
1109
1110 if (debug_level >= DEBUG_LEVEL_ISR)
1111 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1112
1113 if (info->params.mode == MGSL_MODE_HDLC) {
1114 if (!info->tx_active)
1115 return;
1116 } else {
1117 if (info->tty->stopped || info->tty->hw_stopped) {
1118 tx_stop(info);
1119 return;
1120 }
1121 if (!info->tx_count)
1122 info->tx_active = 0;
1123 }
1124
1125 if (!info->tx_count)
1126 return;
1127
1128 while (info->tx_count && fifo_count) {
1129 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1130
1131 if (c == 1) {
1132 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1133 } else {
1134 write_reg16(info, CHA + TXFIFO,
1135 *((unsigned short*)(info->tx_buf + info->tx_get)));
1136 }
1137 info->tx_count -= c;
1138 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1139 fifo_count -= c;
1140 }
1141
1142 if (info->params.mode == MGSL_MODE_ASYNC) {
1143 if (info->tx_count < WAKEUP_CHARS)
1144 info->pending_bh |= BH_TRANSMIT;
1145 issue_command(info, CHA, CMD_TXFIFO);
1146 } else {
1147 if (info->tx_count)
1148 issue_command(info, CHA, CMD_TXFIFO);
1149 else
1150 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1151 }
1152}
1153
1154static void cts_change(MGSLPC_INFO *info)
1155{
1156 get_signals(info);
1157 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1158 irq_disable(info, CHB, IRQ_CTS);
1159 info->icount.cts++;
1160 if (info->serial_signals & SerialSignal_CTS)
1161 info->input_signal_events.cts_up++;
1162 else
1163 info->input_signal_events.cts_down++;
1164 wake_up_interruptible(&info->status_event_wait_q);
1165 wake_up_interruptible(&info->event_wait_q);
1166
1167 if (info->flags & ASYNC_CTS_FLOW) {
1168 if (info->tty->hw_stopped) {
1169 if (info->serial_signals & SerialSignal_CTS) {
1170 if (debug_level >= DEBUG_LEVEL_ISR)
1171 printk("CTS tx start...");
1172 if (info->tty)
1173 info->tty->hw_stopped = 0;
1174 tx_start(info);
1175 info->pending_bh |= BH_TRANSMIT;
1176 return;
1177 }
1178 } else {
1179 if (!(info->serial_signals & SerialSignal_CTS)) {
1180 if (debug_level >= DEBUG_LEVEL_ISR)
1181 printk("CTS tx stop...");
1182 if (info->tty)
1183 info->tty->hw_stopped = 1;
1184 tx_stop(info);
1185 }
1186 }
1187 }
1188 info->pending_bh |= BH_STATUS;
1189}
1190
1191static void dcd_change(MGSLPC_INFO *info)
1192{
1193 get_signals(info);
1194 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1195 irq_disable(info, CHB, IRQ_DCD);
1196 info->icount.dcd++;
1197 if (info->serial_signals & SerialSignal_DCD) {
1198 info->input_signal_events.dcd_up++;
1199 }
1200 else
1201 info->input_signal_events.dcd_down++;
1202#ifdef CONFIG_HDLC
1203 if (info->netcount)
1204 hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, info->netdev);
1205#endif
1206 wake_up_interruptible(&info->status_event_wait_q);
1207 wake_up_interruptible(&info->event_wait_q);
1208
1209 if (info->flags & ASYNC_CHECK_CD) {
1210 if (debug_level >= DEBUG_LEVEL_ISR)
1211 printk("%s CD now %s...", info->device_name,
1212 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1213 if (info->serial_signals & SerialSignal_DCD)
1214 wake_up_interruptible(&info->open_wait);
1215 else {
1216 if (debug_level >= DEBUG_LEVEL_ISR)
1217 printk("doing serial hangup...");
1218 if (info->tty)
1219 tty_hangup(info->tty);
1220 }
1221 }
1222 info->pending_bh |= BH_STATUS;
1223}
1224
1225static void dsr_change(MGSLPC_INFO *info)
1226{
1227 get_signals(info);
1228 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1229 port_irq_disable(info, PVR_DSR);
1230 info->icount.dsr++;
1231 if (info->serial_signals & SerialSignal_DSR)
1232 info->input_signal_events.dsr_up++;
1233 else
1234 info->input_signal_events.dsr_down++;
1235 wake_up_interruptible(&info->status_event_wait_q);
1236 wake_up_interruptible(&info->event_wait_q);
1237 info->pending_bh |= BH_STATUS;
1238}
1239
1240static void ri_change(MGSLPC_INFO *info)
1241{
1242 get_signals(info);
1243 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1244 port_irq_disable(info, PVR_RI);
1245 info->icount.rng++;
1246 if (info->serial_signals & SerialSignal_RI)
1247 info->input_signal_events.ri_up++;
1248 else
1249 info->input_signal_events.ri_down++;
1250 wake_up_interruptible(&info->status_event_wait_q);
1251 wake_up_interruptible(&info->event_wait_q);
1252 info->pending_bh |= BH_STATUS;
1253}
1254
1255/* Interrupt service routine entry point.
1256 *
1257 * Arguments:
1258 *
1259 * irq interrupt number that caused interrupt
1260 * dev_id device ID supplied during interrupt registration
1261 * regs interrupted processor context
1262 */
1263static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
1264{
1265 MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1266 unsigned short isr;
1267 unsigned char gis, pis;
1268 int count=0;
1269
1270 if (debug_level >= DEBUG_LEVEL_ISR)
1271 printk("mgslpc_isr(%d) entry.\n", irq);
1272 if (!info)
1273 return IRQ_NONE;
1274
1275 if (!(info->link.state & DEV_CONFIG))
1276 return IRQ_HANDLED;
1277
1278 spin_lock(&info->lock);
1279
1280 while ((gis = read_reg(info, CHA + GIS))) {
1281 if (debug_level >= DEBUG_LEVEL_ISR)
1282 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1283
1284 if ((gis & 0x70) || count > 1000) {
1285 printk("synclink_cs:hardware failed or ejected\n");
1286 break;
1287 }
1288 count++;
1289
1290 if (gis & (BIT1 + BIT0)) {
1291 isr = read_reg16(info, CHB + ISR);
1292 if (isr & IRQ_DCD)
1293 dcd_change(info);
1294 if (isr & IRQ_CTS)
1295 cts_change(info);
1296 }
1297 if (gis & (BIT3 + BIT2))
1298 {
1299 isr = read_reg16(info, CHA + ISR);
1300 if (isr & IRQ_TIMER) {
1301 info->irq_occurred = 1;
1302 irq_disable(info, CHA, IRQ_TIMER);
1303 }
1304
1305 /* receive IRQs */
1306 if (isr & IRQ_EXITHUNT) {
1307 info->icount.exithunt++;
1308 wake_up_interruptible(&info->event_wait_q);
1309 }
1310 if (isr & IRQ_BREAK_ON) {
1311 info->icount.brk++;
1312 if (info->flags & ASYNC_SAK)
1313 do_SAK(info->tty);
1314 }
1315 if (isr & IRQ_RXTIME) {
1316 issue_command(info, CHA, CMD_RXFIFO_READ);
1317 }
1318 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1319 if (info->params.mode == MGSL_MODE_HDLC)
1320 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1321 else
1322 rx_ready_async(info, isr & IRQ_RXEOM);
1323 }
1324
1325 /* transmit IRQs */
1326 if (isr & IRQ_UNDERRUN) {
1327 if (info->tx_aborting)
1328 info->icount.txabort++;
1329 else
1330 info->icount.txunder++;
1331 tx_done(info);
1332 }
1333 else if (isr & IRQ_ALLSENT) {
1334 info->icount.txok++;
1335 tx_done(info);
1336 }
1337 else if (isr & IRQ_TXFIFO)
1338 tx_ready(info);
1339 }
1340 if (gis & BIT7) {
1341 pis = read_reg(info, CHA + PIS);
1342 if (pis & BIT1)
1343 dsr_change(info);
1344 if (pis & BIT2)
1345 ri_change(info);
1346 }
1347 }
1348
1349 /* Request bottom half processing if there's something
1350 * for it to do and the bh is not already running
1351 */
1352
1353 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1354 if ( debug_level >= DEBUG_LEVEL_ISR )
1355 printk("%s(%d):%s queueing bh task.\n",
1356 __FILE__,__LINE__,info->device_name);
1357 schedule_work(&info->task);
1358 info->bh_requested = 1;
1359 }
1360
1361 spin_unlock(&info->lock);
1362
1363 if (debug_level >= DEBUG_LEVEL_ISR)
1364 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1365 __FILE__,__LINE__,irq);
1366
1367 return IRQ_HANDLED;
1368}
1369
1370/* Initialize and start device.
1371 */
1372static int startup(MGSLPC_INFO * info)
1373{
1374 int retval = 0;
1375
1376 if (debug_level >= DEBUG_LEVEL_INFO)
1377 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1378
1379 if (info->flags & ASYNC_INITIALIZED)
1380 return 0;
1381
1382 if (!info->tx_buf) {
1383 /* allocate a page of memory for a transmit buffer */
1384 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1385 if (!info->tx_buf) {
1386 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1387 __FILE__,__LINE__,info->device_name);
1388 return -ENOMEM;
1389 }
1390 }
1391
1392 info->pending_bh = 0;
1393
a7482a2e
PF		 1394 memset(&info->icount, 0, sizeof(info->icount));
1395
1da177e4
LT		 1396 init_timer(&info->tx_timer);
1397 info->tx_timer.data = (unsigned long)info;
1398 info->tx_timer.function = tx_timeout;
1399
1400 /* Allocate and claim adapter resources */
1401 retval = claim_resources(info);
1402
1403 /* perform existance check and diagnostics */
1404 if ( !retval )
1405 retval = adapter_test(info);
1406
1407 if ( retval ) {
1408 if (capable(CAP_SYS_ADMIN) && info->tty)
1409 set_bit(TTY_IO_ERROR, &info->tty->flags);
1410 release_resources(info);
1411 return retval;
1412 }
1413
1414 /* program hardware for current parameters */
1415 mgslpc_change_params(info);
1416
1417 if (info->tty)
1418 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1419
1420 info->flags |= ASYNC_INITIALIZED;
1421
1422 return 0;
1423}
1424
1425/* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1426 */
1427static void shutdown(MGSLPC_INFO * info)
1428{
1429 unsigned long flags;
1430
1431 if (!(info->flags & ASYNC_INITIALIZED))
1432 return;
1433
1434 if (debug_level >= DEBUG_LEVEL_INFO)
1435 printk("%s(%d):mgslpc_shutdown(%s)\n",
1436 __FILE__,__LINE__, info->device_name );
1437
1438 /* clear status wait queue because status changes */
1439 /* can't happen after shutting down the hardware */
1440 wake_up_interruptible(&info->status_event_wait_q);
1441 wake_up_interruptible(&info->event_wait_q);
1442
1443 del_timer(&info->tx_timer);
1444
1445 if (info->tx_buf) {
1446 free_page((unsigned long) info->tx_buf);
1447 info->tx_buf = NULL;
1448 }
1449
1450 spin_lock_irqsave(&info->lock,flags);
1451
1452 rx_stop(info);
1453 tx_stop(info);
1454
1455 /* TODO:disable interrupts instead of reset to preserve signal states */
1456 reset_device(info);
1457
1458 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1459 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1460 set_signals(info);
1461 }
1462
1463 spin_unlock_irqrestore(&info->lock,flags);
1464
1465 release_resources(info);
1466
1467 if (info->tty)
1468 set_bit(TTY_IO_ERROR, &info->tty->flags);
1469
1470 info->flags &= ~ASYNC_INITIALIZED;
1471}
1472
1473static void mgslpc_program_hw(MGSLPC_INFO *info)
1474{
1475 unsigned long flags;
1476
1477 spin_lock_irqsave(&info->lock,flags);
1478
1479 rx_stop(info);
1480 tx_stop(info);
1481 info->tx_count = info->tx_put = info->tx_get = 0;
1482
1483 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1484 hdlc_mode(info);
1485 else
1486 async_mode(info);
1487
1488 set_signals(info);
1489
1490 info->dcd_chkcount = 0;
1491 info->cts_chkcount = 0;
1492 info->ri_chkcount = 0;
1493 info->dsr_chkcount = 0;
1494
1495 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1496 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1497 get_signals(info);
1498
1499 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1500 rx_start(info);
1501
1502 spin_unlock_irqrestore(&info->lock,flags);
1503}
1504
1505/* Reconfigure adapter based on new parameters
1506 */
1507static void mgslpc_change_params(MGSLPC_INFO *info)
1508{
1509 unsigned cflag;
1510 int bits_per_char;
1511
1512 if (!info->tty || !info->tty->termios)
1513 return;
1514
1515 if (debug_level >= DEBUG_LEVEL_INFO)
1516 printk("%s(%d):mgslpc_change_params(%s)\n",
1517 __FILE__,__LINE__, info->device_name );
1518
1519 cflag = info->tty->termios->c_cflag;
1520
1521 /* if B0 rate (hangup) specified then negate DTR and RTS */
1522 /* otherwise assert DTR and RTS */
1523 if (cflag & CBAUD)
1524 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1525 else
1526 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1527
1528 /* byte size and parity */
1529
1530 switch (cflag & CSIZE) {
1531 case CS5: info->params.data_bits = 5; break;
1532 case CS6: info->params.data_bits = 6; break;
1533 case CS7: info->params.data_bits = 7; break;
1534 case CS8: info->params.data_bits = 8; break;
1535 default: info->params.data_bits = 7; break;
1536 }
1537
1538 if (cflag & CSTOPB)
1539 info->params.stop_bits = 2;
1540 else
1541 info->params.stop_bits = 1;
1542
1543 info->params.parity = ASYNC_PARITY_NONE;
1544 if (cflag & PARENB) {
1545 if (cflag & PARODD)
1546 info->params.parity = ASYNC_PARITY_ODD;
1547 else
1548 info->params.parity = ASYNC_PARITY_EVEN;
1549#ifdef CMSPAR
1550 if (cflag & CMSPAR)
1551 info->params.parity = ASYNC_PARITY_SPACE;
1552#endif
1553 }
1554
1555 /* calculate number of jiffies to transmit a full
1556 * FIFO (32 bytes) at specified data rate
1557 */
1558 bits_per_char = info->params.data_bits +
1559 info->params.stop_bits + 1;
1560
1561 /* if port data rate is set to 460800 or less then
1562 * allow tty settings to override, otherwise keep the
1563 * current data rate.
1564 */
1565 if (info->params.data_rate <= 460800) {
1566 info->params.data_rate = tty_get_baud_rate(info->tty);
1567 }
1568
1569 if ( info->params.data_rate ) {
1570 info->timeout = (32*HZ*bits_per_char) /
1571 info->params.data_rate;
1572 }
1573 info->timeout += HZ/50; /* Add .02 seconds of slop */
1574
1575 if (cflag & CRTSCTS)
1576 info->flags |= ASYNC_CTS_FLOW;
1577 else
1578 info->flags &= ~ASYNC_CTS_FLOW;
1579
1580 if (cflag & CLOCAL)
1581 info->flags &= ~ASYNC_CHECK_CD;
1582 else
1583 info->flags |= ASYNC_CHECK_CD;
1584
1585 /* process tty input control flags */
1586
1587 info->read_status_mask = 0;
1588 if (I_INPCK(info->tty))
1589 info->read_status_mask |= BIT7 | BIT6;
1590 if (I_IGNPAR(info->tty))
1591 info->ignore_status_mask |= BIT7 | BIT6;
1592
1593 mgslpc_program_hw(info);
1594}
1595
1596/* Add a character to the transmit buffer
1597 */
1598static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1599{
1600 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1601 unsigned long flags;
1602
1603 if (debug_level >= DEBUG_LEVEL_INFO) {
1604 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1605 __FILE__,__LINE__,ch,info->device_name);
1606 }
1607
1608 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1609 return;
1610
1611 if (!tty || !info->tx_buf)
1612 return;
1613
1614 spin_lock_irqsave(&info->lock,flags);
1615
1616 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1617 if (info->tx_count < TXBUFSIZE - 1) {
1618 info->tx_buf[info->tx_put++] = ch;
1619 info->tx_put &= TXBUFSIZE-1;
1620 info->tx_count++;
1621 }
1622 }
1623
1624 spin_unlock_irqrestore(&info->lock,flags);
1625}
1626
1627/* Enable transmitter so remaining characters in the
1628 * transmit buffer are sent.
1629 */
1630static void mgslpc_flush_chars(struct tty_struct *tty)
1631{
1632 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1633 unsigned long flags;
1634
1635 if (debug_level >= DEBUG_LEVEL_INFO)
1636 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1637 __FILE__,__LINE__,info->device_name,info->tx_count);
1638
1639 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1640 return;
1641
1642 if (info->tx_count <= 0 || tty->stopped ||
1643 tty->hw_stopped || !info->tx_buf)
1644 return;
1645
1646 if (debug_level >= DEBUG_LEVEL_INFO)
1647 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1648 __FILE__,__LINE__,info->device_name);
1649
1650 spin_lock_irqsave(&info->lock,flags);
1651 if (!info->tx_active)
1652 tx_start(info);
1653 spin_unlock_irqrestore(&info->lock,flags);
1654}
1655
1656/* Send a block of data
1657 *
1658 * Arguments:
1659 *
1660 * tty pointer to tty information structure
1661 * buf pointer to buffer containing send data
1662 * count size of send data in bytes
1663 *
1664 * Returns: number of characters written
1665 */
1666static int mgslpc_write(struct tty_struct * tty,
1667 const unsigned char *buf, int count)
1668{
1669 int c, ret = 0;
1670 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1671 unsigned long flags;
1672
1673 if (debug_level >= DEBUG_LEVEL_INFO)
1674 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1675 __FILE__,__LINE__,info->device_name,count);
1676
1677 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1678 !tty || !info->tx_buf)
1679 goto cleanup;
1680
1681 if (info->params.mode == MGSL_MODE_HDLC) {
1682 if (count > TXBUFSIZE) {
1683 ret = -EIO;
1684 goto cleanup;
1685 }
1686 if (info->tx_active)
1687 goto cleanup;
1688 else if (info->tx_count)
1689 goto start;
1690 }
1691
1692 for (;;) {
1693 c = min(count,
1694 min(TXBUFSIZE - info->tx_count - 1,
1695 TXBUFSIZE - info->tx_put));
1696 if (c <= 0)
1697 break;
1698
1699 memcpy(info->tx_buf + info->tx_put, buf, c);
1700
1701 spin_lock_irqsave(&info->lock,flags);
1702 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1703 info->tx_count += c;
1704 spin_unlock_irqrestore(&info->lock,flags);
1705
1706 buf += c;
1707 count -= c;
1708 ret += c;
1709 }
1710start:
1711 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1712 spin_lock_irqsave(&info->lock,flags);
1713 if (!info->tx_active)
1714 tx_start(info);
1715 spin_unlock_irqrestore(&info->lock,flags);
1716 }
1717cleanup:
1718 if (debug_level >= DEBUG_LEVEL_INFO)
1719 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1720 __FILE__,__LINE__,info->device_name,ret);
1721 return ret;
1722}
1723
1724/* Return the count of free bytes in transmit buffer
1725 */
1726static int mgslpc_write_room(struct tty_struct *tty)
1727{
1728 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1729 int ret;
1730
1731 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1732 return 0;
1733
1734 if (info->params.mode == MGSL_MODE_HDLC) {
1735 /* HDLC (frame oriented) mode */
1736 if (info->tx_active)
1737 return 0;
1738 else
1739 return HDLC_MAX_FRAME_SIZE;
1740 } else {
1741 ret = TXBUFSIZE - info->tx_count - 1;
1742 if (ret < 0)
1743 ret = 0;
1744 }
1745
1746 if (debug_level >= DEBUG_LEVEL_INFO)
1747 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1748 __FILE__,__LINE__, info->device_name, ret);
1749 return ret;
1750}
1751
1752/* Return the count of bytes in transmit buffer
1753 */
1754static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1755{
1756 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1757 int rc;
1758
1759 if (debug_level >= DEBUG_LEVEL_INFO)
1760 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1761 __FILE__,__LINE__, info->device_name );
1762
1763 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1764 return 0;
1765
1766 if (info->params.mode == MGSL_MODE_HDLC)
1767 rc = info->tx_active ? info->max_frame_size : 0;
1768 else
1769 rc = info->tx_count;
1770
1771 if (debug_level >= DEBUG_LEVEL_INFO)
1772 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1773 __FILE__,__LINE__, info->device_name, rc);
1774
1775 return rc;
1776}
1777
1778/* Discard all data in the send buffer
1779 */
1780static void mgslpc_flush_buffer(struct tty_struct *tty)
1781{
1782 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1783 unsigned long flags;
1784
1785 if (debug_level >= DEBUG_LEVEL_INFO)
1786 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1787 __FILE__,__LINE__, info->device_name );
1788
1789 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1790 return;
1791
1792 spin_lock_irqsave(&info->lock,flags);
1793 info->tx_count = info->tx_put = info->tx_get = 0;
1794 del_timer(&info->tx_timer);
1795 spin_unlock_irqrestore(&info->lock,flags);
1796
1797 wake_up_interruptible(&tty->write_wait);
1798 tty_wakeup(tty);
1799}
1800
1801/* Send a high-priority XON/XOFF character
1802 */
1803static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1804{
1805 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1806 unsigned long flags;
1807
1808 if (debug_level >= DEBUG_LEVEL_INFO)
1809 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1810 __FILE__,__LINE__, info->device_name, ch );
1811
1812 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1813 return;
1814
1815 info->x_char = ch;
1816 if (ch) {
1817 spin_lock_irqsave(&info->lock,flags);
1818 if (!info->tx_enabled)
1819 tx_start(info);
1820 spin_unlock_irqrestore(&info->lock,flags);
1821 }
1822}
1823
1824/* Signal remote device to throttle send data (our receive data)
1825 */
1826static void mgslpc_throttle(struct tty_struct * tty)
1827{
1828 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1829 unsigned long flags;
1830
1831 if (debug_level >= DEBUG_LEVEL_INFO)
1832 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1833 __FILE__,__LINE__, info->device_name );
1834
1835 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1836 return;
1837
1838 if (I_IXOFF(tty))
1839 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1840
1841 if (tty->termios->c_cflag & CRTSCTS) {
1842 spin_lock_irqsave(&info->lock,flags);
1843 info->serial_signals &= ~SerialSignal_RTS;
1844 set_signals(info);
1845 spin_unlock_irqrestore(&info->lock,flags);
1846 }
1847}
1848
1849/* Signal remote device to stop throttling send data (our receive data)
1850 */
1851static void mgslpc_unthrottle(struct tty_struct * tty)
1852{
1853 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1854 unsigned long flags;
1855
1856 if (debug_level >= DEBUG_LEVEL_INFO)
1857 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1858 __FILE__,__LINE__, info->device_name );
1859
1860 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1861 return;
1862
1863 if (I_IXOFF(tty)) {
1864 if (info->x_char)
1865 info->x_char = 0;
1866 else
1867 mgslpc_send_xchar(tty, START_CHAR(tty));
1868 }
1869
1870 if (tty->termios->c_cflag & CRTSCTS) {
1871 spin_lock_irqsave(&info->lock,flags);
1872 info->serial_signals |= SerialSignal_RTS;
1873 set_signals(info);
1874 spin_unlock_irqrestore(&info->lock,flags);
1875 }
1876}
1877
1878/* get the current serial statistics
1879 */
1880static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1881{
1882 int err;
1883 if (debug_level >= DEBUG_LEVEL_INFO)
1884 printk("get_params(%s)\n", info->device_name);
a7482a2e
PF		 1885 if (!user_icount) {
1886 memset(&info->icount, 0, sizeof(info->icount));
1887 } else {
1888 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1889 if (err)
1890 return -EFAULT;
1891 }
1da177e4
LT		 1892 return 0;
1893}
1894
1895/* get the current serial parameters
1896 */
1897static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1898{
1899 int err;
1900 if (debug_level >= DEBUG_LEVEL_INFO)
1901 printk("get_params(%s)\n", info->device_name);
1902 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1903 if (err)
1904 return -EFAULT;
1905 return 0;
1906}
1907
1908/* set the serial parameters
1909 *
1910 * Arguments:
1911 *
1912 * info pointer to device instance data
1913 * new_params user buffer containing new serial params
1914 *
1915 * Returns: 0 if success, otherwise error code
1916 */
1917static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1918{
1919 unsigned long flags;
1920 MGSL_PARAMS tmp_params;
1921 int err;
1922
1923 if (debug_level >= DEBUG_LEVEL_INFO)
1924 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1925 info->device_name );
1926 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1927 if (err) {
1928 if ( debug_level >= DEBUG_LEVEL_INFO )
1929 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1930 __FILE__,__LINE__,info->device_name);
1931 return -EFAULT;
1932 }
1933
1934 spin_lock_irqsave(&info->lock,flags);
1935 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1936 spin_unlock_irqrestore(&info->lock,flags);
1937
1938 mgslpc_change_params(info);
1939
1940 return 0;
1941}
1942
1943static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1944{
1945 int err;
1946 if (debug_level >= DEBUG_LEVEL_INFO)
1947 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1948 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1949 if (err)
1950 return -EFAULT;
1951 return 0;
1952}
1953
1954static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1955{
1956 unsigned long flags;
1957 if (debug_level >= DEBUG_LEVEL_INFO)
1958 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1959 spin_lock_irqsave(&info->lock,flags);
1960 info->idle_mode = idle_mode;
1961 tx_set_idle(info);
1962 spin_unlock_irqrestore(&info->lock,flags);
1963 return 0;
1964}
1965
1966static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1967{
1968 int err;
1969 if (debug_level >= DEBUG_LEVEL_INFO)
1970 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1971 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1972 if (err)
1973 return -EFAULT;
1974 return 0;
1975}
1976
1977static int set_interface(MGSLPC_INFO * info, int if_mode)
1978{
1979 unsigned long flags;
1980 unsigned char val;
1981 if (debug_level >= DEBUG_LEVEL_INFO)
1982 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1983 spin_lock_irqsave(&info->lock,flags);
1984 info->if_mode = if_mode;
1985
1986 val = read_reg(info, PVR) & 0x0f;
1987 switch (info->if_mode)
1988 {
1989 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1990 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1991 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1992 }
1993 write_reg(info, PVR, val);
1994
1995 spin_unlock_irqrestore(&info->lock,flags);
1996 return 0;
1997}
1998
1999static int set_txenable(MGSLPC_INFO * info, int enable)
2000{
2001 unsigned long flags;
2002
2003 if (debug_level >= DEBUG_LEVEL_INFO)
2004 printk("set_txenable(%s,%d)\n", info->device_name, enable);
2005
2006 spin_lock_irqsave(&info->lock,flags);
2007 if (enable) {
2008 if (!info->tx_enabled)
2009 tx_start(info);
2010 } else {
2011 if (info->tx_enabled)
2012 tx_stop(info);
2013 }
2014 spin_unlock_irqrestore(&info->lock,flags);
2015 return 0;
2016}
2017
2018static int tx_abort(MGSLPC_INFO * info)
2019{
2020 unsigned long flags;
2021
2022 if (debug_level >= DEBUG_LEVEL_INFO)
2023 printk("tx_abort(%s)\n", info->device_name);
2024
2025 spin_lock_irqsave(&info->lock,flags);
2026 if (info->tx_active && info->tx_count &&
2027 info->params.mode == MGSL_MODE_HDLC) {
2028 /* clear data count so FIFO is not filled on next IRQ.
2029 * This results in underrun and abort transmission.
2030 */
2031 info->tx_count = info->tx_put = info->tx_get = 0;
2032 info->tx_aborting = TRUE;
2033 }
2034 spin_unlock_irqrestore(&info->lock,flags);
2035 return 0;
2036}
2037
2038static int set_rxenable(MGSLPC_INFO * info, int enable)
2039{
2040 unsigned long flags;
2041
2042 if (debug_level >= DEBUG_LEVEL_INFO)
2043 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2044
2045 spin_lock_irqsave(&info->lock,flags);
2046 if (enable) {
2047 if (!info->rx_enabled)
2048 rx_start(info);
2049 } else {
2050 if (info->rx_enabled)
2051 rx_stop(info);
2052 }
2053 spin_unlock_irqrestore(&info->lock,flags);
2054 return 0;
2055}
2056
2057/* wait for specified event to occur
2058 *
2059 * Arguments: info pointer to device instance data
2060 * mask pointer to bitmask of events to wait for
2061 * Return Value: 0 if successful and bit mask updated with
2062 * of events triggerred,
2063 * otherwise error code
2064 */
2065static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2066{
2067 unsigned long flags;
2068 int s;
2069 int rc=0;
2070 struct mgsl_icount cprev, cnow;
2071 int events;
2072 int mask;
2073 struct _input_signal_events oldsigs, newsigs;
2074 DECLARE_WAITQUEUE(wait, current);
2075
2076 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2077 if (rc)
2078 return -EFAULT;
2079
2080 if (debug_level >= DEBUG_LEVEL_INFO)
2081 printk("wait_events(%s,%d)\n", info->device_name, mask);
2082
2083 spin_lock_irqsave(&info->lock,flags);
2084
2085 /* return immediately if state matches requested events */
2086 get_signals(info);
2087 s = info->serial_signals;
2088 events = mask &
2089 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2090 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2091 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2092 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2093 if (events) {
2094 spin_unlock_irqrestore(&info->lock,flags);
2095 goto exit;
2096 }
2097
2098 /* save current irq counts */
2099 cprev = info->icount;
2100 oldsigs = info->input_signal_events;
2101
2102 if ((info->params.mode == MGSL_MODE_HDLC) &&
2103 (mask & MgslEvent_ExitHuntMode))
2104 irq_enable(info, CHA, IRQ_EXITHUNT);
2105
2106 set_current_state(TASK_INTERRUPTIBLE);
2107 add_wait_queue(&info->event_wait_q, &wait);
2108
2109 spin_unlock_irqrestore(&info->lock,flags);
2110
2111
2112 for(;;) {
2113 schedule();
2114 if (signal_pending(current)) {
2115 rc = -ERESTARTSYS;
2116 break;
2117 }
2118
2119 /* get current irq counts */
2120 spin_lock_irqsave(&info->lock,flags);
2121 cnow = info->icount;
2122 newsigs = info->input_signal_events;
2123 set_current_state(TASK_INTERRUPTIBLE);
2124 spin_unlock_irqrestore(&info->lock,flags);
2125
2126 /* if no change, wait aborted for some reason */
2127 if (newsigs.dsr_up == oldsigs.dsr_up &&
2128 newsigs.dsr_down == oldsigs.dsr_down &&
2129 newsigs.dcd_up == oldsigs.dcd_up &&
2130 newsigs.dcd_down == oldsigs.dcd_down &&
2131 newsigs.cts_up == oldsigs.cts_up &&
2132 newsigs.cts_down == oldsigs.cts_down &&
2133 newsigs.ri_up == oldsigs.ri_up &&
2134 newsigs.ri_down == oldsigs.ri_down &&
2135 cnow.exithunt == cprev.exithunt &&
2136 cnow.rxidle == cprev.rxidle) {
2137 rc = -EIO;
2138 break;
2139 }
2140
2141 events = mask &
2142 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2143 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2144 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2145 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2146 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2147 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2148 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2149 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2150 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2151 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2152 if (events)
2153 break;
2154
2155 cprev = cnow;
2156 oldsigs = newsigs;
2157 }
2158
2159 remove_wait_queue(&info->event_wait_q, &wait);
2160 set_current_state(TASK_RUNNING);
2161
2162 if (mask & MgslEvent_ExitHuntMode) {
2163 spin_lock_irqsave(&info->lock,flags);
2164 if (!waitqueue_active(&info->event_wait_q))
2165 irq_disable(info, CHA, IRQ_EXITHUNT);
2166 spin_unlock_irqrestore(&info->lock,flags);
2167 }
2168exit:
2169 if (rc == 0)
2170 PUT_USER(rc, events, mask_ptr);
2171 return rc;
2172}
2173
2174static int modem_input_wait(MGSLPC_INFO *info,int arg)
2175{
2176 unsigned long flags;
2177 int rc;
2178 struct mgsl_icount cprev, cnow;
2179 DECLARE_WAITQUEUE(wait, current);
2180
2181 /* save current irq counts */
2182 spin_lock_irqsave(&info->lock,flags);
2183 cprev = info->icount;
2184 add_wait_queue(&info->status_event_wait_q, &wait);
2185 set_current_state(TASK_INTERRUPTIBLE);
2186 spin_unlock_irqrestore(&info->lock,flags);
2187
2188 for(;;) {
2189 schedule();
2190 if (signal_pending(current)) {
2191 rc = -ERESTARTSYS;
2192 break;
2193 }
2194
2195 /* get new irq counts */
2196 spin_lock_irqsave(&info->lock,flags);
2197 cnow = info->icount;
2198 set_current_state(TASK_INTERRUPTIBLE);
2199 spin_unlock_irqrestore(&info->lock,flags);
2200
2201 /* if no change, wait aborted for some reason */
2202 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2203 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2204 rc = -EIO;
2205 break;
2206 }
2207
2208 /* check for change in caller specified modem input */
2209 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2210 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2211 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2212 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2213 rc = 0;
2214 break;
2215 }
2216
2217 cprev = cnow;
2218 }
2219 remove_wait_queue(&info->status_event_wait_q, &wait);
2220 set_current_state(TASK_RUNNING);
2221 return rc;
2222}
2223
2224/* return the state of the serial control and status signals
2225 */
2226static int tiocmget(struct tty_struct *tty, struct file *file)
2227{
2228 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2229 unsigned int result;
2230 unsigned long flags;
2231
2232 spin_lock_irqsave(&info->lock,flags);
2233 get_signals(info);
2234 spin_unlock_irqrestore(&info->lock,flags);
2235
2236 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2237 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2238 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2239 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2240 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2241 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2242
2243 if (debug_level >= DEBUG_LEVEL_INFO)
2244 printk("%s(%d):%s tiocmget() value=%08X\n",
2245 __FILE__,__LINE__, info->device_name, result );
2246 return result;
2247}
2248
2249/* set modem control signals (DTR/RTS)
2250 */
2251static int tiocmset(struct tty_struct *tty, struct file *file,
2252 unsigned int set, unsigned int clear)
2253{
2254 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2255 unsigned long flags;
2256
2257 if (debug_level >= DEBUG_LEVEL_INFO)
2258 printk("%s(%d):%s tiocmset(%x,%x)\n",
2259 __FILE__,__LINE__,info->device_name, set, clear);
2260
2261 if (set & TIOCM_RTS)
2262 info->serial_signals |= SerialSignal_RTS;
2263 if (set & TIOCM_DTR)
2264 info->serial_signals |= SerialSignal_DTR;
2265 if (clear & TIOCM_RTS)
2266 info->serial_signals &= ~SerialSignal_RTS;
2267 if (clear & TIOCM_DTR)
2268 info->serial_signals &= ~SerialSignal_DTR;
2269
2270 spin_lock_irqsave(&info->lock,flags);
2271 set_signals(info);
2272 spin_unlock_irqrestore(&info->lock,flags);
2273
2274 return 0;
2275}
2276
2277/* Set or clear transmit break condition
2278 *
2279 * Arguments: tty pointer to tty instance data
2280 * break_state -1=set break condition, 0=clear
2281 */
2282static void mgslpc_break(struct tty_struct *tty, int break_state)
2283{
2284 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2285 unsigned long flags;
2286
2287 if (debug_level >= DEBUG_LEVEL_INFO)
2288 printk("%s(%d):mgslpc_break(%s,%d)\n",
2289 __FILE__,__LINE__, info->device_name, break_state);
2290
2291 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2292 return;
2293
2294 spin_lock_irqsave(&info->lock,flags);
2295 if (break_state == -1)
2296 set_reg_bits(info, CHA+DAFO, BIT6);
2297 else
2298 clear_reg_bits(info, CHA+DAFO, BIT6);
2299 spin_unlock_irqrestore(&info->lock,flags);
2300}
2301
2302/* Service an IOCTL request
2303 *
2304 * Arguments:
2305 *
2306 * tty pointer to tty instance data
2307 * file pointer to associated file object for device
2308 * cmd IOCTL command code
2309 * arg command argument/context
2310 *
2311 * Return Value: 0 if success, otherwise error code
2312 */
2313static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2314 unsigned int cmd, unsigned long arg)
2315{
2316 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2317
2318 if (debug_level >= DEBUG_LEVEL_INFO)
2319 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2320 info->device_name, cmd );
2321
2322 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2323 return -ENODEV;
2324
2325 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2326 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2327 if (tty->flags & (1 << TTY_IO_ERROR))
2328 return -EIO;
2329 }
2330
2331 return ioctl_common(info, cmd, arg);
2332}
2333
2334int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2335{
2336 int error;
2337 struct mgsl_icount cnow; /* kernel counter temps */
2338 struct serial_icounter_struct __user *p_cuser; /* user space */
2339 void __user *argp = (void __user *)arg;
2340 unsigned long flags;
2341
2342 switch (cmd) {
2343 case MGSL_IOCGPARAMS:
2344 return get_params(info, argp);
2345 case MGSL_IOCSPARAMS:
2346 return set_params(info, argp);
2347 case MGSL_IOCGTXIDLE:
2348 return get_txidle(info, argp);
2349 case MGSL_IOCSTXIDLE:
2350 return set_txidle(info, (int)arg);
2351 case MGSL_IOCGIF:
2352 return get_interface(info, argp);
2353 case MGSL_IOCSIF:
2354 return set_interface(info,(int)arg);
2355 case MGSL_IOCTXENABLE:
2356 return set_txenable(info,(int)arg);
2357 case MGSL_IOCRXENABLE:
2358 return set_rxenable(info,(int)arg);
2359 case MGSL_IOCTXABORT:
2360 return tx_abort(info);
2361 case MGSL_IOCGSTATS:
2362 return get_stats(info, argp);
2363 case MGSL_IOCWAITEVENT:
2364 return wait_events(info, argp);
2365 case TIOCMIWAIT:
2366 return modem_input_wait(info,(int)arg);
2367 case TIOCGICOUNT:
2368 spin_lock_irqsave(&info->lock,flags);
2369 cnow = info->icount;
2370 spin_unlock_irqrestore(&info->lock,flags);
2371 p_cuser = argp;
2372 PUT_USER(error,cnow.cts, &p_cuser->cts);
2373 if (error) return error;
2374 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2375 if (error) return error;
2376 PUT_USER(error,cnow.rng, &p_cuser->rng);
2377 if (error) return error;
2378 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2379 if (error) return error;
2380 PUT_USER(error,cnow.rx, &p_cuser->rx);
2381 if (error) return error;
2382 PUT_USER(error,cnow.tx, &p_cuser->tx);
2383 if (error) return error;
2384 PUT_USER(error,cnow.frame, &p_cuser->frame);
2385 if (error) return error;
2386 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2387 if (error) return error;
2388 PUT_USER(error,cnow.parity, &p_cuser->parity);
2389 if (error) return error;
2390 PUT_USER(error,cnow.brk, &p_cuser->brk);
2391 if (error) return error;
2392 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2393 if (error) return error;
2394 return 0;
2395 default:
2396 return -ENOIOCTLCMD;
2397 }
2398 return 0;
2399}
2400
2401/* Set new termios settings
2402 *
2403 * Arguments:
2404 *
2405 * tty pointer to tty structure
2406 * termios pointer to buffer to hold returned old termios
2407 */
2408static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
2409{
2410 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2411 unsigned long flags;
2412
2413 if (debug_level >= DEBUG_LEVEL_INFO)
2414 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2415 tty->driver->name );
2416
2417 /* just return if nothing has changed */
2418 if ((tty->termios->c_cflag == old_termios->c_cflag)
2419 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2420 == RELEVANT_IFLAG(old_termios->c_iflag)))
2421 return;
2422
2423 mgslpc_change_params(info);
2424
2425 /* Handle transition to B0 status */
2426 if (old_termios->c_cflag & CBAUD &&
2427 !(tty->termios->c_cflag & CBAUD)) {
2428 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2429 spin_lock_irqsave(&info->lock,flags);
2430 set_signals(info);
2431 spin_unlock_irqrestore(&info->lock,flags);
2432 }
2433
2434 /* Handle transition away from B0 status */
2435 if (!(old_termios->c_cflag & CBAUD) &&
2436 tty->termios->c_cflag & CBAUD) {
2437 info->serial_signals |= SerialSignal_DTR;
2438 if (!(tty->termios->c_cflag & CRTSCTS) ||
2439 !test_bit(TTY_THROTTLED, &tty->flags)) {
2440 info->serial_signals |= SerialSignal_RTS;
2441 }
2442 spin_lock_irqsave(&info->lock,flags);
2443 set_signals(info);
2444 spin_unlock_irqrestore(&info->lock,flags);
2445 }
2446
2447 /* Handle turning off CRTSCTS */
2448 if (old_termios->c_cflag & CRTSCTS &&
2449 !(tty->termios->c_cflag & CRTSCTS)) {
2450 tty->hw_stopped = 0;
2451 tx_release(tty);
2452 }
2453}
2454
2455static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2456{
2457 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2458
2459 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2460 return;
2461
2462 if (debug_level >= DEBUG_LEVEL_INFO)
2463 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2464 __FILE__,__LINE__, info->device_name, info->count);
2465
2466 if (!info->count)
2467 return;
2468
2469 if (tty_hung_up_p(filp))
2470 goto cleanup;
2471
2472 if ((tty->count == 1) && (info->count != 1)) {
2473 /*
2474 * tty->count is 1 and the tty structure will be freed.
2475 * info->count should be one in this case.
2476 * if it's not, correct it so that the port is shutdown.
2477 */
2478 printk("mgslpc_close: bad refcount; tty->count is 1, "
2479 "info->count is %d\n", info->count);
2480 info->count = 1;
2481 }
2482
2483 info->count--;
2484
2485 /* if at least one open remaining, leave hardware active */
2486 if (info->count)
2487 goto cleanup;
2488
2489 info->flags |= ASYNC_CLOSING;
2490
2491 /* set tty->closing to notify line discipline to
2492 * only process XON/XOFF characters. Only the N_TTY
2493 * discipline appears to use this (ppp does not).
2494 */
2495 tty->closing = 1;
2496
2497 /* wait for transmit data to clear all layers */
2498
2499 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2500 if (debug_level >= DEBUG_LEVEL_INFO)
2501 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2502 __FILE__,__LINE__, info->device_name );
2503 tty_wait_until_sent(tty, info->closing_wait);
2504 }
2505
2506 if (info->flags & ASYNC_INITIALIZED)
2507 mgslpc_wait_until_sent(tty, info->timeout);
2508
2509 if (tty->driver->flush_buffer)
2510 tty->driver->flush_buffer(tty);
2511
2512 ldisc_flush_buffer(tty);
2513
2514 shutdown(info);
2515
2516 tty->closing = 0;
2517 info->tty = NULL;
2518
2519 if (info->blocked_open) {
2520 if (info->close_delay) {
2521 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2522 }
2523 wake_up_interruptible(&info->open_wait);
2524 }
2525
2526 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2527
2528 wake_up_interruptible(&info->close_wait);
2529
2530cleanup:
2531 if (debug_level >= DEBUG_LEVEL_INFO)
2532 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2533 tty->driver->name, info->count);
2534}
2535
2536/* Wait until the transmitter is empty.
2537 */
2538static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2539{
2540 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2541 unsigned long orig_jiffies, char_time;
2542
2543 if (!info )
2544 return;
2545
2546 if (debug_level >= DEBUG_LEVEL_INFO)
2547 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2548 __FILE__,__LINE__, info->device_name );
2549
2550 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2551 return;
2552
2553 if (!(info->flags & ASYNC_INITIALIZED))
2554 goto exit;
2555
2556 orig_jiffies = jiffies;
2557
2558 /* Set check interval to 1/5 of estimated time to
2559 * send a character, and make it at least 1. The check
2560 * interval should also be less than the timeout.
2561 * Note: use tight timings here to satisfy the NIST-PCTS.
2562 */
2563
2564 if ( info->params.data_rate ) {
2565 char_time = info->timeout/(32 * 5);
2566 if (!char_time)
2567 char_time++;
2568 } else
2569 char_time = 1;
2570
2571 if (timeout)
2572 char_time = min_t(unsigned long, char_time, timeout);
2573
2574 if (info->params.mode == MGSL_MODE_HDLC) {
2575 while (info->tx_active) {
2576 msleep_interruptible(jiffies_to_msecs(char_time));
2577 if (signal_pending(current))
2578 break;
2579 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2580 break;
2581 }
2582 } else {
2583 while ((info->tx_count || info->tx_active) &&
2584 info->tx_enabled) {
2585 msleep_interruptible(jiffies_to_msecs(char_time));
2586 if (signal_pending(current))
2587 break;
2588 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2589 break;
2590 }
2591 }
2592
2593exit:
2594 if (debug_level >= DEBUG_LEVEL_INFO)
2595 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2596 __FILE__,__LINE__, info->device_name );
2597}
2598
2599/* Called by tty_hangup() when a hangup is signaled.
2600 * This is the same as closing all open files for the port.
2601 */
2602static void mgslpc_hangup(struct tty_struct *tty)
2603{
2604 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2605
2606 if (debug_level >= DEBUG_LEVEL_INFO)
2607 printk("%s(%d):mgslpc_hangup(%s)\n",
2608 __FILE__,__LINE__, info->device_name );
2609
2610 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2611 return;
2612
2613 mgslpc_flush_buffer(tty);
2614 shutdown(info);
2615
2616 info->count = 0;
2617 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2618 info->tty = NULL;
2619
2620 wake_up_interruptible(&info->open_wait);
2621}
2622
2623/* Block the current process until the specified port
2624 * is ready to be opened.
2625 */
2626static int block_til_ready(struct tty_struct *tty, struct file *filp,
2627 MGSLPC_INFO *info)
2628{
2629 DECLARE_WAITQUEUE(wait, current);
2630 int retval;
2631 int do_clocal = 0, extra_count = 0;
2632 unsigned long flags;
2633
2634 if (debug_level >= DEBUG_LEVEL_INFO)
2635 printk("%s(%d):block_til_ready on %s\n",
2636 __FILE__,__LINE__, tty->driver->name );
2637
2638 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2639 /* nonblock mode is set or port is not enabled */
2640 /* just verify that callout device is not active */
2641 info->flags |= ASYNC_NORMAL_ACTIVE;
2642 return 0;
2643 }
2644
2645 if (tty->termios->c_cflag & CLOCAL)
2646 do_clocal = 1;
2647
2648 /* Wait for carrier detect and the line to become
2649 * free (i.e., not in use by the callout). While we are in
2650 * this loop, info->count is dropped by one, so that
2651 * mgslpc_close() knows when to free things. We restore it upon
2652 * exit, either normal or abnormal.
2653 */
2654
2655 retval = 0;
2656 add_wait_queue(&info->open_wait, &wait);
2657
2658 if (debug_level >= DEBUG_LEVEL_INFO)
2659 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2660 __FILE__,__LINE__, tty->driver->name, info->count );
2661
2662 spin_lock_irqsave(&info->lock, flags);
2663 if (!tty_hung_up_p(filp)) {
2664 extra_count = 1;
2665 info->count--;
2666 }
2667 spin_unlock_irqrestore(&info->lock, flags);
2668 info->blocked_open++;
2669
2670 while (1) {
2671 if ((tty->termios->c_cflag & CBAUD)) {
2672 spin_lock_irqsave(&info->lock,flags);
2673 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2674 set_signals(info);
2675 spin_unlock_irqrestore(&info->lock,flags);
2676 }
2677
2678 set_current_state(TASK_INTERRUPTIBLE);
2679
2680 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2681 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2682 -EAGAIN : -ERESTARTSYS;
2683 break;
2684 }
2685
2686 spin_lock_irqsave(&info->lock,flags);
2687 get_signals(info);
2688 spin_unlock_irqrestore(&info->lock,flags);
2689
2690 if (!(info->flags & ASYNC_CLOSING) &&
2691 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2692 break;
2693 }
2694
2695 if (signal_pending(current)) {
2696 retval = -ERESTARTSYS;
2697 break;
2698 }
2699
2700 if (debug_level >= DEBUG_LEVEL_INFO)
2701 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2702 __FILE__,__LINE__, tty->driver->name, info->count );
2703
2704 schedule();
2705 }
2706
2707 set_current_state(TASK_RUNNING);
2708 remove_wait_queue(&info->open_wait, &wait);
2709
2710 if (extra_count)
2711 info->count++;
2712 info->blocked_open--;
2713
2714 if (debug_level >= DEBUG_LEVEL_INFO)
2715 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2716 __FILE__,__LINE__, tty->driver->name, info->count );
2717
2718 if (!retval)
2719 info->flags |= ASYNC_NORMAL_ACTIVE;
2720
2721 return retval;
2722}
2723
2724static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2725{
2726 MGSLPC_INFO *info;
2727 int retval, line;
2728 unsigned long flags;
2729
2730 /* verify range of specified line number */
2731 line = tty->index;
2732 if ((line < 0) || (line >= mgslpc_device_count)) {
2733 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2734 __FILE__,__LINE__,line);
2735 return -ENODEV;
2736 }
2737
2738 /* find the info structure for the specified line */
2739 info = mgslpc_device_list;
2740 while(info && info->line != line)
2741 info = info->next_device;
2742 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2743 return -ENODEV;
2744
2745 tty->driver_data = info;
2746 info->tty = tty;
2747
2748 if (debug_level >= DEBUG_LEVEL_INFO)
2749 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2750 __FILE__,__LINE__,tty->driver->name, info->count);
2751
2752 /* If port is closing, signal caller to try again */
2753 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2754 if (info->flags & ASYNC_CLOSING)
2755 interruptible_sleep_on(&info->close_wait);
2756 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2757 -EAGAIN : -ERESTARTSYS);
2758 goto cleanup;
2759 }
2760
2761 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2762
2763 spin_lock_irqsave(&info->netlock, flags);
2764 if (info->netcount) {
2765 retval = -EBUSY;
2766 spin_unlock_irqrestore(&info->netlock, flags);
2767 goto cleanup;
2768 }
2769 info->count++;
2770 spin_unlock_irqrestore(&info->netlock, flags);
2771
2772 if (info->count == 1) {
2773 /* 1st open on this device, init hardware */
2774 retval = startup(info);
2775 if (retval < 0)
2776 goto cleanup;
2777 }
2778
2779 retval = block_til_ready(tty, filp, info);
2780 if (retval) {
2781 if (debug_level >= DEBUG_LEVEL_INFO)
2782 printk("%s(%d):block_til_ready(%s) returned %d\n",
2783 __FILE__,__LINE__, info->device_name, retval);
2784 goto cleanup;
2785 }
2786
2787 if (debug_level >= DEBUG_LEVEL_INFO)
2788 printk("%s(%d):mgslpc_open(%s) success\n",
2789 __FILE__,__LINE__, info->device_name);
2790 retval = 0;
2791
2792cleanup:
2793 if (retval) {
2794 if (tty->count == 1)
2795 info->tty = NULL; /* tty layer will release tty struct */
2796 if(info->count)
2797 info->count--;
2798 }
2799
2800 return retval;
2801}
2802
2803/*
2804 * /proc fs routines....
2805 */
2806
2807static inline int line_info(char *buf, MGSLPC_INFO *info)
2808{
2809 char stat_buf[30];
2810 int ret;
2811 unsigned long flags;
2812
2813 ret = sprintf(buf, "%s:io:%04X irq:%d",
2814 info->device_name, info->io_base, info->irq_level);
2815
2816 /* output current serial signal states */
2817 spin_lock_irqsave(&info->lock,flags);
2818 get_signals(info);
2819 spin_unlock_irqrestore(&info->lock,flags);
2820
2821 stat_buf[0] = 0;
2822 stat_buf[1] = 0;
2823 if (info->serial_signals & SerialSignal_RTS)
2824 strcat(stat_buf, "|RTS");
2825 if (info->serial_signals & SerialSignal_CTS)
2826 strcat(stat_buf, "|CTS");
2827 if (info->serial_signals & SerialSignal_DTR)
2828 strcat(stat_buf, "|DTR");
2829 if (info->serial_signals & SerialSignal_DSR)
2830 strcat(stat_buf, "|DSR");
2831 if (info->serial_signals & SerialSignal_DCD)
2832 strcat(stat_buf, "|CD");
2833 if (info->serial_signals & SerialSignal_RI)
2834 strcat(stat_buf, "|RI");
2835
2836 if (info->params.mode == MGSL_MODE_HDLC) {
2837 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2838 info->icount.txok, info->icount.rxok);
2839 if (info->icount.txunder)
2840 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2841 if (info->icount.txabort)
2842 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2843 if (info->icount.rxshort)
2844 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2845 if (info->icount.rxlong)
2846 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2847 if (info->icount.rxover)
2848 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2849 if (info->icount.rxcrc)
2850 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2851 } else {
2852 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2853 info->icount.tx, info->icount.rx);
2854 if (info->icount.frame)
2855 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2856 if (info->icount.parity)
2857 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2858 if (info->icount.brk)
2859 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2860 if (info->icount.overrun)
2861 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2862 }
2863
2864 /* Append serial signal status to end */
2865 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2866
2867 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2868 info->tx_active,info->bh_requested,info->bh_running,
2869 info->pending_bh);
2870
2871 return ret;
2872}
2873
2874/* Called to print information about devices
2875 */
2876static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2877 int *eof, void *data)
2878{
2879 int len = 0, l;
2880 off_t begin = 0;
2881 MGSLPC_INFO *info;
2882
2883 len += sprintf(page, "synclink driver:%s\n", driver_version);
2884
2885 info = mgslpc_device_list;
2886 while( info ) {
2887 l = line_info(page + len, info);
2888 len += l;
2889 if (len+begin > off+count)
2890 goto done;
2891 if (len+begin < off) {
2892 begin += len;
2893 len = 0;
2894 }
2895 info = info->next_device;
2896 }
2897
2898 *eof = 1;
2899done:
2900 if (off >= len+begin)
2901 return 0;
2902 *start = page + (off-begin);
2903 return ((count < begin+len-off) ? count : begin+len-off);
2904}
2905
2906int rx_alloc_buffers(MGSLPC_INFO *info)
2907{
2908 /* each buffer has header and data */
2909 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2910
2911 /* calculate total allocation size for 8 buffers */
2912 info->rx_buf_total_size = info->rx_buf_size * 8;
2913
2914 /* limit total allocated memory */
2915 if (info->rx_buf_total_size > 0x10000)
2916 info->rx_buf_total_size = 0x10000;
2917
2918 /* calculate number of buffers */
2919 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2920
2921 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2922 if (info->rx_buf == NULL)
2923 return -ENOMEM;
2924
2925 rx_reset_buffers(info);
2926 return 0;
2927}
2928
2929void rx_free_buffers(MGSLPC_INFO *info)
2930{
735d5661 2931 kfree(info->rx_buf);
1da177e4
LT		 2932 info->rx_buf = NULL;
2933}
2934
2935int claim_resources(MGSLPC_INFO *info)
2936{
2937 if (rx_alloc_buffers(info) < 0 ) {
2938 printk( "Cant allocate rx buffer %s\n", info->device_name);
2939 release_resources(info);
2940 return -ENODEV;
2941 }
2942 return 0;
2943}
2944
2945void release_resources(MGSLPC_INFO *info)
2946{
2947 if (debug_level >= DEBUG_LEVEL_INFO)
2948 printk("release_resources(%s)\n", info->device_name);
2949 rx_free_buffers(info);
2950}
2951
2952/* Add the specified device instance data structure to the
2953 * global linked list of devices and increment the device count.
2954 *
2955 * Arguments: info pointer to device instance data
2956 */
2957void mgslpc_add_device(MGSLPC_INFO *info)
2958{
2959 info->next_device = NULL;
2960 info->line = mgslpc_device_count;
2961 sprintf(info->device_name,"ttySLP%d",info->line);
2962
2963 if (info->line < MAX_DEVICE_COUNT) {
2964 if (maxframe[info->line])
2965 info->max_frame_size = maxframe[info->line];
2966 info->dosyncppp = dosyncppp[info->line];
2967 }
2968
2969 mgslpc_device_count++;
2970
2971 if (!mgslpc_device_list)
2972 mgslpc_device_list = info;
2973 else {
2974 MGSLPC_INFO *current_dev = mgslpc_device_list;
2975 while( current_dev->next_device )
2976 current_dev = current_dev->next_device;
2977 current_dev->next_device = info;
2978 }
2979
2980 if (info->max_frame_size < 4096)
2981 info->max_frame_size = 4096;
2982 else if (info->max_frame_size > 65535)
2983 info->max_frame_size = 65535;
2984
2985 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2986 info->device_name, info->io_base, info->irq_level);
2987
2988#ifdef CONFIG_HDLC
2989 hdlcdev_init(info);
2990#endif
2991}
2992
2993void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2994{
2995 MGSLPC_INFO *info = mgslpc_device_list;
2996 MGSLPC_INFO *last = NULL;
2997
2998 while(info) {
2999 if (info == remove_info) {
3000 if (last)
3001 last->next_device = info->next_device;
3002 else
3003 mgslpc_device_list = info->next_device;
3004#ifdef CONFIG_HDLC
3005 hdlcdev_exit(info);
3006#endif
3007 release_resources(info);
3008 kfree(info);
3009 mgslpc_device_count--;
3010 return;
3011 }
3012 last = info;
3013 info = info->next_device;
3014 }
3015}
3016
4af48c8c
DB		 3017static struct pcmcia_device_id mgslpc_ids[] = {
3018 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
3019 PCMCIA_DEVICE_NULL
3020};
3021MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
3022
1da177e4
LT		 3023static struct pcmcia_driver mgslpc_driver = {
3024 .owner = THIS_MODULE,
3025 .drv = {
3026 .name = "synclink_cs",
3027 },
f8cfa618 3028 .probe = mgslpc_attach,
cc3b4866 3029 .remove = mgslpc_detach,
4af48c8c 3030 .id_table = mgslpc_ids,
98e4c28b
DB		 3031 .suspend = mgslpc_suspend,
3032 .resume = mgslpc_resume,
1da177e4
LT		 3033};
3034
3035static struct tty_operations mgslpc_ops = {
3036 .open = mgslpc_open,
3037 .close = mgslpc_close,
3038 .write = mgslpc_write,
3039 .put_char = mgslpc_put_char,
3040 .flush_chars = mgslpc_flush_chars,
3041 .write_room = mgslpc_write_room,
3042 .chars_in_buffer = mgslpc_chars_in_buffer,
3043 .flush_buffer = mgslpc_flush_buffer,
3044 .ioctl = mgslpc_ioctl,
3045 .throttle = mgslpc_throttle,
3046 .unthrottle = mgslpc_unthrottle,
3047 .send_xchar = mgslpc_send_xchar,
3048 .break_ctl = mgslpc_break,
3049 .wait_until_sent = mgslpc_wait_until_sent,
3050 .read_proc = mgslpc_read_proc,
3051 .set_termios = mgslpc_set_termios,
3052 .stop = tx_pause,
3053 .start = tx_release,
3054 .hangup = mgslpc_hangup,
3055 .tiocmget = tiocmget,
3056 .tiocmset = tiocmset,
3057};
3058
3059static void synclink_cs_cleanup(void)
3060{
3061 int rc;
3062
3063 printk("Unloading %s: version %s\n", driver_name, driver_version);
3064
3065 while(mgslpc_device_list)
3066 mgslpc_remove_device(mgslpc_device_list);
3067
3068 if (serial_driver) {
3069 if ((rc = tty_unregister_driver(serial_driver)))
3070 printk("%s(%d) failed to unregister tty driver err=%d\n",
3071 __FILE__,__LINE__,rc);
3072 put_tty_driver(serial_driver);
3073 }
3074
3075 pcmcia_unregister_driver(&mgslpc_driver);
1da177e4
LT		 3076}
3077
3078static int __init synclink_cs_init(void)
3079{
3080 int rc;
3081
3082 if (break_on_load) {
3083 mgslpc_get_text_ptr();
3084 BREAKPOINT();
3085 }
3086
3087 printk("%s %s\n", driver_name, driver_version);
3088
3089 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3090 return rc;
3091
3092 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3093 if (!serial_driver) {
3094 rc = -ENOMEM;
3095 goto error;
3096 }
3097
3098 /* Initialize the tty_driver structure */
3099
3100 serial_driver->owner = THIS_MODULE;
3101 serial_driver->driver_name = "synclink_cs";
3102 serial_driver->name = "ttySLP";
3103 serial_driver->major = ttymajor;
3104 serial_driver->minor_start = 64;
3105 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3106 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3107 serial_driver->init_termios = tty_std_termios;
3108 serial_driver->init_termios.c_cflag =
3109 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3110 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3111 tty_set_operations(serial_driver, &mgslpc_ops);
3112
3113 if ((rc = tty_register_driver(serial_driver)) < 0) {
3114 printk("%s(%d):Couldn't register serial driver\n",
3115 __FILE__,__LINE__);
3116 put_tty_driver(serial_driver);
3117 serial_driver = NULL;
3118 goto error;
3119 }
3120
3121 printk("%s %s, tty major#%d\n",
3122 driver_name, driver_version,
3123 serial_driver->major);
3124
3125 return 0;
3126
3127error:
3128 synclink_cs_cleanup();
3129 return rc;
3130}
3131
3132static void __exit synclink_cs_exit(void)
3133{
3134 synclink_cs_cleanup();
3135}
3136
3137module_init(synclink_cs_init);
3138module_exit(synclink_cs_exit);
3139
3140static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3141{
3142 unsigned int M, N;
3143 unsigned char val;
3144
3145 /* note:standard BRG mode is broken in V3.2 chip
3146 * so enhanced mode is always used
3147 */
3148
3149 if (rate) {
3150 N = 3686400 / rate;
3151 if (!N)
3152 N = 1;
3153 N >>= 1;
3154 for (M = 1; N > 64 && M < 16; M++)
3155 N >>= 1;
3156 N--;
3157
3158 /* BGR[5..0] = N
3159 * BGR[9..6] = M
3160 * BGR[7..0] contained in BGR register
3161 * BGR[9..8] contained in CCR2[7..6]
3162 * divisor = (N+1)*2^M
3163 *
3164 * Note: M *must* not be zero (causes asymetric duty cycle)
3165 */
3166 write_reg(info, (unsigned char) (channel + BGR),
3167 (unsigned char) ((M << 6) + N));
3168 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3169 val |= ((M << 4) & 0xc0);
3170 write_reg(info, (unsigned char) (channel + CCR2), val);
3171 }
3172}
3173
3174/* Enabled the AUX clock output at the specified frequency.
3175 */
3176static void enable_auxclk(MGSLPC_INFO *info)
3177{
3178 unsigned char val;
3179
3180 /* MODE
3181 *
3182 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3183 * 05 ADM Address Mode, 0 = no addr recognition
3184 * 04 TMD Timer Mode, 0 = external
3185 * 03 RAC Receiver Active, 0 = inactive
3186 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3187 * 01 TRS Timer Resolution, 1=512
3188 * 00 TLP Test Loop, 0 = no loop
3189 *
3190 * 1000 0010
3191 */
3192 val = 0x82;
3193
3194 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3195 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3196 val |= BIT2;
3197 write_reg(info, CHB + MODE, val);
3198
3199 /* CCR0
3200 *
3201 * 07 PU Power Up, 1=active, 0=power down
3202 * 06 MCE Master Clock Enable, 1=enabled
3203 * 05 Reserved, 0
3204 * 04..02 SC[2..0] Encoding
3205 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3206 *
3207 * 11000000
3208 */
3209 write_reg(info, CHB + CCR0, 0xc0);
3210
3211 /* CCR1
3212 *
3213 * 07 SFLG Shared Flag, 0 = disable shared flags
3214 * 06 GALP Go Active On Loop, 0 = not used
3215 * 05 GLP Go On Loop, 0 = not used
3216 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3217 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3218 * 02..00 CM[2..0] Clock Mode
3219 *
3220 * 0001 0111
3221 */
3222 write_reg(info, CHB + CCR1, 0x17);
3223
3224 /* CCR2 (Channel B)
3225 *
3226 * 07..06 BGR[9..8] Baud rate bits 9..8
3227 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3228 * 04 SSEL Clock source select, 1=submode b
3229 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3230 * 02 RWX Read/Write Exchange 0=disabled
3231 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3232 * 00 DIV, data inversion 0=disabled, 1=enabled
3233 *
3234 * 0011 1000
3235 */
3236 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3237 write_reg(info, CHB + CCR2, 0x38);
3238 else
3239 write_reg(info, CHB + CCR2, 0x30);
3240
3241 /* CCR4
3242 *
3243 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3244 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3245 * 05 TST1 Test Pin, 0=normal operation
3246 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3247 * 03..02 Reserved, must be 0
3248 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3249 *
3250 * 0101 0000
3251 */
3252 write_reg(info, CHB + CCR4, 0x50);
3253
3254 /* if auxclk not enabled, set internal BRG so
3255 * CTS transitions can be detected (requires TxC)
3256 */
3257 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3258 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3259 else
3260 mgslpc_set_rate(info, CHB, 921600);
3261}
3262
3263static void loopback_enable(MGSLPC_INFO *info)
3264{
3265 unsigned char val;
3266
3267 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3268 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3269 write_reg(info, CHA + CCR1, val);
3270
3271 /* CCR2:04 SSEL Clock source select, 1=submode b */
3272 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3273 write_reg(info, CHA + CCR2, val);
3274
3275 /* set LinkSpeed if available, otherwise default to 2Mbps */
3276 if (info->params.clock_speed)
3277 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3278 else
3279 mgslpc_set_rate(info, CHA, 1843200);
3280
3281 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3282 val = read_reg(info, CHA + MODE) | BIT0;
3283 write_reg(info, CHA + MODE, val);
3284}
3285
3286void hdlc_mode(MGSLPC_INFO *info)
3287{
3288 unsigned char val;
3289 unsigned char clkmode, clksubmode;
3290
3291 /* disable all interrupts */
3292 irq_disable(info, CHA, 0xffff);
3293 irq_disable(info, CHB, 0xffff);
3294 port_irq_disable(info, 0xff);
3295
3296 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3297 clkmode = clksubmode = 0;
3298 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3299 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3300 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3301 clkmode = 7;
3302 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3303 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3304 /* clock mode 7b, rcv = BRG, xmt = BRG */
3305 clkmode = 7;
3306 clksubmode = 1;
3307 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3308 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3309 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3310 clkmode = 6;
3311 clksubmode = 1;
3312 } else {
3313 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3314 clkmode = 6;
3315 }
3316 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3317 /* clock mode 0b, rcv = RxC, xmt = BRG */
3318 clksubmode = 1;
3319 }
3320
3321 /* MODE
3322 *
3323 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3324 * 05 ADM Address Mode, 0 = no addr recognition
3325 * 04 TMD Timer Mode, 0 = external
3326 * 03 RAC Receiver Active, 0 = inactive
3327 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3328 * 01 TRS Timer Resolution, 1=512
3329 * 00 TLP Test Loop, 0 = no loop
3330 *
3331 * 1000 0010
3332 */
3333 val = 0x82;
3334 if (info->params.loopback)
3335 val |= BIT0;
3336
3337 /* preserve RTS state */
3338 if (info->serial_signals & SerialSignal_RTS)
3339 val |= BIT2;
3340 write_reg(info, CHA + MODE, val);
3341
3342 /* CCR0
3343 *
3344 * 07 PU Power Up, 1=active, 0=power down
3345 * 06 MCE Master Clock Enable, 1=enabled
3346 * 05 Reserved, 0
3347 * 04..02 SC[2..0] Encoding
3348 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3349 *
3350 * 11000000
3351 */
3352 val = 0xc0;
3353 switch (info->params.encoding)
3354 {
3355 case HDLC_ENCODING_NRZI:
3356 val |= BIT3;
3357 break;
3358 case HDLC_ENCODING_BIPHASE_SPACE:
3359 val |= BIT4;
3360 break; // FM0
3361 case HDLC_ENCODING_BIPHASE_MARK:
3362 val |= BIT4 + BIT2;
3363 break; // FM1
3364 case HDLC_ENCODING_BIPHASE_LEVEL:
3365 val |= BIT4 + BIT3;
3366 break; // Manchester
3367 }
3368 write_reg(info, CHA + CCR0, val);
3369
3370 /* CCR1
3371 *
3372 * 07 SFLG Shared Flag, 0 = disable shared flags
3373 * 06 GALP Go Active On Loop, 0 = not used
3374 * 05 GLP Go On Loop, 0 = not used
3375 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3376 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3377 * 02..00 CM[2..0] Clock Mode
3378 *
3379 * 0001 0000
3380 */
3381 val = 0x10 + clkmode;
3382 write_reg(info, CHA + CCR1, val);
3383
3384 /* CCR2
3385 *
3386 * 07..06 BGR[9..8] Baud rate bits 9..8
3387 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3388 * 04 SSEL Clock source select, 1=submode b
3389 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3390 * 02 RWX Read/Write Exchange 0=disabled
3391 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3392 * 00 DIV, data inversion 0=disabled, 1=enabled
3393 *
3394 * 0000 0000
3395 */
3396 val = 0x00;
3397 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3398 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3399 val |= BIT5;
3400 if (clksubmode)
3401 val |= BIT4;
3402 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3403 val |= BIT1;
3404 if (info->params.encoding == HDLC_ENCODING_NRZB)
3405 val |= BIT0;
3406 write_reg(info, CHA + CCR2, val);
3407
3408 /* CCR3
3409 *
3410 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3411 * 05 EPT Enable preamble transmission, 1=enabled
3412 * 04 RADD Receive address pushed to FIFO, 0=disabled
3413 * 03 CRL CRC Reset Level, 0=FFFF
3414 * 02 RCRC Rx CRC 0=On 1=Off
3415 * 01 TCRC Tx CRC 0=On 1=Off
3416 * 00 PSD DPLL Phase Shift Disable
3417 *
3418 * 0000 0000
3419 */
3420 val = 0x00;
3421 if (info->params.crc_type == HDLC_CRC_NONE)
3422 val |= BIT2 + BIT1;
3423 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3424 val |= BIT5;
3425 switch (info->params.preamble_length)
3426 {
3427 case HDLC_PREAMBLE_LENGTH_16BITS:
3428 val |= BIT6;
3429 break;
3430 case HDLC_PREAMBLE_LENGTH_32BITS:
3431 val |= BIT6;
3432 break;
3433 case HDLC_PREAMBLE_LENGTH_64BITS:
3434 val |= BIT7 + BIT6;
3435 break;
3436 }
3437 write_reg(info, CHA + CCR3, val);
3438
3439 /* PRE - Preamble pattern */
3440 val = 0;
3441 switch (info->params.preamble)
3442 {
3443 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3444 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3445 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3446 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3447 }
3448 write_reg(info, CHA + PRE, val);
3449
3450 /* CCR4
3451 *
3452 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3453 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3454 * 05 TST1 Test Pin, 0=normal operation
3455 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3456 * 03..02 Reserved, must be 0
3457 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3458 *
3459 * 0101 0000
3460 */
3461 val = 0x50;
3462 write_reg(info, CHA + CCR4, val);
3463 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3464 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3465 else
3466 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3467
3468 /* RLCR Receive length check register
3469 *
3470 * 7 1=enable receive length check
3471 * 6..0 Max frame length = (RL + 1) * 32
3472 */
3473 write_reg(info, CHA + RLCR, 0);
3474
3475 /* XBCH Transmit Byte Count High
3476 *
3477 * 07 DMA mode, 0 = interrupt driven
3478 * 06 NRM, 0=ABM (ignored)
3479 * 05 CAS Carrier Auto Start
3480 * 04 XC Transmit Continuously (ignored)
3481 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3482 *
3483 * 0000 0000
3484 */
3485 val = 0x00;
3486 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3487 val |= BIT5;
3488 write_reg(info, CHA + XBCH, val);
3489 enable_auxclk(info);
3490 if (info->params.loopback || info->testing_irq)
3491 loopback_enable(info);
3492 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3493 {
3494 irq_enable(info, CHB, IRQ_CTS);
3495 /* PVR[3] 1=AUTO CTS active */
3496 set_reg_bits(info, CHA + PVR, BIT3);
3497 } else
3498 clear_reg_bits(info, CHA + PVR, BIT3);
3499
3500 irq_enable(info, CHA,
3501 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3502 IRQ_UNDERRUN + IRQ_TXFIFO);
3503 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3504 wait_command_complete(info, CHA);
3505 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3506
3507 /* Master clock mode enabled above to allow reset commands
3508 * to complete even if no data clocks are present.
3509 *
3510 * Disable master clock mode for normal communications because
3511 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3512 * IRQ when in master clock mode.
3513 *
3514 * Leave master clock mode enabled for IRQ test because the
3515 * timer IRQ used by the test can only happen in master clock mode.
3516 */
3517 if (!info->testing_irq)
3518 clear_reg_bits(info, CHA + CCR0, BIT6);
3519
3520 tx_set_idle(info);
3521
3522 tx_stop(info);
3523 rx_stop(info);
3524}
3525
3526void rx_stop(MGSLPC_INFO *info)
3527{
3528 if (debug_level >= DEBUG_LEVEL_ISR)
3529 printk("%s(%d):rx_stop(%s)\n",
3530 __FILE__,__LINE__, info->device_name );
3531
3532 /* MODE:03 RAC Receiver Active, 0=inactive */
3533 clear_reg_bits(info, CHA + MODE, BIT3);
3534
3535 info->rx_enabled = 0;
3536 info->rx_overflow = 0;
3537}
3538
3539void rx_start(MGSLPC_INFO *info)
3540{
3541 if (debug_level >= DEBUG_LEVEL_ISR)
3542 printk("%s(%d):rx_start(%s)\n",
3543 __FILE__,__LINE__, info->device_name );
3544
3545 rx_reset_buffers(info);
3546 info->rx_enabled = 0;
3547 info->rx_overflow = 0;
3548
3549 /* MODE:03 RAC Receiver Active, 1=active */
3550 set_reg_bits(info, CHA + MODE, BIT3);
3551
3552 info->rx_enabled = 1;
3553}
3554
3555void tx_start(MGSLPC_INFO *info)
3556{
3557 if (debug_level >= DEBUG_LEVEL_ISR)
3558 printk("%s(%d):tx_start(%s)\n",
3559 __FILE__,__LINE__, info->device_name );
3560
3561 if (info->tx_count) {
3562 /* If auto RTS enabled and RTS is inactive, then assert */
3563 /* RTS and set a flag indicating that the driver should */
3564 /* negate RTS when the transmission completes. */
3565 info->drop_rts_on_tx_done = 0;
3566
3567 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3568 get_signals(info);
3569 if (!(info->serial_signals & SerialSignal_RTS)) {
3570 info->serial_signals |= SerialSignal_RTS;
3571 set_signals(info);
3572 info->drop_rts_on_tx_done = 1;
3573 }
3574 }
3575
3576 if (info->params.mode == MGSL_MODE_ASYNC) {
3577 if (!info->tx_active) {
3578 info->tx_active = 1;
3579 tx_ready(info);
3580 }
3581 } else {
3582 info->tx_active = 1;
3583 tx_ready(info);
3584 info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
3585 add_timer(&info->tx_timer);
3586 }
3587 }
3588
3589 if (!info->tx_enabled)
3590 info->tx_enabled = 1;
3591}
3592
3593void tx_stop(MGSLPC_INFO *info)
3594{
3595 if (debug_level >= DEBUG_LEVEL_ISR)
3596 printk("%s(%d):tx_stop(%s)\n",
3597 __FILE__,__LINE__, info->device_name );
3598
3599 del_timer(&info->tx_timer);
3600
3601 info->tx_enabled = 0;
3602 info->tx_active = 0;
3603}
3604
3605/* Reset the adapter to a known state and prepare it for further use.
3606 */
3607void reset_device(MGSLPC_INFO *info)
3608{
3609 /* power up both channels (set BIT7) */
3610 write_reg(info, CHA + CCR0, 0x80);
3611 write_reg(info, CHB + CCR0, 0x80);
3612 write_reg(info, CHA + MODE, 0);
3613 write_reg(info, CHB + MODE, 0);
3614
3615 /* disable all interrupts */
3616 irq_disable(info, CHA, 0xffff);
3617 irq_disable(info, CHB, 0xffff);
3618 port_irq_disable(info, 0xff);
3619
3620 /* PCR Port Configuration Register
3621 *
3622 * 07..04 DEC[3..0] Serial I/F select outputs
3623 * 03 output, 1=AUTO CTS control enabled
3624 * 02 RI Ring Indicator input 0=active
3625 * 01 DSR input 0=active
3626 * 00 DTR output 0=active
3627 *
3628 * 0000 0110
3629 */
3630 write_reg(info, PCR, 0x06);
3631
3632 /* PVR Port Value Register
3633 *
3634 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3635 * 03 AUTO CTS output 1=enabled
3636 * 02 RI Ring Indicator input
3637 * 01 DSR input
3638 * 00 DTR output (1=inactive)
3639 *
3640 * 0000 0001
3641 */
3642// write_reg(info, PVR, PVR_DTR);
3643
3644 /* IPC Interrupt Port Configuration
3645 *
3646 * 07 VIS 1=Masked interrupts visible
3647 * 06..05 Reserved, 0
3648 * 04..03 SLA Slave address, 00 ignored
3649 * 02 CASM Cascading Mode, 1=daisy chain
3650 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3651 *
3652 * 0000 0101
3653 */
3654 write_reg(info, IPC, 0x05);
3655}
3656
3657void async_mode(MGSLPC_INFO *info)
3658{
3659 unsigned char val;
3660
3661 /* disable all interrupts */
3662 irq_disable(info, CHA, 0xffff);
3663 irq_disable(info, CHB, 0xffff);
3664 port_irq_disable(info, 0xff);
3665
3666 /* MODE
3667 *
3668 * 07 Reserved, 0
3669 * 06 FRTS RTS State, 0=active
3670 * 05 FCTS Flow Control on CTS
3671 * 04 FLON Flow Control Enable
3672 * 03 RAC Receiver Active, 0 = inactive
3673 * 02 RTS 0=Auto RTS, 1=manual RTS
3674 * 01 TRS Timer Resolution, 1=512
3675 * 00 TLP Test Loop, 0 = no loop
3676 *
3677 * 0000 0110
3678 */
3679 val = 0x06;
3680 if (info->params.loopback)
3681 val |= BIT0;
3682
3683 /* preserve RTS state */
3684 if (!(info->serial_signals & SerialSignal_RTS))
3685 val |= BIT6;
3686 write_reg(info, CHA + MODE, val);
3687
3688 /* CCR0
3689 *
3690 * 07 PU Power Up, 1=active, 0=power down
3691 * 06 MCE Master Clock Enable, 1=enabled
3692 * 05 Reserved, 0
3693 * 04..02 SC[2..0] Encoding, 000=NRZ
3694 * 01..00 SM[1..0] Serial Mode, 11=Async
3695 *
3696 * 1000 0011
3697 */
3698 write_reg(info, CHA + CCR0, 0x83);
3699
3700 /* CCR1
3701 *
3702 * 07..05 Reserved, 0
3703 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3704 * 03 BCR Bit Clock Rate, 1=16x
3705 * 02..00 CM[2..0] Clock Mode, 111=BRG
3706 *
3707 * 0001 1111
3708 */
3709 write_reg(info, CHA + CCR1, 0x1f);
3710
3711 /* CCR2 (channel A)
3712 *
3713 * 07..06 BGR[9..8] Baud rate bits 9..8
3714 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3715 * 04 SSEL Clock source select, 1=submode b
3716 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3717 * 02 RWX Read/Write Exchange 0=disabled
3718 * 01 Reserved, 0
3719 * 00 DIV, data inversion 0=disabled, 1=enabled
3720 *
3721 * 0001 0000
3722 */
3723 write_reg(info, CHA + CCR2, 0x10);
3724
3725 /* CCR3
3726 *
3727 * 07..01 Reserved, 0
3728 * 00 PSD DPLL Phase Shift Disable
3729 *
3730 * 0000 0000
3731 */
3732 write_reg(info, CHA + CCR3, 0);
3733
3734 /* CCR4
3735 *
3736 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3737 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3738 * 05 TST1 Test Pin, 0=normal operation
3739 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3740 * 03..00 Reserved, must be 0
3741 *
3742 * 0101 0000
3743 */
3744 write_reg(info, CHA + CCR4, 0x50);
3745 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3746
3747 /* DAFO Data Format
3748 *
3749 * 07 Reserved, 0
3750 * 06 XBRK transmit break, 0=normal operation
3751 * 05 Stop bits (0=1, 1=2)
3752 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3753 * 02 PAREN Parity Enable
3754 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3755 *
3756 */
3757 val = 0x00;
3758 if (info->params.data_bits != 8)
3759 val |= BIT0; /* 7 bits */
3760 if (info->params.stop_bits != 1)
3761 val |= BIT5;
3762 if (info->params.parity != ASYNC_PARITY_NONE)
3763 {
3764 val |= BIT2; /* Parity enable */
3765 if (info->params.parity == ASYNC_PARITY_ODD)
3766 val |= BIT3;
3767 else
3768 val |= BIT4;
3769 }
3770 write_reg(info, CHA + DAFO, val);
3771
3772 /* RFC Rx FIFO Control
3773 *
3774 * 07 Reserved, 0
3775 * 06 DPS, 1=parity bit not stored in data byte
3776 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3777 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3778 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3779 * 01 Reserved, 0
3780 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3781 *
3782 * 0101 1100
3783 */
3784 write_reg(info, CHA + RFC, 0x5c);
3785
3786 /* RLCR Receive length check register
3787 *
3788 * Max frame length = (RL + 1) * 32
3789 */
3790 write_reg(info, CHA + RLCR, 0);
3791
3792 /* XBCH Transmit Byte Count High
3793 *
3794 * 07 DMA mode, 0 = interrupt driven
3795 * 06 NRM, 0=ABM (ignored)
3796 * 05 CAS Carrier Auto Start
3797 * 04 XC Transmit Continuously (ignored)
3798 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3799 *
3800 * 0000 0000
3801 */
3802 val = 0x00;
3803 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3804 val |= BIT5;
3805 write_reg(info, CHA + XBCH, val);
3806 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3807 irq_enable(info, CHA, IRQ_CTS);
3808
3809 /* MODE:03 RAC Receiver Active, 1=active */
3810 set_reg_bits(info, CHA + MODE, BIT3);
3811 enable_auxclk(info);
3812 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3813 irq_enable(info, CHB, IRQ_CTS);
3814 /* PVR[3] 1=AUTO CTS active */
3815 set_reg_bits(info, CHA + PVR, BIT3);
3816 } else
3817 clear_reg_bits(info, CHA + PVR, BIT3);
3818 irq_enable(info, CHA,
3819 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3820 IRQ_ALLSENT + IRQ_TXFIFO);
3821 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3822 wait_command_complete(info, CHA);
3823 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3824}
3825
3826/* Set the HDLC idle mode for the transmitter.
3827 */
3828void tx_set_idle(MGSLPC_INFO *info)
3829{
3830 /* Note: ESCC2 only supports flags and one idle modes */
3831 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3832 set_reg_bits(info, CHA + CCR1, BIT3);
3833 else
3834 clear_reg_bits(info, CHA + CCR1, BIT3);
3835}
3836
3837/* get state of the V24 status (input) signals.
3838 */
3839void get_signals(MGSLPC_INFO *info)
3840{
3841 unsigned char status = 0;
3842
3843 /* preserve DTR and RTS */
3844 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3845
3846 if (read_reg(info, CHB + VSTR) & BIT7)
3847 info->serial_signals |= SerialSignal_DCD;
3848 if (read_reg(info, CHB + STAR) & BIT1)
3849 info->serial_signals |= SerialSignal_CTS;
3850
3851 status = read_reg(info, CHA + PVR);
3852 if (!(status & PVR_RI))
3853 info->serial_signals |= SerialSignal_RI;
3854 if (!(status & PVR_DSR))
3855 info->serial_signals |= SerialSignal_DSR;
3856}
3857
3858/* Set the state of DTR and RTS based on contents of
3859 * serial_signals member of device extension.
3860 */
3861void set_signals(MGSLPC_INFO *info)
3862{
3863 unsigned char val;
3864
3865 val = read_reg(info, CHA + MODE);
3866 if (info->params.mode == MGSL_MODE_ASYNC) {
3867 if (info->serial_signals & SerialSignal_RTS)
3868 val &= ~BIT6;
3869 else
3870 val |= BIT6;
3871 } else {
3872 if (info->serial_signals & SerialSignal_RTS)
3873 val |= BIT2;
3874 else
3875 val &= ~BIT2;
3876 }
3877 write_reg(info, CHA + MODE, val);
3878
3879 if (info->serial_signals & SerialSignal_DTR)
3880 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3881 else
3882 set_reg_bits(info, CHA + PVR, PVR_DTR);
3883}
3884
3885void rx_reset_buffers(MGSLPC_INFO *info)
3886{
3887 RXBUF *buf;
3888 int i;
3889
3890 info->rx_put = 0;
3891 info->rx_get = 0;
3892 info->rx_frame_count = 0;
3893 for (i=0 ; i < info->rx_buf_count ; i++) {
3894 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3895 buf->status = buf->count = 0;
3896 }
3897}
3898
3899/* Attempt to return a received HDLC frame
3900 * Only frames received without errors are returned.
3901 *
3902 * Returns 1 if frame returned, otherwise 0
3903 */
3904int rx_get_frame(MGSLPC_INFO *info)
3905{
3906 unsigned short status;
3907 RXBUF *buf;
3908 unsigned int framesize = 0;
3909 unsigned long flags;
3910 struct tty_struct *tty = info->tty;
3911 int return_frame = 0;
3912
3913 if (info->rx_frame_count == 0)
3914 return 0;
3915
3916 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3917
3918 status = buf->status;
3919
3920 /* 07 VFR 1=valid frame
3921 * 06 RDO 1=data overrun
3922 * 05 CRC 1=OK, 0=error
3923 * 04 RAB 1=frame aborted
3924 */
3925 if ((status & 0xf0) != 0xA0) {
3926 if (!(status & BIT7) || (status & BIT4))
3927 info->icount.rxabort++;
3928 else if (status & BIT6)
3929 info->icount.rxover++;
3930 else if (!(status & BIT5)) {
3931 info->icount.rxcrc++;
3932 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3933 return_frame = 1;
3934 }
3935 framesize = 0;
3936#ifdef CONFIG_HDLC
3937 {
3938 struct net_device_stats *stats = hdlc_stats(info->netdev);
3939 stats->rx_errors++;
3940 stats->rx_frame_errors++;
3941 }
3942#endif
3943 } else
3944 return_frame = 1;
3945
3946 if (return_frame)
3947 framesize = buf->count;
3948
3949 if (debug_level >= DEBUG_LEVEL_BH)
3950 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3951 __FILE__,__LINE__,info->device_name,status,framesize);
3952
3953 if (debug_level >= DEBUG_LEVEL_DATA)
3954 trace_block(info, buf->data, framesize, 0);
3955
3956 if (framesize) {
3957 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3958 framesize+1 > info->max_frame_size) ||
3959 framesize > info->max_frame_size)
3960 info->icount.rxlong++;
3961 else {
3962 if (status & BIT5)
3963 info->icount.rxok++;
3964
3965 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3966 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3967 ++framesize;
3968 }
3969
3970#ifdef CONFIG_HDLC
3971 if (info->netcount)
3972 hdlcdev_rx(info, buf->data, framesize);
3973 else
3974#endif
3975 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3976 }
3977 }
3978
3979 spin_lock_irqsave(&info->lock,flags);
3980 buf->status = buf->count = 0;
3981 info->rx_frame_count--;
3982 info->rx_get++;
3983 if (info->rx_get >= info->rx_buf_count)
3984 info->rx_get = 0;
3985 spin_unlock_irqrestore(&info->lock,flags);
3986
3987 return 1;
3988}
3989
3990BOOLEAN register_test(MGSLPC_INFO *info)
3991{
3992 static unsigned char patterns[] =
3993 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
fe971071 3994 static unsigned int count = ARRAY_SIZE(patterns);
1da177e4
LT		 3995 unsigned int i;
3996 BOOLEAN rc = TRUE;
3997 unsigned long flags;
3998
3999 spin_lock_irqsave(&info->lock,flags);
4000 reset_device(info);
4001
4002 for (i = 0; i < count; i++) {
4003 write_reg(info, XAD1, patterns[i]);
4004 write_reg(info, XAD2, patterns[(i + 1) % count]);
fe971071 4005 if ((read_reg(info, XAD1) != patterns[i]) ||
1da177e4
LT		 4006 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
4007 rc = FALSE;
4008 break;
4009 }
4010 }
4011
4012 spin_unlock_irqrestore(&info->lock,flags);
4013 return rc;
4014}
4015
4016BOOLEAN irq_test(MGSLPC_INFO *info)
4017{
4018 unsigned long end_time;
4019 unsigned long flags;
4020
4021 spin_lock_irqsave(&info->lock,flags);
4022 reset_device(info);
4023
4024 info->testing_irq = TRUE;
4025 hdlc_mode(info);
4026
4027 info->irq_occurred = FALSE;
4028
4029 /* init hdlc mode */
4030
4031 irq_enable(info, CHA, IRQ_TIMER);
4032 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
4033 issue_command(info, CHA, CMD_START_TIMER);
4034
4035 spin_unlock_irqrestore(&info->lock,flags);
4036
4037 end_time=100;
4038 while(end_time-- && !info->irq_occurred) {
4039 msleep_interruptible(10);
4040 }
4041
4042 info->testing_irq = FALSE;
4043
4044 spin_lock_irqsave(&info->lock,flags);
4045 reset_device(info);
4046 spin_unlock_irqrestore(&info->lock,flags);
4047
4048 return info->irq_occurred ? TRUE : FALSE;
4049}
4050
4051int adapter_test(MGSLPC_INFO *info)
4052{
4053 if (!register_test(info)) {
4054 info->init_error = DiagStatus_AddressFailure;
4055 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4056 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4057 return -ENODEV;
4058 }
4059
4060 if (!irq_test(info)) {
4061 info->init_error = DiagStatus_IrqFailure;
4062 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4063 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4064 return -ENODEV;
4065 }
4066
4067 if (debug_level >= DEBUG_LEVEL_INFO)
4068 printk("%s(%d):device %s passed diagnostics\n",
4069 __FILE__,__LINE__,info->device_name);
4070 return 0;
4071}
4072
4073void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4074{
4075 int i;
4076 int linecount;
4077 if (xmit)
4078 printk("%s tx data:\n",info->device_name);
4079 else
4080 printk("%s rx data:\n",info->device_name);
4081
4082 while(count) {
4083 if (count > 16)
4084 linecount = 16;
4085 else
4086 linecount = count;
4087
4088 for(i=0;i<linecount;i++)
4089 printk("%02X ",(unsigned char)data[i]);
4090 for(;i<17;i++)
4091 printk(" ");
4092 for(i=0;i<linecount;i++) {
4093 if (data[i]>=040 && data[i]<=0176)
4094 printk("%c",data[i]);
4095 else
4096 printk(".");
4097 }
4098 printk("\n");
4099
4100 data += linecount;
4101 count -= linecount;
4102 }
4103}
4104
4105/* HDLC frame time out
4106 * update stats and do tx completion processing
4107 */
4108void tx_timeout(unsigned long context)
4109{
4110 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4111 unsigned long flags;
4112
4113 if ( debug_level >= DEBUG_LEVEL_INFO )
4114 printk( "%s(%d):tx_timeout(%s)\n",
4115 __FILE__,__LINE__,info->device_name);
4116 if(info->tx_active &&
4117 info->params.mode == MGSL_MODE_HDLC) {
4118 info->icount.txtimeout++;
4119 }
4120 spin_lock_irqsave(&info->lock,flags);
4121 info->tx_active = 0;
4122 info->tx_count = info->tx_put = info->tx_get = 0;
4123
4124 spin_unlock_irqrestore(&info->lock,flags);
4125
4126#ifdef CONFIG_HDLC
4127 if (info->netcount)
4128 hdlcdev_tx_done(info);
4129 else
4130#endif
4131 bh_transmit(info);
4132}
4133
4134#ifdef CONFIG_HDLC
4135
4136/**
4137 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4138 * set encoding and frame check sequence (FCS) options
4139 *
4140 * dev pointer to network device structure
4141 * encoding serial encoding setting
4142 * parity FCS setting
4143 *
4144 * returns 0 if success, otherwise error code
4145 */
4146static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4147 unsigned short parity)
4148{
4149 MGSLPC_INFO *info = dev_to_port(dev);
4150 unsigned char new_encoding;
4151 unsigned short new_crctype;
4152
4153 /* return error if TTY interface open */
4154 if (info->count)
4155 return -EBUSY;
4156
4157 switch (encoding)
4158 {
4159 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4160 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4161 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4162 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4163 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4164 default: return -EINVAL;
4165 }
4166
4167 switch (parity)
4168 {
4169 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4170 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4171 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4172 default: return -EINVAL;
4173 }
4174
4175 info->params.encoding = new_encoding;
53b3531b 4176 info->params.crc_type = new_crctype;
1da177e4
LT		 4177
4178 /* if network interface up, reprogram hardware */
4179 if (info->netcount)
4180 mgslpc_program_hw(info);
4181
4182 return 0;
4183}
4184
4185/**
4186 * called by generic HDLC layer to send frame
4187 *
4188 * skb socket buffer containing HDLC frame
4189 * dev pointer to network device structure
4190 *
4191 * returns 0 if success, otherwise error code
4192 */
4193static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4194{
4195 MGSLPC_INFO *info = dev_to_port(dev);
4196 struct net_device_stats *stats = hdlc_stats(dev);
4197 unsigned long flags;
4198
4199 if (debug_level >= DEBUG_LEVEL_INFO)
4200 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4201
4202 /* stop sending until this frame completes */
4203 netif_stop_queue(dev);
4204
4205 /* copy data to device buffers */
4206 memcpy(info->tx_buf, skb->data, skb->len);
4207 info->tx_get = 0;
4208 info->tx_put = info->tx_count = skb->len;
4209
4210 /* update network statistics */
4211 stats->tx_packets++;
4212 stats->tx_bytes += skb->len;
4213
4214 /* done with socket buffer, so free it */
4215 dev_kfree_skb(skb);
4216
4217 /* save start time for transmit timeout detection */
4218 dev->trans_start = jiffies;
4219
4220 /* start hardware transmitter if necessary */
4221 spin_lock_irqsave(&info->lock,flags);
4222 if (!info->tx_active)
4223 tx_start(info);
4224 spin_unlock_irqrestore(&info->lock,flags);
4225
4226 return 0;
4227}
4228
4229/**
4230 * called by network layer when interface enabled
4231 * claim resources and initialize hardware
4232 *
4233 * dev pointer to network device structure
4234 *
4235 * returns 0 if success, otherwise error code
4236 */
4237static int hdlcdev_open(struct net_device *dev)
4238{
4239 MGSLPC_INFO *info = dev_to_port(dev);
4240 int rc;
4241 unsigned long flags;
4242
4243 if (debug_level >= DEBUG_LEVEL_INFO)
4244 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4245
4246 /* generic HDLC layer open processing */
4247 if ((rc = hdlc_open(dev)))
4248 return rc;
4249
4250 /* arbitrate between network and tty opens */
4251 spin_lock_irqsave(&info->netlock, flags);
4252 if (info->count != 0 || info->netcount != 0) {
4253 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4254 spin_unlock_irqrestore(&info->netlock, flags);
4255 return -EBUSY;
4256 }
4257 info->netcount=1;
4258 spin_unlock_irqrestore(&info->netlock, flags);
4259
4260 /* claim resources and init adapter */
4261 if ((rc = startup(info)) != 0) {
4262 spin_lock_irqsave(&info->netlock, flags);
4263 info->netcount=0;
4264 spin_unlock_irqrestore(&info->netlock, flags);
4265 return rc;
4266 }
4267
4268 /* assert DTR and RTS, apply hardware settings */
4269 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4270 mgslpc_program_hw(info);
4271
4272 /* enable network layer transmit */
4273 dev->trans_start = jiffies;
4274 netif_start_queue(dev);
4275
4276 /* inform generic HDLC layer of current DCD status */
4277 spin_lock_irqsave(&info->lock, flags);
4278 get_signals(info);
4279 spin_unlock_irqrestore(&info->lock, flags);
4280 hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, dev);
4281
4282 return 0;
4283}
4284
4285/**
4286 * called by network layer when interface is disabled
4287 * shutdown hardware and release resources
4288 *
4289 * dev pointer to network device structure
4290 *
4291 * returns 0 if success, otherwise error code
4292 */
4293static int hdlcdev_close(struct net_device *dev)
4294{
4295 MGSLPC_INFO *info = dev_to_port(dev);
4296 unsigned long flags;
4297
4298 if (debug_level >= DEBUG_LEVEL_INFO)
4299 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4300
4301 netif_stop_queue(dev);
4302
4303 /* shutdown adapter and release resources */
4304 shutdown(info);
4305
4306 hdlc_close(dev);
4307
4308 spin_lock_irqsave(&info->netlock, flags);
4309 info->netcount=0;
4310 spin_unlock_irqrestore(&info->netlock, flags);
4311
4312 return 0;
4313}
4314
4315/**
4316 * called by network layer to process IOCTL call to network device
4317 *
4318 * dev pointer to network device structure
4319 * ifr pointer to network interface request structure
4320 * cmd IOCTL command code
4321 *
4322 * returns 0 if success, otherwise error code
4323 */
4324static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4325{
4326 const size_t size = sizeof(sync_serial_settings);
4327 sync_serial_settings new_line;
4328 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4329 MGSLPC_INFO *info = dev_to_port(dev);
4330 unsigned int flags;
4331
4332 if (debug_level >= DEBUG_LEVEL_INFO)
4333 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4334
4335 /* return error if TTY interface open */
4336 if (info->count)
4337 return -EBUSY;
4338
4339 if (cmd != SIOCWANDEV)
4340 return hdlc_ioctl(dev, ifr, cmd);
4341
4342 switch(ifr->ifr_settings.type) {
4343 case IF_GET_IFACE: /* return current sync_serial_settings */
4344
4345 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4346 if (ifr->ifr_settings.size < size) {
4347 ifr->ifr_settings.size = size; /* data size wanted */
4348 return -ENOBUFS;
4349 }
4350
4351 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4352 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4353 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4354 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4355
4356 switch (flags){
4357 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4358 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4359 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4360 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4361 default: new_line.clock_type = CLOCK_DEFAULT;
4362 }
4363
4364 new_line.clock_rate = info->params.clock_speed;
4365 new_line.loopback = info->params.loopback ? 1:0;
4366
4367 if (copy_to_user(line, &new_line, size))
4368 return -EFAULT;
4369 return 0;
4370
4371 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4372
4373 if(!capable(CAP_NET_ADMIN))
4374 return -EPERM;
4375 if (copy_from_user(&new_line, line, size))
4376 return -EFAULT;
4377
4378 switch (new_line.clock_type)
4379 {
4380 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4381 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4382 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4383 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4384 case CLOCK_DEFAULT: flags = info->params.flags &
4385 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4386 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4387 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4388 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4389 default: return -EINVAL;
4390 }
4391
4392 if (new_line.loopback != 0 && new_line.loopback != 1)
4393 return -EINVAL;
4394
4395 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4396 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4397 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4398 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4399 info->params.flags |= flags;
4400
4401 info->params.loopback = new_line.loopback;
4402
4403 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4404 info->params.clock_speed = new_line.clock_rate;
4405 else
4406 info->params.clock_speed = 0;
4407
4408 /* if network interface up, reprogram hardware */
4409 if (info->netcount)
4410 mgslpc_program_hw(info);
4411 return 0;
4412
4413 default:
4414 return hdlc_ioctl(dev, ifr, cmd);
4415 }
4416}
4417
4418/**
4419 * called by network layer when transmit timeout is detected
4420 *
4421 * dev pointer to network device structure
4422 */
4423static void hdlcdev_tx_timeout(struct net_device *dev)
4424{
4425 MGSLPC_INFO *info = dev_to_port(dev);
4426 struct net_device_stats *stats = hdlc_stats(dev);
4427 unsigned long flags;
4428
4429 if (debug_level >= DEBUG_LEVEL_INFO)
4430 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4431
4432 stats->tx_errors++;
4433 stats->tx_aborted_errors++;
4434
4435 spin_lock_irqsave(&info->lock,flags);
4436 tx_stop(info);
4437 spin_unlock_irqrestore(&info->lock,flags);
4438
4439 netif_wake_queue(dev);
4440}
4441
4442/**
4443 * called by device driver when transmit completes
4444 * reenable network layer transmit if stopped
4445 *
4446 * info pointer to device instance information
4447 */
4448static void hdlcdev_tx_done(MGSLPC_INFO *info)
4449{
4450 if (netif_queue_stopped(info->netdev))
4451 netif_wake_queue(info->netdev);
4452}
4453
4454/**
4455 * called by device driver when frame received
4456 * pass frame to network layer
4457 *
4458 * info pointer to device instance information
4459 * buf pointer to buffer contianing frame data
4460 * size count of data bytes in buf
4461 */
4462static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4463{
4464 struct sk_buff *skb = dev_alloc_skb(size);
4465 struct net_device *dev = info->netdev;
4466 struct net_device_stats *stats = hdlc_stats(dev);
4467
4468 if (debug_level >= DEBUG_LEVEL_INFO)
4469 printk("hdlcdev_rx(%s)\n",dev->name);
4470
4471 if (skb == NULL) {
4472 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4473 stats->rx_dropped++;
4474 return;
4475 }
4476
4477 memcpy(skb_put(skb, size),buf,size);
4478
4479 skb->protocol = hdlc_type_trans(skb, info->netdev);
4480
4481 stats->rx_packets++;
4482 stats->rx_bytes += size;
4483
4484 netif_rx(skb);
4485
4486 info->netdev->last_rx = jiffies;
4487}
4488
4489/**
4490 * called by device driver when adding device instance
4491 * do generic HDLC initialization
4492 *
4493 * info pointer to device instance information
4494 *
4495 * returns 0 if success, otherwise error code
4496 */
4497static int hdlcdev_init(MGSLPC_INFO *info)
4498{
4499 int rc;
4500 struct net_device *dev;
4501 hdlc_device *hdlc;
4502
4503 /* allocate and initialize network and HDLC layer objects */
4504
4505 if (!(dev = alloc_hdlcdev(info))) {
4506 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4507 return -ENOMEM;
4508 }
4509
4510 /* for network layer reporting purposes only */
4511 dev->base_addr = info->io_base;
4512 dev->irq = info->irq_level;
4513
4514 /* network layer callbacks and settings */
4515 dev->do_ioctl = hdlcdev_ioctl;
4516 dev->open = hdlcdev_open;
4517 dev->stop = hdlcdev_close;
4518 dev->tx_timeout = hdlcdev_tx_timeout;
4519 dev->watchdog_timeo = 10*HZ;
4520 dev->tx_queue_len = 50;
4521
4522 /* generic HDLC layer callbacks and settings */
4523 hdlc = dev_to_hdlc(dev);
4524 hdlc->attach = hdlcdev_attach;
4525 hdlc->xmit = hdlcdev_xmit;
4526
4527 /* register objects with HDLC layer */
4528 if ((rc = register_hdlc_device(dev))) {
4529 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4530 free_netdev(dev);
4531 return rc;
4532 }
4533
4534 info->netdev = dev;
4535 return 0;
4536}
4537
4538/**
4539 * called by device driver when removing device instance
4540 * do generic HDLC cleanup
4541 *
4542 * info pointer to device instance information
4543 */
4544static void hdlcdev_exit(MGSLPC_INFO *info)
4545{
4546 unregister_hdlc_device(info->netdev);
4547 free_netdev(info->netdev);
4548 info->netdev = NULL;
4549}
4550
4551#endif /* CONFIG_HDLC */
4552
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