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seq_file: constify seq_operations
[net-next-2.6.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
80ff8a80
JS		 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
1da177e4 6 *
1c45607a
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
1da177e4
LT		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 14 * (at your option) any later version.
1da177e4 15 *
1da177e4 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
8eb04cf3
AC		 17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
1da177e4 19 * - Fixed x86_64 cleanness
1da177e4
LT		 20 */
21
1da177e4 22#include <linux/module.h>
1da177e4
LT		 23#include <linux/errno.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
405f5571 26#include <linux/smp_lock.h>
1da177e4
LT		 27#include <linux/timer.h>
28#include <linux/interrupt.h>
29#include <linux/tty.h>
30#include <linux/tty_flip.h>
31#include <linux/serial.h>
32#include <linux/serial_reg.h>
33#include <linux/major.h>
34#include <linux/string.h>
35#include <linux/fcntl.h>
36#include <linux/ptrace.h>
37#include <linux/gfp.h>
38#include <linux/ioport.h>
39#include <linux/mm.h>
1da177e4
LT		 40#include <linux/delay.h>
41#include <linux/pci.h>
1977f032 42#include <linux/bitops.h>
1da177e4
LT		 43
44#include <asm/system.h>
45#include <asm/io.h>
46#include <asm/irq.h>
1da177e4
LT		 47#include <asm/uaccess.h>
48
49#include "mxser.h"
50
502f295f 51#define MXSER_VERSION "2.0.5" /* 1.14 */
1da177e4 52#define MXSERMAJOR 174
1da177e4 53
1da177e4 54#define MXSER_BOARDS 4 /* Max. boards */
1da177e4 55#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
1c45607a
JS		 56#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
57#define MXSER_ISR_PASS_LIMIT 100
1da177e4 58
1c45607a
JS		 59/*CheckIsMoxaMust return value*/
60#define MOXA_OTHER_UART 0x00
61#define MOXA_MUST_MU150_HWID 0x01
62#define MOXA_MUST_MU860_HWID 0x02
63
1da177e4
LT		 64#define WAKEUP_CHARS 256
65
66#define UART_MCR_AFE 0x20
67#define UART_LSR_SPECIAL 0x1E
68
e129deff 69#define PCI_DEVICE_ID_POS104UL 0x1044
1c45607a 70#define PCI_DEVICE_ID_CB108 0x1080
e129deff 71#define PCI_DEVICE_ID_CP102UF 0x1023
502f295f 72#define PCI_DEVICE_ID_CP112UL 0x1120
1c45607a 73#define PCI_DEVICE_ID_CB114 0x1142
80ff8a80 74#define PCI_DEVICE_ID_CP114UL 0x1143
1c45607a
JS		 75#define PCI_DEVICE_ID_CB134I 0x1341
76#define PCI_DEVICE_ID_CP138U 0x1380
1da177e4 77
1da177e4
LT		 78
79#define C168_ASIC_ID 1
80#define C104_ASIC_ID 2
81#define C102_ASIC_ID 0xB
82#define CI132_ASIC_ID 4
83#define CI134_ASIC_ID 3
84#define CI104J_ASIC_ID 5
85
1c45607a
JS		 86#define MXSER_HIGHBAUD 1
87#define MXSER_HAS2 2
1da177e4 88
8ea2c2ec 89/* This is only for PCI */
1c45607a 90static const struct {
1da177e4
LT		 91 int type;
92 int tx_fifo;
93 int rx_fifo;
94 int xmit_fifo_size;
95 int rx_high_water;
96 int rx_trigger;
97 int rx_low_water;
98 long max_baud;
1c45607a 99} Gpci_uart_info[] = {
1da177e4
LT		 100 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
101 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
102 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
103};
1c45607a 104#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
1da177e4 105
1c45607a
JS		 106struct mxser_cardinfo {
107 char *name;
108 unsigned int nports;
109 unsigned int flags;
110};
1da177e4 111
1c45607a
JS		 112static const struct mxser_cardinfo mxser_cards[] = {
113/* 0*/ { "C168 series", 8, },
114 { "C104 series", 4, },
115 { "CI-104J series", 4, },
116 { "C168H/PCI series", 8, },
117 { "C104H/PCI series", 4, },
118/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
119 { "CI-132 series", 4, MXSER_HAS2 },
120 { "CI-134 series", 4, },
121 { "CP-132 series", 2, },
122 { "CP-114 series", 4, },
123/*10*/ { "CT-114 series", 4, },
124 { "CP-102 series", 2, MXSER_HIGHBAUD },
125 { "CP-104U series", 4, },
126 { "CP-168U series", 8, },
127 { "CP-132U series", 2, },
128/*15*/ { "CP-134U series", 4, },
129 { "CP-104JU series", 4, },
130 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
131 { "CP-118U series", 8, },
132 { "CP-102UL series", 2, },
133/*20*/ { "CP-102U series", 2, },
134 { "CP-118EL series", 8, },
135 { "CP-168EL series", 8, },
136 { "CP-104EL series", 4, },
137 { "CB-108 series", 8, },
138/*25*/ { "CB-114 series", 4, },
139 { "CB-134I series", 4, },
140 { "CP-138U series", 8, },
80ff8a80 141 { "POS-104UL series", 4, },
e129deff 142 { "CP-114UL series", 4, },
502f295f
JS		 143/*30*/ { "CP-102UF series", 2, },
144 { "CP-112UL series", 2, },
1c45607a 145};
1da177e4 146
1c45607a
JS		 147/* driver_data correspond to the lines in the structure above
148 see also ISA probe function before you change something */
1da177e4 149static struct pci_device_id mxser_pcibrds[] = {
1c45607a
JS		 150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
80ff8a80 173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
e129deff 174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
502f295f 175 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
1c45607a 176 { }
1da177e4 177};
1da177e4
LT		 178MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
179
1df00924 180static unsigned long ioaddr[MXSER_BOARDS];
1da177e4 181static int ttymajor = MXSERMAJOR;
1da177e4
LT		 182
183/* Variables for insmod */
184
185MODULE_AUTHOR("Casper Yang");
186MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
1df00924
JS		 187module_param_array(ioaddr, ulong, NULL, 0);
188MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
8d3b33f6 189module_param(ttymajor, int, 0);
1da177e4
LT		 190MODULE_LICENSE("GPL");
191
192struct mxser_log {
193 int tick;
194 unsigned long rxcnt[MXSER_PORTS];
195 unsigned long txcnt[MXSER_PORTS];
196};
197
1da177e4
LT		 198struct mxser_mon {
199 unsigned long rxcnt;
200 unsigned long txcnt;
201 unsigned long up_rxcnt;
202 unsigned long up_txcnt;
203 int modem_status;
204 unsigned char hold_reason;
205};
206
207struct mxser_mon_ext {
208 unsigned long rx_cnt[32];
209 unsigned long tx_cnt[32];
210 unsigned long up_rxcnt[32];
211 unsigned long up_txcnt[32];
212 int modem_status[32];
213
214 long baudrate[32];
215 int databits[32];
216 int stopbits[32];
217 int parity[32];
218 int flowctrl[32];
219 int fifo[32];
220 int iftype[32];
221};
8ea2c2ec 222
1c45607a
JS		 223struct mxser_board;
224
225struct mxser_port {
0ad9e7d1 226 struct tty_port port;
1c45607a 227 struct mxser_board *board;
1c45607a
JS		 228
229 unsigned long ioaddr;
230 unsigned long opmode_ioaddr;
231 int max_baud;
1da177e4 232
1da177e4
LT		 233 int rx_high_water;
234 int rx_trigger; /* Rx fifo trigger level */
235 int rx_low_water;
236 int baud_base; /* max. speed */
1da177e4 237 int type; /* UART type */
1c45607a 238
1da177e4 239 int x_char; /* xon/xoff character */
1da177e4
LT		 240 int IER; /* Interrupt Enable Register */
241 int MCR; /* Modem control register */
1c45607a
JS		 242
243 unsigned char stop_rx;
244 unsigned char ldisc_stop_rx;
245
246 int custom_divisor;
1c45607a 247 unsigned char err_shadow;
1c45607a 248
1c45607a
JS		 249 struct async_icount icount; /* kernel counters for 4 input interrupts */
250 int timeout;
251
252 int read_status_mask;
253 int ignore_status_mask;
254 int xmit_fifo_size;
1da177e4
LT		 255 int xmit_head;
256 int xmit_tail;
257 int xmit_cnt;
1c45607a 258
606d099c 259 struct ktermios normal_termios;
1c45607a 260
1da177e4 261 struct mxser_mon mon_data;
1c45607a 262
1da177e4 263 spinlock_t slock;
1c45607a
JS		 264};
265
266struct mxser_board {
267 unsigned int idx;
268 int irq;
269 const struct mxser_cardinfo *info;
270 unsigned long vector;
271 unsigned long vector_mask;
272
273 int chip_flag;
274 int uart_type;
275
276 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
1da177e4
LT		 277};
278
1da177e4
LT		 279struct mxser_mstatus {
280 tcflag_t cflag;
281 int cts;
282 int dsr;
283 int ri;
284 int dcd;
285};
286
1c45607a 287static struct mxser_board mxser_boards[MXSER_BOARDS];
1da177e4 288static struct tty_driver *mxvar_sdriver;
1da177e4 289static struct mxser_log mxvar_log;
1da177e4 290static int mxser_set_baud_method[MXSER_PORTS + 1];
1da177e4 291
148ff86b
CH		 292static void mxser_enable_must_enchance_mode(unsigned long baseio)
293{
294 u8 oldlcr;
295 u8 efr;
296
297 oldlcr = inb(baseio + UART_LCR);
298 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
299
300 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
301 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
302
303 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
304 outb(oldlcr, baseio + UART_LCR);
305}
306
307static void mxser_disable_must_enchance_mode(unsigned long baseio)
308{
309 u8 oldlcr;
310 u8 efr;
311
312 oldlcr = inb(baseio + UART_LCR);
313 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
314
315 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
316 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
317
318 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
319 outb(oldlcr, baseio + UART_LCR);
320}
321
322static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
323{
324 u8 oldlcr;
325 u8 efr;
326
327 oldlcr = inb(baseio + UART_LCR);
328 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
329
330 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
331 efr &= ~MOXA_MUST_EFR_BANK_MASK;
332 efr |= MOXA_MUST_EFR_BANK0;
333
334 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
335 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
336 outb(oldlcr, baseio + UART_LCR);
337}
338
339static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
340{
341 u8 oldlcr;
342 u8 efr;
343
344 oldlcr = inb(baseio + UART_LCR);
345 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
346
347 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
348 efr &= ~MOXA_MUST_EFR_BANK_MASK;
349 efr |= MOXA_MUST_EFR_BANK0;
350
351 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
352 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
353 outb(oldlcr, baseio + UART_LCR);
354}
355
356static void mxser_set_must_fifo_value(struct mxser_port *info)
357{
358 u8 oldlcr;
359 u8 efr;
360
361 oldlcr = inb(info->ioaddr + UART_LCR);
362 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
363
364 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
365 efr &= ~MOXA_MUST_EFR_BANK_MASK;
366 efr |= MOXA_MUST_EFR_BANK1;
367
368 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
369 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
370 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
371 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
372 outb(oldlcr, info->ioaddr + UART_LCR);
373}
374
375static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
376{
377 u8 oldlcr;
378 u8 efr;
379
380 oldlcr = inb(baseio + UART_LCR);
381 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
382
383 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
384 efr &= ~MOXA_MUST_EFR_BANK_MASK;
385 efr |= MOXA_MUST_EFR_BANK2;
386
387 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
388 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
389 outb(oldlcr, baseio + UART_LCR);
390}
391
392static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
393{
394 u8 oldlcr;
395 u8 efr;
396
397 oldlcr = inb(baseio + UART_LCR);
398 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
399
400 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
401 efr &= ~MOXA_MUST_EFR_BANK_MASK;
402 efr |= MOXA_MUST_EFR_BANK2;
403
404 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
405 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
406 outb(oldlcr, baseio + UART_LCR);
407}
408
409static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
410{
411 u8 oldlcr;
412 u8 efr;
413
414 oldlcr = inb(baseio + UART_LCR);
415 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
416
417 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
418 efr &= ~MOXA_MUST_EFR_SF_MASK;
419
420 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
421 outb(oldlcr, baseio + UART_LCR);
422}
423
424static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
425{
426 u8 oldlcr;
427 u8 efr;
428
429 oldlcr = inb(baseio + UART_LCR);
430 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
431
432 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
433 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
434 efr |= MOXA_MUST_EFR_SF_TX1;
435
436 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
437 outb(oldlcr, baseio + UART_LCR);
438}
439
440static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
441{
442 u8 oldlcr;
443 u8 efr;
444
445 oldlcr = inb(baseio + UART_LCR);
446 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
447
448 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
449 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
450
451 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
452 outb(oldlcr, baseio + UART_LCR);
453}
454
455static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
456{
457 u8 oldlcr;
458 u8 efr;
459
460 oldlcr = inb(baseio + UART_LCR);
461 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
462
463 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
464 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
465 efr |= MOXA_MUST_EFR_SF_RX1;
466
467 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
468 outb(oldlcr, baseio + UART_LCR);
469}
470
471static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
472{
473 u8 oldlcr;
474 u8 efr;
475
476 oldlcr = inb(baseio + UART_LCR);
477 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
478
479 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
480 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
481
482 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
483 outb(oldlcr, baseio + UART_LCR);
484}
485
b8cc5549 486#ifdef CONFIG_PCI
1c45607a 487static int __devinit CheckIsMoxaMust(unsigned long io)
1da177e4
LT		 488{
489 u8 oldmcr, hwid;
490 int i;
491
492 outb(0, io + UART_LCR);
148ff86b 493 mxser_disable_must_enchance_mode(io);
1da177e4
LT		 494 oldmcr = inb(io + UART_MCR);
495 outb(0, io + UART_MCR);
148ff86b 496 mxser_set_must_xon1_value(io, 0x11);
1da177e4
LT		 497 if ((hwid = inb(io + UART_MCR)) != 0) {
498 outb(oldmcr, io + UART_MCR);
8ea2c2ec 499 return MOXA_OTHER_UART;
1da177e4
LT		 500 }
501
148ff86b 502 mxser_get_must_hardware_id(io, &hwid);
1c45607a
JS		 503 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
504 if (hwid == Gpci_uart_info[i].type)
8ea2c2ec 505 return (int)hwid;
1da177e4
LT		 506 }
507 return MOXA_OTHER_UART;
508}
b8cc5549 509#endif
1da177e4 510
1c45607a 511static void process_txrx_fifo(struct mxser_port *info)
1da177e4
LT		 512{
513 int i;
514
515 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
516 info->rx_trigger = 1;
517 info->rx_high_water = 1;
518 info->rx_low_water = 1;
519 info->xmit_fifo_size = 1;
1c45607a
JS		 520 } else
521 for (i = 0; i < UART_INFO_NUM; i++)
522 if (info->board->chip_flag == Gpci_uart_info[i].type) {
1da177e4
LT		 523 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
524 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
525 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
526 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
527 break;
528 }
1da177e4
LT		 529}
530
1c45607a 531static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
1da177e4 532{
72800df9 533 static unsigned char mxser_msr[MXSER_PORTS + 1];
1c45607a 534 unsigned char status = 0;
1da177e4 535
1c45607a 536 status = inb(baseaddr + UART_MSR);
1da177e4 537
1c45607a
JS		 538 mxser_msr[port] &= 0x0F;
539 mxser_msr[port] |= status;
540 status = mxser_msr[port];
541 if (mode)
542 mxser_msr[port] = 0;
1da177e4 543
1c45607a
JS		 544 return status;
545}
1da177e4 546
31f35939
AC		 547static int mxser_carrier_raised(struct tty_port *port)
548{
549 struct mxser_port *mp = container_of(port, struct mxser_port, port);
550 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
551}
552
fcc8ac18 553static void mxser_dtr_rts(struct tty_port *port, int on)
5d951fb4
AC		 554{
555 struct mxser_port *mp = container_of(port, struct mxser_port, port);
556 unsigned long flags;
557
558 spin_lock_irqsave(&mp->slock, flags);
fcc8ac18
AC		 559 if (on)
560 outb(inb(mp->ioaddr + UART_MCR) |
561 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
562 else
563 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
564 mp->ioaddr + UART_MCR);
5d951fb4
AC		 565 spin_unlock_irqrestore(&mp->slock, flags);
566}
567
216ba023 568static int mxser_set_baud(struct tty_struct *tty, long newspd)
1da177e4 569{
216ba023 570 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 571 int quot = 0, baud;
572 unsigned char cval;
1da177e4 573
216ba023 574 if (!info->ioaddr)
1c45607a 575 return -1;
1da177e4 576
1c45607a
JS		 577 if (newspd > info->max_baud)
578 return -1;
1da177e4 579
1c45607a
JS		 580 if (newspd == 134) {
581 quot = 2 * info->baud_base / 269;
216ba023 582 tty_encode_baud_rate(tty, 134, 134);
1c45607a
JS		 583 } else if (newspd) {
584 quot = info->baud_base / newspd;
585 if (quot == 0)
586 quot = 1;
587 baud = info->baud_base/quot;
216ba023 588 tty_encode_baud_rate(tty, baud, baud);
1c45607a
JS		 589 } else {
590 quot = 0;
591 }
1da177e4 592
1c45607a
JS		 593 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
594 info->timeout += HZ / 50; /* Add .02 seconds of slop */
1da177e4 595
1c45607a
JS		 596 if (quot) {
597 info->MCR |= UART_MCR_DTR;
598 outb(info->MCR, info->ioaddr + UART_MCR);
599 } else {
600 info->MCR &= ~UART_MCR_DTR;
601 outb(info->MCR, info->ioaddr + UART_MCR);
602 return 0;
603 }
1da177e4 604
1c45607a 605 cval = inb(info->ioaddr + UART_LCR);
1da177e4 606
1c45607a 607 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
1da177e4 608
1c45607a
JS		 609 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
610 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
611 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
1da177e4 612
1c45607a 613#ifdef BOTHER
216ba023 614 if (C_BAUD(tty) == BOTHER) {
1c45607a
JS		 615 quot = info->baud_base % newspd;
616 quot *= 8;
617 if (quot % newspd > newspd / 2) {
618 quot /= newspd;
619 quot++;
620 } else
621 quot /= newspd;
622
148ff86b 623 mxser_set_must_enum_value(info->ioaddr, quot);
1c45607a
JS		 624 } else
625#endif
148ff86b 626 mxser_set_must_enum_value(info->ioaddr, 0);
1da177e4 627
8ea2c2ec 628 return 0;
1da177e4 629}
1da177e4 630
1c45607a
JS		 631/*
632 * This routine is called to set the UART divisor registers to match
633 * the specified baud rate for a serial port.
634 */
216ba023
AC		 635static int mxser_change_speed(struct tty_struct *tty,
636 struct ktermios *old_termios)
1da177e4 637{
216ba023 638 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 639 unsigned cflag, cval, fcr;
640 int ret = 0;
641 unsigned char status;
1da177e4 642
216ba023
AC		 643 cflag = tty->termios->c_cflag;
644 if (!info->ioaddr)
1c45607a 645 return ret;
1da177e4 646
216ba023
AC		 647 if (mxser_set_baud_method[tty->index] == 0)
648 mxser_set_baud(tty, tty_get_baud_rate(tty));
1da177e4 649
1c45607a
JS		 650 /* byte size and parity */
651 switch (cflag & CSIZE) {
652 case CS5:
653 cval = 0x00;
654 break;
655 case CS6:
656 cval = 0x01;
657 break;
658 case CS7:
659 cval = 0x02;
660 break;
661 case CS8:
662 cval = 0x03;
663 break;
664 default:
665 cval = 0x00;
666 break; /* too keep GCC shut... */
667 }
668 if (cflag & CSTOPB)
669 cval |= 0x04;
670 if (cflag & PARENB)
671 cval |= UART_LCR_PARITY;
672 if (!(cflag & PARODD))
673 cval |= UART_LCR_EPAR;
674 if (cflag & CMSPAR)
675 cval |= UART_LCR_SPAR;
1da177e4 676
1c45607a
JS		 677 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
678 if (info->board->chip_flag) {
679 fcr = UART_FCR_ENABLE_FIFO;
680 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 681 mxser_set_must_fifo_value(info);
1c45607a
JS		 682 } else
683 fcr = 0;
684 } else {
685 fcr = UART_FCR_ENABLE_FIFO;
686 if (info->board->chip_flag) {
687 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 688 mxser_set_must_fifo_value(info);
1c45607a
JS		 689 } else {
690 switch (info->rx_trigger) {
691 case 1:
692 fcr |= UART_FCR_TRIGGER_1;
693 break;
694 case 4:
695 fcr |= UART_FCR_TRIGGER_4;
696 break;
697 case 8:
698 fcr |= UART_FCR_TRIGGER_8;
699 break;
700 default:
701 fcr |= UART_FCR_TRIGGER_14;
702 break;
703 }
1da177e4 704 }
1da177e4
LT		 705 }
706
1c45607a
JS		 707 /* CTS flow control flag and modem status interrupts */
708 info->IER &= ~UART_IER_MSI;
709 info->MCR &= ~UART_MCR_AFE;
710 if (cflag & CRTSCTS) {
0ad9e7d1 711 info->port.flags |= ASYNC_CTS_FLOW;
1c45607a
JS		 712 info->IER |= UART_IER_MSI;
713 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
714 info->MCR |= UART_MCR_AFE;
715 } else {
716 status = inb(info->ioaddr + UART_MSR);
216ba023 717 if (tty->hw_stopped) {
1c45607a 718 if (status & UART_MSR_CTS) {
216ba023 719 tty->hw_stopped = 0;
1c45607a
JS		 720 if (info->type != PORT_16550A &&
721 !info->board->chip_flag) {
722 outb(info->IER & ~UART_IER_THRI,
723 info->ioaddr +
724 UART_IER);
725 info->IER |= UART_IER_THRI;
726 outb(info->IER, info->ioaddr +
727 UART_IER);
728 }
216ba023 729 tty_wakeup(tty);
1c45607a
JS		 730 }
731 } else {
732 if (!(status & UART_MSR_CTS)) {
216ba023 733 tty->hw_stopped = 1;
1c45607a
JS		 734 if ((info->type != PORT_16550A) &&
735 (!info->board->chip_flag)) {
736 info->IER &= ~UART_IER_THRI;
737 outb(info->IER, info->ioaddr +
738 UART_IER);
739 }
740 }
741 }
1da177e4 742 }
1c45607a 743 } else {
0ad9e7d1 744 info->port.flags &= ~ASYNC_CTS_FLOW;
1c45607a
JS		 745 }
746 outb(info->MCR, info->ioaddr + UART_MCR);
747 if (cflag & CLOCAL) {
0ad9e7d1 748 info->port.flags &= ~ASYNC_CHECK_CD;
1c45607a 749 } else {
0ad9e7d1 750 info->port.flags |= ASYNC_CHECK_CD;
1c45607a
JS		 751 info->IER |= UART_IER_MSI;
752 }
753 outb(info->IER, info->ioaddr + UART_IER);
754
755 /*
756 * Set up parity check flag
757 */
758 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
216ba023 759 if (I_INPCK(tty))
1c45607a 760 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
216ba023 761 if (I_BRKINT(tty) || I_PARMRK(tty))
1c45607a 762 info->read_status_mask |= UART_LSR_BI;
1da177e4 763
1c45607a 764 info->ignore_status_mask = 0;
1da177e4 765
216ba023 766 if (I_IGNBRK(tty)) {
1c45607a
JS		 767 info->ignore_status_mask |= UART_LSR_BI;
768 info->read_status_mask |= UART_LSR_BI;
8ea2c2ec 769 /*
1c45607a
JS		 770 * If we're ignore parity and break indicators, ignore
771 * overruns too. (For real raw support).
8ea2c2ec 772 */
216ba023 773 if (I_IGNPAR(tty)) {
1c45607a
JS		 774 info->ignore_status_mask |=
775 UART_LSR_OE |
776 UART_LSR_PE |
777 UART_LSR_FE;
778 info->read_status_mask |=
779 UART_LSR_OE |
780 UART_LSR_PE |
781 UART_LSR_FE;
782 }
1da177e4 783 }
1c45607a 784 if (info->board->chip_flag) {
216ba023
AC		 785 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
786 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
787 if (I_IXON(tty)) {
148ff86b
CH		 788 mxser_enable_must_rx_software_flow_control(
789 info->ioaddr);
1c45607a 790 } else {
148ff86b
CH		 791 mxser_disable_must_rx_software_flow_control(
792 info->ioaddr);
1da177e4 793 }
216ba023 794 if (I_IXOFF(tty)) {
148ff86b
CH		 795 mxser_enable_must_tx_software_flow_control(
796 info->ioaddr);
1c45607a 797 } else {
148ff86b
CH		 798 mxser_disable_must_tx_software_flow_control(
799 info->ioaddr);
1da177e4
LT		 800 }
801 }
1da177e4 802
1da177e4 803
1c45607a
JS		 804 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
805 outb(cval, info->ioaddr + UART_LCR);
1da177e4 806
1c45607a 807 return ret;
1da177e4
LT		 808}
809
216ba023
AC		 810static void mxser_check_modem_status(struct tty_struct *tty,
811 struct mxser_port *port, int status)
1da177e4 812{
1c45607a
JS		 813 /* update input line counters */
814 if (status & UART_MSR_TERI)
815 port->icount.rng++;
816 if (status & UART_MSR_DDSR)
817 port->icount.dsr++;
818 if (status & UART_MSR_DDCD)
819 port->icount.dcd++;
820 if (status & UART_MSR_DCTS)
821 port->icount.cts++;
822 port->mon_data.modem_status = status;
bdc04e31 823 wake_up_interruptible(&port->port.delta_msr_wait);
1da177e4 824
0ad9e7d1 825 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
1c45607a 826 if (status & UART_MSR_DCD)
0ad9e7d1 827 wake_up_interruptible(&port->port.open_wait);
1c45607a 828 }
1da177e4 829
0ad9e7d1 830 if (port->port.flags & ASYNC_CTS_FLOW) {
216ba023 831 if (tty->hw_stopped) {
1c45607a 832 if (status & UART_MSR_CTS) {
216ba023 833 tty->hw_stopped = 0;
1c45607a
JS		 834
835 if ((port->type != PORT_16550A) &&
836 (!port->board->chip_flag)) {
837 outb(port->IER & ~UART_IER_THRI,
838 port->ioaddr + UART_IER);
839 port->IER |= UART_IER_THRI;
840 outb(port->IER, port->ioaddr +
841 UART_IER);
842 }
216ba023 843 tty_wakeup(tty);
1c45607a
JS		 844 }
845 } else {
846 if (!(status & UART_MSR_CTS)) {
216ba023 847 tty->hw_stopped = 1;
1c45607a
JS		 848 if (port->type != PORT_16550A &&
849 !port->board->chip_flag) {
850 port->IER &= ~UART_IER_THRI;
851 outb(port->IER, port->ioaddr +
852 UART_IER);
853 }
854 }
855 }
1da177e4
LT		 856 }
857}
858
216ba023 859static int mxser_startup(struct tty_struct *tty)
1da177e4 860{
216ba023 861 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 862 unsigned long page;
863 unsigned long flags;
1da177e4 864
1c45607a
JS		 865 page = __get_free_page(GFP_KERNEL);
866 if (!page)
867 return -ENOMEM;
1da177e4 868
1c45607a 869 spin_lock_irqsave(&info->slock, flags);
1da177e4 870
0ad9e7d1 871 if (info->port.flags & ASYNC_INITIALIZED) {
1c45607a
JS		 872 free_page(page);
873 spin_unlock_irqrestore(&info->slock, flags);
874 return 0;
875 }
6f08b72c 876
1c45607a 877 if (!info->ioaddr || !info->type) {
216ba023 878 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 879 free_page(page);
880 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 881 return 0;
1c45607a 882 }
0ad9e7d1 883 if (info->port.xmit_buf)
1c45607a
JS		 884 free_page(page);
885 else
0ad9e7d1 886 info->port.xmit_buf = (unsigned char *) page;
1da177e4 887
1da177e4 888 /*
1c45607a
JS		 889 * Clear the FIFO buffers and disable them
890 * (they will be reenabled in mxser_change_speed())
1da177e4 891 */
1c45607a
JS		 892 if (info->board->chip_flag)
893 outb((UART_FCR_CLEAR_RCVR |
894 UART_FCR_CLEAR_XMIT |
895 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
896 else
897 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
898 info->ioaddr + UART_FCR);
1da177e4 899
1c45607a
JS		 900 /*
901 * At this point there's no way the LSR could still be 0xFF;
902 * if it is, then bail out, because there's likely no UART
903 * here.
904 */
905 if (inb(info->ioaddr + UART_LSR) == 0xff) {
906 spin_unlock_irqrestore(&info->slock, flags);
907 if (capable(CAP_SYS_ADMIN)) {
216ba023
AC		 908 if (tty)
909 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 910 return 0;
911 } else
912 return -ENODEV;
913 }
1da177e4 914
1c45607a
JS		 915 /*
916 * Clear the interrupt registers.
917 */
918 (void) inb(info->ioaddr + UART_LSR);
919 (void) inb(info->ioaddr + UART_RX);
920 (void) inb(info->ioaddr + UART_IIR);
921 (void) inb(info->ioaddr + UART_MSR);
922
923 /*
924 * Now, initialize the UART
925 */
926 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
927 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
928 outb(info->MCR, info->ioaddr + UART_MCR);
929
930 /*
931 * Finally, enable interrupts
932 */
933 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
934
935 if (info->board->chip_flag)
936 info->IER |= MOXA_MUST_IER_EGDAI;
937 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
938
939 /*
940 * And clear the interrupt registers again for luck.
941 */
942 (void) inb(info->ioaddr + UART_LSR);
943 (void) inb(info->ioaddr + UART_RX);
944 (void) inb(info->ioaddr + UART_IIR);
945 (void) inb(info->ioaddr + UART_MSR);
946
216ba023 947 clear_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 948 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
949
950 /*
951 * and set the speed of the serial port
952 */
216ba023 953 mxser_change_speed(tty, NULL);
0ad9e7d1 954 info->port.flags |= ASYNC_INITIALIZED;
1c45607a
JS		 955 spin_unlock_irqrestore(&info->slock, flags);
956
957 return 0;
958}
959
960/*
961 * This routine will shutdown a serial port; interrupts maybe disabled, and
962 * DTR is dropped if the hangup on close termio flag is on.
963 */
216ba023 964static void mxser_shutdown(struct tty_struct *tty)
1c45607a 965{
216ba023 966 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 967 unsigned long flags;
968
0ad9e7d1 969 if (!(info->port.flags & ASYNC_INITIALIZED))
1c45607a
JS		 970 return;
971
972 spin_lock_irqsave(&info->slock, flags);
973
974 /*
975 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
976 * here so the queue might never be waken up
977 */
bdc04e31 978 wake_up_interruptible(&info->port.delta_msr_wait);
1c45607a
JS		 979
980 /*
981 * Free the IRQ, if necessary
982 */
0ad9e7d1
AC		 983 if (info->port.xmit_buf) {
984 free_page((unsigned long) info->port.xmit_buf);
985 info->port.xmit_buf = NULL;
1da177e4
LT		 986 }
987
1c45607a
JS		 988 info->IER = 0;
989 outb(0x00, info->ioaddr + UART_IER);
990
216ba023 991 if (tty->termios->c_cflag & HUPCL)
1c45607a
JS		 992 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
993 outb(info->MCR, info->ioaddr + UART_MCR);
994
995 /* clear Rx/Tx FIFO's */
996 if (info->board->chip_flag)
997 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
998 MOXA_MUST_FCR_GDA_MODE_ENABLE,
999 info->ioaddr + UART_FCR);
1000 else
1001 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1002 info->ioaddr + UART_FCR);
1003
1004 /* read data port to reset things */
1005 (void) inb(info->ioaddr + UART_RX);
1006
216ba023 1007 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a 1008
0ad9e7d1 1009 info->port.flags &= ~ASYNC_INITIALIZED;
1c45607a
JS		 1010
1011 if (info->board->chip_flag)
1012 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1013
1014 spin_unlock_irqrestore(&info->slock, flags);
1015}
1016
1017/*
1018 * This routine is called whenever a serial port is opened. It
1019 * enables interrupts for a serial port, linking in its async structure into
1020 * the IRQ chain. It also performs the serial-specific
1021 * initialization for the tty structure.
1022 */
1023static int mxser_open(struct tty_struct *tty, struct file *filp)
1024{
1025 struct mxser_port *info;
1026 unsigned long flags;
1027 int retval, line;
1028
1029 line = tty->index;
1030 if (line == MXSER_PORTS)
1031 return 0;
1032 if (line < 0 || line > MXSER_PORTS)
1033 return -ENODEV;
1034 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1035 if (!info->ioaddr)
1036 return -ENODEV;
1037
1038 tty->driver_data = info;
216ba023 1039 tty_port_tty_set(&info->port, tty);
8ea2c2ec 1040 /*
1c45607a
JS		 1041 * Start up serial port
1042 */
3b6826b2 1043 spin_lock_irqsave(&info->port.lock, flags);
0ad9e7d1 1044 info->port.count++;
3b6826b2 1045 spin_unlock_irqrestore(&info->port.lock, flags);
216ba023 1046 retval = mxser_startup(tty);
1c45607a
JS		 1047 if (retval)
1048 return retval;
1049
36c621d8 1050 retval = tty_port_block_til_ready(&info->port, tty, filp);
1c45607a
JS		 1051 if (retval)
1052 return retval;
1da177e4 1053
1da177e4
LT		 1054 return 0;
1055}
1056
978e595f
AC		 1057static void mxser_flush_buffer(struct tty_struct *tty)
1058{
1059 struct mxser_port *info = tty->driver_data;
1060 char fcr;
1061 unsigned long flags;
1062
1063
1064 spin_lock_irqsave(&info->slock, flags);
1065 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1066
1067 fcr = inb(info->ioaddr + UART_FCR);
1068 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1069 info->ioaddr + UART_FCR);
1070 outb(fcr, info->ioaddr + UART_FCR);
1071
1072 spin_unlock_irqrestore(&info->slock, flags);
1073
1074 tty_wakeup(tty);
1075}
1076
1077
1e2b0254 1078static void mxser_close_port(struct tty_struct *tty, struct tty_port *port)
1da177e4 1079{
1e2b0254 1080 struct mxser_port *info = container_of(port, struct mxser_port, port);
1da177e4 1081 unsigned long timeout;
1da177e4
LT		 1082 /*
1083 * Save the termios structure, since this port may have
1084 * separate termios for callout and dialin.
a6614999
AC		 1085 *
1086 * FIXME: Can this go ?
1da177e4 1087 */
1e2b0254 1088 if (port->flags & ASYNC_NORMAL_ACTIVE)
1da177e4 1089 info->normal_termios = *tty->termios;
1da177e4
LT		 1090 /*
1091 * At this point we stop accepting input. To do this, we
1092 * disable the receive line status interrupts, and tell the
1093 * interrupt driver to stop checking the data ready bit in the
1094 * line status register.
1095 */
1096 info->IER &= ~UART_IER_RLSI;
1c45607a 1097 if (info->board->chip_flag)
1da177e4 1098 info->IER &= ~MOXA_MUST_RECV_ISR;
1c45607a 1099
1e2b0254 1100 if (port->flags & ASYNC_INITIALIZED) {
1c45607a 1101 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1102 /*
1103 * Before we drop DTR, make sure the UART transmitter
1104 * has completely drained; this is especially
1105 * important if there is a transmit FIFO!
1106 */
1107 timeout = jiffies + HZ;
1c45607a 1108 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1109 schedule_timeout_interruptible(5);
1da177e4
LT		 1110 if (time_after(jiffies, timeout))
1111 break;
1112 }
1113 }
216ba023 1114 mxser_shutdown(tty);
1da177e4 1115
1e2b0254
AC		 1116}
1117
1118/*
1119 * This routine is called when the serial port gets closed. First, we
1120 * wait for the last remaining data to be sent. Then, we unlink its
1121 * async structure from the interrupt chain if necessary, and we free
1122 * that IRQ if nothing is left in the chain.
1123 */
1124static void mxser_close(struct tty_struct *tty, struct file *filp)
1125{
1126 struct mxser_port *info = tty->driver_data;
1127 struct tty_port *port = &info->port;
1128
1129 if (tty->index == MXSER_PORTS)
1130 return;
1131 if (tty_port_close_start(port, tty, filp) == 0)
1132 return;
1133 mxser_close_port(tty, port);
1134 mxser_flush_buffer(tty);
a6614999
AC		 1135 /* Right now the tty_port set is done outside of the close_end helper
1136 as we don't yet have everyone using refcounts */
1137 tty_port_close_end(port, tty);
1138 tty_port_tty_set(port, NULL);
1da177e4
LT		 1139}
1140
1141static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1142{
1143 int c, total = 0;
1c45607a 1144 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1145 unsigned long flags;
1146
0ad9e7d1 1147 if (!info->port.xmit_buf)
8ea2c2ec 1148 return 0;
1da177e4
LT		 1149
1150 while (1) {
8ea2c2ec
JJ		 1151 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1152 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1153 if (c <= 0)
1154 break;
1155
0ad9e7d1 1156 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1da177e4 1157 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1158 info->xmit_head = (info->xmit_head + c) &
1159 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1160 info->xmit_cnt += c;
1161 spin_unlock_irqrestore(&info->slock, flags);
1162
1163 buf += c;
1164 count -= c;
1165 total += c;
1da177e4
LT		 1166 }
1167
1c45607a 1168 if (info->xmit_cnt && !tty->stopped) {
8ea2c2ec
JJ		 1169 if (!tty->hw_stopped ||
1170 (info->type == PORT_16550A) ||
1c45607a 1171 (info->board->chip_flag)) {
1da177e4 1172 spin_lock_irqsave(&info->slock, flags);
1c45607a
JS		 1173 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1174 UART_IER);
1da177e4 1175 info->IER |= UART_IER_THRI;
1c45607a 1176 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1177 spin_unlock_irqrestore(&info->slock, flags);
1178 }
1179 }
1180 return total;
1181}
1182
0be2eade 1183static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4 1184{
1c45607a 1185 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1186 unsigned long flags;
1187
0ad9e7d1 1188 if (!info->port.xmit_buf)
0be2eade 1189 return 0;
1da177e4
LT		 1190
1191 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
0be2eade 1192 return 0;
1da177e4
LT		 1193
1194 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1195 info->port.xmit_buf[info->xmit_head++] = ch;
1da177e4
LT		 1196 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1197 info->xmit_cnt++;
1198 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 1199 if (!tty->stopped) {
8ea2c2ec
JJ		 1200 if (!tty->hw_stopped ||
1201 (info->type == PORT_16550A) ||
1c45607a 1202 info->board->chip_flag) {
1da177e4 1203 spin_lock_irqsave(&info->slock, flags);
1c45607a 1204 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1205 info->IER |= UART_IER_THRI;
1c45607a 1206 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1207 spin_unlock_irqrestore(&info->slock, flags);
1208 }
1209 }
0be2eade 1210 return 1;
1da177e4
LT		 1211}
1212
1213
1214static void mxser_flush_chars(struct tty_struct *tty)
1215{
1c45607a 1216 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1217 unsigned long flags;
1218
ace7dd96
JS		 1219 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1220 (tty->hw_stopped && info->type != PORT_16550A &&
1221 !info->board->chip_flag))
1da177e4
LT		 1222 return;
1223
1224 spin_lock_irqsave(&info->slock, flags);
1225
1c45607a 1226 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1227 info->IER |= UART_IER_THRI;
1c45607a 1228 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1229
1230 spin_unlock_irqrestore(&info->slock, flags);
1231}
1232
1233static int mxser_write_room(struct tty_struct *tty)
1234{
1c45607a 1235 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1236 int ret;
1237
1238 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
ace7dd96 1239 return ret < 0 ? 0 : ret;
1da177e4
LT		 1240}
1241
1242static int mxser_chars_in_buffer(struct tty_struct *tty)
1243{
1c45607a 1244 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1245 return info->xmit_cnt;
1246}
1247
1c45607a
JS		 1248/*
1249 * ------------------------------------------------------------
1250 * friends of mxser_ioctl()
1251 * ------------------------------------------------------------
1252 */
216ba023 1253static int mxser_get_serial_info(struct tty_struct *tty,
1c45607a
JS		 1254 struct serial_struct __user *retinfo)
1255{
216ba023 1256 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 1257 struct serial_struct tmp = {
1258 .type = info->type,
216ba023 1259 .line = tty->index,
1c45607a
JS		 1260 .port = info->ioaddr,
1261 .irq = info->board->irq,
0ad9e7d1 1262 .flags = info->port.flags,
1c45607a 1263 .baud_base = info->baud_base,
44b7d1b3
AC		 1264 .close_delay = info->port.close_delay,
1265 .closing_wait = info->port.closing_wait,
1c45607a
JS		 1266 .custom_divisor = info->custom_divisor,
1267 .hub6 = 0
1268 };
1269 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1270 return -EFAULT;
1271 return 0;
1272}
1273
216ba023 1274static int mxser_set_serial_info(struct tty_struct *tty,
1c45607a 1275 struct serial_struct __user *new_info)
1da177e4 1276{
216ba023 1277 struct mxser_port *info = tty->driver_data;
1c45607a 1278 struct serial_struct new_serial;
80ff8a80 1279 speed_t baud;
1c45607a
JS		 1280 unsigned long sl_flags;
1281 unsigned int flags;
1282 int retval = 0;
1da177e4 1283
1c45607a 1284 if (!new_info || !info->ioaddr)
80ff8a80 1285 return -ENODEV;
1c45607a
JS		 1286 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1287 return -EFAULT;
1da177e4 1288
80ff8a80
JS		 1289 if (new_serial.irq != info->board->irq ||
1290 new_serial.port != info->ioaddr)
1291 return -EINVAL;
1da177e4 1292
0ad9e7d1 1293 flags = info->port.flags & ASYNC_SPD_MASK;
1da177e4 1294
1c45607a
JS		 1295 if (!capable(CAP_SYS_ADMIN)) {
1296 if ((new_serial.baud_base != info->baud_base) ||
44b7d1b3 1297 (new_serial.close_delay != info->port.close_delay) ||
0ad9e7d1 1298 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1c45607a 1299 return -EPERM;
0ad9e7d1 1300 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1c45607a
JS		 1301 (new_serial.flags & ASYNC_USR_MASK));
1302 } else {
1da177e4 1303 /*
1c45607a
JS		 1304 * OK, past this point, all the error checking has been done.
1305 * At this point, we start making changes.....
1da177e4 1306 */
0ad9e7d1 1307 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1c45607a 1308 (new_serial.flags & ASYNC_FLAGS));
44b7d1b3
AC		 1309 info->port.close_delay = new_serial.close_delay * HZ / 100;
1310 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
216ba023
AC		 1311 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1312 ? 1 : 0;
0ad9e7d1 1313 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
80ff8a80
JS		 1314 (new_serial.baud_base != info->baud_base ||
1315 new_serial.custom_divisor !=
1316 info->custom_divisor)) {
1317 baud = new_serial.baud_base / new_serial.custom_divisor;
216ba023 1318 tty_encode_baud_rate(tty, baud, baud);
80ff8a80 1319 }
1c45607a 1320 }
fc83815c 1321
1c45607a 1322 info->type = new_serial.type;
1da177e4 1323
1c45607a
JS		 1324 process_txrx_fifo(info);
1325
0ad9e7d1
AC		 1326 if (info->port.flags & ASYNC_INITIALIZED) {
1327 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1c45607a 1328 spin_lock_irqsave(&info->slock, sl_flags);
216ba023 1329 mxser_change_speed(tty, NULL);
1c45607a 1330 spin_unlock_irqrestore(&info->slock, sl_flags);
1da177e4 1331 }
1c45607a 1332 } else
216ba023 1333 retval = mxser_startup(tty);
1da177e4 1334
1c45607a
JS		 1335 return retval;
1336}
1da177e4 1337
1c45607a
JS		 1338/*
1339 * mxser_get_lsr_info - get line status register info
1340 *
1341 * Purpose: Let user call ioctl() to get info when the UART physically
1342 * is emptied. On bus types like RS485, the transmitter must
1343 * release the bus after transmitting. This must be done when
1344 * the transmit shift register is empty, not be done when the
1345 * transmit holding register is empty. This functionality
1346 * allows an RS485 driver to be written in user space.
1347 */
1348static int mxser_get_lsr_info(struct mxser_port *info,
1349 unsigned int __user *value)
1350{
1351 unsigned char status;
1352 unsigned int result;
1353 unsigned long flags;
1da177e4 1354
1c45607a
JS		 1355 spin_lock_irqsave(&info->slock, flags);
1356 status = inb(info->ioaddr + UART_LSR);
1357 spin_unlock_irqrestore(&info->slock, flags);
1358 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1359 return put_user(result, value);
1360}
1da177e4 1361
1c45607a
JS		 1362static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1363{
1364 struct mxser_port *info = tty->driver_data;
1365 unsigned char control, status;
1366 unsigned long flags;
1da177e4 1367
8ea2c2ec 1368
1c45607a
JS		 1369 if (tty->index == MXSER_PORTS)
1370 return -ENOIOCTLCMD;
1371 if (test_bit(TTY_IO_ERROR, &tty->flags))
1372 return -EIO;
1da177e4 1373
1c45607a 1374 control = info->MCR;
1da177e4 1375
1c45607a
JS		 1376 spin_lock_irqsave(&info->slock, flags);
1377 status = inb(info->ioaddr + UART_MSR);
1378 if (status & UART_MSR_ANY_DELTA)
216ba023 1379 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1380 spin_unlock_irqrestore(&info->slock, flags);
1381 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1382 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1383 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1384 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1385 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1386 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1387}
1da177e4 1388
1c45607a
JS		 1389static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1390 unsigned int set, unsigned int clear)
1391{
1392 struct mxser_port *info = tty->driver_data;
1393 unsigned long flags;
1da177e4 1394
1da177e4 1395
1c45607a
JS		 1396 if (tty->index == MXSER_PORTS)
1397 return -ENOIOCTLCMD;
1398 if (test_bit(TTY_IO_ERROR, &tty->flags))
1399 return -EIO;
1da177e4 1400
1c45607a 1401 spin_lock_irqsave(&info->slock, flags);
1da177e4 1402
1c45607a
JS		 1403 if (set & TIOCM_RTS)
1404 info->MCR |= UART_MCR_RTS;
1405 if (set & TIOCM_DTR)
1406 info->MCR |= UART_MCR_DTR;
1da177e4 1407
1c45607a
JS		 1408 if (clear & TIOCM_RTS)
1409 info->MCR &= ~UART_MCR_RTS;
1410 if (clear & TIOCM_DTR)
1411 info->MCR &= ~UART_MCR_DTR;
8ea2c2ec 1412
1c45607a
JS		 1413 outb(info->MCR, info->ioaddr + UART_MCR);
1414 spin_unlock_irqrestore(&info->slock, flags);
1415 return 0;
1416}
1da177e4 1417
1c45607a
JS		 1418static int __init mxser_program_mode(int port)
1419{
1420 int id, i, j, n;
1421
1422 outb(0, port);
1423 outb(0, port);
1424 outb(0, port);
1425 (void)inb(port);
1426 (void)inb(port);
1427 outb(0, port);
1428 (void)inb(port);
1429
1430 id = inb(port + 1) & 0x1F;
1431 if ((id != C168_ASIC_ID) &&
1432 (id != C104_ASIC_ID) &&
1433 (id != C102_ASIC_ID) &&
1434 (id != CI132_ASIC_ID) &&
1435 (id != CI134_ASIC_ID) &&
1436 (id != CI104J_ASIC_ID))
1437 return -1;
1438 for (i = 0, j = 0; i < 4; i++) {
1439 n = inb(port + 2);
1440 if (n == 'M') {
1441 j = 1;
1442 } else if ((j == 1) && (n == 1)) {
1443 j = 2;
1444 break;
1445 } else
1446 j = 0;
1da177e4 1447 }
1c45607a
JS		 1448 if (j != 2)
1449 id = -2;
1450 return id;
1da177e4
LT		 1451}
1452
1c45607a
JS		 1453static void __init mxser_normal_mode(int port)
1454{
1455 int i, n;
1456
1457 outb(0xA5, port + 1);
1458 outb(0x80, port + 3);
1459 outb(12, port + 0); /* 9600 bps */
1460 outb(0, port + 1);
1461 outb(0x03, port + 3); /* 8 data bits */
1462 outb(0x13, port + 4); /* loop back mode */
1463 for (i = 0; i < 16; i++) {
1464 n = inb(port + 5);
1465 if ((n & 0x61) == 0x60)
1466 break;
1467 if ((n & 1) == 1)
1468 (void)inb(port);
1469 }
1470 outb(0x00, port + 4);
1471}
1472
1473#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1474#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1475#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1476#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1477#define EN_CCMD 0x000 /* Chip's command register */
1478#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1479#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1480#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1481#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1482#define EN0_DCFG 0x00E /* Data configuration reg WR */
1483#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1484#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1485#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1486static int __init mxser_read_register(int port, unsigned short *regs)
1487{
1488 int i, k, value, id;
1489 unsigned int j;
1490
1491 id = mxser_program_mode(port);
1492 if (id < 0)
1493 return id;
1494 for (i = 0; i < 14; i++) {
1495 k = (i & 0x3F) | 0x180;
1496 for (j = 0x100; j > 0; j >>= 1) {
1497 outb(CHIP_CS, port);
1498 if (k & j) {
1499 outb(CHIP_CS | CHIP_DO, port);
1500 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1501 } else {
1502 outb(CHIP_CS, port);
1503 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1504 }
1505 }
1506 (void)inb(port);
1507 value = 0;
1508 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1509 outb(CHIP_CS, port);
1510 outb(CHIP_CS | CHIP_SK, port);
1511 if (inb(port) & CHIP_DI)
1512 value |= j;
1513 }
1514 regs[i] = value;
1515 outb(0, port);
1516 }
1517 mxser_normal_mode(port);
1518 return id;
1519}
1da177e4
LT		 1520
1521static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1522{
1c45607a 1523 struct mxser_port *port;
216ba023 1524 struct tty_struct *tty;
1c45607a
JS		 1525 int result, status;
1526 unsigned int i, j;
9d6d162d 1527 int ret = 0;
1da177e4
LT		 1528
1529 switch (cmd) {
1da177e4 1530 case MOXA_GET_MAJOR:
8f3d137e
JS		 1531 if (printk_ratelimit())
1532 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1533 "%x (GET_MAJOR), fix your userspace\n",
1534 current->comm, cmd);
1c45607a 1535 return put_user(ttymajor, (int __user *)argp);
1da177e4
LT		 1536
1537 case MOXA_CHKPORTENABLE:
1538 result = 0;
9d6d162d 1539 lock_kernel();
1c45607a
JS		 1540 for (i = 0; i < MXSER_BOARDS; i++)
1541 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1542 if (mxser_boards[i].ports[j].ioaddr)
1543 result |= (1 << i);
9d6d162d 1544 unlock_kernel();
8ea2c2ec 1545 return put_user(result, (unsigned long __user *)argp);
1da177e4 1546 case MOXA_GETDATACOUNT:
9d6d162d 1547 lock_kernel();
1da177e4 1548 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
9d6d162d
AC		 1549 ret = -EFAULT;
1550 unlock_kernel();
1551 return ret;
72800df9
JS		 1552 case MOXA_GETMSTATUS: {
1553 struct mxser_mstatus ms, __user *msu = argp;
9d6d162d 1554 lock_kernel();
1c45607a
JS		 1555 for (i = 0; i < MXSER_BOARDS; i++)
1556 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1557 port = &mxser_boards[i].ports[j];
72800df9 1558 memset(&ms, 0, sizeof(ms));
1c45607a 1559
72800df9
JS		 1560 if (!port->ioaddr)
1561 goto copy;
216ba023
AC		 1562
1563 tty = tty_port_tty_get(&port->port);
1da177e4 1564
216ba023 1565 if (!tty || !tty->termios)
72800df9 1566 ms.cflag = port->normal_termios.c_cflag;
1c45607a 1567 else
216ba023
AC		 1568 ms.cflag = tty->termios->c_cflag;
1569 tty_kref_put(tty);
1c45607a 1570 status = inb(port->ioaddr + UART_MSR);
72800df9
JS		 1571 if (status & UART_MSR_DCD)
1572 ms.dcd = 1;
1573 if (status & UART_MSR_DSR)
1574 ms.dsr = 1;
1575 if (status & UART_MSR_CTS)
1576 ms.cts = 1;
1577 copy:
1578 if (copy_to_user(msu, &ms, sizeof(ms))) {
1579 unlock_kernel();
1580 return -EFAULT;
1581 }
1582 msu++;
1c45607a 1583 }
9d6d162d 1584 unlock_kernel();
1da177e4 1585 return 0;
72800df9 1586 }
8ea2c2ec 1587 case MOXA_ASPP_MON_EXT: {
72800df9
JS		 1588 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1589 unsigned int cflag, iflag, p;
1590 u8 opmode;
1591
1592 me = kzalloc(sizeof(*me), GFP_KERNEL);
1593 if (!me)
1594 return -ENOMEM;
1c45607a 1595
9d6d162d 1596 lock_kernel();
72800df9
JS		 1597 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1598 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1599 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1600 i = MXSER_BOARDS;
1601 break;
1602 }
1c45607a
JS		 1603 port = &mxser_boards[i].ports[j];
1604 if (!port->ioaddr)
1da177e4
LT		 1605 continue;
1606
72800df9 1607 status = mxser_get_msr(port->ioaddr, 0, p);
1c45607a 1608
1da177e4 1609 if (status & UART_MSR_TERI)
1c45607a 1610 port->icount.rng++;
1da177e4 1611 if (status & UART_MSR_DDSR)
1c45607a 1612 port->icount.dsr++;
1da177e4 1613 if (status & UART_MSR_DDCD)
1c45607a 1614 port->icount.dcd++;
1da177e4 1615 if (status & UART_MSR_DCTS)
1c45607a
JS		 1616 port->icount.cts++;
1617
1618 port->mon_data.modem_status = status;
72800df9
JS		 1619 me->rx_cnt[p] = port->mon_data.rxcnt;
1620 me->tx_cnt[p] = port->mon_data.txcnt;
1621 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1622 me->up_txcnt[p] = port->mon_data.up_txcnt;
1623 me->modem_status[p] =
1c45607a 1624 port->mon_data.modem_status;
216ba023 1625 tty = tty_port_tty_get(&port->port);
1c45607a 1626
216ba023 1627 if (!tty || !tty->termios) {
1c45607a
JS		 1628 cflag = port->normal_termios.c_cflag;
1629 iflag = port->normal_termios.c_iflag;
216ba023 1630 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1da177e4 1631 } else {
216ba023
AC		 1632 cflag = tty->termios->c_cflag;
1633 iflag = tty->termios->c_iflag;
1634 me->baudrate[p] = tty_get_baud_rate(tty);
1da177e4 1635 }
216ba023 1636 tty_kref_put(tty);
1da177e4 1637
72800df9
JS		 1638 me->databits[p] = cflag & CSIZE;
1639 me->stopbits[p] = cflag & CSTOPB;
1640 me->parity[p] = cflag & (PARENB | PARODD |
1641 CMSPAR);
1da177e4
LT		 1642
1643 if (cflag & CRTSCTS)
72800df9 1644 me->flowctrl[p] |= 0x03;
1da177e4
LT		 1645
1646 if (iflag & (IXON | IXOFF))
72800df9 1647 me->flowctrl[p] |= 0x0C;
1da177e4 1648
1c45607a 1649 if (port->type == PORT_16550A)
72800df9 1650 me->fifo[p] = 1;
1da177e4 1651
72800df9
JS		 1652 opmode = inb(port->opmode_ioaddr) >>
1653 ((p % 4) * 2);
1da177e4 1654 opmode &= OP_MODE_MASK;
72800df9 1655 me->iftype[p] = opmode;
1da177e4 1656 }
9d6d162d
AC		 1657 }
1658 unlock_kernel();
72800df9
JS		 1659 if (copy_to_user(argp, me, sizeof(*me)))
1660 ret = -EFAULT;
1661 kfree(me);
1662 return ret;
9d6d162d
AC		 1663 }
1664 default:
1da177e4
LT		 1665 return -ENOIOCTLCMD;
1666 }
1667 return 0;
1668}
1669
1c45607a
JS		 1670static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1671 struct async_icount *cprev)
1da177e4 1672{
1c45607a
JS		 1673 struct async_icount cnow;
1674 unsigned long flags;
1675 int ret;
1da177e4 1676
1c45607a
JS		 1677 spin_lock_irqsave(&info->slock, flags);
1678 cnow = info->icount; /* atomic copy */
1679 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 1680
1c45607a
JS		 1681 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1682 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1683 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1684 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1da177e4 1685
1c45607a
JS		 1686 *cprev = cnow;
1687
1688 return ret;
1689}
1690
1691static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1692 unsigned int cmd, unsigned long arg)
1da177e4 1693{
1c45607a
JS		 1694 struct mxser_port *info = tty->driver_data;
1695 struct async_icount cnow;
1c45607a
JS		 1696 unsigned long flags;
1697 void __user *argp = (void __user *)arg;
1698 int retval;
1da177e4 1699
1c45607a
JS		 1700 if (tty->index == MXSER_PORTS)
1701 return mxser_ioctl_special(cmd, argp);
1da177e4 1702
1c45607a
JS		 1703 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1704 int p;
1705 unsigned long opmode;
1706 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1707 int shiftbit;
1708 unsigned char val, mask;
1da177e4 1709
1c45607a
JS		 1710 p = tty->index % 4;
1711 if (cmd == MOXA_SET_OP_MODE) {
1712 if (get_user(opmode, (int __user *) argp))
1713 return -EFAULT;
1714 if (opmode != RS232_MODE &&
1715 opmode != RS485_2WIRE_MODE &&
1716 opmode != RS422_MODE &&
1717 opmode != RS485_4WIRE_MODE)
1718 return -EFAULT;
9d6d162d 1719 lock_kernel();
1c45607a
JS		 1720 mask = ModeMask[p];
1721 shiftbit = p * 2;
1722 val = inb(info->opmode_ioaddr);
1723 val &= mask;
1724 val |= (opmode << shiftbit);
1725 outb(val, info->opmode_ioaddr);
9d6d162d 1726 unlock_kernel();
1c45607a 1727 } else {
9d6d162d 1728 lock_kernel();
1c45607a
JS		 1729 shiftbit = p * 2;
1730 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1731 opmode &= OP_MODE_MASK;
9d6d162d 1732 unlock_kernel();
1c45607a
JS		 1733 if (put_user(opmode, (int __user *)argp))
1734 return -EFAULT;
1735 }
1736 return 0;
1737 }
1738
1739 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1740 test_bit(TTY_IO_ERROR, &tty->flags))
1741 return -EIO;
1742
1743 switch (cmd) {
1c45607a 1744 case TIOCGSERIAL:
9d6d162d 1745 lock_kernel();
216ba023 1746 retval = mxser_get_serial_info(tty, argp);
9d6d162d
AC		 1747 unlock_kernel();
1748 return retval;
1c45607a 1749 case TIOCSSERIAL:
9d6d162d 1750 lock_kernel();
216ba023 1751 retval = mxser_set_serial_info(tty, argp);
9d6d162d
AC		 1752 unlock_kernel();
1753 return retval;
1c45607a 1754 case TIOCSERGETLSR: /* Get line status register */
9d6d162d 1755 return mxser_get_lsr_info(info, argp);
1c45607a
JS		 1756 /*
1757 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1758 * - mask passed in arg for lines of interest
1759 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1760 * Caller should use TIOCGICOUNT to see which one it was
1761 */
1762 case TIOCMIWAIT:
1763 spin_lock_irqsave(&info->slock, flags);
1764 cnow = info->icount; /* note the counters on entry */
1765 spin_unlock_irqrestore(&info->slock, flags);
1766
bdc04e31 1767 return wait_event_interruptible(info->port.delta_msr_wait,
1c45607a
JS		 1768 mxser_cflags_changed(info, arg, &cnow));
1769 /*
1770 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1771 * Return: write counters to the user passed counter struct
1772 * NB: both 1->0 and 0->1 transitions are counted except for
1773 * RI where only 0->1 is counted.
1774 */
41aee9a1
JS		 1775 case TIOCGICOUNT: {
1776 struct serial_icounter_struct icnt = { 0 };
1c45607a
JS		 1777 spin_lock_irqsave(&info->slock, flags);
1778 cnow = info->icount;
1779 spin_unlock_irqrestore(&info->slock, flags);
41aee9a1
JS		 1780
1781 icnt.frame = cnow.frame;
1782 icnt.brk = cnow.brk;
1783 icnt.overrun = cnow.overrun;
1784 icnt.buf_overrun = cnow.buf_overrun;
1785 icnt.parity = cnow.parity;
1786 icnt.rx = cnow.rx;
1787 icnt.tx = cnow.tx;
1788 icnt.cts = cnow.cts;
1789 icnt.dsr = cnow.dsr;
1790 icnt.rng = cnow.rng;
1791 icnt.dcd = cnow.dcd;
1792
1793 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1794 }
1c45607a
JS		 1795 case MOXA_HighSpeedOn:
1796 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1797 case MOXA_SDS_RSTICOUNTER:
9d6d162d 1798 lock_kernel();
1c45607a
JS		 1799 info->mon_data.rxcnt = 0;
1800 info->mon_data.txcnt = 0;
9d6d162d 1801 unlock_kernel();
1c45607a
JS		 1802 return 0;
1803
1804 case MOXA_ASPP_OQUEUE:{
1805 int len, lsr;
1806
9d6d162d 1807 lock_kernel();
1c45607a 1808 len = mxser_chars_in_buffer(tty);
a75b7b68 1809 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
1c45607a 1810 len += (lsr ? 0 : 1);
9d6d162d 1811 unlock_kernel();
1c45607a
JS		 1812
1813 return put_user(len, (int __user *)argp);
1814 }
1815 case MOXA_ASPP_MON: {
1816 int mcr, status;
1817
9d6d162d 1818 lock_kernel();
1c45607a 1819 status = mxser_get_msr(info->ioaddr, 1, tty->index);
216ba023 1820 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1821
1822 mcr = inb(info->ioaddr + UART_MCR);
1823 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1824 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1825 else
1826 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1827
1828 if (mcr & MOXA_MUST_MCR_TX_XON)
1829 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1830 else
1831 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1832
216ba023 1833 if (tty->hw_stopped)
1c45607a
JS		 1834 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1835 else
1836 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
9d6d162d 1837 unlock_kernel();
1c45607a
JS		 1838 if (copy_to_user(argp, &info->mon_data,
1839 sizeof(struct mxser_mon)))
1840 return -EFAULT;
1841
1842 return 0;
1843 }
1844 case MOXA_ASPP_LSTATUS: {
1845 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1846 return -EFAULT;
1847
1848 info->err_shadow = 0;
1849 return 0;
1850 }
1851 case MOXA_SET_BAUD_METHOD: {
1852 int method;
1853
1854 if (get_user(method, (int __user *)argp))
1855 return -EFAULT;
1856 mxser_set_baud_method[tty->index] = method;
1857 return put_user(method, (int __user *)argp);
1858 }
1859 default:
1860 return -ENOIOCTLCMD;
1861 }
1862 return 0;
1863}
1864
1865static void mxser_stoprx(struct tty_struct *tty)
1866{
1867 struct mxser_port *info = tty->driver_data;
1868
1869 info->ldisc_stop_rx = 1;
1870 if (I_IXOFF(tty)) {
1871 if (info->board->chip_flag) {
1872 info->IER &= ~MOXA_MUST_RECV_ISR;
1873 outb(info->IER, info->ioaddr + UART_IER);
1874 } else {
1875 info->x_char = STOP_CHAR(tty);
1876 outb(0, info->ioaddr + UART_IER);
1877 info->IER |= UART_IER_THRI;
1878 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1879 }
1880 }
1881
216ba023 1882 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1883 info->MCR &= ~UART_MCR_RTS;
1884 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1885 }
1886}
1887
1888/*
1889 * This routine is called by the upper-layer tty layer to signal that
1890 * incoming characters should be throttled.
1891 */
1892static void mxser_throttle(struct tty_struct *tty)
1893{
1da177e4 1894 mxser_stoprx(tty);
1da177e4
LT		 1895}
1896
1897static void mxser_unthrottle(struct tty_struct *tty)
1898{
1c45607a 1899 struct mxser_port *info = tty->driver_data;
1da177e4 1900
1c45607a
JS		 1901 /* startrx */
1902 info->ldisc_stop_rx = 0;
1903 if (I_IXOFF(tty)) {
1904 if (info->x_char)
1905 info->x_char = 0;
1906 else {
1907 if (info->board->chip_flag) {
1908 info->IER |= MOXA_MUST_RECV_ISR;
1909 outb(info->IER, info->ioaddr + UART_IER);
1910 } else {
1911 info->x_char = START_CHAR(tty);
1912 outb(0, info->ioaddr + UART_IER);
1913 info->IER |= UART_IER_THRI;
1914 outb(info->IER, info->ioaddr + UART_IER);
1915 }
1da177e4 1916 }
1c45607a 1917 }
1da177e4 1918
216ba023 1919 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1920 info->MCR |= UART_MCR_RTS;
1921 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1922 }
1923}
1924
1925/*
1926 * mxser_stop() and mxser_start()
1927 *
1928 * This routines are called before setting or resetting tty->stopped.
1929 * They enable or disable transmitter interrupts, as necessary.
1930 */
1931static void mxser_stop(struct tty_struct *tty)
1932{
1c45607a 1933 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1934 unsigned long flags;
1935
1936 spin_lock_irqsave(&info->slock, flags);
1937 if (info->IER & UART_IER_THRI) {
1938 info->IER &= ~UART_IER_THRI;
1c45607a 1939 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1940 }
1941 spin_unlock_irqrestore(&info->slock, flags);
1942}
1943
1944static void mxser_start(struct tty_struct *tty)
1945{
1c45607a 1946 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1947 unsigned long flags;
1948
1949 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1950 if (info->xmit_cnt && info->port.xmit_buf) {
1c45607a 1951 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1952 info->IER |= UART_IER_THRI;
1c45607a 1953 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1954 }
1955 spin_unlock_irqrestore(&info->slock, flags);
1956}
1957
1c45607a
JS		 1958static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1959{
1960 struct mxser_port *info = tty->driver_data;
1961 unsigned long flags;
1962
1963 spin_lock_irqsave(&info->slock, flags);
216ba023 1964 mxser_change_speed(tty, old_termios);
1c45607a
JS		 1965 spin_unlock_irqrestore(&info->slock, flags);
1966
1967 if ((old_termios->c_cflag & CRTSCTS) &&
1968 !(tty->termios->c_cflag & CRTSCTS)) {
1969 tty->hw_stopped = 0;
1970 mxser_start(tty);
1971 }
1972
1973 /* Handle sw stopped */
1974 if ((old_termios->c_iflag & IXON) &&
1975 !(tty->termios->c_iflag & IXON)) {
1976 tty->stopped = 0;
1977
1978 if (info->board->chip_flag) {
1979 spin_lock_irqsave(&info->slock, flags);
148ff86b
CH		 1980 mxser_disable_must_rx_software_flow_control(
1981 info->ioaddr);
1c45607a
JS		 1982 spin_unlock_irqrestore(&info->slock, flags);
1983 }
1984
1985 mxser_start(tty);
1986 }
1987}
1988
1da177e4
LT		 1989/*
1990 * mxser_wait_until_sent() --- wait until the transmitter is empty
1991 */
1992static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1993{
1c45607a 1994 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1995 unsigned long orig_jiffies, char_time;
1996 int lsr;
1997
1998 if (info->type == PORT_UNKNOWN)
1999 return;
2000
2001 if (info->xmit_fifo_size == 0)
2002 return; /* Just in case.... */
2003
2004 orig_jiffies = jiffies;
2005 /*
2006 * Set the check interval to be 1/5 of the estimated time to
2007 * send a single character, and make it at least 1. The check
2008 * interval should also be less than the timeout.
2009 *
2010 * Note: we have to use pretty tight timings here to satisfy
2011 * the NIST-PCTS.
2012 */
2013 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2014 char_time = char_time / 5;
2015 if (char_time == 0)
2016 char_time = 1;
2017 if (timeout && timeout < char_time)
2018 char_time = timeout;
2019 /*
2020 * If the transmitter hasn't cleared in twice the approximate
2021 * amount of time to send the entire FIFO, it probably won't
2022 * ever clear. This assumes the UART isn't doing flow
2023 * control, which is currently the case. Hence, if it ever
2024 * takes longer than info->timeout, this is probably due to a
2025 * UART bug of some kind. So, we clamp the timeout parameter at
2026 * 2*info->timeout.
2027 */
2028 if (!timeout || timeout > 2 * info->timeout)
2029 timeout = 2 * info->timeout;
2030#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 2031 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2032 timeout, char_time);
1da177e4
LT		 2033 printk("jiff=%lu...", jiffies);
2034#endif
978e595f 2035 lock_kernel();
1c45607a 2036 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1da177e4
LT		 2037#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2038 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2039#endif
da4cd8df 2040 schedule_timeout_interruptible(char_time);
1da177e4 2041 if (signal_pending(current))
1c45607a
JS		 2042 break;
2043 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2044 break;
1da177e4 2045 }
1c45607a 2046 set_current_state(TASK_RUNNING);
978e595f 2047 unlock_kernel();
1da177e4 2048
1c45607a
JS		 2049#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2050 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2051#endif
2052}
1da177e4 2053
1c45607a
JS		 2054/*
2055 * This routine is called by tty_hangup() when a hangup is signaled.
2056 */
2057static void mxser_hangup(struct tty_struct *tty)
2058{
2059 struct mxser_port *info = tty->driver_data;
1da177e4 2060
1c45607a 2061 mxser_flush_buffer(tty);
216ba023 2062 mxser_shutdown(tty);
3b6826b2 2063 tty_port_hangup(&info->port);
1da177e4
LT		 2064}
2065
1c45607a
JS		 2066/*
2067 * mxser_rs_break() --- routine which turns the break handling on or off
2068 */
9e98966c 2069static int mxser_rs_break(struct tty_struct *tty, int break_state)
1da177e4 2070{
1c45607a 2071 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2072 unsigned long flags;
2073
1c45607a
JS		 2074 spin_lock_irqsave(&info->slock, flags);
2075 if (break_state == -1)
2076 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2077 info->ioaddr + UART_LCR);
2078 else
2079 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2080 info->ioaddr + UART_LCR);
2081 spin_unlock_irqrestore(&info->slock, flags);
9e98966c 2082 return 0;
1c45607a 2083}
1da177e4 2084
216ba023
AC		 2085static void mxser_receive_chars(struct tty_struct *tty,
2086 struct mxser_port *port, int *status)
1c45607a 2087{
1c45607a
JS		 2088 unsigned char ch, gdl;
2089 int ignored = 0;
2090 int cnt = 0;
2091 int recv_room;
2092 int max = 256;
1da177e4 2093
1c45607a 2094 recv_room = tty->receive_room;
216ba023 2095 if (recv_room == 0 && !port->ldisc_stop_rx)
1c45607a 2096 mxser_stoprx(tty);
1c45607a 2097 if (port->board->chip_flag != MOXA_OTHER_UART) {
1da177e4 2098
1c45607a
JS		 2099 if (*status & UART_LSR_SPECIAL)
2100 goto intr_old;
2101 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2102 (*status & MOXA_MUST_LSR_RERR))
2103 goto intr_old;
2104 if (*status & MOXA_MUST_LSR_RERR)
2105 goto intr_old;
1da177e4 2106
1c45607a
JS		 2107 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2108
2109 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2110 gdl &= MOXA_MUST_GDL_MASK;
2111 if (gdl >= recv_room) {
2112 if (!port->ldisc_stop_rx)
2113 mxser_stoprx(tty);
2114 }
2115 while (gdl--) {
2116 ch = inb(port->ioaddr + UART_RX);
2117 tty_insert_flip_char(tty, ch, 0);
2118 cnt++;
2119 }
2120 goto end_intr;
1da177e4 2121 }
1c45607a
JS		 2122intr_old:
2123
2124 do {
2125 if (max-- < 0)
2126 break;
1da177e4 2127
1c45607a
JS		 2128 ch = inb(port->ioaddr + UART_RX);
2129 if (port->board->chip_flag && (*status & UART_LSR_OE))
2130 outb(0x23, port->ioaddr + UART_FCR);
2131 *status &= port->read_status_mask;
2132 if (*status & port->ignore_status_mask) {
2133 if (++ignored > 100)
2134 break;
2135 } else {
2136 char flag = 0;
2137 if (*status & UART_LSR_SPECIAL) {
2138 if (*status & UART_LSR_BI) {
2139 flag = TTY_BREAK;
2140 port->icount.brk++;
1da177e4 2141
0ad9e7d1 2142 if (port->port.flags & ASYNC_SAK)
1c45607a
JS		 2143 do_SAK(tty);
2144 } else if (*status & UART_LSR_PE) {
2145 flag = TTY_PARITY;
2146 port->icount.parity++;
2147 } else if (*status & UART_LSR_FE) {
2148 flag = TTY_FRAME;
2149 port->icount.frame++;
2150 } else if (*status & UART_LSR_OE) {
2151 flag = TTY_OVERRUN;
2152 port->icount.overrun++;
2153 } else
2154 flag = TTY_BREAK;
2155 }
2156 tty_insert_flip_char(tty, ch, flag);
2157 cnt++;
2158 if (cnt >= recv_room) {
2159 if (!port->ldisc_stop_rx)
2160 mxser_stoprx(tty);
2161 break;
2162 }
1da177e4 2163
1c45607a 2164 }
1da177e4 2165
1c45607a
JS		 2166 if (port->board->chip_flag)
2167 break;
1da177e4 2168
1c45607a
JS		 2169 *status = inb(port->ioaddr + UART_LSR);
2170 } while (*status & UART_LSR_DR);
1da177e4 2171
1c45607a 2172end_intr:
216ba023 2173 mxvar_log.rxcnt[tty->index] += cnt;
1c45607a
JS		 2174 port->mon_data.rxcnt += cnt;
2175 port->mon_data.up_rxcnt += cnt;
1da177e4 2176
1c45607a
JS		 2177 /*
2178 * We are called from an interrupt context with &port->slock
2179 * being held. Drop it temporarily in order to prevent
2180 * recursive locking.
2181 */
2182 spin_unlock(&port->slock);
2183 tty_flip_buffer_push(tty);
2184 spin_lock(&port->slock);
1da177e4
LT		 2185}
2186
216ba023 2187static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
1da177e4 2188{
1c45607a 2189 int count, cnt;
1da177e4 2190
1c45607a
JS		 2191 if (port->x_char) {
2192 outb(port->x_char, port->ioaddr + UART_TX);
2193 port->x_char = 0;
216ba023 2194 mxvar_log.txcnt[tty->index]++;
1c45607a
JS		 2195 port->mon_data.txcnt++;
2196 port->mon_data.up_txcnt++;
2197 port->icount.tx++;
2198 return;
2199 }
1da177e4 2200
0ad9e7d1 2201 if (port->port.xmit_buf == NULL)
1c45607a 2202 return;
1da177e4 2203
216ba023
AC		 2204 if (port->xmit_cnt <= 0 || tty->stopped ||
2205 (tty->hw_stopped &&
1c45607a
JS		 2206 (port->type != PORT_16550A) &&
2207 (!port->board->chip_flag))) {
2208 port->IER &= ~UART_IER_THRI;
2209 outb(port->IER, port->ioaddr + UART_IER);
2210 return;
1da177e4
LT		 2211 }
2212
1c45607a
JS		 2213 cnt = port->xmit_cnt;
2214 count = port->xmit_fifo_size;
2215 do {
0ad9e7d1 2216 outb(port->port.xmit_buf[port->xmit_tail++],
1c45607a
JS		 2217 port->ioaddr + UART_TX);
2218 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2219 if (--port->xmit_cnt <= 0)
2220 break;
2221 } while (--count > 0);
216ba023 2222 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
1da177e4 2223
1c45607a
JS		 2224 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2225 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2226 port->icount.tx += (cnt - port->xmit_cnt);
1da177e4 2227
216ba023
AC		 2228 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2229 tty_wakeup(tty);
1c45607a
JS		 2230
2231 if (port->xmit_cnt <= 0) {
2232 port->IER &= ~UART_IER_THRI;
2233 outb(port->IER, port->ioaddr + UART_IER);
1da177e4 2234 }
1da177e4
LT		 2235}
2236
2237/*
1c45607a 2238 * This is the serial driver's generic interrupt routine
1da177e4 2239 */
1c45607a 2240static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4 2241{
1c45607a
JS		 2242 int status, iir, i;
2243 struct mxser_board *brd = NULL;
2244 struct mxser_port *port;
2245 int max, irqbits, bits, msr;
2246 unsigned int int_cnt, pass_counter = 0;
2247 int handled = IRQ_NONE;
216ba023 2248 struct tty_struct *tty;
1da177e4 2249
1c45607a
JS		 2250 for (i = 0; i < MXSER_BOARDS; i++)
2251 if (dev_id == &mxser_boards[i]) {
2252 brd = dev_id;
2253 break;
2254 }
1da177e4 2255
1c45607a
JS		 2256 if (i == MXSER_BOARDS)
2257 goto irq_stop;
2258 if (brd == NULL)
2259 goto irq_stop;
2260 max = brd->info->nports;
2261 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2262 irqbits = inb(brd->vector) & brd->vector_mask;
2263 if (irqbits == brd->vector_mask)
2264 break;
1da177e4 2265
1c45607a
JS		 2266 handled = IRQ_HANDLED;
2267 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2268 if (irqbits == brd->vector_mask)
2269 break;
2270 if (bits & irqbits)
2271 continue;
2272 port = &brd->ports[i];
2273
2274 int_cnt = 0;
2275 spin_lock(&port->slock);
2276 do {
2277 iir = inb(port->ioaddr + UART_IIR);
2278 if (iir & UART_IIR_NO_INT)
2279 break;
2280 iir &= MOXA_MUST_IIR_MASK;
216ba023
AC		 2281 tty = tty_port_tty_get(&port->port);
2282 if (!tty ||
0ad9e7d1
AC		 2283 (port->port.flags & ASYNC_CLOSING) ||
2284 !(port->port.flags &
1c45607a
JS		 2285 ASYNC_INITIALIZED)) {
2286 status = inb(port->ioaddr + UART_LSR);
2287 outb(0x27, port->ioaddr + UART_FCR);
2288 inb(port->ioaddr + UART_MSR);
216ba023 2289 tty_kref_put(tty);
1c45607a
JS		 2290 break;
2291 }
1da177e4 2292
1c45607a
JS		 2293 status = inb(port->ioaddr + UART_LSR);
2294
2295 if (status & UART_LSR_PE)
2296 port->err_shadow |= NPPI_NOTIFY_PARITY;
2297 if (status & UART_LSR_FE)
2298 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2299 if (status & UART_LSR_OE)
2300 port->err_shadow |=
2301 NPPI_NOTIFY_HW_OVERRUN;
2302 if (status & UART_LSR_BI)
2303 port->err_shadow |= NPPI_NOTIFY_BREAK;
2304
2305 if (port->board->chip_flag) {
2306 if (iir == MOXA_MUST_IIR_GDA ||
2307 iir == MOXA_MUST_IIR_RDA ||
2308 iir == MOXA_MUST_IIR_RTO ||
2309 iir == MOXA_MUST_IIR_LSR)
216ba023 2310 mxser_receive_chars(tty, port,
1c45607a
JS		 2311 &status);
2312
2313 } else {
2314 status &= port->read_status_mask;
2315 if (status & UART_LSR_DR)
216ba023 2316 mxser_receive_chars(tty, port,
1c45607a
JS		 2317 &status);
2318 }
2319 msr = inb(port->ioaddr + UART_MSR);
2320 if (msr & UART_MSR_ANY_DELTA)
216ba023 2321 mxser_check_modem_status(tty, port, msr);
1c45607a
JS		 2322
2323 if (port->board->chip_flag) {
2324 if (iir == 0x02 && (status &
2325 UART_LSR_THRE))
216ba023 2326 mxser_transmit_chars(tty, port);
1c45607a
JS		 2327 } else {
2328 if (status & UART_LSR_THRE)
216ba023 2329 mxser_transmit_chars(tty, port);
1c45607a 2330 }
216ba023 2331 tty_kref_put(tty);
1c45607a
JS		 2332 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2333 spin_unlock(&port->slock);
2334 }
2335 }
1da177e4 2336
1c45607a
JS		 2337irq_stop:
2338 return handled;
2339}
1da177e4 2340
1c45607a
JS		 2341static const struct tty_operations mxser_ops = {
2342 .open = mxser_open,
2343 .close = mxser_close,
2344 .write = mxser_write,
2345 .put_char = mxser_put_char,
2346 .flush_chars = mxser_flush_chars,
2347 .write_room = mxser_write_room,
2348 .chars_in_buffer = mxser_chars_in_buffer,
2349 .flush_buffer = mxser_flush_buffer,
2350 .ioctl = mxser_ioctl,
2351 .throttle = mxser_throttle,
2352 .unthrottle = mxser_unthrottle,
2353 .set_termios = mxser_set_termios,
2354 .stop = mxser_stop,
2355 .start = mxser_start,
2356 .hangup = mxser_hangup,
2357 .break_ctl = mxser_rs_break,
2358 .wait_until_sent = mxser_wait_until_sent,
2359 .tiocmget = mxser_tiocmget,
2360 .tiocmset = mxser_tiocmset,
2361};
1da177e4 2362
31f35939
AC		 2363struct tty_port_operations mxser_port_ops = {
2364 .carrier_raised = mxser_carrier_raised,
fcc8ac18 2365 .dtr_rts = mxser_dtr_rts,
31f35939
AC		 2366};
2367
1c45607a
JS		 2368/*
2369 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2370 */
1da177e4 2371
1c45607a
JS		 2372static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2373 unsigned int irq)
2374{
2375 if (irq)
2376 free_irq(brd->irq, brd);
2377 if (pdev != NULL) { /* PCI */
2378#ifdef CONFIG_PCI
2379 pci_release_region(pdev, 2);
2380 pci_release_region(pdev, 3);
2381#endif
2382 } else {
2383 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2384 release_region(brd->vector, 1);
2385 }
1da177e4
LT		 2386}
2387
1c45607a
JS		 2388static int __devinit mxser_initbrd(struct mxser_board *brd,
2389 struct pci_dev *pdev)
1da177e4 2390{
1c45607a
JS		 2391 struct mxser_port *info;
2392 unsigned int i;
2393 int retval;
1da177e4 2394
83766bc6
JS		 2395 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2396 brd->ports[0].max_baud);
1da177e4 2397
1c45607a
JS		 2398 for (i = 0; i < brd->info->nports; i++) {
2399 info = &brd->ports[i];
44b7d1b3 2400 tty_port_init(&info->port);
31f35939 2401 info->port.ops = &mxser_port_ops;
1c45607a
JS		 2402 info->board = brd;
2403 info->stop_rx = 0;
2404 info->ldisc_stop_rx = 0;
1da177e4 2405
1c45607a
JS		 2406 /* Enhance mode enabled here */
2407 if (brd->chip_flag != MOXA_OTHER_UART)
148ff86b 2408 mxser_enable_must_enchance_mode(info->ioaddr);
1da177e4 2409
0ad9e7d1 2410 info->port.flags = ASYNC_SHARE_IRQ;
1c45607a 2411 info->type = brd->uart_type;
1da177e4 2412
1c45607a 2413 process_txrx_fifo(info);
1da177e4 2414
1c45607a 2415 info->custom_divisor = info->baud_base * 16;
44b7d1b3
AC		 2416 info->port.close_delay = 5 * HZ / 10;
2417 info->port.closing_wait = 30 * HZ;
1c45607a 2418 info->normal_termios = mxvar_sdriver->init_termios;
1c45607a
JS		 2419 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2420 info->err_shadow = 0;
2421 spin_lock_init(&info->slock);
1da177e4 2422
1c45607a
JS		 2423 /* before set INT ISR, disable all int */
2424 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2425 info->ioaddr + UART_IER);
2426 }
1da177e4 2427
1c45607a
JS		 2428 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2429 brd);
2430 if (retval) {
2431 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2432 "conflict with another device.\n",
2433 brd->info->name, brd->irq);
2434 /* We hold resources, we need to release them. */
2435 mxser_release_res(brd, pdev, 0);
2436 }
2437 return retval;
2438}
1da177e4 2439
1c45607a 2440static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
1da177e4
LT		 2441{
2442 int id, i, bits;
2443 unsigned short regs[16], irq;
2444 unsigned char scratch, scratch2;
2445
1c45607a 2446 brd->chip_flag = MOXA_OTHER_UART;
1da177e4
LT		 2447
2448 id = mxser_read_register(cap, regs);
1c45607a
JS		 2449 switch (id) {
2450 case C168_ASIC_ID:
2451 brd->info = &mxser_cards[0];
2452 break;
2453 case C104_ASIC_ID:
2454 brd->info = &mxser_cards[1];
2455 break;
2456 case CI104J_ASIC_ID:
2457 brd->info = &mxser_cards[2];
2458 break;
2459 case C102_ASIC_ID:
2460 brd->info = &mxser_cards[5];
2461 break;
2462 case CI132_ASIC_ID:
2463 brd->info = &mxser_cards[6];
2464 break;
2465 case CI134_ASIC_ID:
2466 brd->info = &mxser_cards[7];
2467 break;
2468 default:
8ea2c2ec 2469 return 0;
1c45607a 2470 }
1da177e4
LT		 2471
2472 irq = 0;
1c45607a
JS		 2473 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2474 Flag-hack checks if configuration should be read as 2-port here. */
2475 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
1da177e4
LT		 2476 irq = regs[9] & 0xF000;
2477 irq = irq | (irq >> 4);
2478 if (irq != (regs[9] & 0xFF00))
83766bc6 2479 goto err_irqconflict;
1c45607a 2480 } else if (brd->info->nports == 4) {
1da177e4
LT		 2481 irq = regs[9] & 0xF000;
2482 irq = irq | (irq >> 4);
2483 irq = irq | (irq >> 8);
2484 if (irq != regs[9])
83766bc6 2485 goto err_irqconflict;
1c45607a 2486 } else if (brd->info->nports == 8) {
1da177e4
LT		 2487 irq = regs[9] & 0xF000;
2488 irq = irq | (irq >> 4);
2489 irq = irq | (irq >> 8);
2490 if ((irq != regs[9]) || (irq != regs[10]))
83766bc6 2491 goto err_irqconflict;
1da177e4
LT		 2492 }
2493
83766bc6
JS		 2494 if (!irq) {
2495 printk(KERN_ERR "mxser: interrupt number unset\n");
2496 return -EIO;
2497 }
1c45607a 2498 brd->irq = ((int)(irq & 0xF000) >> 12);
1da177e4 2499 for (i = 0; i < 8; i++)
1c45607a 2500 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
83766bc6
JS		 2501 if ((regs[12] & 0x80) == 0) {
2502 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2503 return -EIO;
2504 }
1c45607a 2505 brd->vector = (int)regs[11]; /* interrupt vector */
1da177e4 2506 if (id == 1)
1c45607a 2507 brd->vector_mask = 0x00FF;
1da177e4 2508 else
1c45607a 2509 brd->vector_mask = 0x000F;
1da177e4
LT		 2510 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2511 if (regs[12] & bits) {
1c45607a
JS		 2512 brd->ports[i].baud_base = 921600;
2513 brd->ports[i].max_baud = 921600;
1da177e4 2514 } else {
1c45607a
JS		 2515 brd->ports[i].baud_base = 115200;
2516 brd->ports[i].max_baud = 115200;
1da177e4
LT		 2517 }
2518 }
2519 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2520 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2521 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2522 outb(scratch2, cap + UART_LCR);
2523 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2524 scratch = inb(cap + UART_IIR);
2525
2526 if (scratch & 0xC0)
1c45607a 2527 brd->uart_type = PORT_16550A;
1da177e4 2528 else
1c45607a
JS		 2529 brd->uart_type = PORT_16450;
2530 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
83766bc6
JS		 2531 "mxser(IO)")) {
2532 printk(KERN_ERR "mxser: can't request ports I/O region: "
2533 "0x%.8lx-0x%.8lx\n",
2534 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2535 8 * brd->info->nports - 1);
2536 return -EIO;
2537 }
1c45607a
JS		 2538 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2539 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
83766bc6
JS		 2540 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2541 "0x%.8lx-0x%.8lx\n",
2542 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2543 8 * brd->info->nports - 1);
2544 return -EIO;
1c45607a
JS		 2545 }
2546 return brd->info->nports;
83766bc6
JS		 2547
2548err_irqconflict:
2549 printk(KERN_ERR "mxser: invalid interrupt number\n");
2550 return -EIO;
1da177e4
LT		 2551}
2552
1c45607a
JS		 2553static int __devinit mxser_probe(struct pci_dev *pdev,
2554 const struct pci_device_id *ent)
1da177e4 2555{
1c45607a
JS		 2556#ifdef CONFIG_PCI
2557 struct mxser_board *brd;
2558 unsigned int i, j;
2559 unsigned long ioaddress;
2560 int retval = -EINVAL;
1da177e4 2561
1c45607a
JS		 2562 for (i = 0; i < MXSER_BOARDS; i++)
2563 if (mxser_boards[i].info == NULL)
2564 break;
2565
2566 if (i >= MXSER_BOARDS) {
83766bc6
JS		 2567 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2568 "not configured\n", MXSER_BOARDS);
1c45607a
JS		 2569 goto err;
2570 }
2571
2572 brd = &mxser_boards[i];
2573 brd->idx = i * MXSER_PORTS_PER_BOARD;
83766bc6 2574 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
1c45607a
JS		 2575 mxser_cards[ent->driver_data].name,
2576 pdev->bus->number, PCI_SLOT(pdev->devfn));
2577
2578 retval = pci_enable_device(pdev);
2579 if (retval) {
83766bc6 2580 dev_err(&pdev->dev, "PCI enable failed\n");
1c45607a
JS		 2581 goto err;
2582 }
2583
2584 /* io address */
2585 ioaddress = pci_resource_start(pdev, 2);
2586 retval = pci_request_region(pdev, 2, "mxser(IO)");
2587 if (retval)
2588 goto err;
2589
2590 brd->info = &mxser_cards[ent->driver_data];
2591 for (i = 0; i < brd->info->nports; i++)
2592 brd->ports[i].ioaddr = ioaddress + 8 * i;
2593
2594 /* vector */
2595 ioaddress = pci_resource_start(pdev, 3);
2596 retval = pci_request_region(pdev, 3, "mxser(vector)");
2597 if (retval)
2598 goto err_relio;
2599 brd->vector = ioaddress;
2600
2601 /* irq */
2602 brd->irq = pdev->irq;
2603
2604 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2605 brd->uart_type = PORT_16550A;
2606 brd->vector_mask = 0;
2607
2608 for (i = 0; i < brd->info->nports; i++) {
2609 for (j = 0; j < UART_INFO_NUM; j++) {
2610 if (Gpci_uart_info[j].type == brd->chip_flag) {
2611 brd->ports[i].max_baud =
2612 Gpci_uart_info[j].max_baud;
2613
2614 /* exception....CP-102 */
2615 if (brd->info->flags & MXSER_HIGHBAUD)
2616 brd->ports[i].max_baud = 921600;
2617 break;
1da177e4
LT		 2618 }
2619 }
1c45607a
JS		 2620 }
2621
2622 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2623 for (i = 0; i < brd->info->nports; i++) {
2624 if (i < 4)
2625 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2626 else
2627 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
1da177e4 2628 }
1c45607a
JS		 2629 outb(0, ioaddress + 4); /* default set to RS232 mode */
2630 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4 2631 }
1c45607a
JS		 2632
2633 for (i = 0; i < brd->info->nports; i++) {
2634 brd->vector_mask |= (1 << i);
2635 brd->ports[i].baud_base = 921600;
2636 }
2637
2638 /* mxser_initbrd will hook ISR. */
2639 retval = mxser_initbrd(brd, pdev);
2640 if (retval)
2641 goto err_null;
2642
2643 for (i = 0; i < brd->info->nports; i++)
2644 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2645
2646 pci_set_drvdata(pdev, brd);
2647
2648 return 0;
2649err_relio:
2650 pci_release_region(pdev, 2);
2651err_null:
2652 brd->info = NULL;
2653err:
2654 return retval;
2655#else
2656 return -ENODEV;
2657#endif
1da177e4
LT		 2658}
2659
1c45607a 2660static void __devexit mxser_remove(struct pci_dev *pdev)
1da177e4 2661{
1c45607a
JS		 2662 struct mxser_board *brd = pci_get_drvdata(pdev);
2663 unsigned int i;
1da177e4 2664
1c45607a
JS		 2665 for (i = 0; i < brd->info->nports; i++)
2666 tty_unregister_device(mxvar_sdriver, brd->idx + i);
1da177e4 2667
1c45607a
JS		 2668 mxser_release_res(brd, pdev, 1);
2669 brd->info = NULL;
1da177e4
LT		 2670}
2671
1c45607a
JS		 2672static struct pci_driver mxser_driver = {
2673 .name = "mxser",
2674 .id_table = mxser_pcibrds,
2675 .probe = mxser_probe,
2676 .remove = __devexit_p(mxser_remove)
2677};
2678
2679static int __init mxser_module_init(void)
1da177e4 2680{
1c45607a 2681 struct mxser_board *brd;
1df00924
JS		 2682 unsigned int b, i, m;
2683 int retval;
1da177e4 2684
1c45607a
JS		 2685 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2686 if (!mxvar_sdriver)
2687 return -ENOMEM;
2688
2689 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2690 MXSER_VERSION);
2691
2692 /* Initialize the tty_driver structure */
2693 mxvar_sdriver->owner = THIS_MODULE;
2694 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2695 mxvar_sdriver->name = "ttyMI";
2696 mxvar_sdriver->major = ttymajor;
2697 mxvar_sdriver->minor_start = 0;
2698 mxvar_sdriver->num = MXSER_PORTS + 1;
2699 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2700 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2701 mxvar_sdriver->init_termios = tty_std_termios;
2702 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2703 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2704 tty_set_operations(mxvar_sdriver, &mxser_ops);
2705
2706 retval = tty_register_driver(mxvar_sdriver);
2707 if (retval) {
2708 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2709 "tty driver !\n");
2710 goto err_put;
1da177e4 2711 }
1c45607a 2712
1c45607a 2713 /* Start finding ISA boards here */
1df00924
JS		 2714 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2715 if (!ioaddr[b])
2716 continue;
2717
2718 brd = &mxser_boards[m];
96050dfb 2719 retval = mxser_get_ISA_conf(ioaddr[b], brd);
1df00924
JS		 2720 if (retval <= 0) {
2721 brd->info = NULL;
2722 continue;
2723 }
1c45607a 2724
1df00924
JS		 2725 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2726 brd->info->name, ioaddr[b]);
83766bc6 2727
1df00924
JS		 2728 /* mxser_initbrd will hook ISR. */
2729 if (mxser_initbrd(brd, NULL) < 0) {
2730 brd->info = NULL;
2731 continue;
2732 }
1c45607a 2733
1df00924
JS		 2734 brd->idx = m * MXSER_PORTS_PER_BOARD;
2735 for (i = 0; i < brd->info->nports; i++)
2736 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
1c45607a 2737
1df00924
JS		 2738 m++;
2739 }
1c45607a
JS		 2740
2741 retval = pci_register_driver(&mxser_driver);
2742 if (retval) {
83766bc6 2743 printk(KERN_ERR "mxser: can't register pci driver\n");
1c45607a
JS		 2744 if (!m) {
2745 retval = -ENODEV;
2746 goto err_unr;
2747 } /* else: we have some ISA cards under control */
2748 }
2749
1c45607a
JS		 2750 return 0;
2751err_unr:
2752 tty_unregister_driver(mxvar_sdriver);
2753err_put:
2754 put_tty_driver(mxvar_sdriver);
2755 return retval;
2756}
2757
2758static void __exit mxser_module_exit(void)
2759{
2760 unsigned int i, j;
2761
1c45607a
JS		 2762 pci_unregister_driver(&mxser_driver);
2763
2764 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2765 if (mxser_boards[i].info != NULL)
2766 for (j = 0; j < mxser_boards[i].info->nports; j++)
2767 tty_unregister_device(mxvar_sdriver,
2768 mxser_boards[i].idx + j);
2769 tty_unregister_driver(mxvar_sdriver);
2770 put_tty_driver(mxvar_sdriver);
2771
2772 for (i = 0; i < MXSER_BOARDS; i++)
2773 if (mxser_boards[i].info != NULL)
2774 mxser_release_res(&mxser_boards[i], NULL, 1);
1da177e4
LT		 2775}
2776
2777module_init(mxser_module_init);
2778module_exit(mxser_module_exit);
Clone of davem's net-next-2.6 tree