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1/*
2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24#ifndef _VIA_DRV_H_
25#define _VIA_DRV_H_
26
ce65a44d 27#include "drm_sman.h"
92514243 28#define DRIVER_AUTHOR "Various"
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29
30#define DRIVER_NAME "via"
31#define DRIVER_DESC "VIA Unichrome / Pro"
9b8d9d0e 32#define DRIVER_DATE "20061227"
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33
34#define DRIVER_MAJOR 2
9b8d9d0e 35#define DRIVER_MINOR 11
ce65a44d 36#define DRIVER_PATCHLEVEL 0
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37
38#include "via_verifier.h"
39
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40#include "via_dmablit.h"
41
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42#define VIA_PCI_BUF_SIZE 60000
43#define VIA_FIRE_BUF_SIZE 1024
92514243 44#define VIA_NUM_IRQS 4
22f579c6 45
22f579c6 46typedef struct drm_via_ring_buffer {
92514243 47 drm_local_map_t map;
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48 char *virtual_start;
49} drm_via_ring_buffer_t;
50
51typedef uint32_t maskarray_t[5];
52
53typedef struct drm_via_irq {
54 atomic_t irq_received;
55 uint32_t pending_mask;
56 uint32_t enable_mask;
57 wait_queue_head_t irq_queue;
58} drm_via_irq_t;
b5e89ed5 59
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60typedef struct drm_via_private {
61 drm_via_sarea_t *sarea_priv;
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62 drm_local_map_t *sarea;
63 drm_local_map_t *fb;
64 drm_local_map_t *mmio;
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65 unsigned long agpAddr;
66 wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
67 char *dma_ptr;
68 unsigned int dma_low;
69 unsigned int dma_high;
70 unsigned int dma_offset;
71 uint32_t dma_wrap;
72 volatile uint32_t *last_pause_ptr;
73 volatile uint32_t *hw_addr_ptr;
74 drm_via_ring_buffer_t ring;
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75 struct timeval last_vblank;
76 int last_vblank_valid;
77 unsigned usec_per_vblank;
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78 drm_via_state_t hc_state;
79 char pci_buf[VIA_PCI_BUF_SIZE];
80 const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];
81 uint32_t num_fire_offsets;
689692e7 82 int chipset;
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83 drm_via_irq_t via_irqs[VIA_NUM_IRQS];
84 unsigned num_irqs;
85 maskarray_t *irq_masks;
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86 uint32_t irq_enable_mask;
87 uint32_t irq_pending_mask;
92514243 88 int *irq_map;
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89 unsigned int idle_fault;
90 drm_sman_t sman;
91 int vram_initialized;
92 int agp_initialized;
93 unsigned long vram_offset;
94 unsigned long agp_offset;
92514243 95 drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
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96} drm_via_private_t;
97
92514243 98enum via_family {
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99 VIA_OTHER = 0, /* Baseline */
100 VIA_PRO_GROUP_A, /* Another video engine and DMA commands */
101 VIA_DX9_0 /* Same video as pro_group_a, but 3D is unsupported */
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102};
103
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104/* VIA MMIO register access */
105#define VIA_BASE ((dev_priv->mmio))
106
107#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg)
108#define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val)
109#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg)
110#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val)
111
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112extern drm_ioctl_desc_t via_ioctls[];
113extern int via_max_ioctl;
114
115extern int via_fb_init(DRM_IOCTL_ARGS);
116extern int via_mem_alloc(DRM_IOCTL_ARGS);
117extern int via_mem_free(DRM_IOCTL_ARGS);
118extern int via_agp_init(DRM_IOCTL_ARGS);
119extern int via_map_init(DRM_IOCTL_ARGS);
120extern int via_decoder_futex(DRM_IOCTL_ARGS);
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121extern int via_wait_irq(DRM_IOCTL_ARGS);
122extern int via_dma_blit_sync( DRM_IOCTL_ARGS );
123extern int via_dma_blit( DRM_IOCTL_ARGS );
124
125extern int via_driver_load(drm_device_t *dev, unsigned long chipset);
126extern int via_driver_unload(drm_device_t *dev);
127
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128extern int via_init_context(drm_device_t * dev, int context);
129extern int via_final_context(drm_device_t * dev, int context);
130
131extern int via_do_cleanup_map(drm_device_t * dev);
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132extern int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
133
134extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS);
135extern void via_driver_irq_preinstall(drm_device_t * dev);
136extern void via_driver_irq_postinstall(drm_device_t * dev);
137extern void via_driver_irq_uninstall(drm_device_t * dev);
138
139extern int via_dma_cleanup(drm_device_t * dev);
140extern void via_init_command_verifier(void);
141extern int via_driver_dma_quiescent(drm_device_t * dev);
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142extern void via_init_futex(drm_via_private_t * dev_priv);
143extern void via_cleanup_futex(drm_via_private_t * dev_priv);
144extern void via_release_futex(drm_via_private_t * dev_priv, int context);
22f579c6 145
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146extern void via_reclaim_buffers_locked(drm_device_t *dev, struct file *filp);
147extern void via_lastclose(drm_device_t *dev);
148
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149extern void via_dmablit_handler(drm_device_t *dev, int engine, int from_irq);
150extern void via_init_dmablit(drm_device_t *dev);
b3a83639 151
22f579c6 152#endif