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cciss: fix PCI IDs for new Smart Array controllers
[net-next-2.6.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
405f5571 29#include <linux/smp_lock.h>
1da177e4
LT		 30#include <linux/delay.h>
31#include <linux/major.h>
32#include <linux/fs.h>
33#include <linux/bio.h>
34#include <linux/blkpg.h>
35#include <linux/timer.h>
36#include <linux/proc_fs.h>
89b6e743 37#include <linux/seq_file.h>
7c832835 38#include <linux/init.h>
4d761609 39#include <linux/jiffies.h>
1da177e4
LT		 40#include <linux/hdreg.h>
41#include <linux/spinlock.h>
42#include <linux/compat.h>
b368c9dd 43#include <linux/mutex.h>
1da177e4
LT		 44#include <asm/uaccess.h>
45#include <asm/io.h>
46
eb0df996 47#include <linux/dma-mapping.h>
1da177e4
LT		 48#include <linux/blkdev.h>
49#include <linux/genhd.h>
50#include <linux/completion.h>
d5d3b736 51#include <scsi/scsi.h>
03bbfee5
MMOD		 52#include <scsi/sg.h>
53#include <scsi/scsi_ioctl.h>
54#include <linux/cdrom.h>
231bc2a2 55#include <linux/scatterlist.h>
0a9279cc 56#include <linux/kthread.h>
1da177e4
LT		 57
58#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 59#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
60#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 61
62/* Embedded module documentation macros - see modules.h */
63MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 64MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 65MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
66MODULE_VERSION("3.6.26");
1da177e4
LT		 67MODULE_LICENSE("GPL");
68
2ec24ff1
SC		 69static int cciss_allow_hpsa;
70module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
71MODULE_PARM_DESC(cciss_allow_hpsa,
72 "Prevent cciss driver from accessing hardware known to be "
73 " supported by the hpsa driver");
74
1da177e4
LT		 75#include "cciss_cmd.h"
76#include "cciss.h"
77#include <linux/cciss_ioctl.h>
78
79/* define the PCI info for the cards we can control */
80static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
24aac480
MM		 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
77ca7286
MM		 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
6362beea
MM		 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
1da177e4
LT		 114 {0,}
115};
7c832835 116
1da177e4
LT		 117MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
118
1da177e4
LT		 119/* board_id = Subsystem Device ID & Vendor ID
120 * product = Marketing Name for the board
7c832835 121 * access = Address of the struct of function pointers
1da177e4
LT		 122 */
123static struct board_type products[] = {
49153998
MM		 124 {0x40700E11, "Smart Array 5300", &SA5_access},
125 {0x40800E11, "Smart Array 5i", &SA5B_access},
126 {0x40820E11, "Smart Array 532", &SA5B_access},
127 {0x40830E11, "Smart Array 5312", &SA5B_access},
128 {0x409A0E11, "Smart Array 641", &SA5_access},
129 {0x409B0E11, "Smart Array 642", &SA5_access},
130 {0x409C0E11, "Smart Array 6400", &SA5_access},
131 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
132 {0x40910E11, "Smart Array 6i", &SA5_access},
133 {0x3225103C, "Smart Array P600", &SA5_access},
49153998
MM		 134 {0x3235103C, "Smart Array P400i", &SA5_access},
135 {0x3211103C, "Smart Array E200i", &SA5_access},
136 {0x3212103C, "Smart Array E200", &SA5_access},
137 {0x3213103C, "Smart Array E200i", &SA5_access},
138 {0x3214103C, "Smart Array E200i", &SA5_access},
139 {0x3215103C, "Smart Array E200i", &SA5_access},
140 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 141/* controllers below this line are also supported by the hpsa driver. */
142#define HPSA_BOUNDARY 0x3223103C
143 {0x3223103C, "Smart Array P800", &SA5_access},
144 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 145 {0x323D103C, "Smart Array P700m", &SA5_access},
146 {0x3241103C, "Smart Array P212", &SA5_access},
147 {0x3243103C, "Smart Array P410", &SA5_access},
148 {0x3245103C, "Smart Array P410i", &SA5_access},
149 {0x3247103C, "Smart Array P411", &SA5_access},
150 {0x3249103C, "Smart Array P812", &SA5_access},
77ca7286
MM		 151 {0x324A103C, "Smart Array P712m", &SA5_access},
152 {0x324B103C, "Smart Array P711m", &SA5_access},
6362beea
MM		 153 {0x3350103C, "Smart Array", &SA5_access},
154 {0x3351103C, "Smart Array", &SA5_access},
155 {0x3352103C, "Smart Array", &SA5_access},
156 {0x3353103C, "Smart Array", &SA5_access},
157 {0x3354103C, "Smart Array", &SA5_access},
158 {0x3355103C, "Smart Array", &SA5_access},
1da177e4
LT		 159};
160
d14c4ab5 161/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 162#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 163#define MAX_IOCTL_CONFIG_WAIT 1000
164
165/*define how many times we will try a command because of bus resets */
166#define MAX_CMD_RETRIES 3
167
1da177e4
LT		 168#define MAX_CTLR 32
169
170/* Originally cciss driver only supports 8 major numbers */
171#define MAX_CTLR_ORIG 8
172
1da177e4
LT		 173static ctlr_info_t *hba[MAX_CTLR];
174
b368c9dd
AP		 175static struct task_struct *cciss_scan_thread;
176static DEFINE_MUTEX(scan_mutex);
177static LIST_HEAD(scan_q);
178
165125e1 179static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 180static irqreturn_t do_cciss_intx(int irq, void *dev_id);
181static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 182static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 183static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 184static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 185static int do_ioctl(struct block_device *bdev, fmode_t mode,
186 unsigned int cmd, unsigned long arg);
ef7822c2 187static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 188 unsigned int cmd, unsigned long arg);
a885c8c4 189static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 190
1da177e4 191static int cciss_revalidate(struct gendisk *disk);
2d11d993 192static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 193static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 194 int clear_all, int via_ioctl);
1da177e4 195
f70dba83 196static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 197 sector_t *total_size, unsigned int *block_size);
f70dba83 198static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 199 sector_t *total_size, unsigned int *block_size);
f70dba83 200static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 201 sector_t total_size,
00988a35 202 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 203 drive_info_struct *drv);
dac5488a 204static void __devinit cciss_interrupt_mode(ctlr_info_t *);
7c832835 205static void start_io(ctlr_info_t *h);
f70dba83 206static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 207 __u8 page_code, unsigned char scsi3addr[],
208 int cmd_type);
85cc61ae 209static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
210 int attempt_retry);
211static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 212
d6f4965d 213static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 214static int scan_thread(void *data);
215static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 216static void cciss_hba_release(struct device *dev);
217static void cciss_device_release(struct device *dev);
361e9b07 218static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 219static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 220static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 221static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
222 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
223 u64 *cfg_offset);
224static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
225 unsigned long *memory_bar);
226
33079b21 227
5e216153
MM		 228/* performant mode helper functions */
229static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
230 int *bucket_map);
231static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 232
1da177e4 233#ifdef CONFIG_PROC_FS
f70dba83 234static void cciss_procinit(ctlr_info_t *h);
1da177e4 235#else
f70dba83 236static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 237{
238}
239#endif /* CONFIG_PROC_FS */
1da177e4
LT		 240
241#ifdef CONFIG_COMPAT
ef7822c2
AV		 242static int cciss_compat_ioctl(struct block_device *, fmode_t,
243 unsigned, unsigned long);
1da177e4
LT		 244#endif
245
83d5cde4 246static const struct block_device_operations cciss_fops = {
7c832835 247 .owner = THIS_MODULE,
6e9624b8 248 .open = cciss_unlocked_open,
ef7822c2 249 .release = cciss_release,
8a6cfeb6 250 .ioctl = do_ioctl,
7c832835 251 .getgeo = cciss_getgeo,
1da177e4 252#ifdef CONFIG_COMPAT
ef7822c2 253 .compat_ioctl = cciss_compat_ioctl,
1da177e4 254#endif
7c832835 255 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 256};
257
5e216153
MM		 258/* set_performant_mode: Modify the tag for cciss performant
259 * set bit 0 for pull model, bits 3-1 for block fetch
260 * register number
261 */
262static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
263{
264 if (likely(h->transMethod == CFGTBL_Trans_Performant))
265 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
266}
267
1da177e4
LT		 268/*
269 * Enqueuing and dequeuing functions for cmdlists.
270 */
8a3173de 271static inline void addQ(struct hlist_head *list, CommandList_struct *c)
1da177e4 272{
8a3173de 273 hlist_add_head(&c->list, list);
1da177e4
LT		 274}
275
8a3173de 276static inline void removeQ(CommandList_struct *c)
1da177e4 277{
b59e64d0
HR		 278 /*
279 * After kexec/dump some commands might still
280 * be in flight, which the firmware will try
281 * to complete. Resetting the firmware doesn't work
282 * with old fw revisions, so we have to mark
283 * them off as 'stale' to prevent the driver from
284 * falling over.
285 */
286 if (WARN_ON(hlist_unhashed(&c->list))) {
287 c->cmd_type = CMD_MSG_STALE;
8a3173de 288 return;
b59e64d0 289 }
8a3173de
JA		 290
291 hlist_del_init(&c->list);
1da177e4
LT		 292}
293
664a717d
MM		 294static void enqueue_cmd_and_start_io(ctlr_info_t *h,
295 CommandList_struct *c)
296{
297 unsigned long flags;
5e216153 298 set_performant_mode(h, c);
664a717d
MM		 299 spin_lock_irqsave(&h->lock, flags);
300 addQ(&h->reqQ, c);
301 h->Qdepth++;
302 start_io(h);
303 spin_unlock_irqrestore(&h->lock, flags);
304}
305
dccc9b56 306static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 307 int nr_cmds)
308{
309 int i;
310
311 if (!cmd_sg_list)
312 return;
313 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 314 kfree(cmd_sg_list[i]);
315 cmd_sg_list[i] = NULL;
49fc5601
SC		 316 }
317 kfree(cmd_sg_list);
318}
319
dccc9b56
SC		 320static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
321 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 322{
323 int j;
dccc9b56 324 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 325
326 if (chainsize <= 0)
327 return NULL;
328
329 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
330 if (!cmd_sg_list)
331 return NULL;
332
333 /* Build up chain blocks for each command */
334 for (j = 0; j < nr_cmds; j++) {
49fc5601 335 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 336 cmd_sg_list[j] = kmalloc((chainsize *
337 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
338 if (!cmd_sg_list[j]) {
49fc5601
SC		 339 dev_err(&h->pdev->dev, "Cannot get memory "
340 "for s/g chains.\n");
341 goto clean;
342 }
343 }
344 return cmd_sg_list;
345clean:
346 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
347 return NULL;
348}
349
d45033ef
SC		 350static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
351{
352 SGDescriptor_struct *chain_sg;
353 u64bit temp64;
354
355 if (c->Header.SGTotal <= h->max_cmd_sgentries)
356 return;
357
358 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
359 temp64.val32.lower = chain_sg->Addr.lower;
360 temp64.val32.upper = chain_sg->Addr.upper;
361 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
362}
363
364static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
365 SGDescriptor_struct *chain_block, int len)
366{
367 SGDescriptor_struct *chain_sg;
368 u64bit temp64;
369
370 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
371 chain_sg->Ext = CCISS_SG_CHAIN;
372 chain_sg->Len = len;
373 temp64.val = pci_map_single(h->pdev, chain_block, len,
374 PCI_DMA_TODEVICE);
375 chain_sg->Addr.lower = temp64.val32.lower;
376 chain_sg->Addr.upper = temp64.val32.upper;
377}
378
1da177e4
LT		 379#include "cciss_scsi.c" /* For SCSI tape support */
380
1e6f2dc1
AB		 381static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
382 "UNKNOWN"
383};
0e4a9d03 384#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 385
1da177e4
LT		 386#ifdef CONFIG_PROC_FS
387
388/*
389 * Report information about this controller.
390 */
391#define ENG_GIG 1000000000
392#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 393#define ENGAGE_SCSI "engage scsi"
1da177e4
LT		 394
395static struct proc_dir_entry *proc_cciss;
396
89b6e743 397static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 398{
89b6e743
MM		 399 ctlr_info_t *h = seq->private;
400
401 seq_printf(seq, "%s: HP %s Controller\n"
402 "Board ID: 0x%08lx\n"
403 "Firmware Version: %c%c%c%c\n"
404 "IRQ: %d\n"
405 "Logical drives: %d\n"
406 "Current Q depth: %d\n"
407 "Current # commands on controller: %d\n"
408 "Max Q depth since init: %d\n"
409 "Max # commands on controller since init: %d\n"
410 "Max SG entries since init: %d\n",
411 h->devname,
412 h->product_name,
413 (unsigned long)h->board_id,
414 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
5e216153 415 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
89b6e743
MM		 416 h->num_luns,
417 h->Qdepth, h->commands_outstanding,
418 h->maxQsinceinit, h->max_outstanding, h->maxSG);
419
420#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 421 cciss_seq_tape_report(seq, h);
89b6e743
MM		 422#endif /* CONFIG_CISS_SCSI_TAPE */
423}
1da177e4 424
89b6e743
MM		 425static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
426{
427 ctlr_info_t *h = seq->private;
89b6e743 428 unsigned long flags;
1da177e4
LT		 429
430 /* prevent displaying bogus info during configuration
431 * or deconfiguration of a logical volume
432 */
f70dba83 433 spin_lock_irqsave(&h->lock, flags);
1da177e4 434 if (h->busy_configuring) {
f70dba83 435 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 436 return ERR_PTR(-EBUSY);
1da177e4
LT		 437 }
438 h->busy_configuring = 1;
f70dba83 439 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 440
89b6e743
MM		 441 if (*pos == 0)
442 cciss_seq_show_header(seq);
443
444 return pos;
445}
446
447static int cciss_seq_show(struct seq_file *seq, void *v)
448{
449 sector_t vol_sz, vol_sz_frac;
450 ctlr_info_t *h = seq->private;
451 unsigned ctlr = h->ctlr;
452 loff_t *pos = v;
9cef0d2f 453 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 454
455 if (*pos > h->highest_lun)
456 return 0;
457
531c2dc7
SC		 458 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
459 return 0;
460
89b6e743
MM		 461 if (drv->heads == 0)
462 return 0;
463
464 vol_sz = drv->nr_blocks;
465 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
466 vol_sz_frac *= 100;
467 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
468
fa52bec9 469 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 470 drv->raid_level = RAID_UNKNOWN;
471 seq_printf(seq, "cciss/c%dd%d:"
472 "\t%4u.%02uGB\tRAID %s\n",
473 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
474 raid_label[drv->raid_level]);
475 return 0;
476}
477
478static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
479{
480 ctlr_info_t *h = seq->private;
481
482 if (*pos > h->highest_lun)
483 return NULL;
484 *pos += 1;
485
486 return pos;
487}
488
489static void cciss_seq_stop(struct seq_file *seq, void *v)
490{
491 ctlr_info_t *h = seq->private;
492
493 /* Only reset h->busy_configuring if we succeeded in setting
494 * it during cciss_seq_start. */
495 if (v == ERR_PTR(-EBUSY))
496 return;
7c832835 497
1da177e4 498 h->busy_configuring = 0;
1da177e4
LT		 499}
500
88e9d34c 501static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 502 .start = cciss_seq_start,
503 .show = cciss_seq_show,
504 .next = cciss_seq_next,
505 .stop = cciss_seq_stop,
506};
507
508static int cciss_seq_open(struct inode *inode, struct file *file)
509{
510 int ret = seq_open(file, &cciss_seq_ops);
511 struct seq_file *seq = file->private_data;
512
513 if (!ret)
514 seq->private = PDE(inode)->data;
515
516 return ret;
517}
518
519static ssize_t
520cciss_proc_write(struct file *file, const char __user *buf,
521 size_t length, loff_t *ppos)
1da177e4 522{
89b6e743
MM		 523 int err;
524 char *buffer;
525
526#ifndef CONFIG_CISS_SCSI_TAPE
527 return -EINVAL;
1da177e4
LT		 528#endif
529
89b6e743 530 if (!buf || length > PAGE_SIZE - 1)
7c832835 531 return -EINVAL;
89b6e743
MM		 532
533 buffer = (char *)__get_free_page(GFP_KERNEL);
534 if (!buffer)
535 return -ENOMEM;
536
537 err = -EFAULT;
538 if (copy_from_user(buffer, buf, length))
539 goto out;
540 buffer[length] = '\0';
541
542#ifdef CONFIG_CISS_SCSI_TAPE
543 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
544 struct seq_file *seq = file->private_data;
545 ctlr_info_t *h = seq->private;
89b6e743 546
f70dba83 547 err = cciss_engage_scsi(h);
8721c81f 548 if (err == 0)
89b6e743
MM		 549 err = length;
550 } else
551#endif /* CONFIG_CISS_SCSI_TAPE */
552 err = -EINVAL;
7c832835
BH		 553 /* might be nice to have "disengage" too, but it's not
554 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 555
556out:
557 free_page((unsigned long)buffer);
558 return err;
1da177e4
LT		 559}
560
828c0950 561static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 562 .owner = THIS_MODULE,
563 .open = cciss_seq_open,
564 .read = seq_read,
565 .llseek = seq_lseek,
566 .release = seq_release,
567 .write = cciss_proc_write,
568};
569
f70dba83 570static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 571{
572 struct proc_dir_entry *pde;
573
89b6e743 574 if (proc_cciss == NULL)
928b4d8c 575 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 576 if (!proc_cciss)
577 return;
f70dba83 578 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 579 S_IROTH, proc_cciss,
f70dba83 580 &cciss_proc_fops, h);
1da177e4 581}
7c832835 582#endif /* CONFIG_PROC_FS */
1da177e4 583
7fe06326
AP		 584#define MAX_PRODUCT_NAME_LEN 19
585
586#define to_hba(n) container_of(n, struct ctlr_info, dev)
587#define to_drv(n) container_of(n, drive_info_struct, dev)
588
d6f4965d
AP		 589static ssize_t host_store_rescan(struct device *dev,
590 struct device_attribute *attr,
591 const char *buf, size_t count)
592{
593 struct ctlr_info *h = to_hba(dev);
594
595 add_to_scan_list(h);
596 wake_up_process(cciss_scan_thread);
597 wait_for_completion_interruptible(&h->scan_wait);
598
599 return count;
600}
8ba95c69 601static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP		 602
603static ssize_t dev_show_unique_id(struct device *dev,
604 struct device_attribute *attr,
605 char *buf)
606{
607 drive_info_struct *drv = to_drv(dev);
608 struct ctlr_info *h = to_hba(drv->dev.parent);
609 __u8 sn[16];
610 unsigned long flags;
611 int ret = 0;
612
f70dba83 613 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 614 if (h->busy_configuring)
615 ret = -EBUSY;
616 else
617 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 618 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 619
620 if (ret)
621 return ret;
622 else
623 return snprintf(buf, 16 * 2 + 2,
624 "%02X%02X%02X%02X%02X%02X%02X%02X"
625 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
626 sn[0], sn[1], sn[2], sn[3],
627 sn[4], sn[5], sn[6], sn[7],
628 sn[8], sn[9], sn[10], sn[11],
629 sn[12], sn[13], sn[14], sn[15]);
630}
8ba95c69 631static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 632
633static ssize_t dev_show_vendor(struct device *dev,
634 struct device_attribute *attr,
635 char *buf)
636{
637 drive_info_struct *drv = to_drv(dev);
638 struct ctlr_info *h = to_hba(drv->dev.parent);
639 char vendor[VENDOR_LEN + 1];
640 unsigned long flags;
641 int ret = 0;
642
f70dba83 643 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 644 if (h->busy_configuring)
645 ret = -EBUSY;
646 else
647 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 648 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 649
650 if (ret)
651 return ret;
652 else
653 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
654}
8ba95c69 655static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 656
657static ssize_t dev_show_model(struct device *dev,
658 struct device_attribute *attr,
659 char *buf)
660{
661 drive_info_struct *drv = to_drv(dev);
662 struct ctlr_info *h = to_hba(drv->dev.parent);
663 char model[MODEL_LEN + 1];
664 unsigned long flags;
665 int ret = 0;
666
f70dba83 667 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 668 if (h->busy_configuring)
669 ret = -EBUSY;
670 else
671 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 672 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 673
674 if (ret)
675 return ret;
676 else
677 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
678}
8ba95c69 679static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 680
681static ssize_t dev_show_rev(struct device *dev,
682 struct device_attribute *attr,
683 char *buf)
684{
685 drive_info_struct *drv = to_drv(dev);
686 struct ctlr_info *h = to_hba(drv->dev.parent);
687 char rev[REV_LEN + 1];
688 unsigned long flags;
689 int ret = 0;
690
f70dba83 691 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 692 if (h->busy_configuring)
693 ret = -EBUSY;
694 else
695 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 696 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 697
698 if (ret)
699 return ret;
700 else
701 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
702}
8ba95c69 703static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 704
ce84a8ae
SC		 705static ssize_t cciss_show_lunid(struct device *dev,
706 struct device_attribute *attr, char *buf)
707{
9cef0d2f
SC		 708 drive_info_struct *drv = to_drv(dev);
709 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 710 unsigned long flags;
711 unsigned char lunid[8];
712
f70dba83 713 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 714 if (h->busy_configuring) {
f70dba83 715 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 716 return -EBUSY;
717 }
718 if (!drv->heads) {
f70dba83 719 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 720 return -ENOTTY;
721 }
722 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 723 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 724 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
725 lunid[0], lunid[1], lunid[2], lunid[3],
726 lunid[4], lunid[5], lunid[6], lunid[7]);
727}
8ba95c69 728static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 729
3ff1111d
SC		 730static ssize_t cciss_show_raid_level(struct device *dev,
731 struct device_attribute *attr, char *buf)
732{
9cef0d2f
SC		 733 drive_info_struct *drv = to_drv(dev);
734 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 735 int raid;
736 unsigned long flags;
737
f70dba83 738 spin_lock_irqsave(&h->lock, flags);
3ff1111d 739 if (h->busy_configuring) {
f70dba83 740 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 741 return -EBUSY;
742 }
743 raid = drv->raid_level;
f70dba83 744 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 745 if (raid < 0 || raid > RAID_UNKNOWN)
746 raid = RAID_UNKNOWN;
747
748 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
749 raid_label[raid]);
750}
8ba95c69 751static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 752
e272afec
SC		 753static ssize_t cciss_show_usage_count(struct device *dev,
754 struct device_attribute *attr, char *buf)
755{
9cef0d2f
SC		 756 drive_info_struct *drv = to_drv(dev);
757 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 758 unsigned long flags;
759 int count;
760
f70dba83 761 spin_lock_irqsave(&h->lock, flags);
e272afec 762 if (h->busy_configuring) {
f70dba83 763 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 764 return -EBUSY;
765 }
766 count = drv->usage_count;
f70dba83 767 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 768 return snprintf(buf, 20, "%d\n", count);
769}
8ba95c69 770static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 771
d6f4965d
AP		 772static struct attribute *cciss_host_attrs[] = {
773 &dev_attr_rescan.attr,
774 NULL
775};
776
777static struct attribute_group cciss_host_attr_group = {
778 .attrs = cciss_host_attrs,
779};
780
9f792d9f 781static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 782 &cciss_host_attr_group,
783 NULL
784};
785
786static struct device_type cciss_host_type = {
787 .name = "cciss_host",
788 .groups = cciss_host_attr_groups,
617e1344 789 .release = cciss_hba_release,
d6f4965d
AP		 790};
791
7fe06326
AP		 792static struct attribute *cciss_dev_attrs[] = {
793 &dev_attr_unique_id.attr,
794 &dev_attr_model.attr,
795 &dev_attr_vendor.attr,
796 &dev_attr_rev.attr,
ce84a8ae 797 &dev_attr_lunid.attr,
3ff1111d 798 &dev_attr_raid_level.attr,
e272afec 799 &dev_attr_usage_count.attr,
7fe06326
AP		 800 NULL
801};
802
803static struct attribute_group cciss_dev_attr_group = {
804 .attrs = cciss_dev_attrs,
805};
806
a4dbd674 807static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 808 &cciss_dev_attr_group,
809 NULL
810};
811
812static struct device_type cciss_dev_type = {
813 .name = "cciss_device",
814 .groups = cciss_dev_attr_groups,
617e1344 815 .release = cciss_device_release,
7fe06326
AP		 816};
817
818static struct bus_type cciss_bus_type = {
819 .name = "cciss",
820};
821
617e1344
SC		 822/*
823 * cciss_hba_release is called when the reference count
824 * of h->dev goes to zero.
825 */
826static void cciss_hba_release(struct device *dev)
827{
828 /*
829 * nothing to do, but need this to avoid a warning
830 * about not having a release handler from lib/kref.c.
831 */
832}
7fe06326
AP		 833
834/*
835 * Initialize sysfs entry for each controller. This sets up and registers
836 * the 'cciss#' directory for each individual controller under
837 * /sys/bus/pci/devices/<dev>/.
838 */
839static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
840{
841 device_initialize(&h->dev);
842 h->dev.type = &cciss_host_type;
843 h->dev.bus = &cciss_bus_type;
844 dev_set_name(&h->dev, "%s", h->devname);
845 h->dev.parent = &h->pdev->dev;
846
847 return device_add(&h->dev);
848}
849
850/*
851 * Remove sysfs entries for an hba.
852 */
853static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
854{
855 device_del(&h->dev);
617e1344
SC		 856 put_device(&h->dev); /* final put. */
857}
858
859/* cciss_device_release is called when the reference count
9cef0d2f 860 * of h->drv[x]dev goes to zero.
617e1344
SC		 861 */
862static void cciss_device_release(struct device *dev)
863{
9cef0d2f
SC		 864 drive_info_struct *drv = to_drv(dev);
865 kfree(drv);
7fe06326
AP		 866}
867
868/*
869 * Initialize sysfs for each logical drive. This sets up and registers
870 * the 'c#d#' directory for each individual logical drive under
871 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
872 * /sys/block/cciss!c#d# to this entry.
873 */
617e1344 874static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 875 int drv_index)
876{
617e1344
SC		 877 struct device *dev;
878
9cef0d2f 879 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 880 return 0;
881
9cef0d2f 882 dev = &h->drv[drv_index]->dev;
617e1344
SC		 883 device_initialize(dev);
884 dev->type = &cciss_dev_type;
885 dev->bus = &cciss_bus_type;
886 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
887 dev->parent = &h->dev;
9cef0d2f 888 h->drv[drv_index]->device_initialized = 1;
617e1344 889 return device_add(dev);
7fe06326
AP		 890}
891
892/*
893 * Remove sysfs entries for a logical drive.
894 */
8ce51966
SC		 895static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
896 int ctlr_exiting)
7fe06326 897{
9cef0d2f 898 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 899
900 /* special case for c*d0, we only destroy it on controller exit */
901 if (drv_index == 0 && !ctlr_exiting)
902 return;
903
617e1344
SC		 904 device_del(dev);
905 put_device(dev); /* the "final" put. */
9cef0d2f 906 h->drv[drv_index] = NULL;
7fe06326
AP		 907}
908
7c832835
BH		 909/*
910 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 911 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 912 * which ones are free or in use.
7c832835 913 */
6b4d96b8 914static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 915{
916 CommandList_struct *c;
7c832835 917 int i;
1da177e4
LT		 918 u64bit temp64;
919 dma_addr_t cmd_dma_handle, err_dma_handle;
920
6b4d96b8
SC		 921 do {
922 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
923 if (i == h->nr_cmds)
7c832835 924 return NULL;
6b4d96b8
SC		 925 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
926 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 927 c = h->cmd_pool + i;
928 memset(c, 0, sizeof(CommandList_struct));
929 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
930 c->err_info = h->errinfo_pool + i;
931 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
932 err_dma_handle = h->errinfo_pool_dhandle
933 + i * sizeof(ErrorInfo_struct);
934 h->nr_allocs++;
1da177e4 935
6b4d96b8 936 c->cmdindex = i;
33079b21 937
6b4d96b8
SC		 938 INIT_HLIST_NODE(&c->list);
939 c->busaddr = (__u32) cmd_dma_handle;
940 temp64.val = (__u64) err_dma_handle;
941 c->ErrDesc.Addr.lower = temp64.val32.lower;
942 c->ErrDesc.Addr.upper = temp64.val32.upper;
943 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 944
6b4d96b8
SC		 945 c->ctlr = h->ctlr;
946 return c;
947}
33079b21 948
6b4d96b8
SC		 949/* allocate a command using pci_alloc_consistent, used for ioctls,
950 * etc., not for the main i/o path.
951 */
952static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
953{
954 CommandList_struct *c;
955 u64bit temp64;
956 dma_addr_t cmd_dma_handle, err_dma_handle;
957
958 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
959 sizeof(CommandList_struct), &cmd_dma_handle);
960 if (c == NULL)
961 return NULL;
962 memset(c, 0, sizeof(CommandList_struct));
963
964 c->cmdindex = -1;
965
966 c->err_info = (ErrorInfo_struct *)
967 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
968 &err_dma_handle);
969
970 if (c->err_info == NULL) {
971 pci_free_consistent(h->pdev,
972 sizeof(CommandList_struct), c, cmd_dma_handle);
973 return NULL;
7c832835 974 }
6b4d96b8 975 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 976
8a3173de 977 INIT_HLIST_NODE(&c->list);
1da177e4 978 c->busaddr = (__u32) cmd_dma_handle;
7c832835 979 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 980 c->ErrDesc.Addr.lower = temp64.val32.lower;
981 c->ErrDesc.Addr.upper = temp64.val32.upper;
982 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 983
7c832835
BH		 984 c->ctlr = h->ctlr;
985 return c;
1da177e4
LT		 986}
987
6b4d96b8 988static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 989{
990 int i;
6b4d96b8
SC		 991
992 i = c - h->cmd_pool;
993 clear_bit(i & (BITS_PER_LONG - 1),
994 h->cmd_pool_bits + (i / BITS_PER_LONG));
995 h->nr_frees++;
996}
997
998static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
999{
1da177e4
LT		 1000 u64bit temp64;
1001
6b4d96b8
SC		 1002 temp64.val32.lower = c->ErrDesc.Addr.lower;
1003 temp64.val32.upper = c->ErrDesc.Addr.upper;
1004 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1005 c->err_info, (dma_addr_t) temp64.val);
1006 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
1007 c, (dma_addr_t) c->busaddr);
1da177e4
LT		 1008}
1009
1010static inline ctlr_info_t *get_host(struct gendisk *disk)
1011{
7c832835 1012 return disk->queue->queuedata;
1da177e4
LT		 1013}
1014
1015static inline drive_info_struct *get_drv(struct gendisk *disk)
1016{
1017 return disk->private_data;
1018}
1019
1020/*
1021 * Open. Make sure the device is really there.
1022 */
ef7822c2 1023static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1024{
f70dba83 1025 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1026 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1027
b2a4a43d 1028 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1029 if (drv->busy_configuring)
ddd47442 1030 return -EBUSY;
1da177e4
LT		 1031 /*
1032 * Root is allowed to open raw volume zero even if it's not configured
1033 * so array config can still work. Root is also allowed to open any
1034 * volume that has a LUN ID, so it can issue IOCTL to reread the
1035 * disk information. I don't think I really like this
1036 * but I'm already using way to many device nodes to claim another one
1037 * for "raw controller".
1038 */
7a06f789 1039 if (drv->heads == 0) {
ef7822c2 1040 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1041 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1042 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1043 return -ENXIO;
1da177e4 1044 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1045 } else if (memcmp(drv->LunID, CTLR_LUNID,
1046 sizeof(drv->LunID))) {
1da177e4
LT		 1047 return -ENXIO;
1048 }
1049 }
1050 if (!capable(CAP_SYS_ADMIN))
1051 return -EPERM;
1052 }
1053 drv->usage_count++;
f70dba83 1054 h->usage_count++;
1da177e4
LT		 1055 return 0;
1056}
7c832835 1057
6e9624b8
AB		 1058static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1059{
1060 int ret;
1061
1062 lock_kernel();
1063 ret = cciss_open(bdev, mode);
1064 unlock_kernel();
1065
1066 return ret;
1067}
1068
1da177e4
LT		 1069/*
1070 * Close. Sync first.
1071 */
ef7822c2 1072static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1073{
f70dba83 1074 ctlr_info_t *h;
6e9624b8 1075 drive_info_struct *drv;
1da177e4 1076
6e9624b8 1077 lock_kernel();
f70dba83 1078 h = get_host(disk);
6e9624b8 1079 drv = get_drv(disk);
b2a4a43d 1080 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1081 drv->usage_count--;
f70dba83 1082 h->usage_count--;
6e9624b8 1083 unlock_kernel();
1da177e4
LT		 1084 return 0;
1085}
1086
ef7822c2
AV		 1087static int do_ioctl(struct block_device *bdev, fmode_t mode,
1088 unsigned cmd, unsigned long arg)
1da177e4
LT		 1089{
1090 int ret;
1091 lock_kernel();
ef7822c2 1092 ret = cciss_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1093 unlock_kernel();
1094 return ret;
1095}
1096
8a6cfeb6
AB		 1097#ifdef CONFIG_COMPAT
1098
ef7822c2
AV		 1099static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1100 unsigned cmd, unsigned long arg);
1101static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1102 unsigned cmd, unsigned long arg);
1da177e4 1103
ef7822c2
AV		 1104static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1105 unsigned cmd, unsigned long arg)
1da177e4
LT		 1106{
1107 switch (cmd) {
1108 case CCISS_GETPCIINFO:
1109 case CCISS_GETINTINFO:
1110 case CCISS_SETINTINFO:
1111 case CCISS_GETNODENAME:
1112 case CCISS_SETNODENAME:
1113 case CCISS_GETHEARTBEAT:
1114 case CCISS_GETBUSTYPES:
1115 case CCISS_GETFIRMVER:
1116 case CCISS_GETDRIVVER:
1117 case CCISS_REVALIDVOLS:
1118 case CCISS_DEREGDISK:
1119 case CCISS_REGNEWDISK:
1120 case CCISS_REGNEWD:
1121 case CCISS_RESCANDISK:
1122 case CCISS_GETLUNINFO:
ef7822c2 1123 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1124
1125 case CCISS_PASSTHRU32:
ef7822c2 1126 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1127 case CCISS_BIG_PASSTHRU32:
ef7822c2 1128 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1129
1130 default:
1131 return -ENOIOCTLCMD;
1132 }
1133}
1134
ef7822c2
AV		 1135static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1136 unsigned cmd, unsigned long arg)
1da177e4
LT		 1137{
1138 IOCTL32_Command_struct __user *arg32 =
7c832835 1139 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1140 IOCTL_Command_struct arg64;
1141 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1142 int err;
1143 u32 cp;
1144
1145 err = 0;
7c832835
BH		 1146 err |=
1147 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1148 sizeof(arg64.LUN_info));
1149 err |=
1150 copy_from_user(&arg64.Request, &arg32->Request,
1151 sizeof(arg64.Request));
1152 err |=
1153 copy_from_user(&arg64.error_info, &arg32->error_info,
1154 sizeof(arg64.error_info));
1da177e4
LT		 1155 err |= get_user(arg64.buf_size, &arg32->buf_size);
1156 err |= get_user(cp, &arg32->buf);
1157 arg64.buf = compat_ptr(cp);
1158 err |= copy_to_user(p, &arg64, sizeof(arg64));
1159
1160 if (err)
1161 return -EFAULT;
1162
ef7822c2 1163 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1164 if (err)
1165 return err;
7c832835
BH		 1166 err |=
1167 copy_in_user(&arg32->error_info, &p->error_info,
1168 sizeof(arg32->error_info));
1da177e4
LT		 1169 if (err)
1170 return -EFAULT;
1171 return err;
1172}
1173
ef7822c2
AV		 1174static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1175 unsigned cmd, unsigned long arg)
1da177e4
LT		 1176{
1177 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1178 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1179 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1180 BIG_IOCTL_Command_struct __user *p =
1181 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1182 int err;
1183 u32 cp;
1184
1185 err = 0;
7c832835
BH		 1186 err |=
1187 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1188 sizeof(arg64.LUN_info));
1189 err |=
1190 copy_from_user(&arg64.Request, &arg32->Request,
1191 sizeof(arg64.Request));
1192 err |=
1193 copy_from_user(&arg64.error_info, &arg32->error_info,
1194 sizeof(arg64.error_info));
1da177e4
LT		 1195 err |= get_user(arg64.buf_size, &arg32->buf_size);
1196 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1197 err |= get_user(cp, &arg32->buf);
1198 arg64.buf = compat_ptr(cp);
1199 err |= copy_to_user(p, &arg64, sizeof(arg64));
1200
1201 if (err)
7c832835 1202 return -EFAULT;
1da177e4 1203
ef7822c2 1204 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1205 if (err)
1206 return err;
7c832835
BH		 1207 err |=
1208 copy_in_user(&arg32->error_info, &p->error_info,
1209 sizeof(arg32->error_info));
1da177e4
LT		 1210 if (err)
1211 return -EFAULT;
1212 return err;
1213}
1214#endif
a885c8c4
CH		 1215
1216static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1217{
1218 drive_info_struct *drv = get_drv(bdev->bd_disk);
1219
1220 if (!drv->cylinders)
1221 return -ENXIO;
1222
1223 geo->heads = drv->heads;
1224 geo->sectors = drv->sectors;
1225 geo->cylinders = drv->cylinders;
1226 return 0;
1227}
1228
f70dba83 1229static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1230{
1231 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1232 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1233 (void)check_for_unit_attention(h, c);
0a9279cc 1234}
0a25a5ae
SC		 1235
1236static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1237{
1238 cciss_pci_info_struct pciinfo;
1239
1240 if (!argp)
1241 return -EINVAL;
1242 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1243 pciinfo.bus = h->pdev->bus->number;
1244 pciinfo.dev_fn = h->pdev->devfn;
1245 pciinfo.board_id = h->board_id;
1246 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1247 return -EFAULT;
1248 return 0;
1249}
1250
576e661c
SC		 1251static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1252{
1253 cciss_coalint_struct intinfo;
1254
1255 if (!argp)
1256 return -EINVAL;
1257 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1258 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1259 if (copy_to_user
1260 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1261 return -EFAULT;
1262 return 0;
1263}
1264
4c800eed
SC		 1265static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1266{
1267 cciss_coalint_struct intinfo;
1268 unsigned long flags;
1269 int i;
1270
1271 if (!argp)
1272 return -EINVAL;
1273 if (!capable(CAP_SYS_ADMIN))
1274 return -EPERM;
1275 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1276 return -EFAULT;
1277 if ((intinfo.delay == 0) && (intinfo.count == 0))
1278 return -EINVAL;
1279 spin_lock_irqsave(&h->lock, flags);
1280 /* Update the field, and then ring the doorbell */
1281 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1282 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1283 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1284
1285 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1286 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1287 break;
1288 udelay(1000); /* delay and try again */
1289 }
1290 spin_unlock_irqrestore(&h->lock, flags);
1291 if (i >= MAX_IOCTL_CONFIG_WAIT)
1292 return -EAGAIN;
1293 return 0;
1294}
1295
25216109
SC		 1296static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1297{
1298 NodeName_type NodeName;
1299 int i;
1300
1301 if (!argp)
1302 return -EINVAL;
1303 for (i = 0; i < 16; i++)
1304 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1305 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1306 return -EFAULT;
1307 return 0;
1308}
1309
4f43f32c
SC		 1310static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1311{
1312 NodeName_type NodeName;
1313 unsigned long flags;
1314 int i;
1315
1316 if (!argp)
1317 return -EINVAL;
1318 if (!capable(CAP_SYS_ADMIN))
1319 return -EPERM;
1320 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1321 return -EFAULT;
1322 spin_lock_irqsave(&h->lock, flags);
1323 /* Update the field, and then ring the doorbell */
1324 for (i = 0; i < 16; i++)
1325 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1326 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1327 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1328 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1329 break;
1330 udelay(1000); /* delay and try again */
1331 }
1332 spin_unlock_irqrestore(&h->lock, flags);
1333 if (i >= MAX_IOCTL_CONFIG_WAIT)
1334 return -EAGAIN;
1335 return 0;
1336}
1337
93c74931
SC		 1338static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1339{
1340 Heartbeat_type heartbeat;
1341
1342 if (!argp)
1343 return -EINVAL;
1344 heartbeat = readl(&h->cfgtable->HeartBeat);
1345 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1346 return -EFAULT;
1347 return 0;
1348}
1349
d18dfad4
SC		 1350static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1351{
1352 BusTypes_type BusTypes;
1353
1354 if (!argp)
1355 return -EINVAL;
1356 BusTypes = readl(&h->cfgtable->BusTypes);
1357 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1358 return -EFAULT;
1359 return 0;
1360}
1361
8a4f7fbf
SC		 1362static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1363{
1364 FirmwareVer_type firmware;
1365
1366 if (!argp)
1367 return -EINVAL;
1368 memcpy(firmware, h->firm_ver, 4);
1369
1370 if (copy_to_user
1371 (argp, firmware, sizeof(FirmwareVer_type)))
1372 return -EFAULT;
1373 return 0;
1374}
1375
c525919d
SC		 1376static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1377{
1378 DriverVer_type DriverVer = DRIVER_VERSION;
1379
1380 if (!argp)
1381 return -EINVAL;
1382 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1383 return -EFAULT;
1384 return 0;
1385}
1386
0894b32c
SC		 1387static int cciss_getluninfo(ctlr_info_t *h,
1388 struct gendisk *disk, void __user *argp)
1389{
1390 LogvolInfo_struct luninfo;
1391 drive_info_struct *drv = get_drv(disk);
1392
1393 if (!argp)
1394 return -EINVAL;
1395 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1396 luninfo.num_opens = drv->usage_count;
1397 luninfo.num_parts = 0;
1398 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1399 return -EFAULT;
1400 return 0;
1401}
1402
f32f125b
SC		 1403static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1404{
1405 IOCTL_Command_struct iocommand;
1406 CommandList_struct *c;
1407 char *buff = NULL;
1408 u64bit temp64;
1409 DECLARE_COMPLETION_ONSTACK(wait);
1410
1411 if (!argp)
1412 return -EINVAL;
1413
1414 if (!capable(CAP_SYS_RAWIO))
1415 return -EPERM;
1416
1417 if (copy_from_user
1418 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1419 return -EFAULT;
1420 if ((iocommand.buf_size < 1) &&
1421 (iocommand.Request.Type.Direction != XFER_NONE)) {
1422 return -EINVAL;
1423 }
1424 if (iocommand.buf_size > 0) {
1425 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1426 if (buff == NULL)
1427 return -EFAULT;
1428 }
1429 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1430 /* Copy the data into the buffer we created */
1431 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1432 kfree(buff);
1433 return -EFAULT;
1434 }
1435 } else {
1436 memset(buff, 0, iocommand.buf_size);
1437 }
1438 c = cmd_special_alloc(h);
1439 if (!c) {
1440 kfree(buff);
1441 return -ENOMEM;
1442 }
1443 /* Fill in the command type */
1444 c->cmd_type = CMD_IOCTL_PEND;
1445 /* Fill in Command Header */
1446 c->Header.ReplyQueue = 0; /* unused in simple mode */
1447 if (iocommand.buf_size > 0) { /* buffer to fill */
1448 c->Header.SGList = 1;
1449 c->Header.SGTotal = 1;
1450 } else { /* no buffers to fill */
1451 c->Header.SGList = 0;
1452 c->Header.SGTotal = 0;
1453 }
1454 c->Header.LUN = iocommand.LUN_info;
1455 /* use the kernel address the cmd block for tag */
1456 c->Header.Tag.lower = c->busaddr;
1457
1458 /* Fill in Request block */
1459 c->Request = iocommand.Request;
1460
1461 /* Fill in the scatter gather information */
1462 if (iocommand.buf_size > 0) {
1463 temp64.val = pci_map_single(h->pdev, buff,
1464 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1465 c->SG[0].Addr.lower = temp64.val32.lower;
1466 c->SG[0].Addr.upper = temp64.val32.upper;
1467 c->SG[0].Len = iocommand.buf_size;
1468 c->SG[0].Ext = 0; /* we are not chaining */
1469 }
1470 c->waiting = &wait;
1471
1472 enqueue_cmd_and_start_io(h, c);
1473 wait_for_completion(&wait);
1474
1475 /* unlock the buffers from DMA */
1476 temp64.val32.lower = c->SG[0].Addr.lower;
1477 temp64.val32.upper = c->SG[0].Addr.upper;
1478 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1479 PCI_DMA_BIDIRECTIONAL);
1480 check_ioctl_unit_attention(h, c);
1481
1482 /* Copy the error information out */
1483 iocommand.error_info = *(c->err_info);
1484 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1485 kfree(buff);
1486 cmd_special_free(h, c);
1487 return -EFAULT;
1488 }
1489
1490 if (iocommand.Request.Type.Direction == XFER_READ) {
1491 /* Copy the data out of the buffer we created */
1492 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1493 kfree(buff);
1494 cmd_special_free(h, c);
1495 return -EFAULT;
1496 }
1497 }
1498 kfree(buff);
1499 cmd_special_free(h, c);
1500 return 0;
1501}
1502
0c9f5ba7
SC		 1503static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1504{
1505 BIG_IOCTL_Command_struct *ioc;
1506 CommandList_struct *c;
1507 unsigned char **buff = NULL;
1508 int *buff_size = NULL;
1509 u64bit temp64;
1510 BYTE sg_used = 0;
1511 int status = 0;
1512 int i;
1513 DECLARE_COMPLETION_ONSTACK(wait);
1514 __u32 left;
1515 __u32 sz;
1516 BYTE __user *data_ptr;
1517
1518 if (!argp)
1519 return -EINVAL;
1520 if (!capable(CAP_SYS_RAWIO))
1521 return -EPERM;
1522 ioc = (BIG_IOCTL_Command_struct *)
1523 kmalloc(sizeof(*ioc), GFP_KERNEL);
1524 if (!ioc) {
1525 status = -ENOMEM;
1526 goto cleanup1;
1527 }
1528 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1529 status = -EFAULT;
1530 goto cleanup1;
1531 }
1532 if ((ioc->buf_size < 1) &&
1533 (ioc->Request.Type.Direction != XFER_NONE)) {
1534 status = -EINVAL;
1535 goto cleanup1;
1536 }
1537 /* Check kmalloc limits using all SGs */
1538 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1539 status = -EINVAL;
1540 goto cleanup1;
1541 }
1542 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1543 status = -EINVAL;
1544 goto cleanup1;
1545 }
1546 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1547 if (!buff) {
1548 status = -ENOMEM;
1549 goto cleanup1;
1550 }
1551 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1552 if (!buff_size) {
1553 status = -ENOMEM;
1554 goto cleanup1;
1555 }
1556 left = ioc->buf_size;
1557 data_ptr = ioc->buf;
1558 while (left) {
1559 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1560 buff_size[sg_used] = sz;
1561 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1562 if (buff[sg_used] == NULL) {
1563 status = -ENOMEM;
1564 goto cleanup1;
1565 }
1566 if (ioc->Request.Type.Direction == XFER_WRITE) {
1567 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1568 status = -EFAULT;
1569 goto cleanup1;
1570 }
1571 } else {
1572 memset(buff[sg_used], 0, sz);
1573 }
1574 left -= sz;
1575 data_ptr += sz;
1576 sg_used++;
1577 }
1578 c = cmd_special_alloc(h);
1579 if (!c) {
1580 status = -ENOMEM;
1581 goto cleanup1;
1582 }
1583 c->cmd_type = CMD_IOCTL_PEND;
1584 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1585 c->Header.SGList = sg_used;
1586 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1587 c->Header.LUN = ioc->LUN_info;
1588 c->Header.Tag.lower = c->busaddr;
1589
1590 c->Request = ioc->Request;
fcfb5c0c
SC		 1591 for (i = 0; i < sg_used; i++) {
1592 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1593 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1594 c->SG[i].Addr.lower = temp64.val32.lower;
1595 c->SG[i].Addr.upper = temp64.val32.upper;
1596 c->SG[i].Len = buff_size[i];
1597 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1598 }
1599 c->waiting = &wait;
1600 enqueue_cmd_and_start_io(h, c);
1601 wait_for_completion(&wait);
1602 /* unlock the buffers from DMA */
1603 for (i = 0; i < sg_used; i++) {
1604 temp64.val32.lower = c->SG[i].Addr.lower;
1605 temp64.val32.upper = c->SG[i].Addr.upper;
1606 pci_unmap_single(h->pdev,
1607 (dma_addr_t) temp64.val, buff_size[i],
1608 PCI_DMA_BIDIRECTIONAL);
1609 }
1610 check_ioctl_unit_attention(h, c);
1611 /* Copy the error information out */
1612 ioc->error_info = *(c->err_info);
1613 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1614 cmd_special_free(h, c);
1615 status = -EFAULT;
1616 goto cleanup1;
1617 }
1618 if (ioc->Request.Type.Direction == XFER_READ) {
1619 /* Copy the data out of the buffer we created */
1620 BYTE __user *ptr = ioc->buf;
1621 for (i = 0; i < sg_used; i++) {
1622 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1623 cmd_special_free(h, c);
1624 status = -EFAULT;
1625 goto cleanup1;
1626 }
1627 ptr += buff_size[i];
1628 }
1629 }
1630 cmd_special_free(h, c);
1631 status = 0;
1632cleanup1:
1633 if (buff) {
1634 for (i = 0; i < sg_used; i++)
1635 kfree(buff[i]);
1636 kfree(buff);
1637 }
1638 kfree(buff_size);
1639 kfree(ioc);
1640 return status;
1641}
1642
ef7822c2 1643static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1644 unsigned int cmd, unsigned long arg)
1da177e4 1645{
1da177e4 1646 struct gendisk *disk = bdev->bd_disk;
f70dba83 1647 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1648 void __user *argp = (void __user *)arg;
1649
b2a4a43d
SC		 1650 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1651 cmd, arg);
7c832835 1652 switch (cmd) {
1da177e4 1653 case CCISS_GETPCIINFO:
0a25a5ae 1654 return cciss_getpciinfo(h, argp);
1da177e4 1655 case CCISS_GETINTINFO:
576e661c 1656 return cciss_getintinfo(h, argp);
1da177e4 1657 case CCISS_SETINTINFO:
4c800eed 1658 return cciss_setintinfo(h, argp);
1da177e4 1659 case CCISS_GETNODENAME:
25216109 1660 return cciss_getnodename(h, argp);
1da177e4 1661 case CCISS_SETNODENAME:
4f43f32c 1662 return cciss_setnodename(h, argp);
1da177e4 1663 case CCISS_GETHEARTBEAT:
93c74931 1664 return cciss_getheartbeat(h, argp);
1da177e4 1665 case CCISS_GETBUSTYPES:
d18dfad4 1666 return cciss_getbustypes(h, argp);
1da177e4 1667 case CCISS_GETFIRMVER:
8a4f7fbf 1668 return cciss_getfirmver(h, argp);
7c832835 1669 case CCISS_GETDRIVVER:
c525919d 1670 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1671 case CCISS_DEREGDISK:
1672 case CCISS_REGNEWD:
1da177e4 1673 case CCISS_REVALIDVOLS:
f70dba83 1674 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1675 case CCISS_GETLUNINFO:
1676 return cciss_getluninfo(h, disk, argp);
1da177e4 1677 case CCISS_PASSTHRU:
f32f125b 1678 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1679 case CCISS_BIG_PASSTHRU:
1680 return cciss_bigpassthru(h, argp);
03bbfee5
MMOD		 1681
1682 /* scsi_cmd_ioctl handles these, below, though some are not */
1683 /* very meaningful for cciss. SG_IO is the main one people want. */
1684
1685 case SG_GET_VERSION_NUM:
1686 case SG_SET_TIMEOUT:
1687 case SG_GET_TIMEOUT:
1688 case SG_GET_RESERVED_SIZE:
1689 case SG_SET_RESERVED_SIZE:
1690 case SG_EMULATED_HOST:
1691 case SG_IO:
1692 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1693 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1694
1695 /* scsi_cmd_ioctl would normally handle these, below, but */
1696 /* they aren't a good fit for cciss, as CD-ROMs are */
1697 /* not supported, and we don't have any bus/target/lun */
1698 /* which we present to the kernel. */
1699
1700 case CDROM_SEND_PACKET:
1701 case CDROMCLOSETRAY:
1702 case CDROMEJECT:
1703 case SCSI_IOCTL_GET_IDLUN:
1704 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1705 default:
1706 return -ENOTTY;
1707 }
1da177e4
LT		 1708}
1709
7b30f092
JA		 1710static void cciss_check_queues(ctlr_info_t *h)
1711{
1712 int start_queue = h->next_to_run;
1713 int i;
1714
1715 /* check to see if we have maxed out the number of commands that can
1716 * be placed on the queue. If so then exit. We do this check here
1717 * in case the interrupt we serviced was from an ioctl and did not
1718 * free any new commands.
1719 */
f880632f 1720 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1721 return;
1722
1723 /* We have room on the queue for more commands. Now we need to queue
1724 * them up. We will also keep track of the next queue to run so
1725 * that every queue gets a chance to be started first.
1726 */
1727 for (i = 0; i < h->highest_lun + 1; i++) {
1728 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1729 /* make sure the disk has been added and the drive is real
1730 * because this can be called from the middle of init_one.
1731 */
9cef0d2f
SC		 1732 if (!h->drv[curr_queue])
1733 continue;
1734 if (!(h->drv[curr_queue]->queue) ||
1735 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1736 continue;
1737 blk_start_queue(h->gendisk[curr_queue]->queue);
1738
1739 /* check to see if we have maxed out the number of commands
1740 * that can be placed on the queue.
1741 */
f880632f 1742 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1743 if (curr_queue == start_queue) {
1744 h->next_to_run =
1745 (start_queue + 1) % (h->highest_lun + 1);
1746 break;
1747 } else {
1748 h->next_to_run = curr_queue;
1749 break;
1750 }
7b30f092
JA		 1751 }
1752 }
1753}
1754
ca1e0484
MM		 1755static void cciss_softirq_done(struct request *rq)
1756{
f70dba83
SC		 1757 CommandList_struct *c = rq->completion_data;
1758 ctlr_info_t *h = hba[c->ctlr];
1759 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1760 u64bit temp64;
664a717d 1761 unsigned long flags;
ca1e0484 1762 int i, ddir;
5c07a311 1763 int sg_index = 0;
ca1e0484 1764
f70dba83 1765 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1766 ddir = PCI_DMA_FROMDEVICE;
1767 else
1768 ddir = PCI_DMA_TODEVICE;
1769
1770 /* command did not need to be retried */
1771 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1772 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1773 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1774 cciss_unmap_sg_chain_block(h, c);
5c07a311 1775 /* Point to the next block */
f70dba83 1776 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1777 sg_index = 0;
1778 }
1779 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1780 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1781 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1782 ddir);
1783 ++sg_index;
ca1e0484
MM		 1784 }
1785
b2a4a43d 1786 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1787
c3a4d78c 1788 /* set the residual count for pc requests */
33659ebb 1789 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1790 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1791
c3a4d78c 1792 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1793
ca1e0484 1794 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1795 cmd_free(h, c);
7b30f092 1796 cciss_check_queues(h);
ca1e0484
MM		 1797 spin_unlock_irqrestore(&h->lock, flags);
1798}
1799
39ccf9a6
SC		 1800static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1801 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1802{
9cef0d2f
SC		 1803 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1804 sizeof(h->drv[log_unit]->LunID));
b57695fe 1805}
1806
7fe06326
AP		 1807/* This function gets the SCSI vendor, model, and revision of a logical drive
1808 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1809 * they cannot be read.
1810 */
f70dba83 1811static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1812 char *vendor, char *model, char *rev)
1813{
1814 int rc;
1815 InquiryData_struct *inq_buf;
b57695fe 1816 unsigned char scsi3addr[8];
7fe06326
AP		 1817
1818 *vendor = '\0';
1819 *model = '\0';
1820 *rev = '\0';
1821
1822 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1823 if (!inq_buf)
1824 return;
1825
f70dba83
SC		 1826 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1827 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1828 scsi3addr, TYPE_CMD);
7fe06326
AP		 1829 if (rc == IO_OK) {
1830 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1831 vendor[VENDOR_LEN] = '\0';
1832 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1833 model[MODEL_LEN] = '\0';
1834 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1835 rev[REV_LEN] = '\0';
1836 }
1837
1838 kfree(inq_buf);
1839 return;
1840}
1841
a72da29b
MM		 1842/* This function gets the serial number of a logical drive via
1843 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1844 * number cannot be had, for whatever reason, 16 bytes of 0xff
1845 * are returned instead.
1846 */
f70dba83 1847static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1848 unsigned char *serial_no, int buflen)
1849{
1850#define PAGE_83_INQ_BYTES 64
1851 int rc;
1852 unsigned char *buf;
b57695fe 1853 unsigned char scsi3addr[8];
a72da29b
MM		 1854
1855 if (buflen > 16)
1856 buflen = 16;
1857 memset(serial_no, 0xff, buflen);
1858 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1859 if (!buf)
1860 return;
1861 memset(serial_no, 0, buflen);
f70dba83
SC		 1862 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1863 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1864 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1865 if (rc == IO_OK)
1866 memcpy(serial_no, &buf[8], buflen);
1867 kfree(buf);
1868 return;
1869}
1870
617e1344
SC		 1871/*
1872 * cciss_add_disk sets up the block device queue for a logical drive
1873 */
1874static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1875 int drv_index)
1876{
1877 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1878 if (!disk->queue)
1879 goto init_queue_failure;
6ae5ce8e
MM		 1880 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1881 disk->major = h->major;
1882 disk->first_minor = drv_index << NWD_SHIFT;
1883 disk->fops = &cciss_fops;
9cef0d2f
SC		 1884 if (cciss_create_ld_sysfs_entry(h, drv_index))
1885 goto cleanup_queue;
1886 disk->private_data = h->drv[drv_index];
1887 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1888
1889 /* Set up queue information */
1890 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1891
1892 /* This is a hardware imposed limit. */
8a78362c 1893 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1894
086fa5ff 1895 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1896
1897 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1898
1899 disk->queue->queuedata = h;
1900
e1defc4f 1901 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1902 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1903
1904 /* Make sure all queue data is written out before */
9cef0d2f 1905 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1906 /* allows the interrupt handler to start the queue */
1907 wmb();
9cef0d2f 1908 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1909 add_disk(disk);
617e1344
SC		 1910 return 0;
1911
1912cleanup_queue:
1913 blk_cleanup_queue(disk->queue);
1914 disk->queue = NULL;
e8074f79 1915init_queue_failure:
617e1344 1916 return -1;
6ae5ce8e
MM		 1917}
1918
ddd47442 1919/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1920 * If the usage_count is zero and it is a heretofore unknown drive, or,
1921 * the drive's capacity, geometry, or serial number has changed,
1922 * then the drive information will be updated and the disk will be
1923 * re-registered with the kernel. If these conditions don't hold,
1924 * then it will be left alone for the next reboot. The exception to this
1925 * is disk 0 which will always be left registered with the kernel since it
1926 * is also the controller node. Any changes to disk 0 will show up on
1927 * the next reboot.
7c832835 1928 */
f70dba83
SC		 1929static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1930 int first_time, int via_ioctl)
7c832835 1931{
ddd47442 1932 struct gendisk *disk;
ddd47442
MM		 1933 InquiryData_struct *inq_buff = NULL;
1934 unsigned int block_size;
00988a35 1935 sector_t total_size;
ddd47442
MM		 1936 unsigned long flags = 0;
1937 int ret = 0;
a72da29b
MM		 1938 drive_info_struct *drvinfo;
1939
1940 /* Get information about the disk and modify the driver structure */
1941 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1942 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1943 if (inq_buff == NULL || drvinfo == NULL)
1944 goto mem_msg;
1945
1946 /* testing to see if 16-byte CDBs are already being used */
1947 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1948 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1949 &total_size, &block_size);
1950
1951 } else {
f70dba83 1952 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 1953 /* if read_capacity returns all F's this volume is >2TB */
1954 /* in size so we switch to 16-byte CDB's for all */
1955 /* read/write ops */
1956 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1957 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1958 &total_size, &block_size);
1959 h->cciss_read = CCISS_READ_16;
1960 h->cciss_write = CCISS_WRITE_16;
1961 } else {
1962 h->cciss_read = CCISS_READ_10;
1963 h->cciss_write = CCISS_WRITE_10;
1964 }
1965 }
1966
f70dba83 1967 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 1968 inq_buff, drvinfo);
1969 drvinfo->block_size = block_size;
1970 drvinfo->nr_blocks = total_size + 1;
1971
f70dba83 1972 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 1973 drvinfo->model, drvinfo->rev);
f70dba83 1974 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 1975 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 1976 /* Save the lunid in case we deregister the disk, below. */
1977 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1978 sizeof(drvinfo->LunID));
a72da29b
MM		 1979
1980 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 1981 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 1982 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 1983 h->drv[drv_index]->serial_no, 16) == 0) &&
1984 drvinfo->block_size == h->drv[drv_index]->block_size &&
1985 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
1986 drvinfo->heads == h->drv[drv_index]->heads &&
1987 drvinfo->sectors == h->drv[drv_index]->sectors &&
1988 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 1989 /* The disk is unchanged, nothing to update */
1990 goto freeret;
a72da29b 1991
6ae5ce8e
MM		 1992 /* If we get here it's not the same disk, or something's changed,
1993 * so we need to * deregister it, and re-register it, if it's not
1994 * in use.
1995 * If the disk already exists then deregister it before proceeding
1996 * (unless it's the first disk (for the controller node).
1997 */
9cef0d2f 1998 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 1999 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2000 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2001 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2002 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2003
9cef0d2f 2004 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2005 * which keeps the interrupt handler from starting
2006 * the queue.
2007 */
2d11d993 2008 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2009 }
2010
2011 /* If the disk is in use return */
2012 if (ret)
a72da29b
MM		 2013 goto freeret;
2014
6ae5ce8e 2015 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2016 * and serial number inquiry. If the disk was deregistered
2017 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2018 */
9cef0d2f
SC		 2019 if (h->drv[drv_index] == NULL) {
2020 drvinfo->device_initialized = 0;
2021 h->drv[drv_index] = drvinfo;
2022 drvinfo = NULL; /* so it won't be freed below. */
2023 } else {
2024 /* special case for cxd0 */
2025 h->drv[drv_index]->block_size = drvinfo->block_size;
2026 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2027 h->drv[drv_index]->heads = drvinfo->heads;
2028 h->drv[drv_index]->sectors = drvinfo->sectors;
2029 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2030 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2031 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2032 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2033 VENDOR_LEN + 1);
2034 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2035 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2036 }
ddd47442
MM		 2037
2038 ++h->num_luns;
2039 disk = h->gendisk[drv_index];
9cef0d2f 2040 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2041
6ae5ce8e
MM		 2042 /* If it's not disk 0 (drv_index != 0)
2043 * or if it was disk 0, but there was previously
2044 * no actual corresponding configured logical drive
2045 * (raid_leve == -1) then we want to update the
2046 * logical drive's information.
2047 */
361e9b07
SC		 2048 if (drv_index || first_time) {
2049 if (cciss_add_disk(h, disk, drv_index) != 0) {
2050 cciss_free_gendisk(h, drv_index);
9cef0d2f 2051 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2052 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2053 drv_index);
361e9b07
SC		 2054 --h->num_luns;
2055 }
2056 }
ddd47442 2057
6ae5ce8e 2058freeret:
ddd47442 2059 kfree(inq_buff);
a72da29b 2060 kfree(drvinfo);
ddd47442 2061 return;
6ae5ce8e 2062mem_msg:
b2a4a43d 2063 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2064 goto freeret;
2065}
2066
2067/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2068 * that has a null drv pointer and allocate the drive info struct and
2069 * will return that index This is where new drives will be added.
2070 * If the index to be returned is greater than the highest_lun index for
2071 * the controller then highest_lun is set * to this new index.
2072 * If there are no available indexes or if tha allocation fails, then -1
2073 * is returned. * "controller_node" is used to know if this is a real
2074 * logical drive, or just the controller node, which determines if this
2075 * counts towards highest_lun.
7c832835 2076 */
9cef0d2f 2077static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2078{
2079 int i;
9cef0d2f 2080 drive_info_struct *drv;
ddd47442 2081
9cef0d2f 2082 /* Search for an empty slot for our drive info */
7c832835 2083 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2084
2085 /* if not cxd0 case, and it's occupied, skip it. */
2086 if (h->drv[i] && i != 0)
2087 continue;
2088 /*
2089 * If it's cxd0 case, and drv is alloc'ed already, and a
2090 * disk is configured there, skip it.
2091 */
2092 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2093 continue;
2094
2095 /*
2096 * We've found an empty slot. Update highest_lun
2097 * provided this isn't just the fake cxd0 controller node.
2098 */
2099 if (i > h->highest_lun && !controller_node)
2100 h->highest_lun = i;
2101
2102 /* If adding a real disk at cxd0, and it's already alloc'ed */
2103 if (i == 0 && h->drv[i] != NULL)
ddd47442 2104 return i;
9cef0d2f
SC		 2105
2106 /*
2107 * Found an empty slot, not already alloc'ed. Allocate it.
2108 * Mark it with raid_level == -1, so we know it's new later on.
2109 */
2110 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2111 if (!drv)
2112 return -1;
2113 drv->raid_level = -1; /* so we know it's new */
2114 h->drv[i] = drv;
2115 return i;
ddd47442
MM		 2116 }
2117 return -1;
2118}
2119
9cef0d2f
SC		 2120static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2121{
2122 kfree(h->drv[drv_index]);
2123 h->drv[drv_index] = NULL;
2124}
2125
361e9b07
SC		 2126static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2127{
2128 put_disk(h->gendisk[drv_index]);
2129 h->gendisk[drv_index] = NULL;
2130}
2131
6ae5ce8e
MM		 2132/* cciss_add_gendisk finds a free hba[]->drv structure
2133 * and allocates a gendisk if needed, and sets the lunid
2134 * in the drvinfo structure. It returns the index into
2135 * the ->drv[] array, or -1 if none are free.
2136 * is_controller_node indicates whether highest_lun should
2137 * count this disk, or if it's only being added to provide
2138 * a means to talk to the controller in case no logical
2139 * drives have yet been configured.
2140 */
39ccf9a6
SC		 2141static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2142 int controller_node)
6ae5ce8e
MM		 2143{
2144 int drv_index;
2145
9cef0d2f 2146 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2147 if (drv_index == -1)
2148 return -1;
8ce51966 2149
6ae5ce8e
MM		 2150 /*Check if the gendisk needs to be allocated */
2151 if (!h->gendisk[drv_index]) {
2152 h->gendisk[drv_index] =
2153 alloc_disk(1 << NWD_SHIFT);
2154 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2155 dev_err(&h->pdev->dev,
2156 "could not allocate a new disk %d\n",
2157 drv_index);
9cef0d2f 2158 goto err_free_drive_info;
6ae5ce8e
MM		 2159 }
2160 }
9cef0d2f
SC		 2161 memcpy(h->drv[drv_index]->LunID, lunid,
2162 sizeof(h->drv[drv_index]->LunID));
2163 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2164 goto err_free_disk;
6ae5ce8e
MM		 2165 /* Don't need to mark this busy because nobody */
2166 /* else knows about this disk yet to contend */
2167 /* for access to it. */
9cef0d2f 2168 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2169 wmb();
2170 return drv_index;
7fe06326
AP		 2171
2172err_free_disk:
361e9b07 2173 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2174err_free_drive_info:
2175 cciss_free_drive_info(h, drv_index);
7fe06326 2176 return -1;
6ae5ce8e
MM		 2177}
2178
2179/* This is for the special case of a controller which
2180 * has no logical drives. In this case, we still need
2181 * to register a disk so the controller can be accessed
2182 * by the Array Config Utility.
2183 */
2184static void cciss_add_controller_node(ctlr_info_t *h)
2185{
2186 struct gendisk *disk;
2187 int drv_index;
2188
2189 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2190 return;
2191
39ccf9a6 2192 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2193 if (drv_index == -1)
2194 goto error;
9cef0d2f
SC		 2195 h->drv[drv_index]->block_size = 512;
2196 h->drv[drv_index]->nr_blocks = 0;
2197 h->drv[drv_index]->heads = 0;
2198 h->drv[drv_index]->sectors = 0;
2199 h->drv[drv_index]->cylinders = 0;
2200 h->drv[drv_index]->raid_level = -1;
2201 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2202 disk = h->gendisk[drv_index];
361e9b07
SC		 2203 if (cciss_add_disk(h, disk, drv_index) == 0)
2204 return;
2205 cciss_free_gendisk(h, drv_index);
9cef0d2f 2206 cciss_free_drive_info(h, drv_index);
361e9b07 2207error:
b2a4a43d 2208 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2209 return;
6ae5ce8e
MM		 2210}
2211
ddd47442 2212/* This function will add and remove logical drives from the Logical
d14c4ab5 2213 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2214 * so that mount points are preserved until the next reboot. This allows
2215 * for the removal of logical drives in the middle of the drive array
2216 * without a re-ordering of those drives.
2217 * INPUT
2218 * h = The controller to perform the operations on
7c832835 2219 */
2d11d993
SC		 2220static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2221 int via_ioctl)
1da177e4 2222{
ddd47442
MM		 2223 int num_luns;
2224 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2225 int return_code;
2226 int listlength = 0;
2227 int i;
2228 int drv_found;
2229 int drv_index = 0;
39ccf9a6 2230 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2231 unsigned long flags;
ddd47442 2232
6ae5ce8e
MM		 2233 if (!capable(CAP_SYS_RAWIO))
2234 return -EPERM;
2235
ddd47442 2236 /* Set busy_configuring flag for this operation */
f70dba83 2237 spin_lock_irqsave(&h->lock, flags);
7c832835 2238 if (h->busy_configuring) {
f70dba83 2239 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2240 return -EBUSY;
2241 }
2242 h->busy_configuring = 1;
f70dba83 2243 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2244
a72da29b
MM		 2245 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2246 if (ld_buff == NULL)
2247 goto mem_msg;
2248
f70dba83 2249 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2250 sizeof(ReportLunData_struct),
2251 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2252
a72da29b
MM		 2253 if (return_code == IO_OK)
2254 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2255 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2256 dev_warn(&h->pdev->dev,
2257 "report logical volume command failed\n");
a72da29b
MM		 2258 listlength = 0;
2259 goto freeret;
2260 }
2261
2262 num_luns = listlength / 8; /* 8 bytes per entry */
2263 if (num_luns > CISS_MAX_LUN) {
2264 num_luns = CISS_MAX_LUN;
b2a4a43d 2265 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2266 " on controller than can be handled by"
2267 " this driver.\n");
2268 }
2269
6ae5ce8e
MM		 2270 if (num_luns == 0)
2271 cciss_add_controller_node(h);
2272
2273 /* Compare controller drive array to driver's drive array
2274 * to see if any drives are missing on the controller due
2275 * to action of Array Config Utility (user deletes drive)
2276 * and deregister logical drives which have disappeared.
2277 */
a72da29b
MM		 2278 for (i = 0; i <= h->highest_lun; i++) {
2279 int j;
2280 drv_found = 0;
d8a0be6a
SC		 2281
2282 /* skip holes in the array from already deleted drives */
9cef0d2f 2283 if (h->drv[i] == NULL)
d8a0be6a
SC		 2284 continue;
2285
a72da29b 2286 for (j = 0; j < num_luns; j++) {
39ccf9a6 2287 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2288 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2289 sizeof(lunid)) == 0) {
a72da29b
MM		 2290 drv_found = 1;
2291 break;
2292 }
2293 }
2294 if (!drv_found) {
2295 /* Deregister it from the OS, it's gone. */
f70dba83 2296 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2297 h->drv[i]->busy_configuring = 1;
f70dba83 2298 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2299 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2300 if (h->drv[i] != NULL)
2301 h->drv[i]->busy_configuring = 0;
ddd47442 2302 }
a72da29b 2303 }
ddd47442 2304
a72da29b
MM		 2305 /* Compare controller drive array to driver's drive array.
2306 * Check for updates in the drive information and any new drives
2307 * on the controller due to ACU adding logical drives, or changing
2308 * a logical drive's size, etc. Reregister any new/changed drives
2309 */
2310 for (i = 0; i < num_luns; i++) {
2311 int j;
ddd47442 2312
a72da29b 2313 drv_found = 0;
ddd47442 2314
39ccf9a6 2315 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2316 /* Find if the LUN is already in the drive array
2317 * of the driver. If so then update its info
2318 * if not in use. If it does not exist then find
2319 * the first free index and add it.
2320 */
2321 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2322 if (h->drv[j] != NULL &&
2323 memcmp(h->drv[j]->LunID, lunid,
2324 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2325 drv_index = j;
2326 drv_found = 1;
2327 break;
ddd47442 2328 }
a72da29b 2329 }
ddd47442 2330
a72da29b
MM		 2331 /* check if the drive was found already in the array */
2332 if (!drv_found) {
eece695f 2333 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2334 if (drv_index == -1)
2335 goto freeret;
a72da29b 2336 }
f70dba83 2337 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2338 } /* end for */
ddd47442 2339
6ae5ce8e 2340freeret:
ddd47442
MM		 2341 kfree(ld_buff);
2342 h->busy_configuring = 0;
2343 /* We return -1 here to tell the ACU that we have registered/updated
2344 * all of the drives that we can and to keep it from calling us
2345 * additional times.
7c832835 2346 */
ddd47442 2347 return -1;
6ae5ce8e 2348mem_msg:
b2a4a43d 2349 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2350 h->busy_configuring = 0;
ddd47442
MM		 2351 goto freeret;
2352}
2353
9ddb27b4
SC		 2354static void cciss_clear_drive_info(drive_info_struct *drive_info)
2355{
2356 /* zero out the disk size info */
2357 drive_info->nr_blocks = 0;
2358 drive_info->block_size = 0;
2359 drive_info->heads = 0;
2360 drive_info->sectors = 0;
2361 drive_info->cylinders = 0;
2362 drive_info->raid_level = -1;
2363 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2364 memset(drive_info->model, 0, sizeof(drive_info->model));
2365 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2366 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2367 /*
2368 * don't clear the LUNID though, we need to remember which
2369 * one this one is.
2370 */
2371}
2372
ddd47442
MM		 2373/* This function will deregister the disk and it's queue from the
2374 * kernel. It must be called with the controller lock held and the
2375 * drv structures busy_configuring flag set. It's parameters are:
2376 *
2377 * disk = This is the disk to be deregistered
2378 * drv = This is the drive_info_struct associated with the disk to be
2379 * deregistered. It contains information about the disk used
2380 * by the driver.
2381 * clear_all = This flag determines whether or not the disk information
2382 * is going to be completely cleared out and the highest_lun
2383 * reset. Sometimes we want to clear out information about
d14c4ab5 2384 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2385 * the highest_lun should be left unchanged and the LunID
2386 * should not be cleared.
2d11d993
SC		 2387 * via_ioctl
2388 * This indicates whether we've reached this path via ioctl.
2389 * This affects the maximum usage count allowed for c0d0 to be messed with.
2390 * If this path is reached via ioctl(), then the max_usage_count will
2391 * be 1, as the process calling ioctl() has got to have the device open.
2392 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2393*/
a0ea8622 2394static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2395 int clear_all, int via_ioctl)
ddd47442 2396{
799202cb 2397 int i;
a0ea8622
SC		 2398 struct gendisk *disk;
2399 drive_info_struct *drv;
9cef0d2f 2400 int recalculate_highest_lun;
1da177e4
LT		 2401
2402 if (!capable(CAP_SYS_RAWIO))
2403 return -EPERM;
2404
9cef0d2f 2405 drv = h->drv[drv_index];
a0ea8622
SC		 2406 disk = h->gendisk[drv_index];
2407
1da177e4 2408 /* make sure logical volume is NOT is use */
7c832835 2409 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2410 if (drv->usage_count > via_ioctl)
7c832835
BH		 2411 return -EBUSY;
2412 } else if (drv->usage_count > 0)
2413 return -EBUSY;
1da177e4 2414
9cef0d2f
SC		 2415 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2416
ddd47442
MM		 2417 /* invalidate the devices and deregister the disk. If it is disk
2418 * zero do not deregister it but just zero out it's values. This
2419 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2420 */
2421 if (h->gendisk[0] != disk) {
5a9df732 2422 struct request_queue *q = disk->queue;
097d0264 2423 if (disk->flags & GENHD_FL_UP) {
8ce51966 2424 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2425 del_gendisk(disk);
5a9df732 2426 }
9cef0d2f 2427 if (q)
5a9df732 2428 blk_cleanup_queue(q);
5a9df732
AB		 2429 /* If clear_all is set then we are deleting the logical
2430 * drive, not just refreshing its info. For drives
2431 * other than disk 0 we will call put_disk. We do not
2432 * do this for disk 0 as we need it to be able to
2433 * configure the controller.
a72da29b 2434 */
5a9df732
AB		 2435 if (clear_all){
2436 /* This isn't pretty, but we need to find the
2437 * disk in our array and NULL our the pointer.
2438 * This is so that we will call alloc_disk if
2439 * this index is used again later.
a72da29b 2440 */
5a9df732 2441 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2442 if (h->gendisk[i] == disk) {
5a9df732
AB		 2443 h->gendisk[i] = NULL;
2444 break;
799202cb 2445 }
799202cb 2446 }
5a9df732 2447 put_disk(disk);
ddd47442 2448 }
799202cb
MM		 2449 } else {
2450 set_capacity(disk, 0);
9cef0d2f 2451 cciss_clear_drive_info(drv);
ddd47442
MM		 2452 }
2453
2454 --h->num_luns;
ddd47442 2455
9cef0d2f
SC		 2456 /* if it was the last disk, find the new hightest lun */
2457 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2458 int newhighest = -1;
9cef0d2f
SC		 2459 for (i = 0; i <= h->highest_lun; i++) {
2460 /* if the disk has size > 0, it is available */
2461 if (h->drv[i] && h->drv[i]->heads)
2462 newhighest = i;
1da177e4 2463 }
9cef0d2f 2464 h->highest_lun = newhighest;
ddd47442 2465 }
e2019b58 2466 return 0;
1da177e4 2467}
ddd47442 2468
f70dba83 2469static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2470 size_t size, __u8 page_code, unsigned char *scsi3addr,
2471 int cmd_type)
1da177e4 2472{
1da177e4
LT		 2473 u64bit buff_dma_handle;
2474 int status = IO_OK;
2475
2476 c->cmd_type = CMD_IOCTL_PEND;
2477 c->Header.ReplyQueue = 0;
7c832835 2478 if (buff != NULL) {
1da177e4 2479 c->Header.SGList = 1;
7c832835 2480 c->Header.SGTotal = 1;
1da177e4
LT		 2481 } else {
2482 c->Header.SGList = 0;
7c832835 2483 c->Header.SGTotal = 0;
1da177e4
LT		 2484 }
2485 c->Header.Tag.lower = c->busaddr;
b57695fe 2486 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2487
2488 c->Request.Type.Type = cmd_type;
2489 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2490 switch (cmd) {
2491 case CISS_INQUIRY:
1da177e4 2492 /* are we trying to read a vital product page */
7c832835 2493 if (page_code != 0) {
1da177e4
LT		 2494 c->Request.CDB[1] = 0x01;
2495 c->Request.CDB[2] = page_code;
2496 }
2497 c->Request.CDBLen = 6;
7c832835 2498 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2499 c->Request.Type.Direction = XFER_READ;
2500 c->Request.Timeout = 0;
7c832835
BH		 2501 c->Request.CDB[0] = CISS_INQUIRY;
2502 c->Request.CDB[4] = size & 0xFF;
2503 break;
1da177e4
LT		 2504 case CISS_REPORT_LOG:
2505 case CISS_REPORT_PHYS:
7c832835 2506 /* Talking to controller so It's a physical command
1da177e4 2507 mode = 00 target = 0. Nothing to write.
7c832835 2508 */
1da177e4
LT		 2509 c->Request.CDBLen = 12;
2510 c->Request.Type.Attribute = ATTR_SIMPLE;
2511 c->Request.Type.Direction = XFER_READ;
2512 c->Request.Timeout = 0;
2513 c->Request.CDB[0] = cmd;
b028461d 2514 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2515 c->Request.CDB[7] = (size >> 16) & 0xFF;
2516 c->Request.CDB[8] = (size >> 8) & 0xFF;
2517 c->Request.CDB[9] = size & 0xFF;
2518 break;
2519
2520 case CCISS_READ_CAPACITY:
1da177e4
LT		 2521 c->Request.CDBLen = 10;
2522 c->Request.Type.Attribute = ATTR_SIMPLE;
2523 c->Request.Type.Direction = XFER_READ;
2524 c->Request.Timeout = 0;
2525 c->Request.CDB[0] = cmd;
7c832835 2526 break;
00988a35 2527 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2528 c->Request.CDBLen = 16;
2529 c->Request.Type.Attribute = ATTR_SIMPLE;
2530 c->Request.Type.Direction = XFER_READ;
2531 c->Request.Timeout = 0;
2532 c->Request.CDB[0] = cmd;
2533 c->Request.CDB[1] = 0x10;
2534 c->Request.CDB[10] = (size >> 24) & 0xFF;
2535 c->Request.CDB[11] = (size >> 16) & 0xFF;
2536 c->Request.CDB[12] = (size >> 8) & 0xFF;
2537 c->Request.CDB[13] = size & 0xFF;
2538 c->Request.Timeout = 0;
2539 c->Request.CDB[0] = cmd;
2540 break;
1da177e4
LT		 2541 case CCISS_CACHE_FLUSH:
2542 c->Request.CDBLen = 12;
2543 c->Request.Type.Attribute = ATTR_SIMPLE;
2544 c->Request.Type.Direction = XFER_WRITE;
2545 c->Request.Timeout = 0;
2546 c->Request.CDB[0] = BMIC_WRITE;
2547 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2548 break;
88f627ae 2549 case TEST_UNIT_READY:
88f627ae
SC		 2550 c->Request.CDBLen = 6;
2551 c->Request.Type.Attribute = ATTR_SIMPLE;
2552 c->Request.Type.Direction = XFER_NONE;
2553 c->Request.Timeout = 0;
2554 break;
1da177e4 2555 default:
b2a4a43d 2556 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2557 return IO_ERROR;
1da177e4
LT		 2558 }
2559 } else if (cmd_type == TYPE_MSG) {
2560 switch (cmd) {
7c832835 2561 case 0: /* ABORT message */
3da8b713 2562 c->Request.CDBLen = 12;
2563 c->Request.Type.Attribute = ATTR_SIMPLE;
2564 c->Request.Type.Direction = XFER_WRITE;
2565 c->Request.Timeout = 0;
7c832835
BH		 2566 c->Request.CDB[0] = cmd; /* abort */
2567 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2568 /* buff contains the tag of the command to abort */
2569 memcpy(&c->Request.CDB[4], buff, 8);
2570 break;
7c832835 2571 case 1: /* RESET message */
88f627ae 2572 c->Request.CDBLen = 16;
3da8b713 2573 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2574 c->Request.Type.Direction = XFER_NONE;
3da8b713 2575 c->Request.Timeout = 0;
2576 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2577 c->Request.CDB[0] = cmd; /* reset */
88f627ae 2578 c->Request.CDB[1] = 0x03; /* reset a target */
00988a35 2579 break;
1da177e4
LT		 2580 case 3: /* No-Op message */
2581 c->Request.CDBLen = 1;
2582 c->Request.Type.Attribute = ATTR_SIMPLE;
2583 c->Request.Type.Direction = XFER_WRITE;
2584 c->Request.Timeout = 0;
2585 c->Request.CDB[0] = cmd;
2586 break;
2587 default:
b2a4a43d
SC		 2588 dev_warn(&h->pdev->dev,
2589 "unknown message type %d\n", cmd);
1da177e4
LT		 2590 return IO_ERROR;
2591 }
2592 } else {
b2a4a43d 2593 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2594 return IO_ERROR;
2595 }
2596 /* Fill in the scatter gather information */
2597 if (size > 0) {
2598 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2599 buff, size,
2600 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2601 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2602 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2603 c->SG[0].Len = size;
7c832835 2604 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2605 }
2606 return status;
2607}
7c832835 2608
3c2ab402 2609static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2610{
2611 switch (c->err_info->ScsiStatus) {
2612 case SAM_STAT_GOOD:
2613 return IO_OK;
2614 case SAM_STAT_CHECK_CONDITION:
2615 switch (0xf & c->err_info->SenseInfo[2]) {
2616 case 0: return IO_OK; /* no sense */
2617 case 1: return IO_OK; /* recovered error */
2618 default:
c08fac65
SC		 2619 if (check_for_unit_attention(h, c))
2620 return IO_NEEDS_RETRY;
b2a4a43d 2621 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2622 "check condition, sense key = 0x%02x\n",
b2a4a43d 2623 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2624 }
2625 break;
2626 default:
b2a4a43d
SC		 2627 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2628 "scsi status = 0x%02x\n",
3c2ab402 2629 c->Request.CDB[0], c->err_info->ScsiStatus);
2630 break;
2631 }
2632 return IO_ERROR;
2633}
2634
789a424a 2635static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2636{
5390cfc3 2637 int return_status = IO_OK;
7c832835 2638
789a424a 2639 if (c->err_info->CommandStatus == CMD_SUCCESS)
2640 return IO_OK;
5390cfc3 2641
2642 switch (c->err_info->CommandStatus) {
2643 case CMD_TARGET_STATUS:
3c2ab402 2644 return_status = check_target_status(h, c);
5390cfc3 2645 break;
2646 case CMD_DATA_UNDERRUN:
2647 case CMD_DATA_OVERRUN:
2648 /* expected for inquiry and report lun commands */
2649 break;
2650 case CMD_INVALID:
b2a4a43d 2651 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2652 "reported invalid\n", c->Request.CDB[0]);
2653 return_status = IO_ERROR;
2654 break;
2655 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2656 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2657 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2658 return_status = IO_ERROR;
2659 break;
2660 case CMD_HARDWARE_ERR:
b2a4a43d 2661 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2662 " hardware error\n", c->Request.CDB[0]);
2663 return_status = IO_ERROR;
2664 break;
2665 case CMD_CONNECTION_LOST:
b2a4a43d 2666 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2667 "connection lost\n", c->Request.CDB[0]);
2668 return_status = IO_ERROR;
2669 break;
2670 case CMD_ABORTED:
b2a4a43d 2671 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2672 "aborted\n", c->Request.CDB[0]);
2673 return_status = IO_ERROR;
2674 break;
2675 case CMD_ABORT_FAILED:
b2a4a43d 2676 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2677 "abort failed\n", c->Request.CDB[0]);
2678 return_status = IO_ERROR;
2679 break;
2680 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2681 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2682 c->Request.CDB[0]);
789a424a 2683 return_status = IO_NEEDS_RETRY;
5390cfc3 2684 break;
2685 default:
b2a4a43d 2686 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2687 "unknown status %x\n", c->Request.CDB[0],
2688 c->err_info->CommandStatus);
2689 return_status = IO_ERROR;
7c832835 2690 }
789a424a 2691 return return_status;
2692}
2693
2694static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2695 int attempt_retry)
2696{
2697 DECLARE_COMPLETION_ONSTACK(wait);
2698 u64bit buff_dma_handle;
789a424a 2699 int return_status = IO_OK;
2700
2701resend_cmd2:
2702 c->waiting = &wait;
664a717d 2703 enqueue_cmd_and_start_io(h, c);
789a424a 2704
2705 wait_for_completion(&wait);
2706
2707 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2708 goto command_done;
2709
2710 return_status = process_sendcmd_error(h, c);
2711
2712 if (return_status == IO_NEEDS_RETRY &&
2713 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2714 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2715 c->Request.CDB[0]);
2716 c->retry_count++;
2717 /* erase the old error information */
2718 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2719 return_status = IO_OK;
2720 INIT_COMPLETION(wait);
2721 goto resend_cmd2;
2722 }
5390cfc3 2723
2724command_done:
1da177e4 2725 /* unlock the buffers from DMA */
bb2a37bf
MM		 2726 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2727 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2728 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2729 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2730 return return_status;
2731}
2732
f70dba83 2733static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2734 __u8 page_code, unsigned char scsi3addr[],
2735 int cmd_type)
5390cfc3 2736{
5390cfc3 2737 CommandList_struct *c;
2738 int return_status;
2739
6b4d96b8 2740 c = cmd_special_alloc(h);
5390cfc3 2741 if (!c)
2742 return -ENOMEM;
f70dba83 2743 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2744 scsi3addr, cmd_type);
5390cfc3 2745 if (return_status == IO_OK)
789a424a 2746 return_status = sendcmd_withirq_core(h, c, 1);
2747
6b4d96b8 2748 cmd_special_free(h, c);
7c832835 2749 return return_status;
1da177e4 2750}
7c832835 2751
f70dba83 2752static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2753 sector_t total_size,
7c832835
BH		 2754 unsigned int block_size,
2755 InquiryData_struct *inq_buff,
2756 drive_info_struct *drv)
1da177e4
LT		 2757{
2758 int return_code;
00988a35 2759 unsigned long t;
b57695fe 2760 unsigned char scsi3addr[8];
00988a35 2761
1da177e4 2762 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2763 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2764 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2765 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2766 if (return_code == IO_OK) {
7c832835 2767 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2768 dev_warn(&h->pdev->dev,
2769 "reading geometry failed, volume "
7c832835 2770 "does not support reading geometry\n");
1da177e4 2771 drv->heads = 255;
b028461d 2772 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2773 drv->cylinders = total_size + 1;
89f97ad1 2774 drv->raid_level = RAID_UNKNOWN;
1da177e4 2775 } else {
1da177e4
LT		 2776 drv->heads = inq_buff->data_byte[6];
2777 drv->sectors = inq_buff->data_byte[7];
2778 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2779 drv->cylinders += inq_buff->data_byte[5];
2780 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2781 }
2782 drv->block_size = block_size;
97c06978 2783 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2784 t = drv->heads * drv->sectors;
2785 if (t > 1) {
97c06978
MMOD		 2786 sector_t real_size = total_size + 1;
2787 unsigned long rem = sector_div(real_size, t);
3f7705ea 2788 if (rem)
97c06978
MMOD		 2789 real_size++;
2790 drv->cylinders = real_size;
1da177e4 2791 }
7c832835 2792 } else { /* Get geometry failed */
b2a4a43d 2793 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2794 }
1da177e4 2795}
7c832835 2796
1da177e4 2797static void
f70dba83 2798cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2799 unsigned int *block_size)
1da177e4 2800{
00988a35 2801 ReadCapdata_struct *buf;
1da177e4 2802 int return_code;
b57695fe 2803 unsigned char scsi3addr[8];
1aebe187
MK		 2804
2805 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2806 if (!buf) {
b2a4a43d 2807 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2808 return;
2809 }
1aebe187 2810
f70dba83
SC		 2811 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2812 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2813 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2814 if (return_code == IO_OK) {
4c1f2b31
AV		 2815 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2816 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2817 } else { /* read capacity command failed */
b2a4a43d 2818 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2819 *total_size = 0;
2820 *block_size = BLOCK_SIZE;
2821 }
00988a35 2822 kfree(buf);
00988a35
MMOD		 2823}
2824
f70dba83 2825static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2826 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2827{
2828 ReadCapdata_struct_16 *buf;
2829 int return_code;
b57695fe 2830 unsigned char scsi3addr[8];
1aebe187
MK		 2831
2832 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2833 if (!buf) {
b2a4a43d 2834 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2835 return;
2836 }
1aebe187 2837
f70dba83
SC		 2838 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2839 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2840 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2841 0, scsi3addr, TYPE_CMD);
00988a35 2842 if (return_code == IO_OK) {
4c1f2b31
AV		 2843 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2844 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2845 } else { /* read capacity command failed */
b2a4a43d 2846 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2847 *total_size = 0;
2848 *block_size = BLOCK_SIZE;
2849 }
b2a4a43d 2850 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2851 (unsigned long long)*total_size+1, *block_size);
00988a35 2852 kfree(buf);
1da177e4
LT		 2853}
2854
1da177e4
LT		 2855static int cciss_revalidate(struct gendisk *disk)
2856{
2857 ctlr_info_t *h = get_host(disk);
2858 drive_info_struct *drv = get_drv(disk);
2859 int logvol;
7c832835 2860 int FOUND = 0;
1da177e4 2861 unsigned int block_size;
00988a35 2862 sector_t total_size;
1da177e4
LT		 2863 InquiryData_struct *inq_buff = NULL;
2864
7c832835 2865 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
9cef0d2f 2866 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2867 sizeof(drv->LunID)) == 0) {
7c832835 2868 FOUND = 1;
1da177e4
LT		 2869 break;
2870 }
2871 }
2872
7c832835
BH		 2873 if (!FOUND)
2874 return 1;
1da177e4 2875
7c832835
BH		 2876 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2877 if (inq_buff == NULL) {
b2a4a43d 2878 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2879 return 1;
2880 }
00988a35 2881 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2882 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2883 &total_size, &block_size);
2884 } else {
f70dba83 2885 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2886 &total_size, &block_size);
2887 }
f70dba83 2888 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2889 inq_buff, drv);
1da177e4 2890
e1defc4f 2891 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2892 set_capacity(disk, drv->nr_blocks);
2893
1da177e4
LT		 2894 kfree(inq_buff);
2895 return 0;
2896}
2897
1da177e4
LT		 2898/*
2899 * Map (physical) PCI mem into (virtual) kernel space
2900 */
2901static void __iomem *remap_pci_mem(ulong base, ulong size)
2902{
7c832835
BH		 2903 ulong page_base = ((ulong) base) & PAGE_MASK;
2904 ulong page_offs = ((ulong) base) - page_base;
2905 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2906
7c832835 2907 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2908}
2909
7c832835
BH		 2910/*
2911 * Takes jobs of the Q and sends them to the hardware, then puts it on
2912 * the Q to wait for completion.
2913 */
2914static void start_io(ctlr_info_t *h)
1da177e4
LT		 2915{
2916 CommandList_struct *c;
7c832835 2917
8a3173de
JA		 2918 while (!hlist_empty(&h->reqQ)) {
2919 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
1da177e4
LT		 2920 /* can't do anything if fifo is full */
2921 if ((h->access.fifo_full(h))) {
b2a4a43d 2922 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 2923 break;
2924 }
2925
7c832835 2926 /* Get the first entry from the Request Q */
8a3173de 2927 removeQ(c);
1da177e4 2928 h->Qdepth--;
7c832835
BH		 2929
2930 /* Tell the controller execute command */
1da177e4 2931 h->access.submit_command(h, c);
7c832835
BH		 2932
2933 /* Put job onto the completed Q */
8a3173de 2934 addQ(&h->cmpQ, c);
1da177e4
LT		 2935 }
2936}
7c832835 2937
f70dba83 2938/* Assumes that h->lock is held. */
1da177e4
LT		 2939/* Zeros out the error record and then resends the command back */
2940/* to the controller */
7c832835 2941static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 2942{
2943 /* erase the old error information */
2944 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2945
2946 /* add it to software queue and then send it to the controller */
8a3173de 2947 addQ(&h->reqQ, c);
1da177e4 2948 h->Qdepth++;
7c832835 2949 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 2950 h->maxQsinceinit = h->Qdepth;
2951
2952 start_io(h);
2953}
a9925a06 2954
1a614f50
SC		 2955static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2956 unsigned int msg_byte, unsigned int host_byte,
2957 unsigned int driver_byte)
2958{
2959 /* inverse of macros in scsi.h */
2960 return (scsi_status_byte & 0xff) |
2961 ((msg_byte & 0xff) << 8) |
2962 ((host_byte & 0xff) << 16) |
2963 ((driver_byte & 0xff) << 24);
2964}
2965
0a9279cc
MM		 2966static inline int evaluate_target_status(ctlr_info_t *h,
2967 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 2968{
2969 unsigned char sense_key;
1a614f50
SC		 2970 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2971 int error_value;
2972
0a9279cc 2973 *retry_cmd = 0;
1a614f50
SC		 2974 /* If we get in here, it means we got "target status", that is, scsi status */
2975 status_byte = cmd->err_info->ScsiStatus;
2976 driver_byte = DRIVER_OK;
2977 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2978
33659ebb 2979 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 2980 host_byte = DID_PASSTHROUGH;
2981 else
2982 host_byte = DID_OK;
2983
2984 error_value = make_status_bytes(status_byte, msg_byte,
2985 host_byte, driver_byte);
03bbfee5 2986
1a614f50 2987 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 2988 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 2989 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 2990 "has SCSI Status 0x%x\n",
2991 cmd, cmd->err_info->ScsiStatus);
1a614f50 2992 return error_value;
03bbfee5
MMOD		 2993 }
2994
2995 /* check the sense key */
2996 sense_key = 0xf & cmd->err_info->SenseInfo[2];
2997 /* no status or recovered error */
33659ebb
CH		 2998 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
2999 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3000 error_value = 0;
03bbfee5 3001
0a9279cc 3002 if (check_for_unit_attention(h, cmd)) {
33659ebb 3003 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3004 return 0;
3005 }
3006
33659ebb
CH		 3007 /* Not SG_IO or similar? */
3008 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3009 if (error_value != 0)
b2a4a43d 3010 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3011 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3012 return error_value;
03bbfee5
MMOD		 3013 }
3014
3015 /* SG_IO or similar, copy sense data back */
3016 if (cmd->rq->sense) {
3017 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3018 cmd->rq->sense_len = cmd->err_info->SenseLen;
3019 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3020 cmd->rq->sense_len);
3021 } else
3022 cmd->rq->sense_len = 0;
3023
1a614f50 3024 return error_value;
03bbfee5
MMOD		 3025}
3026
7c832835 3027/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3028 * buffers for the completed job. Note that this function does not need
3029 * to hold the hba/queue lock.
7c832835
BH		 3030 */
3031static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3032 int timeout)
1da177e4 3033{
1da177e4 3034 int retry_cmd = 0;
198b7660
MMOD		 3035 struct request *rq = cmd->rq;
3036
3037 rq->errors = 0;
7c832835 3038
1da177e4 3039 if (timeout)
1a614f50 3040 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3041
d38ae168
MMOD		 3042 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3043 goto after_error_processing;
7c832835 3044
d38ae168 3045 switch (cmd->err_info->CommandStatus) {
d38ae168 3046 case CMD_TARGET_STATUS:
0a9279cc 3047 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3048 break;
3049 case CMD_DATA_UNDERRUN:
33659ebb 3050 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3051 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3052 " completed with data underrun "
3053 "reported\n", cmd);
c3a4d78c 3054 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3055 }
d38ae168
MMOD		 3056 break;
3057 case CMD_DATA_OVERRUN:
33659ebb 3058 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3059 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3060 " completed with data overrun "
3061 "reported\n", cmd);
d38ae168
MMOD		 3062 break;
3063 case CMD_INVALID:
b2a4a43d 3064 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3065 "reported invalid\n", cmd);
1a614f50
SC		 3066 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3067 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3068 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3069 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3070 break;
3071 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3072 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3073 "protocol error\n", cmd);
1a614f50
SC		 3074 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3075 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3076 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3077 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3078 break;
3079 case CMD_HARDWARE_ERR:
b2a4a43d 3080 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3081 " hardware error\n", cmd);
1a614f50
SC		 3082 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3083 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3084 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3085 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3086 break;
3087 case CMD_CONNECTION_LOST:
b2a4a43d 3088 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3089 "connection lost\n", cmd);
1a614f50
SC		 3090 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3091 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3092 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3093 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3094 break;
3095 case CMD_ABORTED:
b2a4a43d 3096 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3097 "aborted\n", cmd);
1a614f50
SC		 3098 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3099 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3100 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3101 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3102 break;
3103 case CMD_ABORT_FAILED:
b2a4a43d 3104 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3105 "abort failed\n", cmd);
1a614f50
SC		 3106 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3107 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3108 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3109 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3110 break;
3111 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3112 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3113 "abort %p\n", h->ctlr, cmd);
3114 if (cmd->retry_count < MAX_CMD_RETRIES) {
3115 retry_cmd = 1;
b2a4a43d 3116 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3117 cmd->retry_count++;
3118 } else
b2a4a43d
SC		 3119 dev_warn(&h->pdev->dev,
3120 "%p retried too many times\n", cmd);
1a614f50
SC		 3121 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3122 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3123 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3124 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3125 break;
3126 case CMD_TIMEOUT:
b2a4a43d 3127 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3128 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3129 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3130 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3131 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3132 break;
3133 default:
b2a4a43d 3134 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3135 "unknown status %x\n", cmd,
3136 cmd->err_info->CommandStatus);
1a614f50
SC		 3137 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3138 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3139 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3140 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3141 }
d38ae168
MMOD		 3142
3143after_error_processing:
3144
1da177e4 3145 /* We need to return this command */
7c832835
BH		 3146 if (retry_cmd) {
3147 resend_cciss_cmd(h, cmd);
1da177e4 3148 return;
7c832835 3149 }
03bbfee5 3150 cmd->rq->completion_data = cmd;
a9925a06 3151 blk_complete_request(cmd->rq);
1da177e4
LT		 3152}
3153
0c2b3908
MM		 3154static inline u32 cciss_tag_contains_index(u32 tag)
3155{
5e216153 3156#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3157 return tag & DIRECT_LOOKUP_BIT;
3158}
3159
3160static inline u32 cciss_tag_to_index(u32 tag)
3161{
5e216153 3162#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3163 return tag >> DIRECT_LOOKUP_SHIFT;
3164}
3165
3166static inline u32 cciss_tag_discard_error_bits(u32 tag)
3167{
3168#define CCISS_ERROR_BITS 0x03
3169 return tag & ~CCISS_ERROR_BITS;
3170}
3171
3172static inline void cciss_mark_tag_indexed(u32 *tag)
3173{
3174 *tag |= DIRECT_LOOKUP_BIT;
3175}
3176
3177static inline void cciss_set_tag_index(u32 *tag, u32 index)
3178{
3179 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3180}
3181
7c832835
BH		 3182/*
3183 * Get a request and submit it to the controller.
1da177e4 3184 */
165125e1 3185static void do_cciss_request(struct request_queue *q)
1da177e4 3186{
7c832835 3187 ctlr_info_t *h = q->queuedata;
1da177e4 3188 CommandList_struct *c;
00988a35
MMOD		 3189 sector_t start_blk;
3190 int seg;
1da177e4
LT		 3191 struct request *creq;
3192 u64bit temp64;
5c07a311
DB		 3193 struct scatterlist *tmp_sg;
3194 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3195 drive_info_struct *drv;
3196 int i, dir;
5c07a311
DB		 3197 int sg_index = 0;
3198 int chained = 0;
1da177e4
LT		 3199
3200 /* We call start_io here in case there is a command waiting on the
3201 * queue that has not been sent.
7c832835 3202 */
1da177e4
LT		 3203 if (blk_queue_plugged(q))
3204 goto startio;
3205
7c832835 3206 queue:
9934c8c0 3207 creq = blk_peek_request(q);
1da177e4
LT		 3208 if (!creq)
3209 goto startio;
3210
5c07a311 3211 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3212
6b4d96b8
SC		 3213 c = cmd_alloc(h);
3214 if (!c)
1da177e4
LT		 3215 goto full;
3216
9934c8c0 3217 blk_start_request(creq);
1da177e4 3218
5c07a311 3219 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3220 spin_unlock_irq(q->queue_lock);
3221
3222 c->cmd_type = CMD_RWREQ;
3223 c->rq = creq;
7c832835
BH		 3224
3225 /* fill in the request */
1da177e4 3226 drv = creq->rq_disk->private_data;
b028461d 3227 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3228 /* got command from pool, so use the command block index instead */
3229 /* for direct lookups. */
3230 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3231 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3232 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3233 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3234 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3235 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3236 c->Request.Type.Attribute = ATTR_SIMPLE;
3237 c->Request.Type.Direction =
a52de245 3238 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3239 c->Request.Timeout = 0; /* Don't time out */
7c832835 3240 c->Request.CDB[0] =
00988a35 3241 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3242 start_blk = blk_rq_pos(creq);
b2a4a43d 3243 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3244 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3245 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3246 seg = blk_rq_map_sg(q, creq, tmp_sg);
3247
7c832835 3248 /* get the DMA records for the setup */
1da177e4
LT		 3249 if (c->Request.Type.Direction == XFER_READ)
3250 dir = PCI_DMA_FROMDEVICE;
3251 else
3252 dir = PCI_DMA_TODEVICE;
3253
5c07a311
DB		 3254 curr_sg = c->SG;
3255 sg_index = 0;
3256 chained = 0;
3257
7c832835 3258 for (i = 0; i < seg; i++) {
5c07a311
DB		 3259 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3260 !chained && ((seg - i) > 1)) {
5c07a311 3261 /* Point to next chain block. */
dccc9b56 3262 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3263 sg_index = 0;
3264 chained = 1;
3265 }
3266 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3267 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3268 tmp_sg[i].offset,
3269 tmp_sg[i].length, dir);
3270 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3271 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3272 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3273 ++sg_index;
1da177e4 3274 }
d45033ef
SC		 3275 if (chained)
3276 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3277 (seg - (h->max_cmd_sgentries - 1)) *
3278 sizeof(SGDescriptor_struct));
5c07a311 3279
7c832835
BH		 3280 /* track how many SG entries we are using */
3281 if (seg > h->maxSG)
3282 h->maxSG = seg;
1da177e4 3283
b2a4a43d 3284 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3285 "chained[%d]\n",
3286 blk_rq_sectors(creq), seg, chained);
1da177e4 3287
5e216153
MM		 3288 c->Header.SGTotal = seg + chained;
3289 if (seg <= h->max_cmd_sgentries)
3290 c->Header.SGList = c->Header.SGTotal;
3291 else
5c07a311 3292 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3293 set_performant_mode(h, c);
5c07a311 3294
33659ebb 3295 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3296 if(h->cciss_read == CCISS_READ_10) {
3297 c->Request.CDB[1] = 0;
b028461d 3298 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3299 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3300 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3301 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3302 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3303 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3304 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3305 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3306 } else {
582539e5
RD		 3307 u32 upper32 = upper_32_bits(start_blk);
3308
03bbfee5
MMOD		 3309 c->Request.CDBLen = 16;
3310 c->Request.CDB[1]= 0;
b028461d 3311 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3312 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3313 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3314 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3315 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3316 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3317 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3318 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3319 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3320 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3321 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3322 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3323 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3324 }
33659ebb 3325 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3326 c->Request.CDBLen = creq->cmd_len;
3327 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3328 } else {
b2a4a43d
SC		 3329 dev_warn(&h->pdev->dev, "bad request type %d\n",
3330 creq->cmd_type);
03bbfee5 3331 BUG();
00988a35 3332 }
1da177e4
LT		 3333
3334 spin_lock_irq(q->queue_lock);
3335
8a3173de 3336 addQ(&h->reqQ, c);
1da177e4 3337 h->Qdepth++;
7c832835
BH		 3338 if (h->Qdepth > h->maxQsinceinit)
3339 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3340
3341 goto queue;
00988a35 3342full:
1da177e4 3343 blk_stop_queue(q);
00988a35 3344startio:
1da177e4
LT		 3345 /* We will already have the driver lock here so not need
3346 * to lock it.
7c832835 3347 */
1da177e4
LT		 3348 start_io(h);
3349}
3350
3da8b713 3351static inline unsigned long get_next_completion(ctlr_info_t *h)
3352{
3da8b713 3353 return h->access.command_completed(h);
3da8b713 3354}
3355
3356static inline int interrupt_pending(ctlr_info_t *h)
3357{
3da8b713 3358 return h->access.intr_pending(h);
3da8b713 3359}
3360
3361static inline long interrupt_not_for_us(ctlr_info_t *h)
3362{
81125860 3363 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3364 (h->interrupts_enabled == 0));
3da8b713 3365}
3366
0c2b3908
MM		 3367static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3368 u32 raw_tag)
1da177e4 3369{
0c2b3908
MM		 3370 if (unlikely(tag_index >= h->nr_cmds)) {
3371 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3372 return 1;
3373 }
3374 return 0;
3375}
3376
3377static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3378 u32 raw_tag)
3379{
3380 removeQ(c);
3381 if (likely(c->cmd_type == CMD_RWREQ))
3382 complete_command(h, c, 0);
3383 else if (c->cmd_type == CMD_IOCTL_PEND)
3384 complete(c->waiting);
3385#ifdef CONFIG_CISS_SCSI_TAPE
3386 else if (c->cmd_type == CMD_SCSI)
3387 complete_scsi_command(c, 0, raw_tag);
3388#endif
3389}
3390
29979a71
MM		 3391static inline u32 next_command(ctlr_info_t *h)
3392{
3393 u32 a;
3394
3395 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3396 return h->access.command_completed(h);
3397
3398 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3399 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3400 (h->reply_pool_head)++;
3401 h->commands_outstanding--;
3402 } else {
3403 a = FIFO_EMPTY;
3404 }
3405 /* Check for wraparound */
3406 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3407 h->reply_pool_head = h->reply_pool;
3408 h->reply_pool_wraparound ^= 1;
3409 }
3410 return a;
3411}
3412
0c2b3908
MM		 3413/* process completion of an indexed ("direct lookup") command */
3414static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3415{
3416 u32 tag_index;
1da177e4 3417 CommandList_struct *c;
0c2b3908
MM		 3418
3419 tag_index = cciss_tag_to_index(raw_tag);
3420 if (bad_tag(h, tag_index, raw_tag))
5e216153 3421 return next_command(h);
0c2b3908
MM		 3422 c = h->cmd_pool + tag_index;
3423 finish_cmd(h, c, raw_tag);
5e216153 3424 return next_command(h);
0c2b3908
MM		 3425}
3426
3427/* process completion of a non-indexed command */
3428static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3429{
3430 u32 tag;
3431 CommandList_struct *c = NULL;
3432 struct hlist_node *tmp;
3433 __u32 busaddr_masked, tag_masked;
3434
3435 tag = cciss_tag_discard_error_bits(raw_tag);
3436 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3437 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3438 tag_masked = cciss_tag_discard_error_bits(tag);
3439 if (busaddr_masked == tag_masked) {
3440 finish_cmd(h, c, raw_tag);
5e216153 3441 return next_command(h);
0c2b3908
MM		 3442 }
3443 }
3444 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3445 return next_command(h);
0c2b3908
MM		 3446}
3447
3448static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3449{
3450 ctlr_info_t *h = dev_id;
1da177e4 3451 unsigned long flags;
0c2b3908 3452 u32 raw_tag;
1da177e4 3453
3da8b713 3454 if (interrupt_not_for_us(h))
1da177e4 3455 return IRQ_NONE;
f70dba83 3456 spin_lock_irqsave(&h->lock, flags);
3da8b713 3457 while (interrupt_pending(h)) {
0c2b3908
MM		 3458 raw_tag = get_next_completion(h);
3459 while (raw_tag != FIFO_EMPTY) {
3460 if (cciss_tag_contains_index(raw_tag))
3461 raw_tag = process_indexed_cmd(h, raw_tag);
3462 else
3463 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3464 }
3465 }
f70dba83 3466 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3467 return IRQ_HANDLED;
3468}
1da177e4 3469
0c2b3908
MM		 3470/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3471 * check the interrupt pending register because it is not set.
3472 */
3473static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3474{
3475 ctlr_info_t *h = dev_id;
3476 unsigned long flags;
3477 u32 raw_tag;
8a3173de 3478
f70dba83 3479 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3480 raw_tag = get_next_completion(h);
3481 while (raw_tag != FIFO_EMPTY) {
3482 if (cciss_tag_contains_index(raw_tag))
3483 raw_tag = process_indexed_cmd(h, raw_tag);
3484 else
3485 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3486 }
f70dba83 3487 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3488 return IRQ_HANDLED;
3489}
7c832835 3490
b368c9dd
AP		 3491/**
3492 * add_to_scan_list() - add controller to rescan queue
3493 * @h: Pointer to the controller.
3494 *
3495 * Adds the controller to the rescan queue if not already on the queue.
3496 *
3497 * returns 1 if added to the queue, 0 if skipped (could be on the
3498 * queue already, or the controller could be initializing or shutting
3499 * down).
3500 **/
3501static int add_to_scan_list(struct ctlr_info *h)
3502{
3503 struct ctlr_info *test_h;
3504 int found = 0;
3505 int ret = 0;
3506
3507 if (h->busy_initializing)
3508 return 0;
3509
3510 if (!mutex_trylock(&h->busy_shutting_down))
3511 return 0;
3512
3513 mutex_lock(&scan_mutex);
3514 list_for_each_entry(test_h, &scan_q, scan_list) {
3515 if (test_h == h) {
3516 found = 1;
3517 break;
3518 }
3519 }
3520 if (!found && !h->busy_scanning) {
3521 INIT_COMPLETION(h->scan_wait);
3522 list_add_tail(&h->scan_list, &scan_q);
3523 ret = 1;
3524 }
3525 mutex_unlock(&scan_mutex);
3526 mutex_unlock(&h->busy_shutting_down);
3527
3528 return ret;
3529}
3530
3531/**
3532 * remove_from_scan_list() - remove controller from rescan queue
3533 * @h: Pointer to the controller.
3534 *
3535 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3536 * the controller is currently conducting a rescan. The controller
3537 * can be in one of three states:
3538 * 1. Doesn't need a scan
3539 * 2. On the scan list, but not scanning yet (we remove it)
3540 * 3. Busy scanning (and not on the list). In this case we want to wait for
3541 * the scan to complete to make sure the scanning thread for this
3542 * controller is completely idle.
b368c9dd
AP		 3543 **/
3544static void remove_from_scan_list(struct ctlr_info *h)
3545{
3546 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3547
3548 mutex_lock(&scan_mutex);
3549 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3550 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3551 list_del(&h->scan_list);
3552 complete_all(&h->scan_wait);
3553 mutex_unlock(&scan_mutex);
3554 return;
3555 }
3556 }
fd8489cf
SC		 3557 if (h->busy_scanning) { /* state 3. */
3558 mutex_unlock(&scan_mutex);
b368c9dd 3559 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3560 } else { /* state 1, nothing to do. */
3561 mutex_unlock(&scan_mutex);
3562 }
b368c9dd
AP		 3563}
3564
3565/**
3566 * scan_thread() - kernel thread used to rescan controllers
3567 * @data: Ignored.
3568 *
3569 * A kernel thread used scan for drive topology changes on
3570 * controllers. The thread processes only one controller at a time
3571 * using a queue. Controllers are added to the queue using
3572 * add_to_scan_list() and removed from the queue either after done
3573 * processing or using remove_from_scan_list().
3574 *
3575 * returns 0.
3576 **/
0a9279cc
MM		 3577static int scan_thread(void *data)
3578{
b368c9dd 3579 struct ctlr_info *h;
0a9279cc 3580
b368c9dd
AP		 3581 while (1) {
3582 set_current_state(TASK_INTERRUPTIBLE);
3583 schedule();
0a9279cc
MM		 3584 if (kthread_should_stop())
3585 break;
b368c9dd
AP		 3586
3587 while (1) {
3588 mutex_lock(&scan_mutex);
3589 if (list_empty(&scan_q)) {
3590 mutex_unlock(&scan_mutex);
3591 break;
3592 }
3593
3594 h = list_entry(scan_q.next,
3595 struct ctlr_info,
3596 scan_list);
3597 list_del(&h->scan_list);
3598 h->busy_scanning = 1;
3599 mutex_unlock(&scan_mutex);
3600
d06dfbd2
SC		 3601 rebuild_lun_table(h, 0, 0);
3602 complete_all(&h->scan_wait);
3603 mutex_lock(&scan_mutex);
3604 h->busy_scanning = 0;
3605 mutex_unlock(&scan_mutex);
b368c9dd 3606 }
0a9279cc 3607 }
b368c9dd 3608
0a9279cc
MM		 3609 return 0;
3610}
3611
3612static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3613{
3614 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3615 return 0;
3616
3617 switch (c->err_info->SenseInfo[12]) {
3618 case STATE_CHANGED:
b2a4a43d
SC		 3619 dev_warn(&h->pdev->dev, "a state change "
3620 "detected, command retried\n");
0a9279cc
MM		 3621 return 1;
3622 break;
3623 case LUN_FAILED:
b2a4a43d
SC		 3624 dev_warn(&h->pdev->dev, "LUN failure "
3625 "detected, action required\n");
0a9279cc
MM		 3626 return 1;
3627 break;
3628 case REPORT_LUNS_CHANGED:
b2a4a43d 3629 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3630 /*
3631 * Here, we could call add_to_scan_list and wake up the scan thread,
3632 * except that it's quite likely that we will get more than one
3633 * REPORT_LUNS_CHANGED condition in quick succession, which means
3634 * that those which occur after the first one will likely happen
3635 * *during* the scan_thread's rescan. And the rescan code is not
3636 * robust enough to restart in the middle, undoing what it has already
3637 * done, and it's not clear that it's even possible to do this, since
3638 * part of what it does is notify the block layer, which starts
3639 * doing it's own i/o to read partition tables and so on, and the
3640 * driver doesn't have visibility to know what might need undoing.
3641 * In any event, if possible, it is horribly complicated to get right
3642 * so we just don't do it for now.
3643 *
3644 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3645 */
0a9279cc
MM		 3646 return 1;
3647 break;
3648 case POWER_OR_RESET:
b2a4a43d
SC		 3649 dev_warn(&h->pdev->dev,
3650 "a power on or device reset detected\n");
0a9279cc
MM		 3651 return 1;
3652 break;
3653 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3654 dev_warn(&h->pdev->dev,
3655 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3656 return 1;
3657 break;
3658 default:
b2a4a43d
SC		 3659 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3660 return 1;
0a9279cc
MM		 3661 }
3662}
3663
7c832835 3664/*
d14c4ab5 3665 * We cannot read the structure directly, for portability we must use
1da177e4 3666 * the io functions.
7c832835 3667 * This is for debug only.
1da177e4 3668 */
b2a4a43d 3669static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3670{
3671 int i;
3672 char temp_name[17];
b2a4a43d 3673 CfgTable_struct *tb = h->cfgtable;
1da177e4 3674
b2a4a43d
SC		 3675 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3676 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3677 for (i = 0; i < 4; i++)
1da177e4 3678 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3679 temp_name[4] = '\0';
b2a4a43d
SC		 3680 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3681 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3682 readl(&(tb->SpecValence)));
3683 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3684 readl(&(tb->TransportSupport)));
b2a4a43d 3685 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3686 readl(&(tb->TransportActive)));
b2a4a43d 3687 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3688 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3689 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3690 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3691 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3692 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3693 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3694 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3695 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3696 readl(&(tb->BusTypes)));
7c832835 3697 for (i = 0; i < 16; i++)
1da177e4
LT		 3698 temp_name[i] = readb(&(tb->ServerName[i]));
3699 temp_name[16] = '\0';
b2a4a43d
SC		 3700 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3701 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3702 readl(&(tb->HeartBeat)));
1da177e4 3703}
1da177e4 3704
7c832835 3705static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3706{
3707 int i, offset, mem_type, bar_type;
7c832835 3708 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3709 return 0;
3710 offset = 0;
7c832835
BH		 3711 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3712 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3713 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3714 offset += 4;
3715 else {
3716 mem_type = pci_resource_flags(pdev, i) &
7c832835 3717 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3718 switch (mem_type) {
7c832835
BH		 3719 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3720 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3721 offset += 4; /* 32 bit */
3722 break;
3723 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3724 offset += 8;
3725 break;
3726 default: /* reserved in PCI 2.2 */
b2a4a43d 3727 dev_warn(&pdev->dev,
7c832835
BH		 3728 "Base address is invalid\n");
3729 return -1;
1da177e4
LT		 3730 break;
3731 }
3732 }
7c832835
BH		 3733 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3734 return i + 1;
1da177e4
LT		 3735 }
3736 return -1;
3737}
3738
5e216153
MM		 3739/* Fill in bucket_map[], given nsgs (the max number of
3740 * scatter gather elements supported) and bucket[],
3741 * which is an array of 8 integers. The bucket[] array
3742 * contains 8 different DMA transfer sizes (in 16
3743 * byte increments) which the controller uses to fetch
3744 * commands. This function fills in bucket_map[], which
3745 * maps a given number of scatter gather elements to one of
3746 * the 8 DMA transfer sizes. The point of it is to allow the
3747 * controller to only do as much DMA as needed to fetch the
3748 * command, with the DMA transfer size encoded in the lower
3749 * bits of the command address.
3750 */
3751static void calc_bucket_map(int bucket[], int num_buckets,
3752 int nsgs, int *bucket_map)
3753{
3754 int i, j, b, size;
3755
3756 /* even a command with 0 SGs requires 4 blocks */
3757#define MINIMUM_TRANSFER_BLOCKS 4
3758#define NUM_BUCKETS 8
3759 /* Note, bucket_map must have nsgs+1 entries. */
3760 for (i = 0; i <= nsgs; i++) {
3761 /* Compute size of a command with i SG entries */
3762 size = i + MINIMUM_TRANSFER_BLOCKS;
3763 b = num_buckets; /* Assume the biggest bucket */
3764 /* Find the bucket that is just big enough */
3765 for (j = 0; j < 8; j++) {
3766 if (bucket[j] >= size) {
3767 b = j;
3768 break;
3769 }
3770 }
3771 /* for a command with i SG entries, use bucket b. */
3772 bucket_map[i] = b;
3773 }
3774}
3775
0f8a6a1e
SC		 3776static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3777{
3778 int i;
3779
3780 /* under certain very rare conditions, this can take awhile.
3781 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3782 * as we enter this code.) */
3783 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3784 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3785 break;
3786 msleep(10);
3787 }
3788}
3789
b9933135
SC		 3790static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3791{
3792 /* This is a bit complicated. There are 8 registers on
3793 * the controller which we write to to tell it 8 different
3794 * sizes of commands which there may be. It's a way of
3795 * reducing the DMA done to fetch each command. Encoded into
3796 * each command's tag are 3 bits which communicate to the controller
3797 * which of the eight sizes that command fits within. The size of
3798 * each command depends on how many scatter gather entries there are.
3799 * Each SG entry requires 16 bytes. The eight registers are programmed
3800 * with the number of 16-byte blocks a command of that size requires.
3801 * The smallest command possible requires 5 such 16 byte blocks.
3802 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3803 * blocks. Note, this only extends to the SG entries contained
3804 * within the command block, and does not extend to chained blocks
3805 * of SG elements. bft[] contains the eight values we write to
3806 * the registers. They are not evenly distributed, but have more
3807 * sizes for small commands, and fewer sizes for larger commands.
3808 */
5e216153 3809 __u32 trans_offset;
b9933135 3810 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3811 /*
3812 * 5 = 1 s/g entry or 4k
3813 * 6 = 2 s/g entry or 8k
3814 * 8 = 4 s/g entry or 16k
3815 * 10 = 6 s/g entry or 24k
3816 */
5e216153 3817 unsigned long register_value;
5e216153
MM		 3818 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3819
5e216153
MM		 3820 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3821
3822 /* Controller spec: zero out this buffer. */
3823 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3824 h->reply_pool_head = h->reply_pool;
3825
3826 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3827 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3828 h->blockFetchTable);
3829 writel(bft[0], &h->transtable->BlockFetch0);
3830 writel(bft[1], &h->transtable->BlockFetch1);
3831 writel(bft[2], &h->transtable->BlockFetch2);
3832 writel(bft[3], &h->transtable->BlockFetch3);
3833 writel(bft[4], &h->transtable->BlockFetch4);
3834 writel(bft[5], &h->transtable->BlockFetch5);
3835 writel(bft[6], &h->transtable->BlockFetch6);
3836 writel(bft[7], &h->transtable->BlockFetch7);
3837
3838 /* size of controller ring buffer */
3839 writel(h->max_commands, &h->transtable->RepQSize);
3840 writel(1, &h->transtable->RepQCount);
3841 writel(0, &h->transtable->RepQCtrAddrLow32);
3842 writel(0, &h->transtable->RepQCtrAddrHigh32);
3843 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3844 writel(0, &h->transtable->RepQAddr0High32);
3845 writel(CFGTBL_Trans_Performant,
3846 &(h->cfgtable->HostWrite.TransportRequest));
3847
5e216153 3848 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3849 cciss_wait_for_mode_change_ack(h);
5e216153 3850 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3851 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3852 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3853 " performant mode\n");
b9933135
SC		 3854}
3855
3856static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3857{
3858 __u32 trans_support;
3859
3860 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3861 /* Attempt to put controller into performant mode if supported */
3862 /* Does board support performant mode? */
3863 trans_support = readl(&(h->cfgtable->TransportSupport));
3864 if (!(trans_support & PERFORMANT_MODE))
3865 return;
3866
b2a4a43d 3867 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 3868 /* Performant mode demands commands on a 32 byte boundary
3869 * pci_alloc_consistent aligns on page boundarys already.
3870 * Just need to check if divisible by 32
3871 */
3872 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 3873 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 3874 "cciss info: command size[",
3875 (int)sizeof(CommandList_struct),
3876 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 3877 return;
3878 }
3879
b9933135
SC		 3880 /* Performant mode ring buffer and supporting data structures */
3881 h->reply_pool = (__u64 *)pci_alloc_consistent(
3882 h->pdev, h->max_commands * sizeof(__u64),
3883 &(h->reply_pool_dhandle));
3884
3885 /* Need a block fetch table for performant mode */
3886 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3887 sizeof(__u32)), GFP_KERNEL);
3888
3889 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3890 goto clean_up;
3891
3892 cciss_enter_performant_mode(h);
3893
5e216153
MM		 3894 /* Change the access methods to the performant access methods */
3895 h->access = SA5_performant_access;
b9933135 3896 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 3897
3898 return;
3899clean_up:
3900 kfree(h->blockFetchTable);
3901 if (h->reply_pool)
3902 pci_free_consistent(h->pdev,
3903 h->max_commands * sizeof(__u64),
3904 h->reply_pool,
3905 h->reply_pool_dhandle);
3906 return;
3907
3908} /* cciss_put_controller_into_performant_mode */
3909
fb86a35b
MM		 3910/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3911 * controllers that are capable. If not, we use IO-APIC mode.
3912 */
3913
f70dba83 3914static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 3915{
3916#ifdef CONFIG_PCI_MSI
7c832835
BH		 3917 int err;
3918 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3919 {0, 2}, {0, 3}
3920 };
fb86a35b
MM		 3921
3922 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 3923 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3924 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 3925 goto default_int_mode;
3926
f70dba83
SC		 3927 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3928 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 3929 if (!err) {
f70dba83
SC		 3930 h->intr[0] = cciss_msix_entries[0].vector;
3931 h->intr[1] = cciss_msix_entries[1].vector;
3932 h->intr[2] = cciss_msix_entries[2].vector;
3933 h->intr[3] = cciss_msix_entries[3].vector;
3934 h->msix_vector = 1;
7c832835
BH		 3935 return;
3936 }
3937 if (err > 0) {
b2a4a43d
SC		 3938 dev_warn(&h->pdev->dev,
3939 "only %d MSI-X vectors available\n", err);
1ecb9c0f 3940 goto default_int_mode;
7c832835 3941 } else {
b2a4a43d
SC		 3942 dev_warn(&h->pdev->dev,
3943 "MSI-X init failed %d\n", err);
1ecb9c0f 3944 goto default_int_mode;
7c832835
BH		 3945 }
3946 }
f70dba83
SC		 3947 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3948 if (!pci_enable_msi(h->pdev))
3949 h->msi_vector = 1;
3950 else
b2a4a43d 3951 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 3952 }
1ecb9c0f 3953default_int_mode:
7c832835 3954#endif /* CONFIG_PCI_MSI */
fb86a35b 3955 /* if we get here we're going to use the default interrupt mode */
f70dba83 3956 h->intr[PERF_MODE_INT] = h->pdev->irq;
fb86a35b
MM		 3957 return;
3958}
3959
6539fa9b 3960static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 3961{
6539fa9b
SC		 3962 int i;
3963 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 3964
3965 subsystem_vendor_id = pdev->subsystem_vendor;
3966 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 3967 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3968 subsystem_vendor_id;
2ec24ff1
SC		 3969
3970 for (i = 0; i < ARRAY_SIZE(products); i++) {
3971 /* Stand aside for hpsa driver on request */
3972 if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
3973 return -ENODEV;
6539fa9b
SC		 3974 if (*board_id == products[i].board_id)
3975 return i;
2ec24ff1 3976 }
6539fa9b
SC		 3977 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3978 *board_id);
3979 return -ENODEV;
3980}
1da177e4 3981
dd9c426e
SC		 3982static inline bool cciss_board_disabled(ctlr_info_t *h)
3983{
3984 u16 command;
1da177e4 3985
dd9c426e
SC		 3986 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
3987 return ((command & PCI_COMMAND_MEMORY) == 0);
3988}
1da177e4 3989
d474830d
SC		 3990static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
3991 unsigned long *memory_bar)
3992{
3993 int i;
4e570309 3994
d474830d
SC		 3995 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3996 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3997 /* addressing mode bits already removed */
3998 *memory_bar = pci_resource_start(pdev, i);
3999 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4000 *memory_bar);
4001 return 0;
4002 }
4003 dev_warn(&pdev->dev, "no memory BAR found\n");
4004 return -ENODEV;
4005}
1da177e4 4006
e99ba136
SC		 4007static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
4008{
4009 int i;
4010 u32 scratchpad;
1da177e4 4011
e99ba136
SC		 4012 for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
4013 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4014 if (scratchpad == CCISS_FIRMWARE_READY)
4015 return 0;
4016 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4017 }
e99ba136
SC		 4018 dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
4019 return -ENODEV;
4020}
e1438581 4021
8e93bf6d
SC		 4022static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4023 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4024 u64 *cfg_offset)
4025{
4026 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4027 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4028 *cfg_base_addr &= (u32) 0x0000ffff;
4029 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4030 if (*cfg_base_addr_index == -1) {
4031 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4032 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4033 return -ENODEV;
4034 }
4035 return 0;
4036}
1da177e4 4037
4809d098
SC		 4038static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4039{
4040 u64 cfg_offset;
4041 u32 cfg_base_addr;
4042 u64 cfg_base_addr_index;
4043 u32 trans_offset;
8e93bf6d 4044 int rc;
1da177e4 4045
8e93bf6d
SC		 4046 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4047 &cfg_base_addr_index, &cfg_offset);
4048 if (rc)
4049 return rc;
4809d098 4050 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4051 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4052 if (!h->cfgtable)
4053 return -ENOMEM;
4054 /* Find performant mode table. */
8e93bf6d 4055 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4056 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4057 cfg_base_addr_index)+cfg_offset+trans_offset,
4058 sizeof(*h->transtable));
4059 if (!h->transtable)
4060 return -ENOMEM;
4061 return 0;
4062}
1da177e4 4063
adfbc1ff
SC		 4064static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4065{
4066 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4067 if (h->max_commands < 16) {
4068 dev_warn(&h->pdev->dev, "Controller reports "
4069 "max supported commands of %d, an obvious lie. "
4070 "Using 16. Ensure that firmware is up to date.\n",
4071 h->max_commands);
4072 h->max_commands = 16;
1da177e4 4073 }
adfbc1ff 4074}
1da177e4 4075
afadbf4b
SC		 4076/* Interrogate the hardware for some limits:
4077 * max commands, max SG elements without chaining, and with chaining,
4078 * SG chain block size, etc.
4079 */
4080static void __devinit cciss_find_board_params(ctlr_info_t *h)
4081{
adfbc1ff 4082 cciss_get_max_perf_mode_cmds(h);
afadbf4b
SC		 4083 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4084 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4085 /*
afadbf4b 4086 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4087 * Howvever spec says if 0, use 31
4088 */
afadbf4b
SC		 4089 h->max_cmd_sgentries = 31;
4090 if (h->maxsgentries > 512) {
4091 h->max_cmd_sgentries = 32;
4092 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4093 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4094 } else {
afadbf4b
SC		 4095 h->maxsgentries = 31; /* default to traditional values */
4096 h->chainsize = 0;
5c07a311 4097 }
afadbf4b 4098}
5c07a311 4099
501b92cd
SC		 4100static inline bool CISS_signature_present(ctlr_info_t *h)
4101{
4102 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4103 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4104 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4105 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4106 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4107 return false;
1da177e4 4108 }
501b92cd
SC		 4109 return true;
4110}
4111
322e304c
SC		 4112/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4113static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4114{
1da177e4 4115#ifdef CONFIG_X86
322e304c
SC		 4116 u32 prefetch;
4117
4118 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4119 prefetch |= 0x100;
4120 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4121#endif
322e304c 4122}
1da177e4 4123
bfd63ee5
SC		 4124/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4125 * in a prefetch beyond physical memory.
4126 */
4127static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4128{
4129 u32 dma_prefetch;
4130 __u32 dma_refetch;
4131
4132 if (h->board_id != 0x3225103C)
4133 return;
4134 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4135 dma_prefetch |= 0x8000;
4136 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4137 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4138 dma_refetch |= 0x1;
4139 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4140}
4141
f70dba83 4142static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4143{
4809d098 4144 int prod_index, err;
6539fa9b 4145
f70dba83 4146 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4147 if (prod_index < 0)
2ec24ff1 4148 return -ENODEV;
f70dba83
SC		 4149 h->product_name = products[prod_index].product_name;
4150 h->access = *(products[prod_index].access);
1da177e4 4151
f70dba83 4152 if (cciss_board_disabled(h)) {
b2a4a43d 4153 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4154 return -ENODEV;
1da177e4 4155 }
f70dba83 4156 err = pci_enable_device(h->pdev);
7c832835 4157 if (err) {
b2a4a43d 4158 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4159 return err;
f92e2f5f
MM		 4160 }
4161
f70dba83 4162 err = pci_request_regions(h->pdev, "cciss");
4e570309 4163 if (err) {
b2a4a43d
SC		 4164 dev_warn(&h->pdev->dev,
4165 "Cannot obtain PCI resources, aborting\n");
872225ca 4166 return err;
4e570309 4167 }
1da177e4 4168
b2a4a43d
SC		 4169 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4170 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4171
fb86a35b
MM		 4172/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4173 * else we use the IO-APIC interrupt assigned to us by system ROM.
4174 */
f70dba83
SC		 4175 cciss_interrupt_mode(h);
4176 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4177 if (err)
e1438581 4178 goto err_out_free_res;
f70dba83
SC		 4179 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4180 if (!h->vaddr) {
da550321
SC		 4181 err = -ENOMEM;
4182 goto err_out_free_res;
7c832835 4183 }
f70dba83 4184 err = cciss_wait_for_board_ready(h);
e99ba136 4185 if (err)
4e570309 4186 goto err_out_free_res;
f70dba83 4187 err = cciss_find_cfgtables(h);
4809d098 4188 if (err)
4e570309 4189 goto err_out_free_res;
b2a4a43d 4190 print_cfg_table(h);
f70dba83 4191 cciss_find_board_params(h);
1da177e4 4192
f70dba83 4193 if (!CISS_signature_present(h)) {
c33ac89b 4194 err = -ENODEV;
4e570309 4195 goto err_out_free_res;
1da177e4 4196 }
f70dba83
SC		 4197 cciss_enable_scsi_prefetch(h);
4198 cciss_p600_dma_prefetch_quirk(h);
4199 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4200 return 0;
4201
5faad620 4202err_out_free_res:
872225ca
MM		 4203 /*
4204 * Deliberately omit pci_disable_device(): it does something nasty to
4205 * Smart Array controllers that pci_enable_device does not undo
4206 */
f70dba83
SC		 4207 if (h->transtable)
4208 iounmap(h->transtable);
4209 if (h->cfgtable)
4210 iounmap(h->cfgtable);
4211 if (h->vaddr)
4212 iounmap(h->vaddr);
4213 pci_release_regions(h->pdev);
c33ac89b 4214 return err;
1da177e4
LT		 4215}
4216
6ae5ce8e
MM		 4217/* Function to find the first free pointer into our hba[] array
4218 * Returns -1 if no free entries are left.
7c832835 4219 */
b2a4a43d 4220static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4221{
799202cb 4222 int i;
1da177e4 4223
7c832835 4224 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4225 if (!hba[i]) {
f70dba83 4226 ctlr_info_t *h;
f2912a12 4227
f70dba83
SC		 4228 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4229 if (!h)
1da177e4 4230 goto Enomem;
f70dba83 4231 hba[i] = h;
1da177e4
LT		 4232 return i;
4233 }
4234 }
b2a4a43d 4235 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4236 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4237 return -1;
4238Enomem:
b2a4a43d 4239 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4240 return -1;
4241}
4242
f70dba83 4243static void free_hba(ctlr_info_t *h)
1da177e4 4244{
2c935593 4245 int i;
1da177e4 4246
f70dba83 4247 hba[h->ctlr] = NULL;
2c935593
SC		 4248 for (i = 0; i < h->highest_lun + 1; i++)
4249 if (h->gendisk[i] != NULL)
4250 put_disk(h->gendisk[i]);
4251 kfree(h);
1da177e4
LT		 4252}
4253
82eb03cf
CC		 4254/* Send a message CDB to the firmware. */
4255static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4256{
4257 typedef struct {
4258 CommandListHeader_struct CommandHeader;
4259 RequestBlock_struct Request;
4260 ErrDescriptor_struct ErrorDescriptor;
4261 } Command;
4262 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4263 Command *cmd;
4264 dma_addr_t paddr64;
4265 uint32_t paddr32, tag;
4266 void __iomem *vaddr;
4267 int i, err;
4268
4269 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4270 if (vaddr == NULL)
4271 return -ENOMEM;
4272
4273 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4274 CCISS commands, so they must be allocated from the lower 4GiB of
4275 memory. */
e930438c 4276 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4277 if (err) {
4278 iounmap(vaddr);
4279 return -ENOMEM;
4280 }
4281
4282 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4283 if (cmd == NULL) {
4284 iounmap(vaddr);
4285 return -ENOMEM;
4286 }
4287
4288 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4289 although there's no guarantee, we assume that the address is at
4290 least 4-byte aligned (most likely, it's page-aligned). */
4291 paddr32 = paddr64;
4292
4293 cmd->CommandHeader.ReplyQueue = 0;
4294 cmd->CommandHeader.SGList = 0;
4295 cmd->CommandHeader.SGTotal = 0;
4296 cmd->CommandHeader.Tag.lower = paddr32;
4297 cmd->CommandHeader.Tag.upper = 0;
4298 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4299
4300 cmd->Request.CDBLen = 16;
4301 cmd->Request.Type.Type = TYPE_MSG;
4302 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4303 cmd->Request.Type.Direction = XFER_NONE;
4304 cmd->Request.Timeout = 0; /* Don't time out */
4305 cmd->Request.CDB[0] = opcode;
4306 cmd->Request.CDB[1] = type;
4307 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4308
4309 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4310 cmd->ErrorDescriptor.Addr.upper = 0;
4311 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4312
4313 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4314
4315 for (i = 0; i < 10; i++) {
4316 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4317 if ((tag & ~3) == paddr32)
4318 break;
4319 schedule_timeout_uninterruptible(HZ);
4320 }
4321
4322 iounmap(vaddr);
4323
4324 /* we leak the DMA buffer here ... no choice since the controller could
4325 still complete the command. */
4326 if (i == 10) {
b2a4a43d
SC		 4327 dev_err(&pdev->dev,
4328 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4329 opcode, type);
4330 return -ETIMEDOUT;
4331 }
4332
4333 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4334
4335 if (tag & 2) {
b2a4a43d 4336 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4337 opcode, type);
4338 return -EIO;
4339 }
4340
b2a4a43d 4341 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4342 opcode, type);
4343 return 0;
4344}
4345
4346#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4347#define cciss_noop(p) cciss_message(p, 3, 0)
4348
4349static __devinit int cciss_reset_msi(struct pci_dev *pdev)
4350{
4351/* the #defines are stolen from drivers/pci/msi.h. */
4352#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
4353#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
4354
4355 int pos;
4356 u16 control = 0;
4357
4358 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
4359 if (pos) {
4360 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4361 if (control & PCI_MSI_FLAGS_ENABLE) {
b2a4a43d 4362 dev_info(&pdev->dev, "resetting MSI\n");
82eb03cf
CC		 4363 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
4364 }
4365 }
4366
4367 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
4368 if (pos) {
4369 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4370 if (control & PCI_MSIX_FLAGS_ENABLE) {
b2a4a43d 4371 dev_info(&pdev->dev, "resetting MSI-X\n");
82eb03cf
CC		 4372 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
4373 }
4374 }
4375
4376 return 0;
4377}
4378
a6528d01
SC		 4379static int cciss_controller_hard_reset(struct pci_dev *pdev,
4380 void * __iomem vaddr, bool use_doorbell)
82eb03cf 4381{
a6528d01
SC		 4382 u16 pmcsr;
4383 int pos;
82eb03cf 4384
a6528d01
SC		 4385 if (use_doorbell) {
4386 /* For everything after the P600, the PCI power state method
4387 * of resetting the controller doesn't work, so we have this
4388 * other way using the doorbell register.
4389 */
4390 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4391 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4392 msleep(1000);
4393 } else { /* Try to do it the PCI power state way */
4394
4395 /* Quoting from the Open CISS Specification: "The Power
4396 * Management Control/Status Register (CSR) controls the power
4397 * state of the device. The normal operating state is D0,
4398 * CSR=00h. The software off state is D3, CSR=03h. To reset
4399 * the controller, place the interface device in D3 then to D0,
4400 * this causes a secondary PCI reset which will reset the
4401 * controller." */
4402
4403 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4404 if (pos == 0) {
4405 dev_err(&pdev->dev,
4406 "cciss_controller_hard_reset: "
4407 "PCI PM not supported\n");
4408 return -ENODEV;
4409 }
4410 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4411 /* enter the D3hot power management state */
4412 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4413 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4414 pmcsr |= PCI_D3hot;
4415 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4416
a6528d01 4417 msleep(500);
82eb03cf 4418
a6528d01
SC		 4419 /* enter the D0 power management state */
4420 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4421 pmcsr |= PCI_D0;
4422 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4423
a6528d01
SC		 4424 msleep(500);
4425 }
4426 return 0;
4427}
82eb03cf 4428
a6528d01
SC		 4429/* This does a hard reset of the controller using PCI power management
4430 * states or using the doorbell register. */
4431static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4432{
4433 u16 saved_config_space[32];
4434 u64 cfg_offset;
4435 u32 cfg_base_addr;
4436 u64 cfg_base_addr_index;
4437 void __iomem *vaddr;
4438 unsigned long paddr;
4439 u32 misc_fw_support, active_transport;
4440 int rc, i;
4441 CfgTable_struct __iomem *cfgtable;
4442 bool use_doorbell;
058a0f9f 4443 u32 board_id;
a6528d01
SC		 4444
4445 /* For controllers as old a the p600, this is very nearly
4446 * the same thing as
4447 *
4448 * pci_save_state(pci_dev);
4449 * pci_set_power_state(pci_dev, PCI_D3hot);
4450 * pci_set_power_state(pci_dev, PCI_D0);
4451 * pci_restore_state(pci_dev);
4452 *
4453 * but we can't use these nice canned kernel routines on
4454 * kexec, because they also check the MSI/MSI-X state in PCI
4455 * configuration space and do the wrong thing when it is
4456 * set/cleared. Also, the pci_save/restore_state functions
4457 * violate the ordering requirements for restoring the
4458 * configuration space from the CCISS document (see the
4459 * comment below). So we roll our own ....
4460 *
4461 * For controllers newer than the P600, the pci power state
4462 * method of resetting doesn't work so we have another way
4463 * using the doorbell register.
4464 */
82eb03cf 4465
058a0f9f
SC		 4466 /* Exclude 640x boards. These are two pci devices in one slot
4467 * which share a battery backed cache module. One controls the
4468 * cache, the other accesses the cache through the one that controls
4469 * it. If we reset the one controlling the cache, the other will
4470 * likely not be happy. Just forbid resetting this conjoined mess.
4471 */
4472 cciss_lookup_board_id(pdev, &board_id);
4473 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4474 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4475 "due to shared cache module.");
82eb03cf
CC		 4476 return -ENODEV;
4477 }
4478
82eb03cf
CC		 4479 for (i = 0; i < 32; i++)
4480 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
82eb03cf 4481
a6528d01
SC		 4482 /* find the first memory BAR, so we can find the cfg table */
4483 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4484 if (rc)
4485 return rc;
4486 vaddr = remap_pci_mem(paddr, 0x250);
4487 if (!vaddr)
4488 return -ENOMEM;
82eb03cf 4489
a6528d01
SC		 4490 /* find cfgtable in order to check if reset via doorbell is supported */
4491 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4492 &cfg_base_addr_index, &cfg_offset);
4493 if (rc)
4494 goto unmap_vaddr;
4495 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4496 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4497 if (!cfgtable) {
4498 rc = -ENOMEM;
4499 goto unmap_vaddr;
4500 }
82eb03cf 4501
a6528d01
SC		 4502 /* If reset via doorbell register is supported, use that. */
4503 misc_fw_support = readl(&cfgtable->misc_fw_support);
4504 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
82eb03cf 4505
a6528d01
SC		 4506 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4507 if (rc)
4508 goto unmap_cfgtable;
82eb03cf
CC		 4509
4510 /* Restore the PCI configuration space. The Open CISS
4511 * Specification says, "Restore the PCI Configuration
4512 * Registers, offsets 00h through 60h. It is important to
4513 * restore the command register, 16-bits at offset 04h,
4514 * last. Do not restore the configuration status register,
a6528d01
SC		 4515 * 16-bits at offset 06h." Note that the offset is 2*i.
4516 */
82eb03cf
CC		 4517 for (i = 0; i < 32; i++) {
4518 if (i == 2 || i == 3)
4519 continue;
4520 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
4521 }
4522 wmb();
4523 pci_write_config_word(pdev, 4, saved_config_space[2]);
4524
a6528d01
SC		 4525 /* Some devices (notably the HP Smart Array 5i Controller)
4526 need a little pause here */
4527 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4528
4529 /* Controller should be in simple mode at this point. If it's not,
4530 * It means we're on one of those controllers which doesn't support
4531 * the doorbell reset method and on which the PCI power management reset
4532 * method doesn't work (P800, for example.)
4533 * In those cases, don't try to proceed, as it generally doesn't work.
4534 */
4535 active_transport = readl(&cfgtable->TransportActive);
4536 if (active_transport & PERFORMANT_MODE) {
4537 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4538 " Ignoring controller.\n");
4539 rc = -ENODEV;
4540 }
4541
4542unmap_cfgtable:
4543 iounmap(cfgtable);
4544
4545unmap_vaddr:
4546 iounmap(vaddr);
4547 return rc;
82eb03cf
CC		 4548}
4549
83123cb1
SC		 4550static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4551{
a6528d01 4552 int rc, i;
83123cb1
SC		 4553
4554 if (!reset_devices)
4555 return 0;
4556
a6528d01
SC		 4557 /* Reset the controller with a PCI power-cycle or via doorbell */
4558 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4559
a6528d01
SC		 4560 /* -ENOTSUPP here means we cannot reset the controller
4561 * but it's already (and still) up and running in
058a0f9f
SC		 4562 * "performant mode". Or, it might be 640x, which can't reset
4563 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4564 */
4565 if (rc == -ENOTSUPP)
4566 return 0; /* just try to do the kdump anyhow. */
4567 if (rc)
4568 return -ENODEV;
4569 if (cciss_reset_msi(pdev))
4570 return -ENODEV;
83123cb1
SC		 4571
4572 /* Now try to get the controller to respond to a no-op */
4573 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4574 if (cciss_noop(pdev) == 0)
4575 break;
4576 else
4577 dev_warn(&pdev->dev, "no-op failed%s\n",
4578 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4579 "; re-trying" : ""));
4580 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4581 }
82eb03cf
CC		 4582 return 0;
4583}
4584
1da177e4
LT		 4585/*
4586 * This is it. Find all the controllers and register them. I really hate
4587 * stealing all these major device numbers.
4588 * returns the number of block devices registered.
4589 */
4590static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4591 const struct pci_device_id *ent)
1da177e4 4592{
1da177e4 4593 int i;
799202cb 4594 int j = 0;
5c07a311 4595 int k = 0;
1da177e4 4596 int rc;
22bece00 4597 int dac, return_code;
212a5026 4598 InquiryData_struct *inq_buff;
f70dba83 4599 ctlr_info_t *h;
1da177e4 4600
83123cb1
SC		 4601 rc = cciss_init_reset_devices(pdev);
4602 if (rc)
4603 return rc;
b2a4a43d 4604 i = alloc_cciss_hba(pdev);
7c832835 4605 if (i < 0)
e2019b58 4606 return -1;
1f8ef380 4607
f70dba83
SC		 4608 h = hba[i];
4609 h->pdev = pdev;
4610 h->busy_initializing = 1;
4611 INIT_HLIST_HEAD(&h->cmpQ);
4612 INIT_HLIST_HEAD(&h->reqQ);
4613 mutex_init(&h->busy_shutting_down);
1f8ef380 4614
f70dba83 4615 if (cciss_pci_init(h) != 0)
2cfa948c 4616 goto clean_no_release_regions;
1da177e4 4617
f70dba83
SC		 4618 sprintf(h->devname, "cciss%d", i);
4619 h->ctlr = i;
1da177e4 4620
f70dba83 4621 init_completion(&h->scan_wait);
b368c9dd 4622
f70dba83 4623 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 4624 goto clean0;
4625
1da177e4 4626 /* configure PCI DMA stuff */
6a35528a 4627 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4628 dac = 1;
284901a9 4629 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4630 dac = 0;
1da177e4 4631 else {
b2a4a43d 4632 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 4633 goto clean1;
4634 }
4635
4636 /*
4637 * register with the major number, or get a dynamic major number
4638 * by passing 0 as argument. This is done for greater than
4639 * 8 controller support.
4640 */
4641 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 4642 h->major = COMPAQ_CISS_MAJOR + i;
4643 rc = register_blkdev(h->major, h->devname);
7c832835 4644 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 4645 dev_err(&h->pdev->dev,
4646 "Unable to get major number %d for %s "
f70dba83 4647 "on hba %d\n", h->major, h->devname, i);
1da177e4 4648 goto clean1;
7c832835 4649 } else {
1da177e4 4650 if (i >= MAX_CTLR_ORIG)
f70dba83 4651 h->major = rc;
1da177e4
LT		 4652 }
4653
4654 /* make sure the board interrupts are off */
f70dba83
SC		 4655 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4656 if (h->msi_vector || h->msix_vector) {
4657 if (request_irq(h->intr[PERF_MODE_INT],
0c2b3908 4658 do_cciss_msix_intr,
f70dba83 4659 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4660 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4661 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4662 goto clean2;
4663 }
4664 } else {
f70dba83
SC		 4665 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4666 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4667 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4668 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4669 goto clean2;
4670 }
1da177e4 4671 }
40aabb58 4672
b2a4a43d 4673 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83
SC		 4674 h->devname, pdev->device, pci_name(pdev),
4675 h->intr[PERF_MODE_INT], dac ? "" : " not");
7c832835 4676
f70dba83
SC		 4677 h->cmd_pool_bits =
4678 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4679 * sizeof(unsigned long), GFP_KERNEL);
f70dba83
SC		 4680 h->cmd_pool = (CommandList_struct *)
4681 pci_alloc_consistent(h->pdev,
4682 h->nr_cmds * sizeof(CommandList_struct),
4683 &(h->cmd_pool_dhandle));
4684 h->errinfo_pool = (ErrorInfo_struct *)
4685 pci_alloc_consistent(h->pdev,
4686 h->nr_cmds * sizeof(ErrorInfo_struct),
4687 &(h->errinfo_pool_dhandle));
4688 if ((h->cmd_pool_bits == NULL)
4689 || (h->cmd_pool == NULL)
4690 || (h->errinfo_pool == NULL)) {
b2a4a43d 4691 dev_err(&h->pdev->dev, "out of memory");
1da177e4
LT		 4692 goto clean4;
4693 }
5c07a311
DB		 4694
4695 /* Need space for temp scatter list */
f70dba83 4696 h->scatter_list = kmalloc(h->max_commands *
5c07a311
DB		 4697 sizeof(struct scatterlist *),
4698 GFP_KERNEL);
f70dba83
SC		 4699 for (k = 0; k < h->nr_cmds; k++) {
4700 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4701 h->maxsgentries,
5c07a311 4702 GFP_KERNEL);
f70dba83 4703 if (h->scatter_list[k] == NULL) {
b2a4a43d
SC		 4704 dev_err(&h->pdev->dev,
4705 "could not allocate s/g lists\n");
5c07a311
DB		 4706 goto clean4;
4707 }
4708 }
f70dba83
SC		 4709 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4710 h->chainsize, h->nr_cmds);
4711 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 4712 goto clean4;
5c07a311 4713
f70dba83 4714 spin_lock_init(&h->lock);
1da177e4 4715
7c832835 4716 /* Initialize the pdev driver private data.
f70dba83
SC		 4717 have it point to h. */
4718 pci_set_drvdata(pdev, h);
7c832835
BH		 4719 /* command and error info recs zeroed out before
4720 they are used */
f70dba83
SC		 4721 memset(h->cmd_pool_bits, 0,
4722 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4723 * sizeof(unsigned long));
1da177e4 4724
f70dba83
SC		 4725 h->num_luns = 0;
4726 h->highest_lun = -1;
6ae5ce8e 4727 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 4728 h->drv[j] = NULL;
4729 h->gendisk[j] = NULL;
6ae5ce8e 4730 }
1da177e4 4731
f70dba83 4732 cciss_scsi_setup(h);
1da177e4
LT		 4733
4734 /* Turn the interrupts on so we can service requests */
f70dba83 4735 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 4736
22bece00
MM		 4737 /* Get the firmware version */
4738 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4739 if (inq_buff == NULL) {
b2a4a43d 4740 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 4741 goto clean4;
4742 }
4743
f70dba83 4744 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 4745 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 4746 if (return_code == IO_OK) {
f70dba83
SC		 4747 h->firm_ver[0] = inq_buff->data_byte[32];
4748 h->firm_ver[1] = inq_buff->data_byte[33];
4749 h->firm_ver[2] = inq_buff->data_byte[34];
4750 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 4751 } else { /* send command failed */
b2a4a43d 4752 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 4753 " version of controller\n");
4754 }
212a5026 4755 kfree(inq_buff);
22bece00 4756
f70dba83 4757 cciss_procinit(h);
92c4231a 4758
f70dba83 4759 h->cciss_max_sectors = 8192;
92c4231a 4760
f70dba83
SC		 4761 rebuild_lun_table(h, 1, 0);
4762 h->busy_initializing = 0;
e2019b58 4763 return 1;
1da177e4 4764
6ae5ce8e 4765clean4:
f70dba83 4766 kfree(h->cmd_pool_bits);
5c07a311 4767 /* Free up sg elements */
f70dba83
SC		 4768 for (k = 0; k < h->nr_cmds; k++)
4769 kfree(h->scatter_list[k]);
4770 kfree(h->scatter_list);
4771 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4772 if (h->cmd_pool)
4773 pci_free_consistent(h->pdev,
4774 h->nr_cmds * sizeof(CommandList_struct),
4775 h->cmd_pool, h->cmd_pool_dhandle);
4776 if (h->errinfo_pool)
4777 pci_free_consistent(h->pdev,
4778 h->nr_cmds * sizeof(ErrorInfo_struct),
4779 h->errinfo_pool,
4780 h->errinfo_pool_dhandle);
4781 free_irq(h->intr[PERF_MODE_INT], h);
6ae5ce8e 4782clean2:
f70dba83 4783 unregister_blkdev(h->major, h->devname);
6ae5ce8e 4784clean1:
f70dba83 4785 cciss_destroy_hba_sysfs_entry(h);
7fe06326 4786clean0:
2cfa948c
SC		 4787 pci_release_regions(pdev);
4788clean_no_release_regions:
f70dba83 4789 h->busy_initializing = 0;
9cef0d2f 4790
872225ca
MM		 4791 /*
4792 * Deliberately omit pci_disable_device(): it does something nasty to
4793 * Smart Array controllers that pci_enable_device does not undo
4794 */
799202cb 4795 pci_set_drvdata(pdev, NULL);
f70dba83 4796 free_hba(h);
e2019b58 4797 return -1;
1da177e4
LT		 4798}
4799
e9ca75b5 4800static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 4801{
29009a03
SC		 4802 ctlr_info_t *h;
4803 char *flush_buf;
7c832835 4804 int return_code;
1da177e4 4805
29009a03
SC		 4806 h = pci_get_drvdata(pdev);
4807 flush_buf = kzalloc(4, GFP_KERNEL);
4808 if (!flush_buf) {
b2a4a43d 4809 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 4810 return;
e9ca75b5 4811 }
29009a03
SC		 4812 /* write all data in the battery backed cache to disk */
4813 memset(flush_buf, 0, 4);
f70dba83 4814 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 4815 4, 0, CTLR_LUNID, TYPE_CMD);
4816 kfree(flush_buf);
4817 if (return_code != IO_OK)
b2a4a43d 4818 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 4819 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5e216153 4820 free_irq(h->intr[PERF_MODE_INT], h);
e9ca75b5
GB		 4821}
4822
4823static void __devexit cciss_remove_one(struct pci_dev *pdev)
4824{
f70dba83 4825 ctlr_info_t *h;
e9ca75b5
GB		 4826 int i, j;
4827
7c832835 4828 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 4829 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 4830 return;
4831 }
0a9279cc 4832
f70dba83
SC		 4833 h = pci_get_drvdata(pdev);
4834 i = h->ctlr;
7c832835 4835 if (hba[i] == NULL) {
b2a4a43d 4836 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 4837 return;
4838 }
b6550777 4839
f70dba83 4840 mutex_lock(&h->busy_shutting_down);
0a9279cc 4841
f70dba83
SC		 4842 remove_from_scan_list(h);
4843 remove_proc_entry(h->devname, proc_cciss);
4844 unregister_blkdev(h->major, h->devname);
b6550777
BH		 4845
4846 /* remove it from the disk list */
4847 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 4848 struct gendisk *disk = h->gendisk[j];
b6550777 4849 if (disk) {
165125e1 4850 struct request_queue *q = disk->queue;
b6550777 4851
097d0264 4852 if (disk->flags & GENHD_FL_UP) {
f70dba83 4853 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 4854 del_gendisk(disk);
097d0264 4855 }
b6550777
BH		 4856 if (q)
4857 blk_cleanup_queue(q);
4858 }
4859 }
4860
ba198efb 4861#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 4862 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 4863#endif
b6550777 4864
e9ca75b5 4865 cciss_shutdown(pdev);
fb86a35b
MM		 4866
4867#ifdef CONFIG_PCI_MSI
f70dba83
SC		 4868 if (h->msix_vector)
4869 pci_disable_msix(h->pdev);
4870 else if (h->msi_vector)
4871 pci_disable_msi(h->pdev);
7c832835 4872#endif /* CONFIG_PCI_MSI */
fb86a35b 4873
f70dba83
SC		 4874 iounmap(h->transtable);
4875 iounmap(h->cfgtable);
4876 iounmap(h->vaddr);
1da177e4 4877
f70dba83
SC		 4878 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4879 h->cmd_pool, h->cmd_pool_dhandle);
4880 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4881 h->errinfo_pool, h->errinfo_pool_dhandle);
4882 kfree(h->cmd_pool_bits);
5c07a311 4883 /* Free up sg elements */
f70dba83
SC		 4884 for (j = 0; j < h->nr_cmds; j++)
4885 kfree(h->scatter_list[j]);
4886 kfree(h->scatter_list);
4887 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
872225ca
MM		 4888 /*
4889 * Deliberately omit pci_disable_device(): it does something nasty to
4890 * Smart Array controllers that pci_enable_device does not undo
4891 */
7c832835 4892 pci_release_regions(pdev);
4e570309 4893 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 4894 cciss_destroy_hba_sysfs_entry(h);
4895 mutex_unlock(&h->busy_shutting_down);
4896 free_hba(h);
7c832835 4897}
1da177e4
LT		 4898
4899static struct pci_driver cciss_pci_driver = {
7c832835
BH		 4900 .name = "cciss",
4901 .probe = cciss_init_one,
4902 .remove = __devexit_p(cciss_remove_one),
4903 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 4904 .shutdown = cciss_shutdown,
1da177e4
LT		 4905};
4906
4907/*
4908 * This is it. Register the PCI driver information for the cards we control
7c832835 4909 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 4910 */
4911static int __init cciss_init(void)
4912{
7fe06326
AP		 4913 int err;
4914
10cbda97
JA		 4915 /*
4916 * The hardware requires that commands are aligned on a 64-bit
4917 * boundary. Given that we use pci_alloc_consistent() to allocate an
4918 * array of them, the size must be a multiple of 8 bytes.
4919 */
1b7d0d28 4920 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 4921 printk(KERN_INFO DRIVER_NAME "\n");
4922
7fe06326
AP		 4923 err = bus_register(&cciss_bus_type);
4924 if (err)
4925 return err;
4926
b368c9dd
AP		 4927 /* Start the scan thread */
4928 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4929 if (IS_ERR(cciss_scan_thread)) {
4930 err = PTR_ERR(cciss_scan_thread);
4931 goto err_bus_unregister;
4932 }
4933
1da177e4 4934 /* Register for our PCI devices */
7fe06326
AP		 4935 err = pci_register_driver(&cciss_pci_driver);
4936 if (err)
b368c9dd 4937 goto err_thread_stop;
7fe06326 4938
617e1344 4939 return err;
7fe06326 4940
b368c9dd
AP		 4941err_thread_stop:
4942 kthread_stop(cciss_scan_thread);
4943err_bus_unregister:
7fe06326 4944 bus_unregister(&cciss_bus_type);
b368c9dd 4945
7fe06326 4946 return err;
1da177e4
LT		 4947}
4948
4949static void __exit cciss_cleanup(void)
4950{
4951 int i;
4952
4953 pci_unregister_driver(&cciss_pci_driver);
4954 /* double check that all controller entrys have been removed */
7c832835
BH		 4955 for (i = 0; i < MAX_CTLR; i++) {
4956 if (hba[i] != NULL) {
b2a4a43d
SC		 4957 dev_warn(&hba[i]->pdev->dev,
4958 "had to remove controller\n");
1da177e4
LT		 4959 cciss_remove_one(hba[i]->pdev);
4960 }
4961 }
b368c9dd 4962 kthread_stop(cciss_scan_thread);
928b4d8c 4963 remove_proc_entry("driver/cciss", NULL);
7fe06326 4964 bus_unregister(&cciss_bus_type);
1da177e4
LT		 4965}
4966
4967module_init(cciss_init);
4968module_exit(cciss_cleanup);
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