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cciss: remove controllers supported by hpsa
[net-next-2.6.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/major.h>
31#include <linux/fs.h>
32#include <linux/bio.h>
33#include <linux/blkpg.h>
34#include <linux/timer.h>
35#include <linux/proc_fs.h>
89b6e743 36#include <linux/seq_file.h>
7c832835 37#include <linux/init.h>
4d761609 38#include <linux/jiffies.h>
1da177e4
LT		 39#include <linux/hdreg.h>
40#include <linux/spinlock.h>
41#include <linux/compat.h>
b368c9dd 42#include <linux/mutex.h>
1da177e4
LT		 43#include <asm/uaccess.h>
44#include <asm/io.h>
45
eb0df996 46#include <linux/dma-mapping.h>
1da177e4
LT		 47#include <linux/blkdev.h>
48#include <linux/genhd.h>
49#include <linux/completion.h>
d5d3b736 50#include <scsi/scsi.h>
03bbfee5
MMOD		 51#include <scsi/sg.h>
52#include <scsi/scsi_ioctl.h>
53#include <linux/cdrom.h>
231bc2a2 54#include <linux/scatterlist.h>
0a9279cc 55#include <linux/kthread.h>
1da177e4
LT		 56
57#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 58#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
59#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 60
61/* Embedded module documentation macros - see modules.h */
62MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 63MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 64MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
65MODULE_VERSION("3.6.26");
1da177e4
LT		 66MODULE_LICENSE("GPL");
67
2a48fc0a 68static DEFINE_MUTEX(cciss_mutex);
2ec24ff1 69
1da177e4
LT		 70#include "cciss_cmd.h"
71#include "cciss.h"
72#include <linux/cciss_ioctl.h>
73
74/* define the PCI info for the cards we can control */
75static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 76 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
77 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
78 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
79 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
80 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
1da177e4
LT		 96 {0,}
97};
7c832835 98
1da177e4
LT		 99MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
100
1da177e4
LT		 101/* board_id = Subsystem Device ID & Vendor ID
102 * product = Marketing Name for the board
7c832835 103 * access = Address of the struct of function pointers
1da177e4
LT		 104 */
105static struct board_type products[] = {
49153998
MM		 106 {0x40700E11, "Smart Array 5300", &SA5_access},
107 {0x40800E11, "Smart Array 5i", &SA5B_access},
108 {0x40820E11, "Smart Array 532", &SA5B_access},
109 {0x40830E11, "Smart Array 5312", &SA5B_access},
110 {0x409A0E11, "Smart Array 641", &SA5_access},
111 {0x409B0E11, "Smart Array 642", &SA5_access},
112 {0x409C0E11, "Smart Array 6400", &SA5_access},
113 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
114 {0x40910E11, "Smart Array 6i", &SA5_access},
115 {0x3225103C, "Smart Array P600", &SA5_access},
4205df34
SC		 116 {0x3223103C, "Smart Array P800", &SA5_access},
117 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 118 {0x3235103C, "Smart Array P400i", &SA5_access},
119 {0x3211103C, "Smart Array E200i", &SA5_access},
120 {0x3212103C, "Smart Array E200", &SA5_access},
121 {0x3213103C, "Smart Array E200i", &SA5_access},
122 {0x3214103C, "Smart Array E200i", &SA5_access},
123 {0x3215103C, "Smart Array E200i", &SA5_access},
124 {0x3237103C, "Smart Array E500", &SA5_access},
4205df34 125 {0x323d103c, "Smart Array P700M", &SA5_access},
1da177e4
LT		 126};
127
d14c4ab5 128/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 129#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 130#define MAX_IOCTL_CONFIG_WAIT 1000
131
132/*define how many times we will try a command because of bus resets */
133#define MAX_CMD_RETRIES 3
134
1da177e4
LT		 135#define MAX_CTLR 32
136
137/* Originally cciss driver only supports 8 major numbers */
138#define MAX_CTLR_ORIG 8
139
1da177e4
LT		 140static ctlr_info_t *hba[MAX_CTLR];
141
b368c9dd
AP		 142static struct task_struct *cciss_scan_thread;
143static DEFINE_MUTEX(scan_mutex);
144static LIST_HEAD(scan_q);
145
165125e1 146static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 147static irqreturn_t do_cciss_intx(int irq, void *dev_id);
148static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 149static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 150static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 151static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 152static int do_ioctl(struct block_device *bdev, fmode_t mode,
153 unsigned int cmd, unsigned long arg);
ef7822c2 154static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 155 unsigned int cmd, unsigned long arg);
a885c8c4 156static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 157
1da177e4 158static int cciss_revalidate(struct gendisk *disk);
2d11d993 159static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 160static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 161 int clear_all, int via_ioctl);
1da177e4 162
f70dba83 163static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 164 sector_t *total_size, unsigned int *block_size);
f70dba83 165static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 166 sector_t *total_size, unsigned int *block_size);
f70dba83 167static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 168 sector_t total_size,
00988a35 169 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 170 drive_info_struct *drv);
dac5488a 171static void __devinit cciss_interrupt_mode(ctlr_info_t *);
7c832835 172static void start_io(ctlr_info_t *h);
f70dba83 173static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 174 __u8 page_code, unsigned char scsi3addr[],
175 int cmd_type);
85cc61ae 176static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
177 int attempt_retry);
178static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 179
d6f4965d 180static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 181static int scan_thread(void *data);
182static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 183static void cciss_hba_release(struct device *dev);
184static void cciss_device_release(struct device *dev);
361e9b07 185static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 186static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 187static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 188static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
189 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
190 u64 *cfg_offset);
191static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
192 unsigned long *memory_bar);
193
33079b21 194
5e216153
MM		 195/* performant mode helper functions */
196static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
197 int *bucket_map);
198static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 199
1da177e4 200#ifdef CONFIG_PROC_FS
f70dba83 201static void cciss_procinit(ctlr_info_t *h);
1da177e4 202#else
f70dba83 203static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 204{
205}
206#endif /* CONFIG_PROC_FS */
1da177e4
LT		 207
208#ifdef CONFIG_COMPAT
ef7822c2
AV		 209static int cciss_compat_ioctl(struct block_device *, fmode_t,
210 unsigned, unsigned long);
1da177e4
LT		 211#endif
212
83d5cde4 213static const struct block_device_operations cciss_fops = {
7c832835 214 .owner = THIS_MODULE,
6e9624b8 215 .open = cciss_unlocked_open,
ef7822c2 216 .release = cciss_release,
8a6cfeb6 217 .ioctl = do_ioctl,
7c832835 218 .getgeo = cciss_getgeo,
1da177e4 219#ifdef CONFIG_COMPAT
ef7822c2 220 .compat_ioctl = cciss_compat_ioctl,
1da177e4 221#endif
7c832835 222 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 223};
224
5e216153
MM		 225/* set_performant_mode: Modify the tag for cciss performant
226 * set bit 0 for pull model, bits 3-1 for block fetch
227 * register number
228 */
229static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
230{
231 if (likely(h->transMethod == CFGTBL_Trans_Performant))
232 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
233}
234
1da177e4
LT		 235/*
236 * Enqueuing and dequeuing functions for cmdlists.
237 */
8a3173de 238static inline void addQ(struct hlist_head *list, CommandList_struct *c)
1da177e4 239{
8a3173de 240 hlist_add_head(&c->list, list);
1da177e4
LT		 241}
242
8a3173de 243static inline void removeQ(CommandList_struct *c)
1da177e4 244{
b59e64d0
HR		 245 /*
246 * After kexec/dump some commands might still
247 * be in flight, which the firmware will try
248 * to complete. Resetting the firmware doesn't work
249 * with old fw revisions, so we have to mark
250 * them off as 'stale' to prevent the driver from
251 * falling over.
252 */
253 if (WARN_ON(hlist_unhashed(&c->list))) {
254 c->cmd_type = CMD_MSG_STALE;
8a3173de 255 return;
b59e64d0 256 }
8a3173de
JA		 257
258 hlist_del_init(&c->list);
1da177e4
LT		 259}
260
664a717d
MM		 261static void enqueue_cmd_and_start_io(ctlr_info_t *h,
262 CommandList_struct *c)
263{
264 unsigned long flags;
5e216153 265 set_performant_mode(h, c);
664a717d
MM		 266 spin_lock_irqsave(&h->lock, flags);
267 addQ(&h->reqQ, c);
268 h->Qdepth++;
2a643ec6
SC		 269 if (h->Qdepth > h->maxQsinceinit)
270 h->maxQsinceinit = h->Qdepth;
664a717d
MM		 271 start_io(h);
272 spin_unlock_irqrestore(&h->lock, flags);
273}
274
dccc9b56 275static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 276 int nr_cmds)
277{
278 int i;
279
280 if (!cmd_sg_list)
281 return;
282 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 283 kfree(cmd_sg_list[i]);
284 cmd_sg_list[i] = NULL;
49fc5601
SC		 285 }
286 kfree(cmd_sg_list);
287}
288
dccc9b56
SC		 289static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
290 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 291{
292 int j;
dccc9b56 293 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 294
295 if (chainsize <= 0)
296 return NULL;
297
298 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
299 if (!cmd_sg_list)
300 return NULL;
301
302 /* Build up chain blocks for each command */
303 for (j = 0; j < nr_cmds; j++) {
49fc5601 304 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 305 cmd_sg_list[j] = kmalloc((chainsize *
306 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
307 if (!cmd_sg_list[j]) {
49fc5601
SC		 308 dev_err(&h->pdev->dev, "Cannot get memory "
309 "for s/g chains.\n");
310 goto clean;
311 }
312 }
313 return cmd_sg_list;
314clean:
315 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
316 return NULL;
317}
318
d45033ef
SC		 319static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
320{
321 SGDescriptor_struct *chain_sg;
322 u64bit temp64;
323
324 if (c->Header.SGTotal <= h->max_cmd_sgentries)
325 return;
326
327 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
328 temp64.val32.lower = chain_sg->Addr.lower;
329 temp64.val32.upper = chain_sg->Addr.upper;
330 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
331}
332
333static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
334 SGDescriptor_struct *chain_block, int len)
335{
336 SGDescriptor_struct *chain_sg;
337 u64bit temp64;
338
339 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
340 chain_sg->Ext = CCISS_SG_CHAIN;
341 chain_sg->Len = len;
342 temp64.val = pci_map_single(h->pdev, chain_block, len,
343 PCI_DMA_TODEVICE);
344 chain_sg->Addr.lower = temp64.val32.lower;
345 chain_sg->Addr.upper = temp64.val32.upper;
346}
347
1da177e4
LT		 348#include "cciss_scsi.c" /* For SCSI tape support */
349
1e6f2dc1
AB		 350static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
351 "UNKNOWN"
352};
0e4a9d03 353#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 354
1da177e4
LT		 355#ifdef CONFIG_PROC_FS
356
357/*
358 * Report information about this controller.
359 */
360#define ENG_GIG 1000000000
361#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 362#define ENGAGE_SCSI "engage scsi"
1da177e4
LT		 363
364static struct proc_dir_entry *proc_cciss;
365
89b6e743 366static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 367{
89b6e743
MM		 368 ctlr_info_t *h = seq->private;
369
370 seq_printf(seq, "%s: HP %s Controller\n"
371 "Board ID: 0x%08lx\n"
372 "Firmware Version: %c%c%c%c\n"
373 "IRQ: %d\n"
374 "Logical drives: %d\n"
375 "Current Q depth: %d\n"
376 "Current # commands on controller: %d\n"
377 "Max Q depth since init: %d\n"
378 "Max # commands on controller since init: %d\n"
379 "Max SG entries since init: %d\n",
380 h->devname,
381 h->product_name,
382 (unsigned long)h->board_id,
383 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
5e216153 384 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
89b6e743
MM		 385 h->num_luns,
386 h->Qdepth, h->commands_outstanding,
387 h->maxQsinceinit, h->max_outstanding, h->maxSG);
388
389#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 390 cciss_seq_tape_report(seq, h);
89b6e743
MM		 391#endif /* CONFIG_CISS_SCSI_TAPE */
392}
1da177e4 393
89b6e743
MM		 394static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
395{
396 ctlr_info_t *h = seq->private;
89b6e743 397 unsigned long flags;
1da177e4
LT		 398
399 /* prevent displaying bogus info during configuration
400 * or deconfiguration of a logical volume
401 */
f70dba83 402 spin_lock_irqsave(&h->lock, flags);
1da177e4 403 if (h->busy_configuring) {
f70dba83 404 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 405 return ERR_PTR(-EBUSY);
1da177e4
LT		 406 }
407 h->busy_configuring = 1;
f70dba83 408 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 409
89b6e743
MM		 410 if (*pos == 0)
411 cciss_seq_show_header(seq);
412
413 return pos;
414}
415
416static int cciss_seq_show(struct seq_file *seq, void *v)
417{
418 sector_t vol_sz, vol_sz_frac;
419 ctlr_info_t *h = seq->private;
420 unsigned ctlr = h->ctlr;
421 loff_t *pos = v;
9cef0d2f 422 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 423
424 if (*pos > h->highest_lun)
425 return 0;
426
531c2dc7
SC		 427 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
428 return 0;
429
89b6e743
MM		 430 if (drv->heads == 0)
431 return 0;
432
433 vol_sz = drv->nr_blocks;
434 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
435 vol_sz_frac *= 100;
436 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
437
fa52bec9 438 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 439 drv->raid_level = RAID_UNKNOWN;
440 seq_printf(seq, "cciss/c%dd%d:"
441 "\t%4u.%02uGB\tRAID %s\n",
442 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
443 raid_label[drv->raid_level]);
444 return 0;
445}
446
447static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
448{
449 ctlr_info_t *h = seq->private;
450
451 if (*pos > h->highest_lun)
452 return NULL;
453 *pos += 1;
454
455 return pos;
456}
457
458static void cciss_seq_stop(struct seq_file *seq, void *v)
459{
460 ctlr_info_t *h = seq->private;
461
462 /* Only reset h->busy_configuring if we succeeded in setting
463 * it during cciss_seq_start. */
464 if (v == ERR_PTR(-EBUSY))
465 return;
7c832835 466
1da177e4 467 h->busy_configuring = 0;
1da177e4
LT		 468}
469
88e9d34c 470static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 471 .start = cciss_seq_start,
472 .show = cciss_seq_show,
473 .next = cciss_seq_next,
474 .stop = cciss_seq_stop,
475};
476
477static int cciss_seq_open(struct inode *inode, struct file *file)
478{
479 int ret = seq_open(file, &cciss_seq_ops);
480 struct seq_file *seq = file->private_data;
481
482 if (!ret)
483 seq->private = PDE(inode)->data;
484
485 return ret;
486}
487
488static ssize_t
489cciss_proc_write(struct file *file, const char __user *buf,
490 size_t length, loff_t *ppos)
1da177e4 491{
89b6e743
MM		 492 int err;
493 char *buffer;
494
495#ifndef CONFIG_CISS_SCSI_TAPE
496 return -EINVAL;
1da177e4
LT		 497#endif
498
89b6e743 499 if (!buf || length > PAGE_SIZE - 1)
7c832835 500 return -EINVAL;
89b6e743
MM		 501
502 buffer = (char *)__get_free_page(GFP_KERNEL);
503 if (!buffer)
504 return -ENOMEM;
505
506 err = -EFAULT;
507 if (copy_from_user(buffer, buf, length))
508 goto out;
509 buffer[length] = '\0';
510
511#ifdef CONFIG_CISS_SCSI_TAPE
512 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
513 struct seq_file *seq = file->private_data;
514 ctlr_info_t *h = seq->private;
89b6e743 515
f70dba83 516 err = cciss_engage_scsi(h);
8721c81f 517 if (err == 0)
89b6e743
MM		 518 err = length;
519 } else
520#endif /* CONFIG_CISS_SCSI_TAPE */
521 err = -EINVAL;
7c832835
BH		 522 /* might be nice to have "disengage" too, but it's not
523 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 524
525out:
526 free_page((unsigned long)buffer);
527 return err;
1da177e4
LT		 528}
529
828c0950 530static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 531 .owner = THIS_MODULE,
532 .open = cciss_seq_open,
533 .read = seq_read,
534 .llseek = seq_lseek,
535 .release = seq_release,
536 .write = cciss_proc_write,
537};
538
f70dba83 539static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 540{
541 struct proc_dir_entry *pde;
542
89b6e743 543 if (proc_cciss == NULL)
928b4d8c 544 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 545 if (!proc_cciss)
546 return;
f70dba83 547 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 548 S_IROTH, proc_cciss,
f70dba83 549 &cciss_proc_fops, h);
1da177e4 550}
7c832835 551#endif /* CONFIG_PROC_FS */
1da177e4 552
7fe06326
AP		 553#define MAX_PRODUCT_NAME_LEN 19
554
555#define to_hba(n) container_of(n, struct ctlr_info, dev)
556#define to_drv(n) container_of(n, drive_info_struct, dev)
557
d6f4965d
AP		 558static ssize_t host_store_rescan(struct device *dev,
559 struct device_attribute *attr,
560 const char *buf, size_t count)
561{
562 struct ctlr_info *h = to_hba(dev);
563
564 add_to_scan_list(h);
565 wake_up_process(cciss_scan_thread);
566 wait_for_completion_interruptible(&h->scan_wait);
567
568 return count;
569}
8ba95c69 570static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP		 571
572static ssize_t dev_show_unique_id(struct device *dev,
573 struct device_attribute *attr,
574 char *buf)
575{
576 drive_info_struct *drv = to_drv(dev);
577 struct ctlr_info *h = to_hba(drv->dev.parent);
578 __u8 sn[16];
579 unsigned long flags;
580 int ret = 0;
581
f70dba83 582 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 583 if (h->busy_configuring)
584 ret = -EBUSY;
585 else
586 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 587 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 588
589 if (ret)
590 return ret;
591 else
592 return snprintf(buf, 16 * 2 + 2,
593 "%02X%02X%02X%02X%02X%02X%02X%02X"
594 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
595 sn[0], sn[1], sn[2], sn[3],
596 sn[4], sn[5], sn[6], sn[7],
597 sn[8], sn[9], sn[10], sn[11],
598 sn[12], sn[13], sn[14], sn[15]);
599}
8ba95c69 600static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 601
602static ssize_t dev_show_vendor(struct device *dev,
603 struct device_attribute *attr,
604 char *buf)
605{
606 drive_info_struct *drv = to_drv(dev);
607 struct ctlr_info *h = to_hba(drv->dev.parent);
608 char vendor[VENDOR_LEN + 1];
609 unsigned long flags;
610 int ret = 0;
611
f70dba83 612 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 613 if (h->busy_configuring)
614 ret = -EBUSY;
615 else
616 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 617 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 618
619 if (ret)
620 return ret;
621 else
622 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
623}
8ba95c69 624static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 625
626static ssize_t dev_show_model(struct device *dev,
627 struct device_attribute *attr,
628 char *buf)
629{
630 drive_info_struct *drv = to_drv(dev);
631 struct ctlr_info *h = to_hba(drv->dev.parent);
632 char model[MODEL_LEN + 1];
633 unsigned long flags;
634 int ret = 0;
635
f70dba83 636 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 637 if (h->busy_configuring)
638 ret = -EBUSY;
639 else
640 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 641 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 642
643 if (ret)
644 return ret;
645 else
646 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
647}
8ba95c69 648static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 649
650static ssize_t dev_show_rev(struct device *dev,
651 struct device_attribute *attr,
652 char *buf)
653{
654 drive_info_struct *drv = to_drv(dev);
655 struct ctlr_info *h = to_hba(drv->dev.parent);
656 char rev[REV_LEN + 1];
657 unsigned long flags;
658 int ret = 0;
659
f70dba83 660 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 661 if (h->busy_configuring)
662 ret = -EBUSY;
663 else
664 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 665 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 666
667 if (ret)
668 return ret;
669 else
670 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
671}
8ba95c69 672static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 673
ce84a8ae
SC		 674static ssize_t cciss_show_lunid(struct device *dev,
675 struct device_attribute *attr, char *buf)
676{
9cef0d2f
SC		 677 drive_info_struct *drv = to_drv(dev);
678 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 679 unsigned long flags;
680 unsigned char lunid[8];
681
f70dba83 682 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 683 if (h->busy_configuring) {
f70dba83 684 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 685 return -EBUSY;
686 }
687 if (!drv->heads) {
f70dba83 688 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 689 return -ENOTTY;
690 }
691 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 692 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 693 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
694 lunid[0], lunid[1], lunid[2], lunid[3],
695 lunid[4], lunid[5], lunid[6], lunid[7]);
696}
8ba95c69 697static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 698
3ff1111d
SC		 699static ssize_t cciss_show_raid_level(struct device *dev,
700 struct device_attribute *attr, char *buf)
701{
9cef0d2f
SC		 702 drive_info_struct *drv = to_drv(dev);
703 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 704 int raid;
705 unsigned long flags;
706
f70dba83 707 spin_lock_irqsave(&h->lock, flags);
3ff1111d 708 if (h->busy_configuring) {
f70dba83 709 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 710 return -EBUSY;
711 }
712 raid = drv->raid_level;
f70dba83 713 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 714 if (raid < 0 || raid > RAID_UNKNOWN)
715 raid = RAID_UNKNOWN;
716
717 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
718 raid_label[raid]);
719}
8ba95c69 720static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 721
e272afec
SC		 722static ssize_t cciss_show_usage_count(struct device *dev,
723 struct device_attribute *attr, char *buf)
724{
9cef0d2f
SC		 725 drive_info_struct *drv = to_drv(dev);
726 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 727 unsigned long flags;
728 int count;
729
f70dba83 730 spin_lock_irqsave(&h->lock, flags);
e272afec 731 if (h->busy_configuring) {
f70dba83 732 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 733 return -EBUSY;
734 }
735 count = drv->usage_count;
f70dba83 736 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 737 return snprintf(buf, 20, "%d\n", count);
738}
8ba95c69 739static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 740
d6f4965d
AP		 741static struct attribute *cciss_host_attrs[] = {
742 &dev_attr_rescan.attr,
743 NULL
744};
745
746static struct attribute_group cciss_host_attr_group = {
747 .attrs = cciss_host_attrs,
748};
749
9f792d9f 750static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 751 &cciss_host_attr_group,
752 NULL
753};
754
755static struct device_type cciss_host_type = {
756 .name = "cciss_host",
757 .groups = cciss_host_attr_groups,
617e1344 758 .release = cciss_hba_release,
d6f4965d
AP		 759};
760
7fe06326
AP		 761static struct attribute *cciss_dev_attrs[] = {
762 &dev_attr_unique_id.attr,
763 &dev_attr_model.attr,
764 &dev_attr_vendor.attr,
765 &dev_attr_rev.attr,
ce84a8ae 766 &dev_attr_lunid.attr,
3ff1111d 767 &dev_attr_raid_level.attr,
e272afec 768 &dev_attr_usage_count.attr,
7fe06326
AP		 769 NULL
770};
771
772static struct attribute_group cciss_dev_attr_group = {
773 .attrs = cciss_dev_attrs,
774};
775
a4dbd674 776static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 777 &cciss_dev_attr_group,
778 NULL
779};
780
781static struct device_type cciss_dev_type = {
782 .name = "cciss_device",
783 .groups = cciss_dev_attr_groups,
617e1344 784 .release = cciss_device_release,
7fe06326
AP		 785};
786
787static struct bus_type cciss_bus_type = {
788 .name = "cciss",
789};
790
617e1344
SC		 791/*
792 * cciss_hba_release is called when the reference count
793 * of h->dev goes to zero.
794 */
795static void cciss_hba_release(struct device *dev)
796{
797 /*
798 * nothing to do, but need this to avoid a warning
799 * about not having a release handler from lib/kref.c.
800 */
801}
7fe06326
AP		 802
803/*
804 * Initialize sysfs entry for each controller. This sets up and registers
805 * the 'cciss#' directory for each individual controller under
806 * /sys/bus/pci/devices/<dev>/.
807 */
808static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
809{
810 device_initialize(&h->dev);
811 h->dev.type = &cciss_host_type;
812 h->dev.bus = &cciss_bus_type;
813 dev_set_name(&h->dev, "%s", h->devname);
814 h->dev.parent = &h->pdev->dev;
815
816 return device_add(&h->dev);
817}
818
819/*
820 * Remove sysfs entries for an hba.
821 */
822static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
823{
824 device_del(&h->dev);
617e1344
SC		 825 put_device(&h->dev); /* final put. */
826}
827
828/* cciss_device_release is called when the reference count
9cef0d2f 829 * of h->drv[x]dev goes to zero.
617e1344
SC		 830 */
831static void cciss_device_release(struct device *dev)
832{
9cef0d2f
SC		 833 drive_info_struct *drv = to_drv(dev);
834 kfree(drv);
7fe06326
AP		 835}
836
837/*
838 * Initialize sysfs for each logical drive. This sets up and registers
839 * the 'c#d#' directory for each individual logical drive under
840 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
841 * /sys/block/cciss!c#d# to this entry.
842 */
617e1344 843static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 844 int drv_index)
845{
617e1344
SC		 846 struct device *dev;
847
9cef0d2f 848 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 849 return 0;
850
9cef0d2f 851 dev = &h->drv[drv_index]->dev;
617e1344
SC		 852 device_initialize(dev);
853 dev->type = &cciss_dev_type;
854 dev->bus = &cciss_bus_type;
855 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
856 dev->parent = &h->dev;
9cef0d2f 857 h->drv[drv_index]->device_initialized = 1;
617e1344 858 return device_add(dev);
7fe06326
AP		 859}
860
861/*
862 * Remove sysfs entries for a logical drive.
863 */
8ce51966
SC		 864static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
865 int ctlr_exiting)
7fe06326 866{
9cef0d2f 867 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 868
869 /* special case for c*d0, we only destroy it on controller exit */
870 if (drv_index == 0 && !ctlr_exiting)
871 return;
872
617e1344
SC		 873 device_del(dev);
874 put_device(dev); /* the "final" put. */
9cef0d2f 875 h->drv[drv_index] = NULL;
7fe06326
AP		 876}
877
7c832835
BH		 878/*
879 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 880 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 881 * which ones are free or in use.
7c832835 882 */
6b4d96b8 883static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 884{
885 CommandList_struct *c;
7c832835 886 int i;
1da177e4
LT		 887 u64bit temp64;
888 dma_addr_t cmd_dma_handle, err_dma_handle;
889
6b4d96b8
SC		 890 do {
891 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
892 if (i == h->nr_cmds)
7c832835 893 return NULL;
6b4d96b8
SC		 894 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
895 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 896 c = h->cmd_pool + i;
897 memset(c, 0, sizeof(CommandList_struct));
898 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
899 c->err_info = h->errinfo_pool + i;
900 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
901 err_dma_handle = h->errinfo_pool_dhandle
902 + i * sizeof(ErrorInfo_struct);
903 h->nr_allocs++;
1da177e4 904
6b4d96b8 905 c->cmdindex = i;
33079b21 906
6b4d96b8
SC		 907 INIT_HLIST_NODE(&c->list);
908 c->busaddr = (__u32) cmd_dma_handle;
909 temp64.val = (__u64) err_dma_handle;
910 c->ErrDesc.Addr.lower = temp64.val32.lower;
911 c->ErrDesc.Addr.upper = temp64.val32.upper;
912 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 913
6b4d96b8
SC		 914 c->ctlr = h->ctlr;
915 return c;
916}
33079b21 917
6b4d96b8
SC		 918/* allocate a command using pci_alloc_consistent, used for ioctls,
919 * etc., not for the main i/o path.
920 */
921static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
922{
923 CommandList_struct *c;
924 u64bit temp64;
925 dma_addr_t cmd_dma_handle, err_dma_handle;
926
927 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
928 sizeof(CommandList_struct), &cmd_dma_handle);
929 if (c == NULL)
930 return NULL;
931 memset(c, 0, sizeof(CommandList_struct));
932
933 c->cmdindex = -1;
934
935 c->err_info = (ErrorInfo_struct *)
936 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
937 &err_dma_handle);
938
939 if (c->err_info == NULL) {
940 pci_free_consistent(h->pdev,
941 sizeof(CommandList_struct), c, cmd_dma_handle);
942 return NULL;
7c832835 943 }
6b4d96b8 944 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 945
8a3173de 946 INIT_HLIST_NODE(&c->list);
1da177e4 947 c->busaddr = (__u32) cmd_dma_handle;
7c832835 948 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 949 c->ErrDesc.Addr.lower = temp64.val32.lower;
950 c->ErrDesc.Addr.upper = temp64.val32.upper;
951 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 952
7c832835
BH		 953 c->ctlr = h->ctlr;
954 return c;
1da177e4
LT		 955}
956
6b4d96b8 957static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 958{
959 int i;
6b4d96b8
SC		 960
961 i = c - h->cmd_pool;
962 clear_bit(i & (BITS_PER_LONG - 1),
963 h->cmd_pool_bits + (i / BITS_PER_LONG));
964 h->nr_frees++;
965}
966
967static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
968{
1da177e4
LT		 969 u64bit temp64;
970
6b4d96b8
SC		 971 temp64.val32.lower = c->ErrDesc.Addr.lower;
972 temp64.val32.upper = c->ErrDesc.Addr.upper;
973 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
974 c->err_info, (dma_addr_t) temp64.val);
975 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
976 c, (dma_addr_t) c->busaddr);
1da177e4
LT		 977}
978
979static inline ctlr_info_t *get_host(struct gendisk *disk)
980{
7c832835 981 return disk->queue->queuedata;
1da177e4
LT		 982}
983
984static inline drive_info_struct *get_drv(struct gendisk *disk)
985{
986 return disk->private_data;
987}
988
989/*
990 * Open. Make sure the device is really there.
991 */
ef7822c2 992static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 993{
f70dba83 994 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 995 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 996
b2a4a43d 997 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 998 if (drv->busy_configuring)
ddd47442 999 return -EBUSY;
1da177e4
LT		 1000 /*
1001 * Root is allowed to open raw volume zero even if it's not configured
1002 * so array config can still work. Root is also allowed to open any
1003 * volume that has a LUN ID, so it can issue IOCTL to reread the
1004 * disk information. I don't think I really like this
1005 * but I'm already using way to many device nodes to claim another one
1006 * for "raw controller".
1007 */
7a06f789 1008 if (drv->heads == 0) {
ef7822c2 1009 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1010 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1011 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1012 return -ENXIO;
1da177e4 1013 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1014 } else if (memcmp(drv->LunID, CTLR_LUNID,
1015 sizeof(drv->LunID))) {
1da177e4
LT		 1016 return -ENXIO;
1017 }
1018 }
1019 if (!capable(CAP_SYS_ADMIN))
1020 return -EPERM;
1021 }
1022 drv->usage_count++;
f70dba83 1023 h->usage_count++;
1da177e4
LT		 1024 return 0;
1025}
7c832835 1026
6e9624b8
AB		 1027static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1028{
1029 int ret;
1030
2a48fc0a 1031 mutex_lock(&cciss_mutex);
6e9624b8 1032 ret = cciss_open(bdev, mode);
2a48fc0a 1033 mutex_unlock(&cciss_mutex);
6e9624b8
AB		 1034
1035 return ret;
1036}
1037
1da177e4
LT		 1038/*
1039 * Close. Sync first.
1040 */
ef7822c2 1041static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1042{
f70dba83 1043 ctlr_info_t *h;
6e9624b8 1044 drive_info_struct *drv;
1da177e4 1045
2a48fc0a 1046 mutex_lock(&cciss_mutex);
f70dba83 1047 h = get_host(disk);
6e9624b8 1048 drv = get_drv(disk);
b2a4a43d 1049 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1050 drv->usage_count--;
f70dba83 1051 h->usage_count--;
2a48fc0a 1052 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1053 return 0;
1054}
1055
ef7822c2
AV		 1056static int do_ioctl(struct block_device *bdev, fmode_t mode,
1057 unsigned cmd, unsigned long arg)
1da177e4
LT		 1058{
1059 int ret;
2a48fc0a 1060 mutex_lock(&cciss_mutex);
ef7822c2 1061 ret = cciss_ioctl(bdev, mode, cmd, arg);
2a48fc0a 1062 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1063 return ret;
1064}
1065
8a6cfeb6
AB		 1066#ifdef CONFIG_COMPAT
1067
ef7822c2
AV		 1068static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1069 unsigned cmd, unsigned long arg);
1070static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1071 unsigned cmd, unsigned long arg);
1da177e4 1072
ef7822c2
AV		 1073static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1074 unsigned cmd, unsigned long arg)
1da177e4
LT		 1075{
1076 switch (cmd) {
1077 case CCISS_GETPCIINFO:
1078 case CCISS_GETINTINFO:
1079 case CCISS_SETINTINFO:
1080 case CCISS_GETNODENAME:
1081 case CCISS_SETNODENAME:
1082 case CCISS_GETHEARTBEAT:
1083 case CCISS_GETBUSTYPES:
1084 case CCISS_GETFIRMVER:
1085 case CCISS_GETDRIVVER:
1086 case CCISS_REVALIDVOLS:
1087 case CCISS_DEREGDISK:
1088 case CCISS_REGNEWDISK:
1089 case CCISS_REGNEWD:
1090 case CCISS_RESCANDISK:
1091 case CCISS_GETLUNINFO:
ef7822c2 1092 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1093
1094 case CCISS_PASSTHRU32:
ef7822c2 1095 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1096 case CCISS_BIG_PASSTHRU32:
ef7822c2 1097 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1098
1099 default:
1100 return -ENOIOCTLCMD;
1101 }
1102}
1103
ef7822c2
AV		 1104static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1105 unsigned cmd, unsigned long arg)
1da177e4
LT		 1106{
1107 IOCTL32_Command_struct __user *arg32 =
7c832835 1108 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1109 IOCTL_Command_struct arg64;
1110 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1111 int err;
1112 u32 cp;
1113
1114 err = 0;
7c832835
BH		 1115 err |=
1116 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1117 sizeof(arg64.LUN_info));
1118 err |=
1119 copy_from_user(&arg64.Request, &arg32->Request,
1120 sizeof(arg64.Request));
1121 err |=
1122 copy_from_user(&arg64.error_info, &arg32->error_info,
1123 sizeof(arg64.error_info));
1da177e4
LT		 1124 err |= get_user(arg64.buf_size, &arg32->buf_size);
1125 err |= get_user(cp, &arg32->buf);
1126 arg64.buf = compat_ptr(cp);
1127 err |= copy_to_user(p, &arg64, sizeof(arg64));
1128
1129 if (err)
1130 return -EFAULT;
1131
ef7822c2 1132 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1133 if (err)
1134 return err;
7c832835
BH		 1135 err |=
1136 copy_in_user(&arg32->error_info, &p->error_info,
1137 sizeof(arg32->error_info));
1da177e4
LT		 1138 if (err)
1139 return -EFAULT;
1140 return err;
1141}
1142
ef7822c2
AV		 1143static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1144 unsigned cmd, unsigned long arg)
1da177e4
LT		 1145{
1146 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1147 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1148 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1149 BIG_IOCTL_Command_struct __user *p =
1150 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1151 int err;
1152 u32 cp;
1153
1154 err = 0;
7c832835
BH		 1155 err |=
1156 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1157 sizeof(arg64.LUN_info));
1158 err |=
1159 copy_from_user(&arg64.Request, &arg32->Request,
1160 sizeof(arg64.Request));
1161 err |=
1162 copy_from_user(&arg64.error_info, &arg32->error_info,
1163 sizeof(arg64.error_info));
1da177e4
LT		 1164 err |= get_user(arg64.buf_size, &arg32->buf_size);
1165 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1166 err |= get_user(cp, &arg32->buf);
1167 arg64.buf = compat_ptr(cp);
1168 err |= copy_to_user(p, &arg64, sizeof(arg64));
1169
1170 if (err)
7c832835 1171 return -EFAULT;
1da177e4 1172
ef7822c2 1173 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1174 if (err)
1175 return err;
7c832835
BH		 1176 err |=
1177 copy_in_user(&arg32->error_info, &p->error_info,
1178 sizeof(arg32->error_info));
1da177e4
LT		 1179 if (err)
1180 return -EFAULT;
1181 return err;
1182}
1183#endif
a885c8c4
CH		 1184
1185static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1186{
1187 drive_info_struct *drv = get_drv(bdev->bd_disk);
1188
1189 if (!drv->cylinders)
1190 return -ENXIO;
1191
1192 geo->heads = drv->heads;
1193 geo->sectors = drv->sectors;
1194 geo->cylinders = drv->cylinders;
1195 return 0;
1196}
1197
f70dba83 1198static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1199{
1200 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1201 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1202 (void)check_for_unit_attention(h, c);
0a9279cc 1203}
0a25a5ae
SC		 1204
1205static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1da177e4 1206{
0a25a5ae 1207 cciss_pci_info_struct pciinfo;
1da177e4 1208
0a25a5ae
SC		 1209 if (!argp)
1210 return -EINVAL;
1211 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1212 pciinfo.bus = h->pdev->bus->number;
1213 pciinfo.dev_fn = h->pdev->devfn;
1214 pciinfo.board_id = h->board_id;
1215 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1216 return -EFAULT;
1217 return 0;
1218}
1da177e4 1219
576e661c
SC		 1220static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1221{
1222 cciss_coalint_struct intinfo;
1da177e4 1223
576e661c
SC		 1224 if (!argp)
1225 return -EINVAL;
1226 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1227 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1228 if (copy_to_user
1229 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1230 return -EFAULT;
1231 return 0;
1232}
1da177e4 1233
4c800eed
SC		 1234static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1235{
1236 cciss_coalint_struct intinfo;
1237 unsigned long flags;
1238 int i;
1da177e4 1239
4c800eed
SC		 1240 if (!argp)
1241 return -EINVAL;
1242 if (!capable(CAP_SYS_ADMIN))
1243 return -EPERM;
1244 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1245 return -EFAULT;
1246 if ((intinfo.delay == 0) && (intinfo.count == 0))
1247 return -EINVAL;
1248 spin_lock_irqsave(&h->lock, flags);
1249 /* Update the field, and then ring the doorbell */
1250 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1251 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1252 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1253
1254 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1255 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1256 break;
1257 udelay(1000); /* delay and try again */
1258 }
1259 spin_unlock_irqrestore(&h->lock, flags);
1260 if (i >= MAX_IOCTL_CONFIG_WAIT)
1261 return -EAGAIN;
1262 return 0;
1263}
1da177e4 1264
25216109
SC		 1265static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1266{
1267 NodeName_type NodeName;
1268 int i;
1da177e4 1269
25216109
SC		 1270 if (!argp)
1271 return -EINVAL;
1272 for (i = 0; i < 16; i++)
1273 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1274 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1275 return -EFAULT;
1276 return 0;
1277}
7c832835 1278
4f43f32c
SC		 1279static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1280{
1281 NodeName_type NodeName;
1282 unsigned long flags;
1283 int i;
7c832835 1284
4f43f32c
SC		 1285 if (!argp)
1286 return -EINVAL;
1287 if (!capable(CAP_SYS_ADMIN))
1288 return -EPERM;
1289 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1290 return -EFAULT;
1291 spin_lock_irqsave(&h->lock, flags);
1292 /* Update the field, and then ring the doorbell */
1293 for (i = 0; i < 16; i++)
1294 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1295 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1296 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1297 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1298 break;
1299 udelay(1000); /* delay and try again */
1300 }
1301 spin_unlock_irqrestore(&h->lock, flags);
1302 if (i >= MAX_IOCTL_CONFIG_WAIT)
1303 return -EAGAIN;
1304 return 0;
1305}
7c832835 1306
93c74931
SC		 1307static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1308{
1309 Heartbeat_type heartbeat;
7c832835 1310
93c74931
SC		 1311 if (!argp)
1312 return -EINVAL;
1313 heartbeat = readl(&h->cfgtable->HeartBeat);
1314 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1315 return -EFAULT;
1316 return 0;
1317}
0a9279cc 1318
d18dfad4
SC		 1319static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1320{
1321 BusTypes_type BusTypes;
7c832835 1322
d18dfad4
SC		 1323 if (!argp)
1324 return -EINVAL;
1325 BusTypes = readl(&h->cfgtable->BusTypes);
1326 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1327 return -EFAULT;
1328 return 0;
1329}
1330
8a4f7fbf
SC		 1331static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1332{
1333 FirmwareVer_type firmware;
1334
1335 if (!argp)
1336 return -EINVAL;
1337 memcpy(firmware, h->firm_ver, 4);
1338
1339 if (copy_to_user
1340 (argp, firmware, sizeof(FirmwareVer_type)))
1341 return -EFAULT;
1342 return 0;
1343}
1344
c525919d
SC		 1345static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1346{
1347 DriverVer_type DriverVer = DRIVER_VERSION;
1348
1349 if (!argp)
1350 return -EINVAL;
1351 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1352 return -EFAULT;
1353 return 0;
1354}
1355
0894b32c
SC		 1356static int cciss_getluninfo(ctlr_info_t *h,
1357 struct gendisk *disk, void __user *argp)
1358{
1359 LogvolInfo_struct luninfo;
1360 drive_info_struct *drv = get_drv(disk);
1361
1362 if (!argp)
1363 return -EINVAL;
1364 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1365 luninfo.num_opens = drv->usage_count;
1366 luninfo.num_parts = 0;
1367 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1368 return -EFAULT;
1369 return 0;
1370}
1371
f32f125b
SC		 1372static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1373{
1374 IOCTL_Command_struct iocommand;
1375 CommandList_struct *c;
1376 char *buff = NULL;
1377 u64bit temp64;
1378 DECLARE_COMPLETION_ONSTACK(wait);
1379
1380 if (!argp)
1381 return -EINVAL;
1382
1383 if (!capable(CAP_SYS_RAWIO))
1384 return -EPERM;
1385
1386 if (copy_from_user
1387 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1388 return -EFAULT;
1389 if ((iocommand.buf_size < 1) &&
1390 (iocommand.Request.Type.Direction != XFER_NONE)) {
1391 return -EINVAL;
1392 }
1393 if (iocommand.buf_size > 0) {
1394 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1395 if (buff == NULL)
1396 return -EFAULT;
1397 }
1398 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1399 /* Copy the data into the buffer we created */
1400 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1401 kfree(buff);
1402 return -EFAULT;
1403 }
1404 } else {
1405 memset(buff, 0, iocommand.buf_size);
1406 }
1407 c = cmd_special_alloc(h);
1408 if (!c) {
1409 kfree(buff);
1410 return -ENOMEM;
1411 }
1412 /* Fill in the command type */
1413 c->cmd_type = CMD_IOCTL_PEND;
1414 /* Fill in Command Header */
1415 c->Header.ReplyQueue = 0; /* unused in simple mode */
1416 if (iocommand.buf_size > 0) { /* buffer to fill */
1417 c->Header.SGList = 1;
1418 c->Header.SGTotal = 1;
1419 } else { /* no buffers to fill */
1420 c->Header.SGList = 0;
1421 c->Header.SGTotal = 0;
1422 }
1423 c->Header.LUN = iocommand.LUN_info;
1424 /* use the kernel address the cmd block for tag */
1425 c->Header.Tag.lower = c->busaddr;
1426
1427 /* Fill in Request block */
1428 c->Request = iocommand.Request;
1429
1430 /* Fill in the scatter gather information */
1431 if (iocommand.buf_size > 0) {
1432 temp64.val = pci_map_single(h->pdev, buff,
1433 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1434 c->SG[0].Addr.lower = temp64.val32.lower;
1435 c->SG[0].Addr.upper = temp64.val32.upper;
1436 c->SG[0].Len = iocommand.buf_size;
1437 c->SG[0].Ext = 0; /* we are not chaining */
1438 }
1439 c->waiting = &wait;
1440
1441 enqueue_cmd_and_start_io(h, c);
1442 wait_for_completion(&wait);
1443
1444 /* unlock the buffers from DMA */
1445 temp64.val32.lower = c->SG[0].Addr.lower;
1446 temp64.val32.upper = c->SG[0].Addr.upper;
1447 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1448 PCI_DMA_BIDIRECTIONAL);
1449 check_ioctl_unit_attention(h, c);
1450
1451 /* Copy the error information out */
1452 iocommand.error_info = *(c->err_info);
1453 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1454 kfree(buff);
1455 cmd_special_free(h, c);
1456 return -EFAULT;
1457 }
1458
1459 if (iocommand.Request.Type.Direction == XFER_READ) {
1460 /* Copy the data out of the buffer we created */
1461 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
7c832835 1462 kfree(buff);
6b4d96b8 1463 cmd_special_free(h, c);
f32f125b 1464 return -EFAULT;
1da177e4 1465 }
f32f125b
SC		 1466 }
1467 kfree(buff);
1468 cmd_special_free(h, c);
1469 return 0;
1470}
1471
0c9f5ba7
SC		 1472static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1473{
1474 BIG_IOCTL_Command_struct *ioc;
1475 CommandList_struct *c;
1476 unsigned char **buff = NULL;
1477 int *buff_size = NULL;
1478 u64bit temp64;
1479 BYTE sg_used = 0;
1480 int status = 0;
1481 int i;
1482 DECLARE_COMPLETION_ONSTACK(wait);
1483 __u32 left;
1484 __u32 sz;
1485 BYTE __user *data_ptr;
1486
1487 if (!argp)
1488 return -EINVAL;
1489 if (!capable(CAP_SYS_RAWIO))
1490 return -EPERM;
1491 ioc = (BIG_IOCTL_Command_struct *)
1492 kmalloc(sizeof(*ioc), GFP_KERNEL);
1493 if (!ioc) {
1494 status = -ENOMEM;
1495 goto cleanup1;
1496 }
1497 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1498 status = -EFAULT;
1499 goto cleanup1;
1500 }
1501 if ((ioc->buf_size < 1) &&
1502 (ioc->Request.Type.Direction != XFER_NONE)) {
1503 status = -EINVAL;
1504 goto cleanup1;
1505 }
1506 /* Check kmalloc limits using all SGs */
1507 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1508 status = -EINVAL;
1509 goto cleanup1;
1510 }
1511 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1512 status = -EINVAL;
1513 goto cleanup1;
1514 }
1515 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1516 if (!buff) {
1517 status = -ENOMEM;
1518 goto cleanup1;
1519 }
1520 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1521 if (!buff_size) {
1522 status = -ENOMEM;
1523 goto cleanup1;
1524 }
1525 left = ioc->buf_size;
1526 data_ptr = ioc->buf;
1527 while (left) {
1528 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1529 buff_size[sg_used] = sz;
1530 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1531 if (buff[sg_used] == NULL) {
1532 status = -ENOMEM;
1533 goto cleanup1;
1534 }
1535 if (ioc->Request.Type.Direction == XFER_WRITE) {
1536 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
7c832835
BH		 1537 status = -EFAULT;
1538 goto cleanup1;
1539 }
0c9f5ba7
SC		 1540 } else {
1541 memset(buff[sg_used], 0, sz);
1542 }
1543 left -= sz;
1544 data_ptr += sz;
1545 sg_used++;
1546 }
1547 c = cmd_special_alloc(h);
1548 if (!c) {
1549 status = -ENOMEM;
1550 goto cleanup1;
1551 }
1552 c->cmd_type = CMD_IOCTL_PEND;
1553 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1554 c->Header.SGList = sg_used;
1555 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1556 c->Header.LUN = ioc->LUN_info;
1557 c->Header.Tag.lower = c->busaddr;
1558
1559 c->Request = ioc->Request;
fcfb5c0c
SC		 1560 for (i = 0; i < sg_used; i++) {
1561 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1562 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1563 c->SG[i].Addr.lower = temp64.val32.lower;
1564 c->SG[i].Addr.upper = temp64.val32.upper;
1565 c->SG[i].Len = buff_size[i];
1566 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1567 }
1568 c->waiting = &wait;
1569 enqueue_cmd_and_start_io(h, c);
1570 wait_for_completion(&wait);
1571 /* unlock the buffers from DMA */
1572 for (i = 0; i < sg_used; i++) {
1573 temp64.val32.lower = c->SG[i].Addr.lower;
1574 temp64.val32.upper = c->SG[i].Addr.upper;
1575 pci_unmap_single(h->pdev,
1576 (dma_addr_t) temp64.val, buff_size[i],
1577 PCI_DMA_BIDIRECTIONAL);
1578 }
1579 check_ioctl_unit_attention(h, c);
1580 /* Copy the error information out */
1581 ioc->error_info = *(c->err_info);
1582 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1583 cmd_special_free(h, c);
1584 status = -EFAULT;
1585 goto cleanup1;
1586 }
1587 if (ioc->Request.Type.Direction == XFER_READ) {
1588 /* Copy the data out of the buffer we created */
1589 BYTE __user *ptr = ioc->buf;
1590 for (i = 0; i < sg_used; i++) {
1591 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6b4d96b8 1592 cmd_special_free(h, c);
7c832835
BH		 1593 status = -EFAULT;
1594 goto cleanup1;
1595 }
0c9f5ba7 1596 ptr += buff_size[i];
1da177e4 1597 }
0c9f5ba7
SC		 1598 }
1599 cmd_special_free(h, c);
1600 status = 0;
1601cleanup1:
1602 if (buff) {
1603 for (i = 0; i < sg_used; i++)
1604 kfree(buff[i]);
1605 kfree(buff);
1606 }
1607 kfree(buff_size);
1608 kfree(ioc);
1609 return status;
1610}
1611
ef7822c2 1612static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1613 unsigned int cmd, unsigned long arg)
1da177e4 1614{
1da177e4 1615 struct gendisk *disk = bdev->bd_disk;
f70dba83 1616 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1617 void __user *argp = (void __user *)arg;
1618
b2a4a43d
SC		 1619 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1620 cmd, arg);
7c832835 1621 switch (cmd) {
1da177e4 1622 case CCISS_GETPCIINFO:
0a25a5ae 1623 return cciss_getpciinfo(h, argp);
1da177e4 1624 case CCISS_GETINTINFO:
576e661c 1625 return cciss_getintinfo(h, argp);
1da177e4 1626 case CCISS_SETINTINFO:
4c800eed 1627 return cciss_setintinfo(h, argp);
1da177e4 1628 case CCISS_GETNODENAME:
25216109 1629 return cciss_getnodename(h, argp);
1da177e4 1630 case CCISS_SETNODENAME:
4f43f32c 1631 return cciss_setnodename(h, argp);
1da177e4 1632 case CCISS_GETHEARTBEAT:
93c74931 1633 return cciss_getheartbeat(h, argp);
1da177e4 1634 case CCISS_GETBUSTYPES:
d18dfad4 1635 return cciss_getbustypes(h, argp);
1da177e4 1636 case CCISS_GETFIRMVER:
8a4f7fbf 1637 return cciss_getfirmver(h, argp);
7c832835 1638 case CCISS_GETDRIVVER:
c525919d 1639 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1640 case CCISS_DEREGDISK:
1641 case CCISS_REGNEWD:
1da177e4 1642 case CCISS_REVALIDVOLS:
f70dba83 1643 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1644 case CCISS_GETLUNINFO:
1645 return cciss_getluninfo(h, disk, argp);
1da177e4 1646 case CCISS_PASSTHRU:
f32f125b 1647 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1648 case CCISS_BIG_PASSTHRU:
1649 return cciss_bigpassthru(h, argp);
03bbfee5
MMOD		 1650
1651 /* scsi_cmd_ioctl handles these, below, though some are not */
1652 /* very meaningful for cciss. SG_IO is the main one people want. */
1653
1654 case SG_GET_VERSION_NUM:
1655 case SG_SET_TIMEOUT:
1656 case SG_GET_TIMEOUT:
1657 case SG_GET_RESERVED_SIZE:
1658 case SG_SET_RESERVED_SIZE:
1659 case SG_EMULATED_HOST:
1660 case SG_IO:
1661 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1662 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1663
1664 /* scsi_cmd_ioctl would normally handle these, below, but */
1665 /* they aren't a good fit for cciss, as CD-ROMs are */
1666 /* not supported, and we don't have any bus/target/lun */
1667 /* which we present to the kernel. */
1668
1669 case CDROM_SEND_PACKET:
1670 case CDROMCLOSETRAY:
1671 case CDROMEJECT:
1672 case SCSI_IOCTL_GET_IDLUN:
1673 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1674 default:
1675 return -ENOTTY;
1676 }
1da177e4
LT		 1677}
1678
7b30f092
JA		 1679static void cciss_check_queues(ctlr_info_t *h)
1680{
1681 int start_queue = h->next_to_run;
1682 int i;
1683
1684 /* check to see if we have maxed out the number of commands that can
1685 * be placed on the queue. If so then exit. We do this check here
1686 * in case the interrupt we serviced was from an ioctl and did not
1687 * free any new commands.
1688 */
f880632f 1689 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1690 return;
1691
1692 /* We have room on the queue for more commands. Now we need to queue
1693 * them up. We will also keep track of the next queue to run so
1694 * that every queue gets a chance to be started first.
1695 */
1696 for (i = 0; i < h->highest_lun + 1; i++) {
1697 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1698 /* make sure the disk has been added and the drive is real
1699 * because this can be called from the middle of init_one.
1700 */
9cef0d2f
SC		 1701 if (!h->drv[curr_queue])
1702 continue;
1703 if (!(h->drv[curr_queue]->queue) ||
1704 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1705 continue;
1706 blk_start_queue(h->gendisk[curr_queue]->queue);
1707
1708 /* check to see if we have maxed out the number of commands
1709 * that can be placed on the queue.
1710 */
f880632f 1711 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1712 if (curr_queue == start_queue) {
1713 h->next_to_run =
1714 (start_queue + 1) % (h->highest_lun + 1);
1715 break;
1716 } else {
1717 h->next_to_run = curr_queue;
1718 break;
1719 }
7b30f092
JA		 1720 }
1721 }
1722}
1723
ca1e0484
MM		 1724static void cciss_softirq_done(struct request *rq)
1725{
f70dba83
SC		 1726 CommandList_struct *c = rq->completion_data;
1727 ctlr_info_t *h = hba[c->ctlr];
1728 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1729 u64bit temp64;
664a717d 1730 unsigned long flags;
ca1e0484 1731 int i, ddir;
5c07a311 1732 int sg_index = 0;
ca1e0484 1733
f70dba83 1734 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1735 ddir = PCI_DMA_FROMDEVICE;
1736 else
1737 ddir = PCI_DMA_TODEVICE;
1738
1739 /* command did not need to be retried */
1740 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1741 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1742 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1743 cciss_unmap_sg_chain_block(h, c);
5c07a311 1744 /* Point to the next block */
f70dba83 1745 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1746 sg_index = 0;
1747 }
1748 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1749 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1750 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1751 ddir);
1752 ++sg_index;
ca1e0484
MM		 1753 }
1754
b2a4a43d 1755 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1756
c3a4d78c 1757 /* set the residual count for pc requests */
33659ebb 1758 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1759 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1760
c3a4d78c 1761 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1762
ca1e0484 1763 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1764 cmd_free(h, c);
7b30f092 1765 cciss_check_queues(h);
ca1e0484
MM		 1766 spin_unlock_irqrestore(&h->lock, flags);
1767}
1768
39ccf9a6
SC		 1769static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1770 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1771{
9cef0d2f
SC		 1772 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1773 sizeof(h->drv[log_unit]->LunID));
b57695fe 1774}
1775
7fe06326
AP		 1776/* This function gets the SCSI vendor, model, and revision of a logical drive
1777 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1778 * they cannot be read.
1779 */
f70dba83 1780static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1781 char *vendor, char *model, char *rev)
1782{
1783 int rc;
1784 InquiryData_struct *inq_buf;
b57695fe 1785 unsigned char scsi3addr[8];
7fe06326
AP		 1786
1787 *vendor = '\0';
1788 *model = '\0';
1789 *rev = '\0';
1790
1791 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1792 if (!inq_buf)
1793 return;
1794
f70dba83
SC		 1795 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1796 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1797 scsi3addr, TYPE_CMD);
7fe06326
AP		 1798 if (rc == IO_OK) {
1799 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1800 vendor[VENDOR_LEN] = '\0';
1801 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1802 model[MODEL_LEN] = '\0';
1803 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1804 rev[REV_LEN] = '\0';
1805 }
1806
1807 kfree(inq_buf);
1808 return;
1809}
1810
a72da29b
MM		 1811/* This function gets the serial number of a logical drive via
1812 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1813 * number cannot be had, for whatever reason, 16 bytes of 0xff
1814 * are returned instead.
1815 */
f70dba83 1816static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1817 unsigned char *serial_no, int buflen)
1818{
1819#define PAGE_83_INQ_BYTES 64
1820 int rc;
1821 unsigned char *buf;
b57695fe 1822 unsigned char scsi3addr[8];
a72da29b
MM		 1823
1824 if (buflen > 16)
1825 buflen = 16;
1826 memset(serial_no, 0xff, buflen);
1827 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1828 if (!buf)
1829 return;
1830 memset(serial_no, 0, buflen);
f70dba83
SC		 1831 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1832 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1833 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1834 if (rc == IO_OK)
1835 memcpy(serial_no, &buf[8], buflen);
1836 kfree(buf);
1837 return;
1838}
1839
617e1344
SC		 1840/*
1841 * cciss_add_disk sets up the block device queue for a logical drive
1842 */
1843static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1844 int drv_index)
1845{
1846 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1847 if (!disk->queue)
1848 goto init_queue_failure;
6ae5ce8e
MM		 1849 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1850 disk->major = h->major;
1851 disk->first_minor = drv_index << NWD_SHIFT;
1852 disk->fops = &cciss_fops;
9cef0d2f
SC		 1853 if (cciss_create_ld_sysfs_entry(h, drv_index))
1854 goto cleanup_queue;
1855 disk->private_data = h->drv[drv_index];
1856 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1857
1858 /* Set up queue information */
1859 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1860
1861 /* This is a hardware imposed limit. */
8a78362c 1862 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1863
086fa5ff 1864 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1865
1866 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1867
1868 disk->queue->queuedata = h;
1869
e1defc4f 1870 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1871 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1872
1873 /* Make sure all queue data is written out before */
9cef0d2f 1874 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1875 /* allows the interrupt handler to start the queue */
1876 wmb();
9cef0d2f 1877 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1878 add_disk(disk);
617e1344
SC		 1879 return 0;
1880
1881cleanup_queue:
1882 blk_cleanup_queue(disk->queue);
1883 disk->queue = NULL;
e8074f79 1884init_queue_failure:
617e1344 1885 return -1;
6ae5ce8e
MM		 1886}
1887
ddd47442 1888/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1889 * If the usage_count is zero and it is a heretofore unknown drive, or,
1890 * the drive's capacity, geometry, or serial number has changed,
1891 * then the drive information will be updated and the disk will be
1892 * re-registered with the kernel. If these conditions don't hold,
1893 * then it will be left alone for the next reboot. The exception to this
1894 * is disk 0 which will always be left registered with the kernel since it
1895 * is also the controller node. Any changes to disk 0 will show up on
1896 * the next reboot.
7c832835 1897 */
f70dba83
SC		 1898static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1899 int first_time, int via_ioctl)
7c832835 1900{
ddd47442 1901 struct gendisk *disk;
ddd47442
MM		 1902 InquiryData_struct *inq_buff = NULL;
1903 unsigned int block_size;
00988a35 1904 sector_t total_size;
ddd47442
MM		 1905 unsigned long flags = 0;
1906 int ret = 0;
a72da29b
MM		 1907 drive_info_struct *drvinfo;
1908
1909 /* Get information about the disk and modify the driver structure */
1910 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1911 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1912 if (inq_buff == NULL || drvinfo == NULL)
1913 goto mem_msg;
1914
1915 /* testing to see if 16-byte CDBs are already being used */
1916 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1917 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1918 &total_size, &block_size);
1919
1920 } else {
f70dba83 1921 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 1922 /* if read_capacity returns all F's this volume is >2TB */
1923 /* in size so we switch to 16-byte CDB's for all */
1924 /* read/write ops */
1925 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1926 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1927 &total_size, &block_size);
1928 h->cciss_read = CCISS_READ_16;
1929 h->cciss_write = CCISS_WRITE_16;
1930 } else {
1931 h->cciss_read = CCISS_READ_10;
1932 h->cciss_write = CCISS_WRITE_10;
1933 }
1934 }
1935
f70dba83 1936 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 1937 inq_buff, drvinfo);
1938 drvinfo->block_size = block_size;
1939 drvinfo->nr_blocks = total_size + 1;
1940
f70dba83 1941 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 1942 drvinfo->model, drvinfo->rev);
f70dba83 1943 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 1944 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 1945 /* Save the lunid in case we deregister the disk, below. */
1946 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1947 sizeof(drvinfo->LunID));
a72da29b
MM		 1948
1949 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 1950 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 1951 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 1952 h->drv[drv_index]->serial_no, 16) == 0) &&
1953 drvinfo->block_size == h->drv[drv_index]->block_size &&
1954 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
1955 drvinfo->heads == h->drv[drv_index]->heads &&
1956 drvinfo->sectors == h->drv[drv_index]->sectors &&
1957 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 1958 /* The disk is unchanged, nothing to update */
1959 goto freeret;
a72da29b 1960
6ae5ce8e
MM		 1961 /* If we get here it's not the same disk, or something's changed,
1962 * so we need to * deregister it, and re-register it, if it's not
1963 * in use.
1964 * If the disk already exists then deregister it before proceeding
1965 * (unless it's the first disk (for the controller node).
1966 */
9cef0d2f 1967 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 1968 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 1969 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 1970 h->drv[drv_index]->busy_configuring = 1;
f70dba83 1971 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 1972
9cef0d2f 1973 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 1974 * which keeps the interrupt handler from starting
1975 * the queue.
1976 */
2d11d993 1977 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 1978 }
1979
1980 /* If the disk is in use return */
1981 if (ret)
a72da29b
MM		 1982 goto freeret;
1983
6ae5ce8e 1984 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 1985 * and serial number inquiry. If the disk was deregistered
1986 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 1987 */
9cef0d2f
SC		 1988 if (h->drv[drv_index] == NULL) {
1989 drvinfo->device_initialized = 0;
1990 h->drv[drv_index] = drvinfo;
1991 drvinfo = NULL; /* so it won't be freed below. */
1992 } else {
1993 /* special case for cxd0 */
1994 h->drv[drv_index]->block_size = drvinfo->block_size;
1995 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
1996 h->drv[drv_index]->heads = drvinfo->heads;
1997 h->drv[drv_index]->sectors = drvinfo->sectors;
1998 h->drv[drv_index]->cylinders = drvinfo->cylinders;
1999 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2000 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2001 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2002 VENDOR_LEN + 1);
2003 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2004 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2005 }
ddd47442
MM		 2006
2007 ++h->num_luns;
2008 disk = h->gendisk[drv_index];
9cef0d2f 2009 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2010
6ae5ce8e
MM		 2011 /* If it's not disk 0 (drv_index != 0)
2012 * or if it was disk 0, but there was previously
2013 * no actual corresponding configured logical drive
2014 * (raid_leve == -1) then we want to update the
2015 * logical drive's information.
2016 */
361e9b07
SC		 2017 if (drv_index || first_time) {
2018 if (cciss_add_disk(h, disk, drv_index) != 0) {
2019 cciss_free_gendisk(h, drv_index);
9cef0d2f 2020 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2021 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2022 drv_index);
361e9b07
SC		 2023 --h->num_luns;
2024 }
2025 }
ddd47442 2026
6ae5ce8e 2027freeret:
ddd47442 2028 kfree(inq_buff);
a72da29b 2029 kfree(drvinfo);
ddd47442 2030 return;
6ae5ce8e 2031mem_msg:
b2a4a43d 2032 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2033 goto freeret;
2034}
2035
2036/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2037 * that has a null drv pointer and allocate the drive info struct and
2038 * will return that index This is where new drives will be added.
2039 * If the index to be returned is greater than the highest_lun index for
2040 * the controller then highest_lun is set * to this new index.
2041 * If there are no available indexes or if tha allocation fails, then -1
2042 * is returned. * "controller_node" is used to know if this is a real
2043 * logical drive, or just the controller node, which determines if this
2044 * counts towards highest_lun.
7c832835 2045 */
9cef0d2f 2046static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2047{
2048 int i;
9cef0d2f 2049 drive_info_struct *drv;
ddd47442 2050
9cef0d2f 2051 /* Search for an empty slot for our drive info */
7c832835 2052 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2053
2054 /* if not cxd0 case, and it's occupied, skip it. */
2055 if (h->drv[i] && i != 0)
2056 continue;
2057 /*
2058 * If it's cxd0 case, and drv is alloc'ed already, and a
2059 * disk is configured there, skip it.
2060 */
2061 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2062 continue;
2063
2064 /*
2065 * We've found an empty slot. Update highest_lun
2066 * provided this isn't just the fake cxd0 controller node.
2067 */
2068 if (i > h->highest_lun && !controller_node)
2069 h->highest_lun = i;
2070
2071 /* If adding a real disk at cxd0, and it's already alloc'ed */
2072 if (i == 0 && h->drv[i] != NULL)
ddd47442 2073 return i;
9cef0d2f
SC		 2074
2075 /*
2076 * Found an empty slot, not already alloc'ed. Allocate it.
2077 * Mark it with raid_level == -1, so we know it's new later on.
2078 */
2079 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2080 if (!drv)
2081 return -1;
2082 drv->raid_level = -1; /* so we know it's new */
2083 h->drv[i] = drv;
2084 return i;
ddd47442
MM		 2085 }
2086 return -1;
2087}
2088
9cef0d2f
SC		 2089static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2090{
2091 kfree(h->drv[drv_index]);
2092 h->drv[drv_index] = NULL;
2093}
2094
361e9b07
SC		 2095static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2096{
2097 put_disk(h->gendisk[drv_index]);
2098 h->gendisk[drv_index] = NULL;
2099}
2100
6ae5ce8e
MM		 2101/* cciss_add_gendisk finds a free hba[]->drv structure
2102 * and allocates a gendisk if needed, and sets the lunid
2103 * in the drvinfo structure. It returns the index into
2104 * the ->drv[] array, or -1 if none are free.
2105 * is_controller_node indicates whether highest_lun should
2106 * count this disk, or if it's only being added to provide
2107 * a means to talk to the controller in case no logical
2108 * drives have yet been configured.
2109 */
39ccf9a6
SC		 2110static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2111 int controller_node)
6ae5ce8e
MM		 2112{
2113 int drv_index;
2114
9cef0d2f 2115 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2116 if (drv_index == -1)
2117 return -1;
8ce51966 2118
6ae5ce8e
MM		 2119 /*Check if the gendisk needs to be allocated */
2120 if (!h->gendisk[drv_index]) {
2121 h->gendisk[drv_index] =
2122 alloc_disk(1 << NWD_SHIFT);
2123 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2124 dev_err(&h->pdev->dev,
2125 "could not allocate a new disk %d\n",
2126 drv_index);
9cef0d2f 2127 goto err_free_drive_info;
6ae5ce8e
MM		 2128 }
2129 }
9cef0d2f
SC		 2130 memcpy(h->drv[drv_index]->LunID, lunid,
2131 sizeof(h->drv[drv_index]->LunID));
2132 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2133 goto err_free_disk;
6ae5ce8e
MM		 2134 /* Don't need to mark this busy because nobody */
2135 /* else knows about this disk yet to contend */
2136 /* for access to it. */
9cef0d2f 2137 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2138 wmb();
2139 return drv_index;
7fe06326
AP		 2140
2141err_free_disk:
361e9b07 2142 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2143err_free_drive_info:
2144 cciss_free_drive_info(h, drv_index);
7fe06326 2145 return -1;
6ae5ce8e
MM		 2146}
2147
2148/* This is for the special case of a controller which
2149 * has no logical drives. In this case, we still need
2150 * to register a disk so the controller can be accessed
2151 * by the Array Config Utility.
2152 */
2153static void cciss_add_controller_node(ctlr_info_t *h)
2154{
2155 struct gendisk *disk;
2156 int drv_index;
2157
2158 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2159 return;
2160
39ccf9a6 2161 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2162 if (drv_index == -1)
2163 goto error;
9cef0d2f
SC		 2164 h->drv[drv_index]->block_size = 512;
2165 h->drv[drv_index]->nr_blocks = 0;
2166 h->drv[drv_index]->heads = 0;
2167 h->drv[drv_index]->sectors = 0;
2168 h->drv[drv_index]->cylinders = 0;
2169 h->drv[drv_index]->raid_level = -1;
2170 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2171 disk = h->gendisk[drv_index];
361e9b07
SC		 2172 if (cciss_add_disk(h, disk, drv_index) == 0)
2173 return;
2174 cciss_free_gendisk(h, drv_index);
9cef0d2f 2175 cciss_free_drive_info(h, drv_index);
361e9b07 2176error:
b2a4a43d 2177 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2178 return;
6ae5ce8e
MM		 2179}
2180
ddd47442 2181/* This function will add and remove logical drives from the Logical
d14c4ab5 2182 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2183 * so that mount points are preserved until the next reboot. This allows
2184 * for the removal of logical drives in the middle of the drive array
2185 * without a re-ordering of those drives.
2186 * INPUT
2187 * h = The controller to perform the operations on
7c832835 2188 */
2d11d993
SC		 2189static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2190 int via_ioctl)
1da177e4 2191{
ddd47442
MM		 2192 int num_luns;
2193 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2194 int return_code;
2195 int listlength = 0;
2196 int i;
2197 int drv_found;
2198 int drv_index = 0;
39ccf9a6 2199 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2200 unsigned long flags;
ddd47442 2201
6ae5ce8e
MM		 2202 if (!capable(CAP_SYS_RAWIO))
2203 return -EPERM;
2204
ddd47442 2205 /* Set busy_configuring flag for this operation */
f70dba83 2206 spin_lock_irqsave(&h->lock, flags);
7c832835 2207 if (h->busy_configuring) {
f70dba83 2208 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2209 return -EBUSY;
2210 }
2211 h->busy_configuring = 1;
f70dba83 2212 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2213
a72da29b
MM		 2214 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2215 if (ld_buff == NULL)
2216 goto mem_msg;
2217
f70dba83 2218 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2219 sizeof(ReportLunData_struct),
2220 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2221
a72da29b
MM		 2222 if (return_code == IO_OK)
2223 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2224 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2225 dev_warn(&h->pdev->dev,
2226 "report logical volume command failed\n");
a72da29b
MM		 2227 listlength = 0;
2228 goto freeret;
2229 }
2230
2231 num_luns = listlength / 8; /* 8 bytes per entry */
2232 if (num_luns > CISS_MAX_LUN) {
2233 num_luns = CISS_MAX_LUN;
b2a4a43d 2234 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2235 " on controller than can be handled by"
2236 " this driver.\n");
2237 }
2238
6ae5ce8e
MM		 2239 if (num_luns == 0)
2240 cciss_add_controller_node(h);
2241
2242 /* Compare controller drive array to driver's drive array
2243 * to see if any drives are missing on the controller due
2244 * to action of Array Config Utility (user deletes drive)
2245 * and deregister logical drives which have disappeared.
2246 */
a72da29b
MM		 2247 for (i = 0; i <= h->highest_lun; i++) {
2248 int j;
2249 drv_found = 0;
d8a0be6a
SC		 2250
2251 /* skip holes in the array from already deleted drives */
9cef0d2f 2252 if (h->drv[i] == NULL)
d8a0be6a
SC		 2253 continue;
2254
a72da29b 2255 for (j = 0; j < num_luns; j++) {
39ccf9a6 2256 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2257 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2258 sizeof(lunid)) == 0) {
a72da29b
MM		 2259 drv_found = 1;
2260 break;
2261 }
2262 }
2263 if (!drv_found) {
2264 /* Deregister it from the OS, it's gone. */
f70dba83 2265 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2266 h->drv[i]->busy_configuring = 1;
f70dba83 2267 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2268 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2269 if (h->drv[i] != NULL)
2270 h->drv[i]->busy_configuring = 0;
ddd47442 2271 }
a72da29b 2272 }
ddd47442 2273
a72da29b
MM		 2274 /* Compare controller drive array to driver's drive array.
2275 * Check for updates in the drive information and any new drives
2276 * on the controller due to ACU adding logical drives, or changing
2277 * a logical drive's size, etc. Reregister any new/changed drives
2278 */
2279 for (i = 0; i < num_luns; i++) {
2280 int j;
ddd47442 2281
a72da29b 2282 drv_found = 0;
ddd47442 2283
39ccf9a6 2284 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2285 /* Find if the LUN is already in the drive array
2286 * of the driver. If so then update its info
2287 * if not in use. If it does not exist then find
2288 * the first free index and add it.
2289 */
2290 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2291 if (h->drv[j] != NULL &&
2292 memcmp(h->drv[j]->LunID, lunid,
2293 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2294 drv_index = j;
2295 drv_found = 1;
2296 break;
ddd47442 2297 }
a72da29b 2298 }
ddd47442 2299
a72da29b
MM		 2300 /* check if the drive was found already in the array */
2301 if (!drv_found) {
eece695f 2302 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2303 if (drv_index == -1)
2304 goto freeret;
a72da29b 2305 }
f70dba83 2306 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2307 } /* end for */
ddd47442 2308
6ae5ce8e 2309freeret:
ddd47442
MM		 2310 kfree(ld_buff);
2311 h->busy_configuring = 0;
2312 /* We return -1 here to tell the ACU that we have registered/updated
2313 * all of the drives that we can and to keep it from calling us
2314 * additional times.
7c832835 2315 */
ddd47442 2316 return -1;
6ae5ce8e 2317mem_msg:
b2a4a43d 2318 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2319 h->busy_configuring = 0;
ddd47442
MM		 2320 goto freeret;
2321}
2322
9ddb27b4
SC		 2323static void cciss_clear_drive_info(drive_info_struct *drive_info)
2324{
2325 /* zero out the disk size info */
2326 drive_info->nr_blocks = 0;
2327 drive_info->block_size = 0;
2328 drive_info->heads = 0;
2329 drive_info->sectors = 0;
2330 drive_info->cylinders = 0;
2331 drive_info->raid_level = -1;
2332 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2333 memset(drive_info->model, 0, sizeof(drive_info->model));
2334 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2335 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2336 /*
2337 * don't clear the LUNID though, we need to remember which
2338 * one this one is.
2339 */
2340}
2341
ddd47442
MM		 2342/* This function will deregister the disk and it's queue from the
2343 * kernel. It must be called with the controller lock held and the
2344 * drv structures busy_configuring flag set. It's parameters are:
2345 *
2346 * disk = This is the disk to be deregistered
2347 * drv = This is the drive_info_struct associated with the disk to be
2348 * deregistered. It contains information about the disk used
2349 * by the driver.
2350 * clear_all = This flag determines whether or not the disk information
2351 * is going to be completely cleared out and the highest_lun
2352 * reset. Sometimes we want to clear out information about
d14c4ab5 2353 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2354 * the highest_lun should be left unchanged and the LunID
2355 * should not be cleared.
2d11d993
SC		 2356 * via_ioctl
2357 * This indicates whether we've reached this path via ioctl.
2358 * This affects the maximum usage count allowed for c0d0 to be messed with.
2359 * If this path is reached via ioctl(), then the max_usage_count will
2360 * be 1, as the process calling ioctl() has got to have the device open.
2361 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2362*/
a0ea8622 2363static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2364 int clear_all, int via_ioctl)
ddd47442 2365{
799202cb 2366 int i;
a0ea8622
SC		 2367 struct gendisk *disk;
2368 drive_info_struct *drv;
9cef0d2f 2369 int recalculate_highest_lun;
1da177e4
LT		 2370
2371 if (!capable(CAP_SYS_RAWIO))
2372 return -EPERM;
2373
9cef0d2f 2374 drv = h->drv[drv_index];
a0ea8622
SC		 2375 disk = h->gendisk[drv_index];
2376
1da177e4 2377 /* make sure logical volume is NOT is use */
7c832835 2378 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2379 if (drv->usage_count > via_ioctl)
7c832835
BH		 2380 return -EBUSY;
2381 } else if (drv->usage_count > 0)
2382 return -EBUSY;
1da177e4 2383
9cef0d2f
SC		 2384 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2385
ddd47442
MM		 2386 /* invalidate the devices and deregister the disk. If it is disk
2387 * zero do not deregister it but just zero out it's values. This
2388 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2389 */
2390 if (h->gendisk[0] != disk) {
5a9df732 2391 struct request_queue *q = disk->queue;
097d0264 2392 if (disk->flags & GENHD_FL_UP) {
8ce51966 2393 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2394 del_gendisk(disk);
5a9df732 2395 }
9cef0d2f 2396 if (q)
5a9df732 2397 blk_cleanup_queue(q);
5a9df732
AB		 2398 /* If clear_all is set then we are deleting the logical
2399 * drive, not just refreshing its info. For drives
2400 * other than disk 0 we will call put_disk. We do not
2401 * do this for disk 0 as we need it to be able to
2402 * configure the controller.
a72da29b 2403 */
5a9df732
AB		 2404 if (clear_all){
2405 /* This isn't pretty, but we need to find the
2406 * disk in our array and NULL our the pointer.
2407 * This is so that we will call alloc_disk if
2408 * this index is used again later.
a72da29b 2409 */
5a9df732 2410 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2411 if (h->gendisk[i] == disk) {
5a9df732
AB		 2412 h->gendisk[i] = NULL;
2413 break;
799202cb 2414 }
799202cb 2415 }
5a9df732 2416 put_disk(disk);
ddd47442 2417 }
799202cb
MM		 2418 } else {
2419 set_capacity(disk, 0);
9cef0d2f 2420 cciss_clear_drive_info(drv);
ddd47442
MM		 2421 }
2422
2423 --h->num_luns;
ddd47442 2424
9cef0d2f
SC		 2425 /* if it was the last disk, find the new hightest lun */
2426 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2427 int newhighest = -1;
9cef0d2f
SC		 2428 for (i = 0; i <= h->highest_lun; i++) {
2429 /* if the disk has size > 0, it is available */
2430 if (h->drv[i] && h->drv[i]->heads)
2431 newhighest = i;
1da177e4 2432 }
9cef0d2f 2433 h->highest_lun = newhighest;
ddd47442 2434 }
e2019b58 2435 return 0;
1da177e4 2436}
ddd47442 2437
f70dba83 2438static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2439 size_t size, __u8 page_code, unsigned char *scsi3addr,
2440 int cmd_type)
1da177e4 2441{
1da177e4
LT		 2442 u64bit buff_dma_handle;
2443 int status = IO_OK;
2444
2445 c->cmd_type = CMD_IOCTL_PEND;
2446 c->Header.ReplyQueue = 0;
7c832835 2447 if (buff != NULL) {
1da177e4 2448 c->Header.SGList = 1;
7c832835 2449 c->Header.SGTotal = 1;
1da177e4
LT		 2450 } else {
2451 c->Header.SGList = 0;
7c832835 2452 c->Header.SGTotal = 0;
1da177e4
LT		 2453 }
2454 c->Header.Tag.lower = c->busaddr;
b57695fe 2455 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2456
2457 c->Request.Type.Type = cmd_type;
2458 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2459 switch (cmd) {
2460 case CISS_INQUIRY:
1da177e4 2461 /* are we trying to read a vital product page */
7c832835 2462 if (page_code != 0) {
1da177e4
LT		 2463 c->Request.CDB[1] = 0x01;
2464 c->Request.CDB[2] = page_code;
2465 }
2466 c->Request.CDBLen = 6;
7c832835 2467 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2468 c->Request.Type.Direction = XFER_READ;
2469 c->Request.Timeout = 0;
7c832835
BH		 2470 c->Request.CDB[0] = CISS_INQUIRY;
2471 c->Request.CDB[4] = size & 0xFF;
2472 break;
1da177e4
LT		 2473 case CISS_REPORT_LOG:
2474 case CISS_REPORT_PHYS:
7c832835 2475 /* Talking to controller so It's a physical command
1da177e4 2476 mode = 00 target = 0. Nothing to write.
7c832835 2477 */
1da177e4
LT		 2478 c->Request.CDBLen = 12;
2479 c->Request.Type.Attribute = ATTR_SIMPLE;
2480 c->Request.Type.Direction = XFER_READ;
2481 c->Request.Timeout = 0;
2482 c->Request.CDB[0] = cmd;
b028461d 2483 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2484 c->Request.CDB[7] = (size >> 16) & 0xFF;
2485 c->Request.CDB[8] = (size >> 8) & 0xFF;
2486 c->Request.CDB[9] = size & 0xFF;
2487 break;
2488
2489 case CCISS_READ_CAPACITY:
1da177e4
LT		 2490 c->Request.CDBLen = 10;
2491 c->Request.Type.Attribute = ATTR_SIMPLE;
2492 c->Request.Type.Direction = XFER_READ;
2493 c->Request.Timeout = 0;
2494 c->Request.CDB[0] = cmd;
7c832835 2495 break;
00988a35 2496 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2497 c->Request.CDBLen = 16;
2498 c->Request.Type.Attribute = ATTR_SIMPLE;
2499 c->Request.Type.Direction = XFER_READ;
2500 c->Request.Timeout = 0;
2501 c->Request.CDB[0] = cmd;
2502 c->Request.CDB[1] = 0x10;
2503 c->Request.CDB[10] = (size >> 24) & 0xFF;
2504 c->Request.CDB[11] = (size >> 16) & 0xFF;
2505 c->Request.CDB[12] = (size >> 8) & 0xFF;
2506 c->Request.CDB[13] = size & 0xFF;
2507 c->Request.Timeout = 0;
2508 c->Request.CDB[0] = cmd;
2509 break;
1da177e4
LT		 2510 case CCISS_CACHE_FLUSH:
2511 c->Request.CDBLen = 12;
2512 c->Request.Type.Attribute = ATTR_SIMPLE;
2513 c->Request.Type.Direction = XFER_WRITE;
2514 c->Request.Timeout = 0;
2515 c->Request.CDB[0] = BMIC_WRITE;
2516 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2517 break;
88f627ae 2518 case TEST_UNIT_READY:
88f627ae
SC		 2519 c->Request.CDBLen = 6;
2520 c->Request.Type.Attribute = ATTR_SIMPLE;
2521 c->Request.Type.Direction = XFER_NONE;
2522 c->Request.Timeout = 0;
2523 break;
1da177e4 2524 default:
b2a4a43d 2525 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2526 return IO_ERROR;
1da177e4
LT		 2527 }
2528 } else if (cmd_type == TYPE_MSG) {
2529 switch (cmd) {
7c832835 2530 case 0: /* ABORT message */
3da8b713 2531 c->Request.CDBLen = 12;
2532 c->Request.Type.Attribute = ATTR_SIMPLE;
2533 c->Request.Type.Direction = XFER_WRITE;
2534 c->Request.Timeout = 0;
7c832835
BH		 2535 c->Request.CDB[0] = cmd; /* abort */
2536 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2537 /* buff contains the tag of the command to abort */
2538 memcpy(&c->Request.CDB[4], buff, 8);
2539 break;
7c832835 2540 case 1: /* RESET message */
88f627ae 2541 c->Request.CDBLen = 16;
3da8b713 2542 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2543 c->Request.Type.Direction = XFER_NONE;
3da8b713 2544 c->Request.Timeout = 0;
2545 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2546 c->Request.CDB[0] = cmd; /* reset */
88f627ae 2547 c->Request.CDB[1] = 0x03; /* reset a target */
00988a35 2548 break;
1da177e4
LT		 2549 case 3: /* No-Op message */
2550 c->Request.CDBLen = 1;
2551 c->Request.Type.Attribute = ATTR_SIMPLE;
2552 c->Request.Type.Direction = XFER_WRITE;
2553 c->Request.Timeout = 0;
2554 c->Request.CDB[0] = cmd;
2555 break;
2556 default:
b2a4a43d
SC		 2557 dev_warn(&h->pdev->dev,
2558 "unknown message type %d\n", cmd);
1da177e4
LT		 2559 return IO_ERROR;
2560 }
2561 } else {
b2a4a43d 2562 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2563 return IO_ERROR;
2564 }
2565 /* Fill in the scatter gather information */
2566 if (size > 0) {
2567 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2568 buff, size,
2569 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2570 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2571 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2572 c->SG[0].Len = size;
7c832835 2573 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2574 }
2575 return status;
2576}
7c832835 2577
3c2ab402 2578static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2579{
2580 switch (c->err_info->ScsiStatus) {
2581 case SAM_STAT_GOOD:
2582 return IO_OK;
2583 case SAM_STAT_CHECK_CONDITION:
2584 switch (0xf & c->err_info->SenseInfo[2]) {
2585 case 0: return IO_OK; /* no sense */
2586 case 1: return IO_OK; /* recovered error */
2587 default:
c08fac65
SC		 2588 if (check_for_unit_attention(h, c))
2589 return IO_NEEDS_RETRY;
b2a4a43d 2590 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2591 "check condition, sense key = 0x%02x\n",
b2a4a43d 2592 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2593 }
2594 break;
2595 default:
b2a4a43d
SC		 2596 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2597 "scsi status = 0x%02x\n",
3c2ab402 2598 c->Request.CDB[0], c->err_info->ScsiStatus);
2599 break;
2600 }
2601 return IO_ERROR;
2602}
2603
789a424a 2604static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2605{
5390cfc3 2606 int return_status = IO_OK;
7c832835 2607
789a424a 2608 if (c->err_info->CommandStatus == CMD_SUCCESS)
2609 return IO_OK;
5390cfc3 2610
2611 switch (c->err_info->CommandStatus) {
2612 case CMD_TARGET_STATUS:
3c2ab402 2613 return_status = check_target_status(h, c);
5390cfc3 2614 break;
2615 case CMD_DATA_UNDERRUN:
2616 case CMD_DATA_OVERRUN:
2617 /* expected for inquiry and report lun commands */
2618 break;
2619 case CMD_INVALID:
b2a4a43d 2620 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2621 "reported invalid\n", c->Request.CDB[0]);
2622 return_status = IO_ERROR;
2623 break;
2624 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2625 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2626 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2627 return_status = IO_ERROR;
2628 break;
2629 case CMD_HARDWARE_ERR:
b2a4a43d 2630 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2631 " hardware error\n", c->Request.CDB[0]);
2632 return_status = IO_ERROR;
2633 break;
2634 case CMD_CONNECTION_LOST:
b2a4a43d 2635 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2636 "connection lost\n", c->Request.CDB[0]);
2637 return_status = IO_ERROR;
2638 break;
2639 case CMD_ABORTED:
b2a4a43d 2640 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2641 "aborted\n", c->Request.CDB[0]);
2642 return_status = IO_ERROR;
2643 break;
2644 case CMD_ABORT_FAILED:
b2a4a43d 2645 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2646 "abort failed\n", c->Request.CDB[0]);
2647 return_status = IO_ERROR;
2648 break;
2649 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2650 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2651 c->Request.CDB[0]);
789a424a 2652 return_status = IO_NEEDS_RETRY;
5390cfc3 2653 break;
2654 default:
b2a4a43d 2655 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2656 "unknown status %x\n", c->Request.CDB[0],
2657 c->err_info->CommandStatus);
2658 return_status = IO_ERROR;
7c832835 2659 }
789a424a 2660 return return_status;
2661}
2662
2663static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2664 int attempt_retry)
2665{
2666 DECLARE_COMPLETION_ONSTACK(wait);
2667 u64bit buff_dma_handle;
789a424a 2668 int return_status = IO_OK;
2669
2670resend_cmd2:
2671 c->waiting = &wait;
664a717d 2672 enqueue_cmd_and_start_io(h, c);
789a424a 2673
2674 wait_for_completion(&wait);
2675
2676 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2677 goto command_done;
2678
2679 return_status = process_sendcmd_error(h, c);
2680
2681 if (return_status == IO_NEEDS_RETRY &&
2682 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2683 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2684 c->Request.CDB[0]);
2685 c->retry_count++;
2686 /* erase the old error information */
2687 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2688 return_status = IO_OK;
2689 INIT_COMPLETION(wait);
2690 goto resend_cmd2;
2691 }
5390cfc3 2692
2693command_done:
1da177e4 2694 /* unlock the buffers from DMA */
bb2a37bf
MM		 2695 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2696 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2697 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2698 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2699 return return_status;
2700}
2701
f70dba83 2702static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2703 __u8 page_code, unsigned char scsi3addr[],
2704 int cmd_type)
5390cfc3 2705{
5390cfc3 2706 CommandList_struct *c;
2707 int return_status;
2708
6b4d96b8 2709 c = cmd_special_alloc(h);
5390cfc3 2710 if (!c)
2711 return -ENOMEM;
f70dba83 2712 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2713 scsi3addr, cmd_type);
5390cfc3 2714 if (return_status == IO_OK)
789a424a 2715 return_status = sendcmd_withirq_core(h, c, 1);
2716
6b4d96b8 2717 cmd_special_free(h, c);
7c832835 2718 return return_status;
1da177e4 2719}
7c832835 2720
f70dba83 2721static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2722 sector_t total_size,
7c832835
BH		 2723 unsigned int block_size,
2724 InquiryData_struct *inq_buff,
2725 drive_info_struct *drv)
1da177e4
LT		 2726{
2727 int return_code;
00988a35 2728 unsigned long t;
b57695fe 2729 unsigned char scsi3addr[8];
00988a35 2730
1da177e4 2731 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2732 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2733 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2734 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2735 if (return_code == IO_OK) {
7c832835 2736 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2737 dev_warn(&h->pdev->dev,
2738 "reading geometry failed, volume "
7c832835 2739 "does not support reading geometry\n");
1da177e4 2740 drv->heads = 255;
b028461d 2741 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2742 drv->cylinders = total_size + 1;
89f97ad1 2743 drv->raid_level = RAID_UNKNOWN;
1da177e4 2744 } else {
1da177e4
LT		 2745 drv->heads = inq_buff->data_byte[6];
2746 drv->sectors = inq_buff->data_byte[7];
2747 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2748 drv->cylinders += inq_buff->data_byte[5];
2749 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2750 }
2751 drv->block_size = block_size;
97c06978 2752 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2753 t = drv->heads * drv->sectors;
2754 if (t > 1) {
97c06978
MMOD		 2755 sector_t real_size = total_size + 1;
2756 unsigned long rem = sector_div(real_size, t);
3f7705ea 2757 if (rem)
97c06978
MMOD		 2758 real_size++;
2759 drv->cylinders = real_size;
1da177e4 2760 }
7c832835 2761 } else { /* Get geometry failed */
b2a4a43d 2762 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2763 }
1da177e4 2764}
7c832835 2765
1da177e4 2766static void
f70dba83 2767cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2768 unsigned int *block_size)
1da177e4 2769{
00988a35 2770 ReadCapdata_struct *buf;
1da177e4 2771 int return_code;
b57695fe 2772 unsigned char scsi3addr[8];
1aebe187
MK		 2773
2774 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2775 if (!buf) {
b2a4a43d 2776 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2777 return;
2778 }
1aebe187 2779
f70dba83
SC		 2780 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2781 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2782 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2783 if (return_code == IO_OK) {
4c1f2b31
AV		 2784 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2785 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2786 } else { /* read capacity command failed */
b2a4a43d 2787 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2788 *total_size = 0;
2789 *block_size = BLOCK_SIZE;
2790 }
00988a35 2791 kfree(buf);
00988a35
MMOD		 2792}
2793
f70dba83 2794static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2795 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2796{
2797 ReadCapdata_struct_16 *buf;
2798 int return_code;
b57695fe 2799 unsigned char scsi3addr[8];
1aebe187
MK		 2800
2801 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2802 if (!buf) {
b2a4a43d 2803 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2804 return;
2805 }
1aebe187 2806
f70dba83
SC		 2807 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2808 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2809 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2810 0, scsi3addr, TYPE_CMD);
00988a35 2811 if (return_code == IO_OK) {
4c1f2b31
AV		 2812 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2813 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2814 } else { /* read capacity command failed */
b2a4a43d 2815 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2816 *total_size = 0;
2817 *block_size = BLOCK_SIZE;
2818 }
b2a4a43d 2819 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2820 (unsigned long long)*total_size+1, *block_size);
00988a35 2821 kfree(buf);
1da177e4
LT		 2822}
2823
1da177e4
LT		 2824static int cciss_revalidate(struct gendisk *disk)
2825{
2826 ctlr_info_t *h = get_host(disk);
2827 drive_info_struct *drv = get_drv(disk);
2828 int logvol;
7c832835 2829 int FOUND = 0;
1da177e4 2830 unsigned int block_size;
00988a35 2831 sector_t total_size;
1da177e4
LT		 2832 InquiryData_struct *inq_buff = NULL;
2833
7c832835 2834 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
9cef0d2f 2835 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2836 sizeof(drv->LunID)) == 0) {
7c832835 2837 FOUND = 1;
1da177e4
LT		 2838 break;
2839 }
2840 }
2841
7c832835
BH		 2842 if (!FOUND)
2843 return 1;
1da177e4 2844
7c832835
BH		 2845 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2846 if (inq_buff == NULL) {
b2a4a43d 2847 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2848 return 1;
2849 }
00988a35 2850 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2851 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2852 &total_size, &block_size);
2853 } else {
f70dba83 2854 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2855 &total_size, &block_size);
2856 }
f70dba83 2857 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2858 inq_buff, drv);
1da177e4 2859
e1defc4f 2860 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2861 set_capacity(disk, drv->nr_blocks);
2862
1da177e4
LT		 2863 kfree(inq_buff);
2864 return 0;
2865}
2866
1da177e4
LT		 2867/*
2868 * Map (physical) PCI mem into (virtual) kernel space
2869 */
2870static void __iomem *remap_pci_mem(ulong base, ulong size)
2871{
7c832835
BH		 2872 ulong page_base = ((ulong) base) & PAGE_MASK;
2873 ulong page_offs = ((ulong) base) - page_base;
2874 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2875
7c832835 2876 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2877}
2878
7c832835
BH		 2879/*
2880 * Takes jobs of the Q and sends them to the hardware, then puts it on
2881 * the Q to wait for completion.
2882 */
2883static void start_io(ctlr_info_t *h)
1da177e4
LT		 2884{
2885 CommandList_struct *c;
7c832835 2886
8a3173de
JA		 2887 while (!hlist_empty(&h->reqQ)) {
2888 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
1da177e4
LT		 2889 /* can't do anything if fifo is full */
2890 if ((h->access.fifo_full(h))) {
b2a4a43d 2891 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 2892 break;
2893 }
2894
7c832835 2895 /* Get the first entry from the Request Q */
8a3173de 2896 removeQ(c);
1da177e4 2897 h->Qdepth--;
7c832835
BH		 2898
2899 /* Tell the controller execute command */
1da177e4 2900 h->access.submit_command(h, c);
7c832835
BH		 2901
2902 /* Put job onto the completed Q */
8a3173de 2903 addQ(&h->cmpQ, c);
1da177e4
LT		 2904 }
2905}
7c832835 2906
f70dba83 2907/* Assumes that h->lock is held. */
1da177e4
LT		 2908/* Zeros out the error record and then resends the command back */
2909/* to the controller */
7c832835 2910static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 2911{
2912 /* erase the old error information */
2913 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2914
2915 /* add it to software queue and then send it to the controller */
8a3173de 2916 addQ(&h->reqQ, c);
1da177e4 2917 h->Qdepth++;
7c832835 2918 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 2919 h->maxQsinceinit = h->Qdepth;
2920
2921 start_io(h);
2922}
a9925a06 2923
1a614f50
SC		 2924static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2925 unsigned int msg_byte, unsigned int host_byte,
2926 unsigned int driver_byte)
2927{
2928 /* inverse of macros in scsi.h */
2929 return (scsi_status_byte & 0xff) |
2930 ((msg_byte & 0xff) << 8) |
2931 ((host_byte & 0xff) << 16) |
2932 ((driver_byte & 0xff) << 24);
2933}
2934
0a9279cc
MM		 2935static inline int evaluate_target_status(ctlr_info_t *h,
2936 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 2937{
2938 unsigned char sense_key;
1a614f50
SC		 2939 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2940 int error_value;
2941
0a9279cc 2942 *retry_cmd = 0;
1a614f50
SC		 2943 /* If we get in here, it means we got "target status", that is, scsi status */
2944 status_byte = cmd->err_info->ScsiStatus;
2945 driver_byte = DRIVER_OK;
2946 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2947
33659ebb 2948 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 2949 host_byte = DID_PASSTHROUGH;
2950 else
2951 host_byte = DID_OK;
2952
2953 error_value = make_status_bytes(status_byte, msg_byte,
2954 host_byte, driver_byte);
03bbfee5 2955
1a614f50 2956 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 2957 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 2958 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 2959 "has SCSI Status 0x%x\n",
2960 cmd, cmd->err_info->ScsiStatus);
1a614f50 2961 return error_value;
03bbfee5
MMOD		 2962 }
2963
2964 /* check the sense key */
2965 sense_key = 0xf & cmd->err_info->SenseInfo[2];
2966 /* no status or recovered error */
33659ebb
CH		 2967 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
2968 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 2969 error_value = 0;
03bbfee5 2970
0a9279cc 2971 if (check_for_unit_attention(h, cmd)) {
33659ebb 2972 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 2973 return 0;
2974 }
2975
33659ebb
CH		 2976 /* Not SG_IO or similar? */
2977 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 2978 if (error_value != 0)
b2a4a43d 2979 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 2980 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 2981 return error_value;
03bbfee5
MMOD		 2982 }
2983
2984 /* SG_IO or similar, copy sense data back */
2985 if (cmd->rq->sense) {
2986 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
2987 cmd->rq->sense_len = cmd->err_info->SenseLen;
2988 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
2989 cmd->rq->sense_len);
2990 } else
2991 cmd->rq->sense_len = 0;
2992
1a614f50 2993 return error_value;
03bbfee5
MMOD		 2994}
2995
7c832835 2996/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 2997 * buffers for the completed job. Note that this function does not need
2998 * to hold the hba/queue lock.
7c832835
BH		 2999 */
3000static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3001 int timeout)
1da177e4 3002{
1da177e4 3003 int retry_cmd = 0;
198b7660
MMOD		 3004 struct request *rq = cmd->rq;
3005
3006 rq->errors = 0;
7c832835 3007
1da177e4 3008 if (timeout)
1a614f50 3009 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3010
d38ae168
MMOD		 3011 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3012 goto after_error_processing;
7c832835 3013
d38ae168 3014 switch (cmd->err_info->CommandStatus) {
d38ae168 3015 case CMD_TARGET_STATUS:
0a9279cc 3016 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3017 break;
3018 case CMD_DATA_UNDERRUN:
33659ebb 3019 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3020 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3021 " completed with data underrun "
3022 "reported\n", cmd);
c3a4d78c 3023 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3024 }
d38ae168
MMOD		 3025 break;
3026 case CMD_DATA_OVERRUN:
33659ebb 3027 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3028 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3029 " completed with data overrun "
3030 "reported\n", cmd);
d38ae168
MMOD		 3031 break;
3032 case CMD_INVALID:
b2a4a43d 3033 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3034 "reported invalid\n", cmd);
1a614f50
SC		 3035 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3036 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3037 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3038 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3039 break;
3040 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3041 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3042 "protocol error\n", cmd);
1a614f50
SC		 3043 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3044 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3045 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3046 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3047 break;
3048 case CMD_HARDWARE_ERR:
b2a4a43d 3049 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3050 " hardware error\n", cmd);
1a614f50
SC		 3051 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3052 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3053 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3054 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3055 break;
3056 case CMD_CONNECTION_LOST:
b2a4a43d 3057 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3058 "connection lost\n", cmd);
1a614f50
SC		 3059 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3060 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3061 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3062 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3063 break;
3064 case CMD_ABORTED:
b2a4a43d 3065 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3066 "aborted\n", cmd);
1a614f50
SC		 3067 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3068 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3069 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3070 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3071 break;
3072 case CMD_ABORT_FAILED:
b2a4a43d 3073 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3074 "abort failed\n", cmd);
1a614f50
SC		 3075 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3076 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3077 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3078 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3079 break;
3080 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3081 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3082 "abort %p\n", h->ctlr, cmd);
3083 if (cmd->retry_count < MAX_CMD_RETRIES) {
3084 retry_cmd = 1;
b2a4a43d 3085 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3086 cmd->retry_count++;
3087 } else
b2a4a43d
SC		 3088 dev_warn(&h->pdev->dev,
3089 "%p retried too many times\n", cmd);
1a614f50
SC		 3090 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3091 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3092 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3093 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3094 break;
3095 case CMD_TIMEOUT:
b2a4a43d 3096 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3097 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3098 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3099 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3100 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3101 break;
3102 default:
b2a4a43d 3103 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3104 "unknown status %x\n", cmd,
3105 cmd->err_info->CommandStatus);
1a614f50
SC		 3106 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3107 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3108 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3109 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3110 }
d38ae168
MMOD		 3111
3112after_error_processing:
3113
1da177e4 3114 /* We need to return this command */
7c832835
BH		 3115 if (retry_cmd) {
3116 resend_cciss_cmd(h, cmd);
1da177e4 3117 return;
7c832835 3118 }
03bbfee5 3119 cmd->rq->completion_data = cmd;
a9925a06 3120 blk_complete_request(cmd->rq);
1da177e4
LT		 3121}
3122
0c2b3908
MM		 3123static inline u32 cciss_tag_contains_index(u32 tag)
3124{
5e216153 3125#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3126 return tag & DIRECT_LOOKUP_BIT;
3127}
3128
3129static inline u32 cciss_tag_to_index(u32 tag)
3130{
5e216153 3131#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3132 return tag >> DIRECT_LOOKUP_SHIFT;
3133}
3134
3135static inline u32 cciss_tag_discard_error_bits(u32 tag)
3136{
3137#define CCISS_ERROR_BITS 0x03
3138 return tag & ~CCISS_ERROR_BITS;
3139}
3140
3141static inline void cciss_mark_tag_indexed(u32 *tag)
3142{
3143 *tag |= DIRECT_LOOKUP_BIT;
3144}
3145
3146static inline void cciss_set_tag_index(u32 *tag, u32 index)
3147{
3148 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3149}
3150
7c832835
BH		 3151/*
3152 * Get a request and submit it to the controller.
1da177e4 3153 */
165125e1 3154static void do_cciss_request(struct request_queue *q)
1da177e4 3155{
7c832835 3156 ctlr_info_t *h = q->queuedata;
1da177e4 3157 CommandList_struct *c;
00988a35
MMOD		 3158 sector_t start_blk;
3159 int seg;
1da177e4
LT		 3160 struct request *creq;
3161 u64bit temp64;
5c07a311
DB		 3162 struct scatterlist *tmp_sg;
3163 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3164 drive_info_struct *drv;
3165 int i, dir;
5c07a311
DB		 3166 int sg_index = 0;
3167 int chained = 0;
1da177e4
LT		 3168
3169 /* We call start_io here in case there is a command waiting on the
3170 * queue that has not been sent.
7c832835 3171 */
1da177e4
LT		 3172 if (blk_queue_plugged(q))
3173 goto startio;
3174
7c832835 3175 queue:
9934c8c0 3176 creq = blk_peek_request(q);
1da177e4
LT		 3177 if (!creq)
3178 goto startio;
3179
5c07a311 3180 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3181
6b4d96b8
SC		 3182 c = cmd_alloc(h);
3183 if (!c)
1da177e4
LT		 3184 goto full;
3185
9934c8c0 3186 blk_start_request(creq);
1da177e4 3187
5c07a311 3188 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3189 spin_unlock_irq(q->queue_lock);
3190
3191 c->cmd_type = CMD_RWREQ;
3192 c->rq = creq;
7c832835
BH		 3193
3194 /* fill in the request */
1da177e4 3195 drv = creq->rq_disk->private_data;
b028461d 3196 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3197 /* got command from pool, so use the command block index instead */
3198 /* for direct lookups. */
3199 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3200 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3201 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3202 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3203 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3204 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3205 c->Request.Type.Attribute = ATTR_SIMPLE;
3206 c->Request.Type.Direction =
a52de245 3207 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3208 c->Request.Timeout = 0; /* Don't time out */
7c832835 3209 c->Request.CDB[0] =
00988a35 3210 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3211 start_blk = blk_rq_pos(creq);
b2a4a43d 3212 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3213 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3214 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3215 seg = blk_rq_map_sg(q, creq, tmp_sg);
3216
7c832835 3217 /* get the DMA records for the setup */
1da177e4
LT		 3218 if (c->Request.Type.Direction == XFER_READ)
3219 dir = PCI_DMA_FROMDEVICE;
3220 else
3221 dir = PCI_DMA_TODEVICE;
3222
5c07a311
DB		 3223 curr_sg = c->SG;
3224 sg_index = 0;
3225 chained = 0;
3226
7c832835 3227 for (i = 0; i < seg; i++) {
5c07a311
DB		 3228 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3229 !chained && ((seg - i) > 1)) {
5c07a311 3230 /* Point to next chain block. */
dccc9b56 3231 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3232 sg_index = 0;
3233 chained = 1;
3234 }
3235 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3236 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3237 tmp_sg[i].offset,
3238 tmp_sg[i].length, dir);
3239 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3240 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3241 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3242 ++sg_index;
1da177e4 3243 }
d45033ef
SC		 3244 if (chained)
3245 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3246 (seg - (h->max_cmd_sgentries - 1)) *
3247 sizeof(SGDescriptor_struct));
5c07a311 3248
7c832835
BH		 3249 /* track how many SG entries we are using */
3250 if (seg > h->maxSG)
3251 h->maxSG = seg;
1da177e4 3252
b2a4a43d 3253 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3254 "chained[%d]\n",
3255 blk_rq_sectors(creq), seg, chained);
1da177e4 3256
5e216153
MM		 3257 c->Header.SGTotal = seg + chained;
3258 if (seg <= h->max_cmd_sgentries)
3259 c->Header.SGList = c->Header.SGTotal;
3260 else
5c07a311 3261 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3262 set_performant_mode(h, c);
5c07a311 3263
33659ebb 3264 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3265 if(h->cciss_read == CCISS_READ_10) {
3266 c->Request.CDB[1] = 0;
b028461d 3267 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3268 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3269 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3270 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3271 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3272 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3273 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3274 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3275 } else {
582539e5
RD		 3276 u32 upper32 = upper_32_bits(start_blk);
3277
03bbfee5
MMOD		 3278 c->Request.CDBLen = 16;
3279 c->Request.CDB[1]= 0;
b028461d 3280 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3281 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3282 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3283 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3284 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3285 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3286 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3287 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3288 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3289 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3290 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3291 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3292 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3293 }
33659ebb 3294 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3295 c->Request.CDBLen = creq->cmd_len;
3296 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3297 } else {
b2a4a43d
SC		 3298 dev_warn(&h->pdev->dev, "bad request type %d\n",
3299 creq->cmd_type);
03bbfee5 3300 BUG();
00988a35 3301 }
1da177e4
LT		 3302
3303 spin_lock_irq(q->queue_lock);
3304
8a3173de 3305 addQ(&h->reqQ, c);
1da177e4 3306 h->Qdepth++;
7c832835
BH		 3307 if (h->Qdepth > h->maxQsinceinit)
3308 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3309
3310 goto queue;
00988a35 3311full:
1da177e4 3312 blk_stop_queue(q);
00988a35 3313startio:
1da177e4
LT		 3314 /* We will already have the driver lock here so not need
3315 * to lock it.
7c832835 3316 */
1da177e4
LT		 3317 start_io(h);
3318}
3319
3da8b713 3320static inline unsigned long get_next_completion(ctlr_info_t *h)
3321{
3da8b713 3322 return h->access.command_completed(h);
3da8b713 3323}
3324
3325static inline int interrupt_pending(ctlr_info_t *h)
3326{
3da8b713 3327 return h->access.intr_pending(h);
3da8b713 3328}
3329
3330static inline long interrupt_not_for_us(ctlr_info_t *h)
3331{
81125860 3332 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3333 (h->interrupts_enabled == 0));
3da8b713 3334}
3335
0c2b3908
MM		 3336static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3337 u32 raw_tag)
1da177e4 3338{
0c2b3908
MM		 3339 if (unlikely(tag_index >= h->nr_cmds)) {
3340 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3341 return 1;
3342 }
3343 return 0;
3344}
3345
3346static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3347 u32 raw_tag)
3348{
3349 removeQ(c);
3350 if (likely(c->cmd_type == CMD_RWREQ))
3351 complete_command(h, c, 0);
3352 else if (c->cmd_type == CMD_IOCTL_PEND)
3353 complete(c->waiting);
3354#ifdef CONFIG_CISS_SCSI_TAPE
3355 else if (c->cmd_type == CMD_SCSI)
3356 complete_scsi_command(c, 0, raw_tag);
3357#endif
3358}
3359
29979a71
MM		 3360static inline u32 next_command(ctlr_info_t *h)
3361{
3362 u32 a;
3363
3364 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3365 return h->access.command_completed(h);
3366
3367 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3368 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3369 (h->reply_pool_head)++;
3370 h->commands_outstanding--;
3371 } else {
3372 a = FIFO_EMPTY;
3373 }
3374 /* Check for wraparound */
3375 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3376 h->reply_pool_head = h->reply_pool;
3377 h->reply_pool_wraparound ^= 1;
3378 }
3379 return a;
3380}
3381
0c2b3908
MM		 3382/* process completion of an indexed ("direct lookup") command */
3383static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3384{
3385 u32 tag_index;
1da177e4 3386 CommandList_struct *c;
0c2b3908
MM		 3387
3388 tag_index = cciss_tag_to_index(raw_tag);
3389 if (bad_tag(h, tag_index, raw_tag))
5e216153 3390 return next_command(h);
0c2b3908
MM		 3391 c = h->cmd_pool + tag_index;
3392 finish_cmd(h, c, raw_tag);
5e216153 3393 return next_command(h);
0c2b3908
MM		 3394}
3395
3396/* process completion of a non-indexed command */
3397static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3398{
3399 u32 tag;
3400 CommandList_struct *c = NULL;
3401 struct hlist_node *tmp;
3402 __u32 busaddr_masked, tag_masked;
3403
3404 tag = cciss_tag_discard_error_bits(raw_tag);
3405 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3406 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3407 tag_masked = cciss_tag_discard_error_bits(tag);
3408 if (busaddr_masked == tag_masked) {
3409 finish_cmd(h, c, raw_tag);
5e216153 3410 return next_command(h);
0c2b3908
MM		 3411 }
3412 }
3413 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3414 return next_command(h);
0c2b3908
MM		 3415}
3416
3417static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3418{
3419 ctlr_info_t *h = dev_id;
1da177e4 3420 unsigned long flags;
0c2b3908 3421 u32 raw_tag;
1da177e4 3422
3da8b713 3423 if (interrupt_not_for_us(h))
1da177e4 3424 return IRQ_NONE;
f70dba83 3425 spin_lock_irqsave(&h->lock, flags);
3da8b713 3426 while (interrupt_pending(h)) {
0c2b3908
MM		 3427 raw_tag = get_next_completion(h);
3428 while (raw_tag != FIFO_EMPTY) {
3429 if (cciss_tag_contains_index(raw_tag))
3430 raw_tag = process_indexed_cmd(h, raw_tag);
3431 else
3432 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3433 }
3434 }
f70dba83 3435 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3436 return IRQ_HANDLED;
3437}
1da177e4 3438
0c2b3908
MM		 3439/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3440 * check the interrupt pending register because it is not set.
3441 */
3442static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3443{
3444 ctlr_info_t *h = dev_id;
3445 unsigned long flags;
3446 u32 raw_tag;
8a3173de 3447
f70dba83 3448 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3449 raw_tag = get_next_completion(h);
3450 while (raw_tag != FIFO_EMPTY) {
3451 if (cciss_tag_contains_index(raw_tag))
3452 raw_tag = process_indexed_cmd(h, raw_tag);
3453 else
3454 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3455 }
f70dba83 3456 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3457 return IRQ_HANDLED;
3458}
7c832835 3459
b368c9dd
AP		 3460/**
3461 * add_to_scan_list() - add controller to rescan queue
3462 * @h: Pointer to the controller.
3463 *
3464 * Adds the controller to the rescan queue if not already on the queue.
3465 *
3466 * returns 1 if added to the queue, 0 if skipped (could be on the
3467 * queue already, or the controller could be initializing or shutting
3468 * down).
3469 **/
3470static int add_to_scan_list(struct ctlr_info *h)
3471{
3472 struct ctlr_info *test_h;
3473 int found = 0;
3474 int ret = 0;
3475
3476 if (h->busy_initializing)
3477 return 0;
3478
3479 if (!mutex_trylock(&h->busy_shutting_down))
3480 return 0;
3481
3482 mutex_lock(&scan_mutex);
3483 list_for_each_entry(test_h, &scan_q, scan_list) {
3484 if (test_h == h) {
3485 found = 1;
3486 break;
3487 }
3488 }
3489 if (!found && !h->busy_scanning) {
3490 INIT_COMPLETION(h->scan_wait);
3491 list_add_tail(&h->scan_list, &scan_q);
3492 ret = 1;
3493 }
3494 mutex_unlock(&scan_mutex);
3495 mutex_unlock(&h->busy_shutting_down);
3496
3497 return ret;
3498}
3499
3500/**
3501 * remove_from_scan_list() - remove controller from rescan queue
3502 * @h: Pointer to the controller.
3503 *
3504 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3505 * the controller is currently conducting a rescan. The controller
3506 * can be in one of three states:
3507 * 1. Doesn't need a scan
3508 * 2. On the scan list, but not scanning yet (we remove it)
3509 * 3. Busy scanning (and not on the list). In this case we want to wait for
3510 * the scan to complete to make sure the scanning thread for this
3511 * controller is completely idle.
b368c9dd
AP		 3512 **/
3513static void remove_from_scan_list(struct ctlr_info *h)
3514{
3515 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3516
3517 mutex_lock(&scan_mutex);
3518 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3519 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3520 list_del(&h->scan_list);
3521 complete_all(&h->scan_wait);
3522 mutex_unlock(&scan_mutex);
3523 return;
3524 }
3525 }
fd8489cf
SC		 3526 if (h->busy_scanning) { /* state 3. */
3527 mutex_unlock(&scan_mutex);
b368c9dd 3528 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3529 } else { /* state 1, nothing to do. */
3530 mutex_unlock(&scan_mutex);
3531 }
b368c9dd
AP		 3532}
3533
3534/**
3535 * scan_thread() - kernel thread used to rescan controllers
3536 * @data: Ignored.
3537 *
3538 * A kernel thread used scan for drive topology changes on
3539 * controllers. The thread processes only one controller at a time
3540 * using a queue. Controllers are added to the queue using
3541 * add_to_scan_list() and removed from the queue either after done
3542 * processing or using remove_from_scan_list().
3543 *
3544 * returns 0.
3545 **/
0a9279cc
MM		 3546static int scan_thread(void *data)
3547{
b368c9dd 3548 struct ctlr_info *h;
0a9279cc 3549
b368c9dd
AP		 3550 while (1) {
3551 set_current_state(TASK_INTERRUPTIBLE);
3552 schedule();
0a9279cc
MM		 3553 if (kthread_should_stop())
3554 break;
b368c9dd
AP		 3555
3556 while (1) {
3557 mutex_lock(&scan_mutex);
3558 if (list_empty(&scan_q)) {
3559 mutex_unlock(&scan_mutex);
3560 break;
3561 }
3562
3563 h = list_entry(scan_q.next,
3564 struct ctlr_info,
3565 scan_list);
3566 list_del(&h->scan_list);
3567 h->busy_scanning = 1;
3568 mutex_unlock(&scan_mutex);
3569
d06dfbd2
SC		 3570 rebuild_lun_table(h, 0, 0);
3571 complete_all(&h->scan_wait);
3572 mutex_lock(&scan_mutex);
3573 h->busy_scanning = 0;
3574 mutex_unlock(&scan_mutex);
b368c9dd 3575 }
0a9279cc 3576 }
b368c9dd 3577
0a9279cc
MM		 3578 return 0;
3579}
3580
3581static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3582{
3583 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3584 return 0;
3585
3586 switch (c->err_info->SenseInfo[12]) {
3587 case STATE_CHANGED:
b2a4a43d
SC		 3588 dev_warn(&h->pdev->dev, "a state change "
3589 "detected, command retried\n");
0a9279cc
MM		 3590 return 1;
3591 break;
3592 case LUN_FAILED:
b2a4a43d
SC		 3593 dev_warn(&h->pdev->dev, "LUN failure "
3594 "detected, action required\n");
0a9279cc
MM		 3595 return 1;
3596 break;
3597 case REPORT_LUNS_CHANGED:
b2a4a43d 3598 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3599 /*
3600 * Here, we could call add_to_scan_list and wake up the scan thread,
3601 * except that it's quite likely that we will get more than one
3602 * REPORT_LUNS_CHANGED condition in quick succession, which means
3603 * that those which occur after the first one will likely happen
3604 * *during* the scan_thread's rescan. And the rescan code is not
3605 * robust enough to restart in the middle, undoing what it has already
3606 * done, and it's not clear that it's even possible to do this, since
3607 * part of what it does is notify the block layer, which starts
3608 * doing it's own i/o to read partition tables and so on, and the
3609 * driver doesn't have visibility to know what might need undoing.
3610 * In any event, if possible, it is horribly complicated to get right
3611 * so we just don't do it for now.
3612 *
3613 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3614 */
0a9279cc
MM		 3615 return 1;
3616 break;
3617 case POWER_OR_RESET:
b2a4a43d
SC		 3618 dev_warn(&h->pdev->dev,
3619 "a power on or device reset detected\n");
0a9279cc
MM		 3620 return 1;
3621 break;
3622 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3623 dev_warn(&h->pdev->dev,
3624 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3625 return 1;
3626 break;
3627 default:
b2a4a43d
SC		 3628 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3629 return 1;
0a9279cc
MM		 3630 }
3631}
3632
7c832835 3633/*
d14c4ab5 3634 * We cannot read the structure directly, for portability we must use
1da177e4 3635 * the io functions.
7c832835 3636 * This is for debug only.
1da177e4 3637 */
b2a4a43d 3638static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3639{
3640 int i;
3641 char temp_name[17];
b2a4a43d 3642 CfgTable_struct *tb = h->cfgtable;
1da177e4 3643
b2a4a43d
SC		 3644 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3645 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3646 for (i = 0; i < 4; i++)
1da177e4 3647 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3648 temp_name[4] = '\0';
b2a4a43d
SC		 3649 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3650 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3651 readl(&(tb->SpecValence)));
3652 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3653 readl(&(tb->TransportSupport)));
b2a4a43d 3654 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3655 readl(&(tb->TransportActive)));
b2a4a43d 3656 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3657 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3658 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3659 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3660 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3661 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3662 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3663 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3664 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3665 readl(&(tb->BusTypes)));
7c832835 3666 for (i = 0; i < 16; i++)
1da177e4
LT		 3667 temp_name[i] = readb(&(tb->ServerName[i]));
3668 temp_name[16] = '\0';
b2a4a43d
SC		 3669 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3670 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3671 readl(&(tb->HeartBeat)));
1da177e4 3672}
1da177e4 3673
7c832835 3674static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3675{
3676 int i, offset, mem_type, bar_type;
7c832835 3677 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3678 return 0;
3679 offset = 0;
7c832835
BH		 3680 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3681 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3682 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3683 offset += 4;
3684 else {
3685 mem_type = pci_resource_flags(pdev, i) &
7c832835 3686 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3687 switch (mem_type) {
7c832835
BH		 3688 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3689 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3690 offset += 4; /* 32 bit */
3691 break;
3692 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3693 offset += 8;
3694 break;
3695 default: /* reserved in PCI 2.2 */
b2a4a43d 3696 dev_warn(&pdev->dev,
7c832835
BH		 3697 "Base address is invalid\n");
3698 return -1;
1da177e4
LT		 3699 break;
3700 }
3701 }
7c832835
BH		 3702 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3703 return i + 1;
1da177e4
LT		 3704 }
3705 return -1;
3706}
3707
5e216153
MM		 3708/* Fill in bucket_map[], given nsgs (the max number of
3709 * scatter gather elements supported) and bucket[],
3710 * which is an array of 8 integers. The bucket[] array
3711 * contains 8 different DMA transfer sizes (in 16
3712 * byte increments) which the controller uses to fetch
3713 * commands. This function fills in bucket_map[], which
3714 * maps a given number of scatter gather elements to one of
3715 * the 8 DMA transfer sizes. The point of it is to allow the
3716 * controller to only do as much DMA as needed to fetch the
3717 * command, with the DMA transfer size encoded in the lower
3718 * bits of the command address.
3719 */
3720static void calc_bucket_map(int bucket[], int num_buckets,
3721 int nsgs, int *bucket_map)
3722{
3723 int i, j, b, size;
3724
3725 /* even a command with 0 SGs requires 4 blocks */
3726#define MINIMUM_TRANSFER_BLOCKS 4
3727#define NUM_BUCKETS 8
3728 /* Note, bucket_map must have nsgs+1 entries. */
3729 for (i = 0; i <= nsgs; i++) {
3730 /* Compute size of a command with i SG entries */
3731 size = i + MINIMUM_TRANSFER_BLOCKS;
3732 b = num_buckets; /* Assume the biggest bucket */
3733 /* Find the bucket that is just big enough */
3734 for (j = 0; j < 8; j++) {
3735 if (bucket[j] >= size) {
3736 b = j;
3737 break;
3738 }
3739 }
3740 /* for a command with i SG entries, use bucket b. */
3741 bucket_map[i] = b;
3742 }
3743}
3744
0f8a6a1e
SC		 3745static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3746{
3747 int i;
3748
3749 /* under certain very rare conditions, this can take awhile.
3750 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3751 * as we enter this code.) */
3752 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3753 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3754 break;
332c2f80 3755 usleep_range(10000, 20000);
0f8a6a1e
SC		 3756 }
3757}
3758
b9933135
SC		 3759static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3760{
3761 /* This is a bit complicated. There are 8 registers on
3762 * the controller which we write to to tell it 8 different
3763 * sizes of commands which there may be. It's a way of
3764 * reducing the DMA done to fetch each command. Encoded into
3765 * each command's tag are 3 bits which communicate to the controller
3766 * which of the eight sizes that command fits within. The size of
3767 * each command depends on how many scatter gather entries there are.
3768 * Each SG entry requires 16 bytes. The eight registers are programmed
3769 * with the number of 16-byte blocks a command of that size requires.
3770 * The smallest command possible requires 5 such 16 byte blocks.
3771 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3772 * blocks. Note, this only extends to the SG entries contained
3773 * within the command block, and does not extend to chained blocks
3774 * of SG elements. bft[] contains the eight values we write to
3775 * the registers. They are not evenly distributed, but have more
3776 * sizes for small commands, and fewer sizes for larger commands.
3777 */
5e216153 3778 __u32 trans_offset;
b9933135 3779 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3780 /*
3781 * 5 = 1 s/g entry or 4k
3782 * 6 = 2 s/g entry or 8k
3783 * 8 = 4 s/g entry or 16k
3784 * 10 = 6 s/g entry or 24k
3785 */
5e216153 3786 unsigned long register_value;
5e216153
MM		 3787 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3788
5e216153
MM		 3789 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3790
3791 /* Controller spec: zero out this buffer. */
3792 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3793 h->reply_pool_head = h->reply_pool;
3794
3795 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3796 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3797 h->blockFetchTable);
3798 writel(bft[0], &h->transtable->BlockFetch0);
3799 writel(bft[1], &h->transtable->BlockFetch1);
3800 writel(bft[2], &h->transtable->BlockFetch2);
3801 writel(bft[3], &h->transtable->BlockFetch3);
3802 writel(bft[4], &h->transtable->BlockFetch4);
3803 writel(bft[5], &h->transtable->BlockFetch5);
3804 writel(bft[6], &h->transtable->BlockFetch6);
3805 writel(bft[7], &h->transtable->BlockFetch7);
3806
3807 /* size of controller ring buffer */
3808 writel(h->max_commands, &h->transtable->RepQSize);
3809 writel(1, &h->transtable->RepQCount);
3810 writel(0, &h->transtable->RepQCtrAddrLow32);
3811 writel(0, &h->transtable->RepQCtrAddrHigh32);
3812 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3813 writel(0, &h->transtable->RepQAddr0High32);
3814 writel(CFGTBL_Trans_Performant,
3815 &(h->cfgtable->HostWrite.TransportRequest));
3816
5e216153 3817 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3818 cciss_wait_for_mode_change_ack(h);
5e216153 3819 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3820 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3821 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3822 " performant mode\n");
b9933135
SC		 3823}
3824
3825static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3826{
3827 __u32 trans_support;
3828
3829 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3830 /* Attempt to put controller into performant mode if supported */
3831 /* Does board support performant mode? */
3832 trans_support = readl(&(h->cfgtable->TransportSupport));
3833 if (!(trans_support & PERFORMANT_MODE))
3834 return;
3835
b2a4a43d 3836 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 3837 /* Performant mode demands commands on a 32 byte boundary
3838 * pci_alloc_consistent aligns on page boundarys already.
3839 * Just need to check if divisible by 32
3840 */
3841 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 3842 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 3843 "cciss info: command size[",
3844 (int)sizeof(CommandList_struct),
3845 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 3846 return;
3847 }
3848
b9933135
SC		 3849 /* Performant mode ring buffer and supporting data structures */
3850 h->reply_pool = (__u64 *)pci_alloc_consistent(
3851 h->pdev, h->max_commands * sizeof(__u64),
3852 &(h->reply_pool_dhandle));
3853
3854 /* Need a block fetch table for performant mode */
3855 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3856 sizeof(__u32)), GFP_KERNEL);
3857
3858 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3859 goto clean_up;
3860
3861 cciss_enter_performant_mode(h);
3862
5e216153
MM		 3863 /* Change the access methods to the performant access methods */
3864 h->access = SA5_performant_access;
b9933135 3865 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 3866
3867 return;
3868clean_up:
3869 kfree(h->blockFetchTable);
3870 if (h->reply_pool)
3871 pci_free_consistent(h->pdev,
3872 h->max_commands * sizeof(__u64),
3873 h->reply_pool,
3874 h->reply_pool_dhandle);
3875 return;
3876
3877} /* cciss_put_controller_into_performant_mode */
3878
fb86a35b
MM		 3879/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3880 * controllers that are capable. If not, we use IO-APIC mode.
3881 */
3882
f70dba83 3883static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 3884{
3885#ifdef CONFIG_PCI_MSI
7c832835
BH		 3886 int err;
3887 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3888 {0, 2}, {0, 3}
3889 };
fb86a35b
MM		 3890
3891 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 3892 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3893 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 3894 goto default_int_mode;
3895
f70dba83
SC		 3896 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3897 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 3898 if (!err) {
f70dba83
SC		 3899 h->intr[0] = cciss_msix_entries[0].vector;
3900 h->intr[1] = cciss_msix_entries[1].vector;
3901 h->intr[2] = cciss_msix_entries[2].vector;
3902 h->intr[3] = cciss_msix_entries[3].vector;
3903 h->msix_vector = 1;
7c832835
BH		 3904 return;
3905 }
3906 if (err > 0) {
b2a4a43d
SC		 3907 dev_warn(&h->pdev->dev,
3908 "only %d MSI-X vectors available\n", err);
1ecb9c0f 3909 goto default_int_mode;
7c832835 3910 } else {
b2a4a43d
SC		 3911 dev_warn(&h->pdev->dev,
3912 "MSI-X init failed %d\n", err);
1ecb9c0f 3913 goto default_int_mode;
7c832835
BH		 3914 }
3915 }
f70dba83
SC		 3916 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3917 if (!pci_enable_msi(h->pdev))
3918 h->msi_vector = 1;
3919 else
b2a4a43d 3920 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 3921 }
1ecb9c0f 3922default_int_mode:
7c832835 3923#endif /* CONFIG_PCI_MSI */
fb86a35b 3924 /* if we get here we're going to use the default interrupt mode */
f70dba83 3925 h->intr[PERF_MODE_INT] = h->pdev->irq;
fb86a35b
MM		 3926 return;
3927}
3928
6539fa9b 3929static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 3930{
6539fa9b
SC		 3931 int i;
3932 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 3933
3934 subsystem_vendor_id = pdev->subsystem_vendor;
3935 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 3936 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3937 subsystem_vendor_id;
2ec24ff1 3938
4205df34 3939 for (i = 0; i < ARRAY_SIZE(products); i++)
6539fa9b
SC		 3940 if (*board_id == products[i].board_id)
3941 return i;
6539fa9b
SC		 3942 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3943 *board_id);
3944 return -ENODEV;
3945}
1da177e4 3946
dd9c426e
SC		 3947static inline bool cciss_board_disabled(ctlr_info_t *h)
3948{
3949 u16 command;
1da177e4 3950
dd9c426e
SC		 3951 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
3952 return ((command & PCI_COMMAND_MEMORY) == 0);
3953}
1da177e4 3954
d474830d
SC		 3955static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
3956 unsigned long *memory_bar)
3957{
3958 int i;
4e570309 3959
d474830d
SC		 3960 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3961 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3962 /* addressing mode bits already removed */
3963 *memory_bar = pci_resource_start(pdev, i);
3964 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3965 *memory_bar);
3966 return 0;
3967 }
3968 dev_warn(&pdev->dev, "no memory BAR found\n");
3969 return -ENODEV;
3970}
1da177e4 3971
afa842fa
SC		 3972static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
3973 void __iomem *vaddr, int wait_for_ready)
3974#define BOARD_READY 1
3975#define BOARD_NOT_READY 0
e99ba136 3976{
afa842fa 3977 int i, iterations;
e99ba136 3978 u32 scratchpad;
1da177e4 3979
afa842fa
SC		 3980 if (wait_for_ready)
3981 iterations = CCISS_BOARD_READY_ITERATIONS;
3982 else
3983 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
3984
3985 for (i = 0; i < iterations; i++) {
3986 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3987 if (wait_for_ready) {
3988 if (scratchpad == CCISS_FIRMWARE_READY)
3989 return 0;
3990 } else {
3991 if (scratchpad != CCISS_FIRMWARE_READY)
3992 return 0;
3993 }
e99ba136 3994 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 3995 }
afa842fa 3996 dev_warn(&pdev->dev, "board not ready, timed out.\n");
e99ba136
SC		 3997 return -ENODEV;
3998}
e1438581 3999
8e93bf6d
SC		 4000static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4001 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4002 u64 *cfg_offset)
4003{
4004 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4005 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4006 *cfg_base_addr &= (u32) 0x0000ffff;
4007 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4008 if (*cfg_base_addr_index == -1) {
4009 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4010 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4011 return -ENODEV;
4012 }
4013 return 0;
4014}
1da177e4 4015
4809d098
SC		 4016static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4017{
4018 u64 cfg_offset;
4019 u32 cfg_base_addr;
4020 u64 cfg_base_addr_index;
4021 u32 trans_offset;
8e93bf6d 4022 int rc;
1da177e4 4023
8e93bf6d
SC		 4024 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4025 &cfg_base_addr_index, &cfg_offset);
4026 if (rc)
4027 return rc;
4809d098 4028 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4029 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4030 if (!h->cfgtable)
4031 return -ENOMEM;
4032 /* Find performant mode table. */
8e93bf6d 4033 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4034 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4035 cfg_base_addr_index)+cfg_offset+trans_offset,
4036 sizeof(*h->transtable));
4037 if (!h->transtable)
4038 return -ENOMEM;
4039 return 0;
4040}
1da177e4 4041
adfbc1ff
SC		 4042static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4043{
4044 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
186fb9cf
SC		 4045
4046 /* Limit commands in memory limited kdump scenario. */
4047 if (reset_devices && h->max_commands > 32)
4048 h->max_commands = 32;
4049
adfbc1ff
SC		 4050 if (h->max_commands < 16) {
4051 dev_warn(&h->pdev->dev, "Controller reports "
4052 "max supported commands of %d, an obvious lie. "
4053 "Using 16. Ensure that firmware is up to date.\n",
4054 h->max_commands);
4055 h->max_commands = 16;
1da177e4 4056 }
adfbc1ff 4057}
1da177e4 4058
afadbf4b
SC		 4059/* Interrogate the hardware for some limits:
4060 * max commands, max SG elements without chaining, and with chaining,
4061 * SG chain block size, etc.
4062 */
4063static void __devinit cciss_find_board_params(ctlr_info_t *h)
4064{
adfbc1ff 4065 cciss_get_max_perf_mode_cmds(h);
afadbf4b
SC		 4066 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4067 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4068 /*
afadbf4b 4069 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4070 * Howvever spec says if 0, use 31
4071 */
afadbf4b
SC		 4072 h->max_cmd_sgentries = 31;
4073 if (h->maxsgentries > 512) {
4074 h->max_cmd_sgentries = 32;
4075 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4076 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4077 } else {
afadbf4b
SC		 4078 h->maxsgentries = 31; /* default to traditional values */
4079 h->chainsize = 0;
5c07a311 4080 }
afadbf4b 4081}
5c07a311 4082
501b92cd
SC		 4083static inline bool CISS_signature_present(ctlr_info_t *h)
4084{
4085 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4086 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4087 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4088 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4089 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4090 return false;
1da177e4 4091 }
501b92cd
SC		 4092 return true;
4093}
4094
322e304c
SC		 4095/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4096static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4097{
1da177e4 4098#ifdef CONFIG_X86
322e304c
SC		 4099 u32 prefetch;
4100
4101 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4102 prefetch |= 0x100;
4103 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4104#endif
322e304c 4105}
1da177e4 4106
bfd63ee5
SC		 4107/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4108 * in a prefetch beyond physical memory.
4109 */
4110static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4111{
4112 u32 dma_prefetch;
4113 __u32 dma_refetch;
4114
4115 if (h->board_id != 0x3225103C)
4116 return;
4117 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4118 dma_prefetch |= 0x8000;
4119 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4120 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4121 dma_refetch |= 0x1;
4122 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4123}
4124
f70dba83 4125static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4126{
4809d098 4127 int prod_index, err;
6539fa9b 4128
f70dba83 4129 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4130 if (prod_index < 0)
2ec24ff1 4131 return -ENODEV;
f70dba83
SC		 4132 h->product_name = products[prod_index].product_name;
4133 h->access = *(products[prod_index].access);
1da177e4 4134
f70dba83 4135 if (cciss_board_disabled(h)) {
b2a4a43d 4136 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4137 return -ENODEV;
1da177e4 4138 }
f70dba83 4139 err = pci_enable_device(h->pdev);
7c832835 4140 if (err) {
b2a4a43d 4141 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4142 return err;
f92e2f5f
MM		 4143 }
4144
f70dba83 4145 err = pci_request_regions(h->pdev, "cciss");
4e570309 4146 if (err) {
b2a4a43d
SC		 4147 dev_warn(&h->pdev->dev,
4148 "Cannot obtain PCI resources, aborting\n");
872225ca 4149 return err;
4e570309 4150 }
1da177e4 4151
b2a4a43d
SC		 4152 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4153 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4154
fb86a35b
MM		 4155/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4156 * else we use the IO-APIC interrupt assigned to us by system ROM.
4157 */
f70dba83
SC		 4158 cciss_interrupt_mode(h);
4159 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4160 if (err)
e1438581 4161 goto err_out_free_res;
f70dba83
SC		 4162 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4163 if (!h->vaddr) {
da550321
SC		 4164 err = -ENOMEM;
4165 goto err_out_free_res;
7c832835 4166 }
afa842fa 4167 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
e99ba136 4168 if (err)
4e570309 4169 goto err_out_free_res;
f70dba83 4170 err = cciss_find_cfgtables(h);
4809d098 4171 if (err)
4e570309 4172 goto err_out_free_res;
b2a4a43d 4173 print_cfg_table(h);
f70dba83 4174 cciss_find_board_params(h);
1da177e4 4175
f70dba83 4176 if (!CISS_signature_present(h)) {
c33ac89b 4177 err = -ENODEV;
4e570309 4178 goto err_out_free_res;
1da177e4 4179 }
f70dba83
SC		 4180 cciss_enable_scsi_prefetch(h);
4181 cciss_p600_dma_prefetch_quirk(h);
4182 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4183 return 0;
4184
5faad620 4185err_out_free_res:
872225ca
MM		 4186 /*
4187 * Deliberately omit pci_disable_device(): it does something nasty to
4188 * Smart Array controllers that pci_enable_device does not undo
4189 */
f70dba83
SC		 4190 if (h->transtable)
4191 iounmap(h->transtable);
4192 if (h->cfgtable)
4193 iounmap(h->cfgtable);
4194 if (h->vaddr)
4195 iounmap(h->vaddr);
4196 pci_release_regions(h->pdev);
c33ac89b 4197 return err;
1da177e4
LT		 4198}
4199
6ae5ce8e
MM		 4200/* Function to find the first free pointer into our hba[] array
4201 * Returns -1 if no free entries are left.
7c832835 4202 */
b2a4a43d 4203static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4204{
799202cb 4205 int i;
1da177e4 4206
7c832835 4207 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4208 if (!hba[i]) {
f70dba83 4209 ctlr_info_t *h;
f2912a12 4210
f70dba83
SC		 4211 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4212 if (!h)
1da177e4 4213 goto Enomem;
f70dba83 4214 hba[i] = h;
1da177e4
LT		 4215 return i;
4216 }
4217 }
b2a4a43d 4218 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4219 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4220 return -1;
4221Enomem:
b2a4a43d 4222 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4223 return -1;
4224}
4225
f70dba83 4226static void free_hba(ctlr_info_t *h)
1da177e4 4227{
2c935593 4228 int i;
1da177e4 4229
f70dba83 4230 hba[h->ctlr] = NULL;
2c935593
SC		 4231 for (i = 0; i < h->highest_lun + 1; i++)
4232 if (h->gendisk[i] != NULL)
4233 put_disk(h->gendisk[i]);
4234 kfree(h);
1da177e4
LT		 4235}
4236
82eb03cf
CC		 4237/* Send a message CDB to the firmware. */
4238static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4239{
4240 typedef struct {
4241 CommandListHeader_struct CommandHeader;
4242 RequestBlock_struct Request;
4243 ErrDescriptor_struct ErrorDescriptor;
4244 } Command;
4245 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4246 Command *cmd;
4247 dma_addr_t paddr64;
4248 uint32_t paddr32, tag;
4249 void __iomem *vaddr;
4250 int i, err;
4251
4252 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4253 if (vaddr == NULL)
4254 return -ENOMEM;
4255
4256 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4257 CCISS commands, so they must be allocated from the lower 4GiB of
4258 memory. */
e930438c 4259 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4260 if (err) {
4261 iounmap(vaddr);
4262 return -ENOMEM;
4263 }
4264
4265 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4266 if (cmd == NULL) {
4267 iounmap(vaddr);
4268 return -ENOMEM;
4269 }
4270
4271 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4272 although there's no guarantee, we assume that the address is at
4273 least 4-byte aligned (most likely, it's page-aligned). */
4274 paddr32 = paddr64;
4275
4276 cmd->CommandHeader.ReplyQueue = 0;
4277 cmd->CommandHeader.SGList = 0;
4278 cmd->CommandHeader.SGTotal = 0;
4279 cmd->CommandHeader.Tag.lower = paddr32;
4280 cmd->CommandHeader.Tag.upper = 0;
4281 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4282
4283 cmd->Request.CDBLen = 16;
4284 cmd->Request.Type.Type = TYPE_MSG;
4285 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4286 cmd->Request.Type.Direction = XFER_NONE;
4287 cmd->Request.Timeout = 0; /* Don't time out */
4288 cmd->Request.CDB[0] = opcode;
4289 cmd->Request.CDB[1] = type;
4290 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4291
4292 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4293 cmd->ErrorDescriptor.Addr.upper = 0;
4294 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4295
4296 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4297
4298 for (i = 0; i < 10; i++) {
4299 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4300 if ((tag & ~3) == paddr32)
4301 break;
4302 schedule_timeout_uninterruptible(HZ);
4303 }
4304
4305 iounmap(vaddr);
4306
4307 /* we leak the DMA buffer here ... no choice since the controller could
4308 still complete the command. */
4309 if (i == 10) {
b2a4a43d
SC		 4310 dev_err(&pdev->dev,
4311 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4312 opcode, type);
4313 return -ETIMEDOUT;
4314 }
4315
4316 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4317
4318 if (tag & 2) {
b2a4a43d 4319 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4320 opcode, type);
4321 return -EIO;
4322 }
4323
b2a4a43d 4324 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4325 opcode, type);
4326 return 0;
4327}
4328
4329#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4330#define cciss_noop(p) cciss_message(p, 3, 0)
4331
a6528d01
SC		 4332static int cciss_controller_hard_reset(struct pci_dev *pdev,
4333 void * __iomem vaddr, bool use_doorbell)
82eb03cf 4334{
a6528d01
SC		 4335 u16 pmcsr;
4336 int pos;
82eb03cf 4337
a6528d01
SC		 4338 if (use_doorbell) {
4339 /* For everything after the P600, the PCI power state method
4340 * of resetting the controller doesn't work, so we have this
4341 * other way using the doorbell register.
4342 */
4343 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4344 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4345 msleep(1000);
4346 } else { /* Try to do it the PCI power state way */
4347
4348 /* Quoting from the Open CISS Specification: "The Power
4349 * Management Control/Status Register (CSR) controls the power
4350 * state of the device. The normal operating state is D0,
4351 * CSR=00h. The software off state is D3, CSR=03h. To reset
4352 * the controller, place the interface device in D3 then to D0,
4353 * this causes a secondary PCI reset which will reset the
4354 * controller." */
4355
4356 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4357 if (pos == 0) {
4358 dev_err(&pdev->dev,
4359 "cciss_controller_hard_reset: "
4360 "PCI PM not supported\n");
4361 return -ENODEV;
4362 }
4363 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4364 /* enter the D3hot power management state */
4365 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4366 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4367 pmcsr |= PCI_D3hot;
4368 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4369
a6528d01 4370 msleep(500);
82eb03cf 4371
a6528d01
SC		 4372 /* enter the D0 power management state */
4373 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4374 pmcsr |= PCI_D0;
4375 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4376
a6528d01
SC		 4377 msleep(500);
4378 }
4379 return 0;
4380}
82eb03cf 4381
a6528d01
SC		 4382/* This does a hard reset of the controller using PCI power management
4383 * states or using the doorbell register. */
4384static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4385{
a6528d01
SC		 4386 u64 cfg_offset;
4387 u32 cfg_base_addr;
4388 u64 cfg_base_addr_index;
4389 void __iomem *vaddr;
4390 unsigned long paddr;
4391 u32 misc_fw_support, active_transport;
f442e64b 4392 int rc;
a6528d01
SC		 4393 CfgTable_struct __iomem *cfgtable;
4394 bool use_doorbell;
058a0f9f 4395 u32 board_id;
f442e64b 4396 u16 command_register;
a6528d01
SC		 4397
4398 /* For controllers as old a the p600, this is very nearly
4399 * the same thing as
4400 *
4401 * pci_save_state(pci_dev);
4402 * pci_set_power_state(pci_dev, PCI_D3hot);
4403 * pci_set_power_state(pci_dev, PCI_D0);
4404 * pci_restore_state(pci_dev);
4405 *
a6528d01
SC		 4406 * For controllers newer than the P600, the pci power state
4407 * method of resetting doesn't work so we have another way
4408 * using the doorbell register.
4409 */
82eb03cf 4410
058a0f9f
SC		 4411 /* Exclude 640x boards. These are two pci devices in one slot
4412 * which share a battery backed cache module. One controls the
4413 * cache, the other accesses the cache through the one that controls
4414 * it. If we reset the one controlling the cache, the other will
4415 * likely not be happy. Just forbid resetting this conjoined mess.
4416 */
4417 cciss_lookup_board_id(pdev, &board_id);
4418 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4419 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4420 "due to shared cache module.");
82eb03cf
CC		 4421 return -ENODEV;
4422 }
4423
f442e64b
SC		 4424 /* Save the PCI command register */
4425 pci_read_config_word(pdev, 4, &command_register);
4426 /* Turn the board off. This is so that later pci_restore_state()
4427 * won't turn the board on before the rest of config space is ready.
4428 */
4429 pci_disable_device(pdev);
4430 pci_save_state(pdev);
82eb03cf 4431
a6528d01
SC		 4432 /* find the first memory BAR, so we can find the cfg table */
4433 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4434 if (rc)
4435 return rc;
4436 vaddr = remap_pci_mem(paddr, 0x250);
4437 if (!vaddr)
4438 return -ENOMEM;
82eb03cf 4439
a6528d01
SC		 4440 /* find cfgtable in order to check if reset via doorbell is supported */
4441 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4442 &cfg_base_addr_index, &cfg_offset);
4443 if (rc)
4444 goto unmap_vaddr;
4445 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4446 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4447 if (!cfgtable) {
4448 rc = -ENOMEM;
4449 goto unmap_vaddr;
4450 }
82eb03cf 4451
a6528d01
SC		 4452 /* If reset via doorbell register is supported, use that. */
4453 misc_fw_support = readl(&cfgtable->misc_fw_support);
4454 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
82eb03cf 4455
75230ff2
SC		 4456 /* The doorbell reset seems to cause lockups on some Smart
4457 * Arrays (e.g. P410, P410i, maybe others). Until this is
4458 * fixed or at least isolated, avoid the doorbell reset.
4459 */
4460 use_doorbell = 0;
4461
a6528d01
SC		 4462 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4463 if (rc)
4464 goto unmap_cfgtable;
f442e64b
SC		 4465 pci_restore_state(pdev);
4466 rc = pci_enable_device(pdev);
4467 if (rc) {
4468 dev_warn(&pdev->dev, "failed to enable device.\n");
4469 goto unmap_cfgtable;
82eb03cf 4470 }
f442e64b 4471 pci_write_config_word(pdev, 4, command_register);
82eb03cf 4472
a6528d01
SC		 4473 /* Some devices (notably the HP Smart Array 5i Controller)
4474 need a little pause here */
4475 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4476
afa842fa
SC		 4477 /* Wait for board to become not ready, then ready. */
4478 dev_info(&pdev->dev, "Waiting for board to become ready.\n");
4479 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4480 if (rc) /* Don't bail, might be E500, etc. which can't be reset */
4481 dev_warn(&pdev->dev,
4482 "failed waiting for board to become not ready\n");
4483 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4484 if (rc) {
4485 dev_warn(&pdev->dev,
4486 "failed waiting for board to become ready\n");
4487 goto unmap_cfgtable;
4488 }
4489 dev_info(&pdev->dev, "board ready.\n");
4490
a6528d01
SC		 4491 /* Controller should be in simple mode at this point. If it's not,
4492 * It means we're on one of those controllers which doesn't support
4493 * the doorbell reset method and on which the PCI power management reset
4494 * method doesn't work (P800, for example.)
4495 * In those cases, don't try to proceed, as it generally doesn't work.
4496 */
4497 active_transport = readl(&cfgtable->TransportActive);
4498 if (active_transport & PERFORMANT_MODE) {
4499 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4500 " Ignoring controller.\n");
4501 rc = -ENODEV;
4502 }
4503
4504unmap_cfgtable:
4505 iounmap(cfgtable);
4506
4507unmap_vaddr:
4508 iounmap(vaddr);
4509 return rc;
82eb03cf
CC		 4510}
4511
83123cb1
SC		 4512static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4513{
a6528d01 4514 int rc, i;
83123cb1
SC		 4515
4516 if (!reset_devices)
4517 return 0;
4518
a6528d01
SC		 4519 /* Reset the controller with a PCI power-cycle or via doorbell */
4520 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4521
a6528d01
SC		 4522 /* -ENOTSUPP here means we cannot reset the controller
4523 * but it's already (and still) up and running in
058a0f9f
SC		 4524 * "performant mode". Or, it might be 640x, which can't reset
4525 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4526 */
4527 if (rc == -ENOTSUPP)
4528 return 0; /* just try to do the kdump anyhow. */
4529 if (rc)
4530 return -ENODEV;
83123cb1
SC		 4531
4532 /* Now try to get the controller to respond to a no-op */
4533 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4534 if (cciss_noop(pdev) == 0)
4535 break;
4536 else
4537 dev_warn(&pdev->dev, "no-op failed%s\n",
4538 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4539 "; re-trying" : ""));
4540 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4541 }
82eb03cf
CC		 4542 return 0;
4543}
4544
1da177e4
LT		 4545/*
4546 * This is it. Find all the controllers and register them. I really hate
4547 * stealing all these major device numbers.
4548 * returns the number of block devices registered.
4549 */
4550static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4551 const struct pci_device_id *ent)
1da177e4 4552{
1da177e4 4553 int i;
799202cb 4554 int j = 0;
5c07a311 4555 int k = 0;
1da177e4 4556 int rc;
22bece00 4557 int dac, return_code;
212a5026 4558 InquiryData_struct *inq_buff;
f70dba83 4559 ctlr_info_t *h;
1da177e4 4560
83123cb1
SC		 4561 rc = cciss_init_reset_devices(pdev);
4562 if (rc)
4563 return rc;
b2a4a43d 4564 i = alloc_cciss_hba(pdev);
7c832835 4565 if (i < 0)
e2019b58 4566 return -1;
1f8ef380 4567
f70dba83
SC		 4568 h = hba[i];
4569 h->pdev = pdev;
4570 h->busy_initializing = 1;
4571 INIT_HLIST_HEAD(&h->cmpQ);
4572 INIT_HLIST_HEAD(&h->reqQ);
4573 mutex_init(&h->busy_shutting_down);
1f8ef380 4574
f70dba83 4575 if (cciss_pci_init(h) != 0)
2cfa948c 4576 goto clean_no_release_regions;
1da177e4 4577
f70dba83
SC		 4578 sprintf(h->devname, "cciss%d", i);
4579 h->ctlr = i;
1da177e4 4580
f70dba83 4581 init_completion(&h->scan_wait);
b368c9dd 4582
f70dba83 4583 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 4584 goto clean0;
4585
1da177e4 4586 /* configure PCI DMA stuff */
6a35528a 4587 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4588 dac = 1;
284901a9 4589 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4590 dac = 0;
1da177e4 4591 else {
b2a4a43d 4592 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 4593 goto clean1;
4594 }
4595
4596 /*
4597 * register with the major number, or get a dynamic major number
4598 * by passing 0 as argument. This is done for greater than
4599 * 8 controller support.
4600 */
4601 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 4602 h->major = COMPAQ_CISS_MAJOR + i;
4603 rc = register_blkdev(h->major, h->devname);
7c832835 4604 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 4605 dev_err(&h->pdev->dev,
4606 "Unable to get major number %d for %s "
f70dba83 4607 "on hba %d\n", h->major, h->devname, i);
1da177e4 4608 goto clean1;
7c832835 4609 } else {
1da177e4 4610 if (i >= MAX_CTLR_ORIG)
f70dba83 4611 h->major = rc;
1da177e4
LT		 4612 }
4613
4614 /* make sure the board interrupts are off */
f70dba83
SC		 4615 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4616 if (h->msi_vector || h->msix_vector) {
4617 if (request_irq(h->intr[PERF_MODE_INT],
0c2b3908 4618 do_cciss_msix_intr,
f70dba83 4619 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4620 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4621 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4622 goto clean2;
4623 }
4624 } else {
f70dba83
SC		 4625 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4626 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4627 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4628 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4629 goto clean2;
4630 }
1da177e4 4631 }
40aabb58 4632
b2a4a43d 4633 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83
SC		 4634 h->devname, pdev->device, pci_name(pdev),
4635 h->intr[PERF_MODE_INT], dac ? "" : " not");
7c832835 4636
f70dba83
SC		 4637 h->cmd_pool_bits =
4638 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4639 * sizeof(unsigned long), GFP_KERNEL);
f70dba83
SC		 4640 h->cmd_pool = (CommandList_struct *)
4641 pci_alloc_consistent(h->pdev,
4642 h->nr_cmds * sizeof(CommandList_struct),
4643 &(h->cmd_pool_dhandle));
4644 h->errinfo_pool = (ErrorInfo_struct *)
4645 pci_alloc_consistent(h->pdev,
4646 h->nr_cmds * sizeof(ErrorInfo_struct),
4647 &(h->errinfo_pool_dhandle));
4648 if ((h->cmd_pool_bits == NULL)
4649 || (h->cmd_pool == NULL)
4650 || (h->errinfo_pool == NULL)) {
b2a4a43d 4651 dev_err(&h->pdev->dev, "out of memory");
1da177e4
LT		 4652 goto clean4;
4653 }
5c07a311
DB		 4654
4655 /* Need space for temp scatter list */
f70dba83 4656 h->scatter_list = kmalloc(h->max_commands *
5c07a311
DB		 4657 sizeof(struct scatterlist *),
4658 GFP_KERNEL);
4ee69851
DC		 4659 if (!h->scatter_list)
4660 goto clean4;
4661
f70dba83
SC		 4662 for (k = 0; k < h->nr_cmds; k++) {
4663 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4664 h->maxsgentries,
5c07a311 4665 GFP_KERNEL);
f70dba83 4666 if (h->scatter_list[k] == NULL) {
b2a4a43d
SC		 4667 dev_err(&h->pdev->dev,
4668 "could not allocate s/g lists\n");
5c07a311
DB		 4669 goto clean4;
4670 }
4671 }
f70dba83
SC		 4672 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4673 h->chainsize, h->nr_cmds);
4674 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 4675 goto clean4;
5c07a311 4676
f70dba83 4677 spin_lock_init(&h->lock);
1da177e4 4678
7c832835 4679 /* Initialize the pdev driver private data.
f70dba83
SC		 4680 have it point to h. */
4681 pci_set_drvdata(pdev, h);
7c832835
BH		 4682 /* command and error info recs zeroed out before
4683 they are used */
f70dba83
SC		 4684 memset(h->cmd_pool_bits, 0,
4685 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4686 * sizeof(unsigned long));
1da177e4 4687
f70dba83
SC		 4688 h->num_luns = 0;
4689 h->highest_lun = -1;
6ae5ce8e 4690 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 4691 h->drv[j] = NULL;
4692 h->gendisk[j] = NULL;
6ae5ce8e 4693 }
1da177e4 4694
f70dba83 4695 cciss_scsi_setup(h);
1da177e4
LT		 4696
4697 /* Turn the interrupts on so we can service requests */
f70dba83 4698 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 4699
22bece00
MM		 4700 /* Get the firmware version */
4701 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4702 if (inq_buff == NULL) {
b2a4a43d 4703 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 4704 goto clean4;
4705 }
4706
f70dba83 4707 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 4708 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 4709 if (return_code == IO_OK) {
f70dba83
SC		 4710 h->firm_ver[0] = inq_buff->data_byte[32];
4711 h->firm_ver[1] = inq_buff->data_byte[33];
4712 h->firm_ver[2] = inq_buff->data_byte[34];
4713 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 4714 } else { /* send command failed */
b2a4a43d 4715 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 4716 " version of controller\n");
4717 }
212a5026 4718 kfree(inq_buff);
22bece00 4719
f70dba83 4720 cciss_procinit(h);
92c4231a 4721
f70dba83 4722 h->cciss_max_sectors = 8192;
92c4231a 4723
f70dba83
SC		 4724 rebuild_lun_table(h, 1, 0);
4725 h->busy_initializing = 0;
e2019b58 4726 return 1;
1da177e4 4727
6ae5ce8e 4728clean4:
f70dba83 4729 kfree(h->cmd_pool_bits);
5c07a311 4730 /* Free up sg elements */
b0722cb1 4731 for (k-- ; k >= 0; k--)
f70dba83
SC		 4732 kfree(h->scatter_list[k]);
4733 kfree(h->scatter_list);
4734 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4735 if (h->cmd_pool)
4736 pci_free_consistent(h->pdev,
4737 h->nr_cmds * sizeof(CommandList_struct),
4738 h->cmd_pool, h->cmd_pool_dhandle);
4739 if (h->errinfo_pool)
4740 pci_free_consistent(h->pdev,
4741 h->nr_cmds * sizeof(ErrorInfo_struct),
4742 h->errinfo_pool,
4743 h->errinfo_pool_dhandle);
4744 free_irq(h->intr[PERF_MODE_INT], h);
6ae5ce8e 4745clean2:
f70dba83 4746 unregister_blkdev(h->major, h->devname);
6ae5ce8e 4747clean1:
f70dba83 4748 cciss_destroy_hba_sysfs_entry(h);
7fe06326 4749clean0:
2cfa948c
SC		 4750 pci_release_regions(pdev);
4751clean_no_release_regions:
f70dba83 4752 h->busy_initializing = 0;
9cef0d2f 4753
872225ca
MM		 4754 /*
4755 * Deliberately omit pci_disable_device(): it does something nasty to
4756 * Smart Array controllers that pci_enable_device does not undo
4757 */
799202cb 4758 pci_set_drvdata(pdev, NULL);
f70dba83 4759 free_hba(h);
e2019b58 4760 return -1;
1da177e4
LT		 4761}
4762
e9ca75b5 4763static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 4764{
29009a03
SC		 4765 ctlr_info_t *h;
4766 char *flush_buf;
7c832835 4767 int return_code;
1da177e4 4768
29009a03
SC		 4769 h = pci_get_drvdata(pdev);
4770 flush_buf = kzalloc(4, GFP_KERNEL);
4771 if (!flush_buf) {
b2a4a43d 4772 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 4773 return;
e9ca75b5 4774 }
29009a03
SC		 4775 /* write all data in the battery backed cache to disk */
4776 memset(flush_buf, 0, 4);
f70dba83 4777 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 4778 4, 0, CTLR_LUNID, TYPE_CMD);
4779 kfree(flush_buf);
4780 if (return_code != IO_OK)
b2a4a43d 4781 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 4782 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5e216153 4783 free_irq(h->intr[PERF_MODE_INT], h);
e9ca75b5
GB		 4784}
4785
4786static void __devexit cciss_remove_one(struct pci_dev *pdev)
4787{
f70dba83 4788 ctlr_info_t *h;
e9ca75b5
GB		 4789 int i, j;
4790
7c832835 4791 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 4792 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 4793 return;
4794 }
0a9279cc 4795
f70dba83
SC		 4796 h = pci_get_drvdata(pdev);
4797 i = h->ctlr;
7c832835 4798 if (hba[i] == NULL) {
b2a4a43d 4799 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 4800 return;
4801 }
b6550777 4802
f70dba83 4803 mutex_lock(&h->busy_shutting_down);
0a9279cc 4804
f70dba83
SC		 4805 remove_from_scan_list(h);
4806 remove_proc_entry(h->devname, proc_cciss);
4807 unregister_blkdev(h->major, h->devname);
b6550777
BH		 4808
4809 /* remove it from the disk list */
4810 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 4811 struct gendisk *disk = h->gendisk[j];
b6550777 4812 if (disk) {
165125e1 4813 struct request_queue *q = disk->queue;
b6550777 4814
097d0264 4815 if (disk->flags & GENHD_FL_UP) {
f70dba83 4816 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 4817 del_gendisk(disk);
097d0264 4818 }
b6550777
BH		 4819 if (q)
4820 blk_cleanup_queue(q);
4821 }
4822 }
4823
ba198efb 4824#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 4825 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 4826#endif
b6550777 4827
e9ca75b5 4828 cciss_shutdown(pdev);
fb86a35b
MM		 4829
4830#ifdef CONFIG_PCI_MSI
f70dba83
SC		 4831 if (h->msix_vector)
4832 pci_disable_msix(h->pdev);
4833 else if (h->msi_vector)
4834 pci_disable_msi(h->pdev);
7c832835 4835#endif /* CONFIG_PCI_MSI */
fb86a35b 4836
f70dba83
SC		 4837 iounmap(h->transtable);
4838 iounmap(h->cfgtable);
4839 iounmap(h->vaddr);
1da177e4 4840
f70dba83
SC		 4841 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4842 h->cmd_pool, h->cmd_pool_dhandle);
4843 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4844 h->errinfo_pool, h->errinfo_pool_dhandle);
4845 kfree(h->cmd_pool_bits);
5c07a311 4846 /* Free up sg elements */
f70dba83
SC		 4847 for (j = 0; j < h->nr_cmds; j++)
4848 kfree(h->scatter_list[j]);
4849 kfree(h->scatter_list);
4850 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
872225ca
MM		 4851 /*
4852 * Deliberately omit pci_disable_device(): it does something nasty to
4853 * Smart Array controllers that pci_enable_device does not undo
4854 */
7c832835 4855 pci_release_regions(pdev);
4e570309 4856 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 4857 cciss_destroy_hba_sysfs_entry(h);
4858 mutex_unlock(&h->busy_shutting_down);
4859 free_hba(h);
7c832835 4860}
1da177e4
LT		 4861
4862static struct pci_driver cciss_pci_driver = {
7c832835
BH		 4863 .name = "cciss",
4864 .probe = cciss_init_one,
4865 .remove = __devexit_p(cciss_remove_one),
4866 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 4867 .shutdown = cciss_shutdown,
1da177e4
LT		 4868};
4869
4870/*
4871 * This is it. Register the PCI driver information for the cards we control
7c832835 4872 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 4873 */
4874static int __init cciss_init(void)
4875{
7fe06326
AP		 4876 int err;
4877
10cbda97
JA		 4878 /*
4879 * The hardware requires that commands are aligned on a 64-bit
4880 * boundary. Given that we use pci_alloc_consistent() to allocate an
4881 * array of them, the size must be a multiple of 8 bytes.
4882 */
1b7d0d28 4883 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 4884 printk(KERN_INFO DRIVER_NAME "\n");
4885
7fe06326
AP		 4886 err = bus_register(&cciss_bus_type);
4887 if (err)
4888 return err;
4889
b368c9dd
AP		 4890 /* Start the scan thread */
4891 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4892 if (IS_ERR(cciss_scan_thread)) {
4893 err = PTR_ERR(cciss_scan_thread);
4894 goto err_bus_unregister;
4895 }
4896
1da177e4 4897 /* Register for our PCI devices */
7fe06326
AP		 4898 err = pci_register_driver(&cciss_pci_driver);
4899 if (err)
b368c9dd 4900 goto err_thread_stop;
7fe06326 4901
617e1344 4902 return err;
7fe06326 4903
b368c9dd
AP		 4904err_thread_stop:
4905 kthread_stop(cciss_scan_thread);
4906err_bus_unregister:
7fe06326 4907 bus_unregister(&cciss_bus_type);
b368c9dd 4908
7fe06326 4909 return err;
1da177e4
LT		 4910}
4911
4912static void __exit cciss_cleanup(void)
4913{
4914 int i;
4915
4916 pci_unregister_driver(&cciss_pci_driver);
4917 /* double check that all controller entrys have been removed */
7c832835
BH		 4918 for (i = 0; i < MAX_CTLR; i++) {
4919 if (hba[i] != NULL) {
b2a4a43d
SC		 4920 dev_warn(&hba[i]->pdev->dev,
4921 "had to remove controller\n");
1da177e4
LT		 4922 cciss_remove_one(hba[i]->pdev);
4923 }
4924 }
b368c9dd 4925 kthread_stop(cciss_scan_thread);
928b4d8c 4926 remove_proc_entry("driver/cciss", NULL);
7fe06326 4927 bus_unregister(&cciss_bus_type);
1da177e4
LT		 4928}
4929
4930module_init(cciss_init);
4931module_exit(cciss_cleanup);
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