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[net-next-2.6.git] / drivers / ata / sata_uli.c
CommitLineData
1da177e4
LT
1/*
2 * sata_uli.c - ULi Electronics SATA
3 *
af36d7f0
JG
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 *
20 * libata documentation is available via 'make {ps|pdf}docs',
21 * as Documentation/DocBook/libata.*
22 *
23 * Hardware documentation available under NDA.
1da177e4
LT
24 *
25 */
26
1da177e4
LT
27#include <linux/kernel.h>
28#include <linux/module.h>
5a0e3ad6 29#include <linux/gfp.h>
1da177e4
LT
30#include <linux/pci.h>
31#include <linux/init.h>
32#include <linux/blkdev.h>
33#include <linux/delay.h>
34#include <linux/interrupt.h>
a9524a76 35#include <linux/device.h>
1da177e4
LT
36#include <scsi/scsi_host.h>
37#include <linux/libata.h>
38
39#define DRV_NAME "sata_uli"
2a3103ce 40#define DRV_VERSION "1.3"
1da177e4
LT
41
42enum {
43 uli_5289 = 0,
44 uli_5287 = 1,
45 uli_5281 = 2,
46
50106c5a
JG
47 uli_max_ports = 4,
48
1da177e4
LT
49 /* PCI configuration registers */
50 ULI5287_BASE = 0x90, /* sata0 phy SCR registers */
51 ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */
52 ULI5281_BASE = 0x60, /* sata0 phy SCR registers */
53 ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */
54};
55
50106c5a
JG
56struct uli_priv {
57 unsigned int scr_cfg_addr[uli_max_ports];
58};
59
5796d1c4 60static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
82ef04fb
TH
61static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
62static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
1da177e4 63
3b7d697d 64static const struct pci_device_id uli_pci_tbl[] = {
54bb3a94
JG
65 { PCI_VDEVICE(AL, 0x5289), uli_5289 },
66 { PCI_VDEVICE(AL, 0x5287), uli_5287 },
67 { PCI_VDEVICE(AL, 0x5281), uli_5281 },
68
1da177e4
LT
69 { } /* terminate list */
70};
71
1da177e4
LT
72static struct pci_driver uli_pci_driver = {
73 .name = DRV_NAME,
74 .id_table = uli_pci_tbl,
75 .probe = uli_init_one,
76 .remove = ata_pci_remove_one,
77};
78
193515d5 79static struct scsi_host_template uli_sht = {
68d1d07b 80 ATA_BMDMA_SHT(DRV_NAME),
1da177e4
LT
81};
82
029cfd6b
TH
83static struct ata_port_operations uli_ops = {
84 .inherits = &ata_bmdma_port_ops,
1da177e4
LT
85 .scr_read = uli_scr_read,
86 .scr_write = uli_scr_write,
70a3143a 87 .hardreset = ATA_OP_NULL,
1da177e4
LT
88};
89
1626aeb8 90static const struct ata_port_info uli_port_info = {
b2a8bbe6
TH
91 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
92 ATA_FLAG_IGN_SIMPLEX,
14bdef98 93 .pio_mask = ATA_PIO4,
bf6263a8 94 .udma_mask = ATA_UDMA6,
1da177e4
LT
95 .port_ops = &uli_ops,
96};
97
98
99MODULE_AUTHOR("Peer Chen");
100MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
101MODULE_LICENSE("GPL");
102MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
103MODULE_VERSION(DRV_VERSION);
104
105static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
106{
cca3974e 107 struct uli_priv *hpriv = ap->host->private_data;
50106c5a 108 return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
1da177e4
LT
109}
110
82ef04fb 111static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg)
1da177e4 112{
82ef04fb
TH
113 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
114 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
1da177e4
LT
115 u32 val;
116
117 pci_read_config_dword(pdev, cfg_addr, &val);
118 return val;
119}
120
82ef04fb 121static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val)
1da177e4 122{
82ef04fb
TH
123 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
124 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr);
1da177e4
LT
125
126 pci_write_config_dword(pdev, cfg_addr, val);
127}
128
82ef04fb 129static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
1da177e4
LT
130{
131 if (sc_reg > SCR_CONTROL)
da3dbb17 132 return -EINVAL;
1da177e4 133
82ef04fb 134 *val = uli_scr_cfg_read(link, sc_reg);
da3dbb17 135 return 0;
1da177e4
LT
136}
137
82ef04fb 138static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
1da177e4 139{
5796d1c4 140 if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
da3dbb17 141 return -EINVAL;
1da177e4 142
82ef04fb 143 uli_scr_cfg_write(link, sc_reg, val);
da3dbb17 144 return 0;
1da177e4
LT
145}
146
5796d1c4 147static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4 148{
a9524a76 149 static int printed_version;
9a829ccf 150 const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
1da177e4 151 unsigned int board_idx = (unsigned int) ent->driver_data;
9a829ccf 152 struct ata_host *host;
50106c5a 153 struct uli_priv *hpriv;
0d5ff566 154 void __iomem * const *iomap;
9a829ccf
TH
155 struct ata_ioports *ioaddr;
156 int n_ports, rc;
1da177e4 157
a9524a76
JG
158 if (!printed_version++)
159 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
160
24dc5f33 161 rc = pcim_enable_device(pdev);
1da177e4
LT
162 if (rc)
163 return rc;
164
9a829ccf
TH
165 n_ports = 2;
166 if (board_idx == uli_5287)
167 n_ports = 4;
1626aeb8
TH
168
169 /* allocate the host */
170 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
171 if (!host)
172 return -ENOMEM;
1da177e4 173
24dc5f33
TH
174 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
175 if (!hpriv)
176 return -ENOMEM;
9a829ccf 177 host->private_data = hpriv;
50106c5a 178
1626aeb8 179 /* the first two ports are standard SFF */
9363c382 180 rc = ata_pci_sff_init_host(host);
1626aeb8
TH
181 if (rc)
182 return rc;
183
c7087652 184 ata_pci_bmdma_init(host);
1626aeb8 185
9a829ccf 186 iomap = host->iomap;
0d5ff566 187
1da177e4
LT
188 switch (board_idx) {
189 case uli_5287:
1626aeb8
TH
190 /* If there are four, the last two live right after
191 * the standard SFF ports.
192 */
50106c5a
JG
193 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
194 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4 195
9a829ccf
TH
196 ioaddr = &host->ports[2]->ioaddr;
197 ioaddr->cmd_addr = iomap[0] + 8;
198 ioaddr->altstatus_addr =
199 ioaddr->ctl_addr = (void __iomem *)
0d5ff566 200 ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
9a829ccf 201 ioaddr->bmdma_addr = iomap[4] + 16;
50106c5a 202 hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
9363c382 203 ata_sff_std_ports(ioaddr);
1da177e4 204
cbcdd875
TH
205 ata_port_desc(host->ports[2],
206 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
207 (unsigned long long)pci_resource_start(pdev, 0) + 8,
208 ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4,
209 (unsigned long long)pci_resource_start(pdev, 4) + 16);
210
9a829ccf
TH
211 ioaddr = &host->ports[3]->ioaddr;
212 ioaddr->cmd_addr = iomap[2] + 8;
213 ioaddr->altstatus_addr =
214 ioaddr->ctl_addr = (void __iomem *)
0d5ff566 215 ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
9a829ccf 216 ioaddr->bmdma_addr = iomap[4] + 24;
50106c5a 217 hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
9363c382 218 ata_sff_std_ports(ioaddr);
cbcdd875
TH
219
220 ata_port_desc(host->ports[2],
221 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
222 (unsigned long long)pci_resource_start(pdev, 2) + 9,
223 ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4,
224 (unsigned long long)pci_resource_start(pdev, 4) + 24);
225
1da177e4
LT
226 break;
227
228 case uli_5289:
50106c5a
JG
229 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
230 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4
LT
231 break;
232
233 case uli_5281:
50106c5a
JG
234 hpriv->scr_cfg_addr[0] = ULI5281_BASE;
235 hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
1da177e4
LT
236 break;
237
238 default:
239 BUG();
240 break;
241 }
242
243 pci_set_master(pdev);
a04ce0ff 244 pci_intx(pdev, 1);
c3b28894 245 return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
9363c382 246 IRQF_SHARED, &uli_sht);
1da177e4
LT
247}
248
249static int __init uli_init(void)
250{
b7887196 251 return pci_register_driver(&uli_pci_driver);
1da177e4
LT
252}
253
254static void __exit uli_exit(void)
255{
256 pci_unregister_driver(&uli_pci_driver);
257}
258
259
260module_init(uli_init);
261module_exit(uli_exit);