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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
1da177e4 LT |
35 | #include <linux/kernel.h> |
36 | #include <linux/module.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/list.h> | |
40 | #include <linux/mm.h> | |
41 | #include <linux/highmem.h> | |
42 | #include <linux/spinlock.h> | |
43 | #include <linux/blkdev.h> | |
44 | #include <linux/delay.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/completion.h> | |
48 | #include <linux/suspend.h> | |
49 | #include <linux/workqueue.h> | |
67846b30 | 50 | #include <linux/jiffies.h> |
378f058c | 51 | #include <linux/scatterlist.h> |
1da177e4 | 52 | #include <scsi/scsi.h> |
193515d5 | 53 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
54 | #include <scsi/scsi_host.h> |
55 | #include <linux/libata.h> | |
56 | #include <asm/io.h> | |
57 | #include <asm/semaphore.h> | |
58 | #include <asm/byteorder.h> | |
59 | ||
60 | #include "libata.h" | |
61 | ||
8bc3fc47 | 62 | #define DRV_VERSION "2.21" /* must be exactly four chars */ |
fda0efc5 JG |
63 | |
64 | ||
d7bb4cc7 | 65 | /* debounce timing parameters in msecs { interval, duration, timeout } */ |
e9c83914 TH |
66 | const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; |
67 | const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; | |
68 | const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; | |
d7bb4cc7 | 69 | |
3373efd8 TH |
70 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
71 | u16 heads, u16 sectors); | |
72 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
73 | static void ata_dev_xfermask(struct ata_device *dev); | |
1da177e4 | 74 | |
f3187195 | 75 | unsigned int ata_print_id = 1; |
1da177e4 LT |
76 | static struct workqueue_struct *ata_wq; |
77 | ||
453b07ac TH |
78 | struct workqueue_struct *ata_aux_wq; |
79 | ||
418dc1f5 | 80 | int atapi_enabled = 1; |
1623c81e JG |
81 | module_param(atapi_enabled, int, 0444); |
82 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
83 | ||
95de719a AL |
84 | int atapi_dmadir = 0; |
85 | module_param(atapi_dmadir, int, 0444); | |
86 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
87 | ||
c3c013a2 JG |
88 | int libata_fua = 0; |
89 | module_param_named(fua, libata_fua, int, 0444); | |
90 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
91 | ||
1e999736 AC |
92 | static int ata_ignore_hpa = 0; |
93 | module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644); | |
94 | MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)"); | |
95 | ||
a8601e5f AM |
96 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; |
97 | module_param(ata_probe_timeout, int, 0444); | |
98 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | |
99 | ||
d7d0dad6 JG |
100 | int libata_noacpi = 1; |
101 | module_param_named(noacpi, libata_noacpi, int, 0444); | |
11ef697b KCA |
102 | MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set"); |
103 | ||
1da177e4 LT |
104 | MODULE_AUTHOR("Jeff Garzik"); |
105 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
106 | MODULE_LICENSE("GPL"); | |
107 | MODULE_VERSION(DRV_VERSION); | |
108 | ||
0baab86b | 109 | |
1da177e4 LT |
110 | /** |
111 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
112 | * @tf: Taskfile to convert | |
113 | * @fis: Buffer into which data will output | |
114 | * @pmp: Port multiplier port | |
115 | * | |
116 | * Converts a standard ATA taskfile to a Serial ATA | |
117 | * FIS structure (Register - Host to Device). | |
118 | * | |
119 | * LOCKING: | |
120 | * Inherited from caller. | |
121 | */ | |
122 | ||
057ace5e | 123 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
124 | { |
125 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
126 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
127 | bit 7 indicates Command FIS */ | |
128 | fis[2] = tf->command; | |
129 | fis[3] = tf->feature; | |
130 | ||
131 | fis[4] = tf->lbal; | |
132 | fis[5] = tf->lbam; | |
133 | fis[6] = tf->lbah; | |
134 | fis[7] = tf->device; | |
135 | ||
136 | fis[8] = tf->hob_lbal; | |
137 | fis[9] = tf->hob_lbam; | |
138 | fis[10] = tf->hob_lbah; | |
139 | fis[11] = tf->hob_feature; | |
140 | ||
141 | fis[12] = tf->nsect; | |
142 | fis[13] = tf->hob_nsect; | |
143 | fis[14] = 0; | |
144 | fis[15] = tf->ctl; | |
145 | ||
146 | fis[16] = 0; | |
147 | fis[17] = 0; | |
148 | fis[18] = 0; | |
149 | fis[19] = 0; | |
150 | } | |
151 | ||
152 | /** | |
153 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
154 | * @fis: Buffer from which data will be input | |
155 | * @tf: Taskfile to output | |
156 | * | |
e12a1be6 | 157 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
158 | * |
159 | * LOCKING: | |
160 | * Inherited from caller. | |
161 | */ | |
162 | ||
057ace5e | 163 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
164 | { |
165 | tf->command = fis[2]; /* status */ | |
166 | tf->feature = fis[3]; /* error */ | |
167 | ||
168 | tf->lbal = fis[4]; | |
169 | tf->lbam = fis[5]; | |
170 | tf->lbah = fis[6]; | |
171 | tf->device = fis[7]; | |
172 | ||
173 | tf->hob_lbal = fis[8]; | |
174 | tf->hob_lbam = fis[9]; | |
175 | tf->hob_lbah = fis[10]; | |
176 | ||
177 | tf->nsect = fis[12]; | |
178 | tf->hob_nsect = fis[13]; | |
179 | } | |
180 | ||
8cbd6df1 AL |
181 | static const u8 ata_rw_cmds[] = { |
182 | /* pio multi */ | |
183 | ATA_CMD_READ_MULTI, | |
184 | ATA_CMD_WRITE_MULTI, | |
185 | ATA_CMD_READ_MULTI_EXT, | |
186 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
187 | 0, |
188 | 0, | |
189 | 0, | |
190 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
191 | /* pio */ |
192 | ATA_CMD_PIO_READ, | |
193 | ATA_CMD_PIO_WRITE, | |
194 | ATA_CMD_PIO_READ_EXT, | |
195 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
196 | 0, |
197 | 0, | |
198 | 0, | |
199 | 0, | |
8cbd6df1 AL |
200 | /* dma */ |
201 | ATA_CMD_READ, | |
202 | ATA_CMD_WRITE, | |
203 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
204 | ATA_CMD_WRITE_EXT, |
205 | 0, | |
206 | 0, | |
207 | 0, | |
208 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 209 | }; |
1da177e4 LT |
210 | |
211 | /** | |
8cbd6df1 | 212 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
bd056d7e TH |
213 | * @tf: command to examine and configure |
214 | * @dev: device tf belongs to | |
1da177e4 | 215 | * |
2e9edbf8 | 216 | * Examine the device configuration and tf->flags to calculate |
8cbd6df1 | 217 | * the proper read/write commands and protocol to use. |
1da177e4 LT |
218 | * |
219 | * LOCKING: | |
220 | * caller. | |
221 | */ | |
bd056d7e | 222 | static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) |
1da177e4 | 223 | { |
9a3dccc4 | 224 | u8 cmd; |
1da177e4 | 225 | |
9a3dccc4 | 226 | int index, fua, lba48, write; |
2e9edbf8 | 227 | |
9a3dccc4 | 228 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
229 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
230 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 231 | |
8cbd6df1 AL |
232 | if (dev->flags & ATA_DFLAG_PIO) { |
233 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 234 | index = dev->multi_count ? 0 : 8; |
bd056d7e | 235 | } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) { |
8d238e01 AC |
236 | /* Unable to use DMA due to host limitation */ |
237 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 238 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
239 | } else { |
240 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 241 | index = 16; |
8cbd6df1 | 242 | } |
1da177e4 | 243 | |
9a3dccc4 TH |
244 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
245 | if (cmd) { | |
246 | tf->command = cmd; | |
247 | return 0; | |
248 | } | |
249 | return -1; | |
1da177e4 LT |
250 | } |
251 | ||
35b649fe TH |
252 | /** |
253 | * ata_tf_read_block - Read block address from ATA taskfile | |
254 | * @tf: ATA taskfile of interest | |
255 | * @dev: ATA device @tf belongs to | |
256 | * | |
257 | * LOCKING: | |
258 | * None. | |
259 | * | |
260 | * Read block address from @tf. This function can handle all | |
261 | * three address formats - LBA, LBA48 and CHS. tf->protocol and | |
262 | * flags select the address format to use. | |
263 | * | |
264 | * RETURNS: | |
265 | * Block address read from @tf. | |
266 | */ | |
267 | u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) | |
268 | { | |
269 | u64 block = 0; | |
270 | ||
271 | if (tf->flags & ATA_TFLAG_LBA) { | |
272 | if (tf->flags & ATA_TFLAG_LBA48) { | |
273 | block |= (u64)tf->hob_lbah << 40; | |
274 | block |= (u64)tf->hob_lbam << 32; | |
275 | block |= tf->hob_lbal << 24; | |
276 | } else | |
277 | block |= (tf->device & 0xf) << 24; | |
278 | ||
279 | block |= tf->lbah << 16; | |
280 | block |= tf->lbam << 8; | |
281 | block |= tf->lbal; | |
282 | } else { | |
283 | u32 cyl, head, sect; | |
284 | ||
285 | cyl = tf->lbam | (tf->lbah << 8); | |
286 | head = tf->device & 0xf; | |
287 | sect = tf->lbal; | |
288 | ||
289 | block = (cyl * dev->heads + head) * dev->sectors + sect; | |
290 | } | |
291 | ||
292 | return block; | |
293 | } | |
294 | ||
bd056d7e TH |
295 | /** |
296 | * ata_build_rw_tf - Build ATA taskfile for given read/write request | |
297 | * @tf: Target ATA taskfile | |
298 | * @dev: ATA device @tf belongs to | |
299 | * @block: Block address | |
300 | * @n_block: Number of blocks | |
301 | * @tf_flags: RW/FUA etc... | |
302 | * @tag: tag | |
303 | * | |
304 | * LOCKING: | |
305 | * None. | |
306 | * | |
307 | * Build ATA taskfile @tf for read/write request described by | |
308 | * @block, @n_block, @tf_flags and @tag on @dev. | |
309 | * | |
310 | * RETURNS: | |
311 | * | |
312 | * 0 on success, -ERANGE if the request is too large for @dev, | |
313 | * -EINVAL if the request is invalid. | |
314 | */ | |
315 | int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, | |
316 | u64 block, u32 n_block, unsigned int tf_flags, | |
317 | unsigned int tag) | |
318 | { | |
319 | tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
320 | tf->flags |= tf_flags; | |
321 | ||
6d1245bf | 322 | if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) { |
bd056d7e TH |
323 | /* yay, NCQ */ |
324 | if (!lba_48_ok(block, n_block)) | |
325 | return -ERANGE; | |
326 | ||
327 | tf->protocol = ATA_PROT_NCQ; | |
328 | tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; | |
329 | ||
330 | if (tf->flags & ATA_TFLAG_WRITE) | |
331 | tf->command = ATA_CMD_FPDMA_WRITE; | |
332 | else | |
333 | tf->command = ATA_CMD_FPDMA_READ; | |
334 | ||
335 | tf->nsect = tag << 3; | |
336 | tf->hob_feature = (n_block >> 8) & 0xff; | |
337 | tf->feature = n_block & 0xff; | |
338 | ||
339 | tf->hob_lbah = (block >> 40) & 0xff; | |
340 | tf->hob_lbam = (block >> 32) & 0xff; | |
341 | tf->hob_lbal = (block >> 24) & 0xff; | |
342 | tf->lbah = (block >> 16) & 0xff; | |
343 | tf->lbam = (block >> 8) & 0xff; | |
344 | tf->lbal = block & 0xff; | |
345 | ||
346 | tf->device = 1 << 6; | |
347 | if (tf->flags & ATA_TFLAG_FUA) | |
348 | tf->device |= 1 << 7; | |
349 | } else if (dev->flags & ATA_DFLAG_LBA) { | |
350 | tf->flags |= ATA_TFLAG_LBA; | |
351 | ||
352 | if (lba_28_ok(block, n_block)) { | |
353 | /* use LBA28 */ | |
354 | tf->device |= (block >> 24) & 0xf; | |
355 | } else if (lba_48_ok(block, n_block)) { | |
356 | if (!(dev->flags & ATA_DFLAG_LBA48)) | |
357 | return -ERANGE; | |
358 | ||
359 | /* use LBA48 */ | |
360 | tf->flags |= ATA_TFLAG_LBA48; | |
361 | ||
362 | tf->hob_nsect = (n_block >> 8) & 0xff; | |
363 | ||
364 | tf->hob_lbah = (block >> 40) & 0xff; | |
365 | tf->hob_lbam = (block >> 32) & 0xff; | |
366 | tf->hob_lbal = (block >> 24) & 0xff; | |
367 | } else | |
368 | /* request too large even for LBA48 */ | |
369 | return -ERANGE; | |
370 | ||
371 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
372 | return -EINVAL; | |
373 | ||
374 | tf->nsect = n_block & 0xff; | |
375 | ||
376 | tf->lbah = (block >> 16) & 0xff; | |
377 | tf->lbam = (block >> 8) & 0xff; | |
378 | tf->lbal = block & 0xff; | |
379 | ||
380 | tf->device |= ATA_LBA; | |
381 | } else { | |
382 | /* CHS */ | |
383 | u32 sect, head, cyl, track; | |
384 | ||
385 | /* The request -may- be too large for CHS addressing. */ | |
386 | if (!lba_28_ok(block, n_block)) | |
387 | return -ERANGE; | |
388 | ||
389 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
390 | return -EINVAL; | |
391 | ||
392 | /* Convert LBA to CHS */ | |
393 | track = (u32)block / dev->sectors; | |
394 | cyl = track / dev->heads; | |
395 | head = track % dev->heads; | |
396 | sect = (u32)block % dev->sectors + 1; | |
397 | ||
398 | DPRINTK("block %u track %u cyl %u head %u sect %u\n", | |
399 | (u32)block, track, cyl, head, sect); | |
400 | ||
401 | /* Check whether the converted CHS can fit. | |
402 | Cylinder: 0-65535 | |
403 | Head: 0-15 | |
404 | Sector: 1-255*/ | |
405 | if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) | |
406 | return -ERANGE; | |
407 | ||
408 | tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ | |
409 | tf->lbal = sect; | |
410 | tf->lbam = cyl; | |
411 | tf->lbah = cyl >> 8; | |
412 | tf->device |= head; | |
413 | } | |
414 | ||
415 | return 0; | |
416 | } | |
417 | ||
cb95d562 TH |
418 | /** |
419 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
420 | * @pio_mask: pio_mask | |
421 | * @mwdma_mask: mwdma_mask | |
422 | * @udma_mask: udma_mask | |
423 | * | |
424 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
425 | * unsigned int xfer_mask. | |
426 | * | |
427 | * LOCKING: | |
428 | * None. | |
429 | * | |
430 | * RETURNS: | |
431 | * Packed xfer_mask. | |
432 | */ | |
433 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
434 | unsigned int mwdma_mask, | |
435 | unsigned int udma_mask) | |
436 | { | |
437 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
438 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
439 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
440 | } | |
441 | ||
c0489e4e TH |
442 | /** |
443 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
444 | * @xfer_mask: xfer_mask to unpack | |
445 | * @pio_mask: resulting pio_mask | |
446 | * @mwdma_mask: resulting mwdma_mask | |
447 | * @udma_mask: resulting udma_mask | |
448 | * | |
449 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
450 | * Any NULL distination masks will be ignored. | |
451 | */ | |
452 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
453 | unsigned int *pio_mask, | |
454 | unsigned int *mwdma_mask, | |
455 | unsigned int *udma_mask) | |
456 | { | |
457 | if (pio_mask) | |
458 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
459 | if (mwdma_mask) | |
460 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
461 | if (udma_mask) | |
462 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
463 | } | |
464 | ||
cb95d562 | 465 | static const struct ata_xfer_ent { |
be9a50c8 | 466 | int shift, bits; |
cb95d562 TH |
467 | u8 base; |
468 | } ata_xfer_tbl[] = { | |
469 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
470 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
471 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
472 | { -1, }, | |
473 | }; | |
474 | ||
475 | /** | |
476 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
477 | * @xfer_mask: xfer_mask of interest | |
478 | * | |
479 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
480 | * bit of @xfer_mask is considered. | |
481 | * | |
482 | * LOCKING: | |
483 | * None. | |
484 | * | |
485 | * RETURNS: | |
486 | * Matching XFER_* value, 0 if no match found. | |
487 | */ | |
488 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
489 | { | |
490 | int highbit = fls(xfer_mask) - 1; | |
491 | const struct ata_xfer_ent *ent; | |
492 | ||
493 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
494 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
495 | return ent->base + highbit - ent->shift; | |
496 | return 0; | |
497 | } | |
498 | ||
499 | /** | |
500 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
501 | * @xfer_mode: XFER_* of interest | |
502 | * | |
503 | * Return matching xfer_mask for @xfer_mode. | |
504 | * | |
505 | * LOCKING: | |
506 | * None. | |
507 | * | |
508 | * RETURNS: | |
509 | * Matching xfer_mask, 0 if no match found. | |
510 | */ | |
511 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
512 | { | |
513 | const struct ata_xfer_ent *ent; | |
514 | ||
515 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
516 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
517 | return 1 << (ent->shift + xfer_mode - ent->base); | |
518 | return 0; | |
519 | } | |
520 | ||
521 | /** | |
522 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
523 | * @xfer_mode: XFER_* of interest | |
524 | * | |
525 | * Return matching xfer_shift for @xfer_mode. | |
526 | * | |
527 | * LOCKING: | |
528 | * None. | |
529 | * | |
530 | * RETURNS: | |
531 | * Matching xfer_shift, -1 if no match found. | |
532 | */ | |
533 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
534 | { | |
535 | const struct ata_xfer_ent *ent; | |
536 | ||
537 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
538 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
539 | return ent->shift; | |
540 | return -1; | |
541 | } | |
542 | ||
1da177e4 | 543 | /** |
1da7b0d0 TH |
544 | * ata_mode_string - convert xfer_mask to string |
545 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
546 | * |
547 | * Determine string which represents the highest speed | |
1da7b0d0 | 548 | * (highest bit in @modemask). |
1da177e4 LT |
549 | * |
550 | * LOCKING: | |
551 | * None. | |
552 | * | |
553 | * RETURNS: | |
554 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 555 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 | 556 | */ |
1da7b0d0 | 557 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 558 | { |
75f554bc TH |
559 | static const char * const xfer_mode_str[] = { |
560 | "PIO0", | |
561 | "PIO1", | |
562 | "PIO2", | |
563 | "PIO3", | |
564 | "PIO4", | |
b352e57d AC |
565 | "PIO5", |
566 | "PIO6", | |
75f554bc TH |
567 | "MWDMA0", |
568 | "MWDMA1", | |
569 | "MWDMA2", | |
b352e57d AC |
570 | "MWDMA3", |
571 | "MWDMA4", | |
75f554bc TH |
572 | "UDMA/16", |
573 | "UDMA/25", | |
574 | "UDMA/33", | |
575 | "UDMA/44", | |
576 | "UDMA/66", | |
577 | "UDMA/100", | |
578 | "UDMA/133", | |
579 | "UDMA7", | |
580 | }; | |
1da7b0d0 | 581 | int highbit; |
1da177e4 | 582 | |
1da7b0d0 TH |
583 | highbit = fls(xfer_mask) - 1; |
584 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
585 | return xfer_mode_str[highbit]; | |
1da177e4 | 586 | return "<n/a>"; |
1da177e4 LT |
587 | } |
588 | ||
4c360c81 TH |
589 | static const char *sata_spd_string(unsigned int spd) |
590 | { | |
591 | static const char * const spd_str[] = { | |
592 | "1.5 Gbps", | |
593 | "3.0 Gbps", | |
594 | }; | |
595 | ||
596 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
597 | return "<unknown>"; | |
598 | return spd_str[spd - 1]; | |
599 | } | |
600 | ||
3373efd8 | 601 | void ata_dev_disable(struct ata_device *dev) |
0b8efb0a | 602 | { |
09d7f9b0 TH |
603 | if (ata_dev_enabled(dev)) { |
604 | if (ata_msg_drv(dev->ap)) | |
605 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); | |
4ae72a1e TH |
606 | ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | |
607 | ATA_DNXFER_QUIET); | |
0b8efb0a TH |
608 | dev->class++; |
609 | } | |
610 | } | |
611 | ||
1da177e4 | 612 | /** |
0d5ff566 | 613 | * ata_devchk - PATA device presence detection |
1da177e4 LT |
614 | * @ap: ATA channel to examine |
615 | * @device: Device to examine (starting at zero) | |
616 | * | |
617 | * This technique was originally described in | |
618 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
619 | * later found its way into the ATA/ATAPI spec. | |
620 | * | |
621 | * Write a pattern to the ATA shadow registers, | |
622 | * and if a device is present, it will respond by | |
623 | * correctly storing and echoing back the | |
624 | * ATA shadow register contents. | |
625 | * | |
626 | * LOCKING: | |
627 | * caller. | |
628 | */ | |
629 | ||
0d5ff566 | 630 | static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) |
1da177e4 LT |
631 | { |
632 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
633 | u8 nsect, lbal; | |
634 | ||
635 | ap->ops->dev_select(ap, device); | |
636 | ||
0d5ff566 TH |
637 | iowrite8(0x55, ioaddr->nsect_addr); |
638 | iowrite8(0xaa, ioaddr->lbal_addr); | |
1da177e4 | 639 | |
0d5ff566 TH |
640 | iowrite8(0xaa, ioaddr->nsect_addr); |
641 | iowrite8(0x55, ioaddr->lbal_addr); | |
1da177e4 | 642 | |
0d5ff566 TH |
643 | iowrite8(0x55, ioaddr->nsect_addr); |
644 | iowrite8(0xaa, ioaddr->lbal_addr); | |
1da177e4 | 645 | |
0d5ff566 TH |
646 | nsect = ioread8(ioaddr->nsect_addr); |
647 | lbal = ioread8(ioaddr->lbal_addr); | |
1da177e4 LT |
648 | |
649 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
650 | return 1; /* we found a device */ | |
651 | ||
652 | return 0; /* nothing found */ | |
653 | } | |
654 | ||
1da177e4 LT |
655 | /** |
656 | * ata_dev_classify - determine device type based on ATA-spec signature | |
657 | * @tf: ATA taskfile register set for device to be identified | |
658 | * | |
659 | * Determine from taskfile register contents whether a device is | |
660 | * ATA or ATAPI, as per "Signature and persistence" section | |
661 | * of ATA/PI spec (volume 1, sect 5.14). | |
662 | * | |
663 | * LOCKING: | |
664 | * None. | |
665 | * | |
666 | * RETURNS: | |
667 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
668 | * the event of failure. | |
669 | */ | |
670 | ||
057ace5e | 671 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
672 | { |
673 | /* Apple's open source Darwin code hints that some devices only | |
674 | * put a proper signature into the LBA mid/high registers, | |
675 | * So, we only check those. It's sufficient for uniqueness. | |
676 | */ | |
677 | ||
678 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
679 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
680 | DPRINTK("found ATA device by sig\n"); | |
681 | return ATA_DEV_ATA; | |
682 | } | |
683 | ||
684 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
685 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
686 | DPRINTK("found ATAPI device by sig\n"); | |
687 | return ATA_DEV_ATAPI; | |
688 | } | |
689 | ||
690 | DPRINTK("unknown device\n"); | |
691 | return ATA_DEV_UNKNOWN; | |
692 | } | |
693 | ||
694 | /** | |
695 | * ata_dev_try_classify - Parse returned ATA device signature | |
696 | * @ap: ATA channel to examine | |
697 | * @device: Device to examine (starting at zero) | |
b4dc7623 | 698 | * @r_err: Value of error register on completion |
1da177e4 LT |
699 | * |
700 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
701 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
702 | * shadow registers, indicating the results of device detection | |
703 | * and diagnostics. | |
704 | * | |
705 | * Select the ATA device, and read the values from the ATA shadow | |
706 | * registers. Then parse according to the Error register value, | |
707 | * and the spec-defined values examined by ata_dev_classify(). | |
708 | * | |
709 | * LOCKING: | |
710 | * caller. | |
b4dc7623 TH |
711 | * |
712 | * RETURNS: | |
713 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 LT |
714 | */ |
715 | ||
a619f981 | 716 | unsigned int |
b4dc7623 | 717 | ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) |
1da177e4 | 718 | { |
1da177e4 LT |
719 | struct ata_taskfile tf; |
720 | unsigned int class; | |
721 | u8 err; | |
722 | ||
723 | ap->ops->dev_select(ap, device); | |
724 | ||
725 | memset(&tf, 0, sizeof(tf)); | |
726 | ||
1da177e4 | 727 | ap->ops->tf_read(ap, &tf); |
0169e284 | 728 | err = tf.feature; |
b4dc7623 TH |
729 | if (r_err) |
730 | *r_err = err; | |
1da177e4 | 731 | |
93590859 AC |
732 | /* see if device passed diags: if master then continue and warn later */ |
733 | if (err == 0 && device == 0) | |
734 | /* diagnostic fail : do nothing _YET_ */ | |
735 | ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC; | |
736 | else if (err == 1) | |
1da177e4 LT |
737 | /* do nothing */ ; |
738 | else if ((device == 0) && (err == 0x81)) | |
739 | /* do nothing */ ; | |
740 | else | |
b4dc7623 | 741 | return ATA_DEV_NONE; |
1da177e4 | 742 | |
b4dc7623 | 743 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 744 | class = ata_dev_classify(&tf); |
b4dc7623 | 745 | |
1da177e4 | 746 | if (class == ATA_DEV_UNKNOWN) |
b4dc7623 | 747 | return ATA_DEV_NONE; |
1da177e4 | 748 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) |
b4dc7623 TH |
749 | return ATA_DEV_NONE; |
750 | return class; | |
1da177e4 LT |
751 | } |
752 | ||
753 | /** | |
6a62a04d | 754 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
755 | * @id: IDENTIFY DEVICE results we will examine |
756 | * @s: string into which data is output | |
757 | * @ofs: offset into identify device page | |
758 | * @len: length of string to return. must be an even number. | |
759 | * | |
760 | * The strings in the IDENTIFY DEVICE page are broken up into | |
761 | * 16-bit chunks. Run through the string, and output each | |
762 | * 8-bit chunk linearly, regardless of platform. | |
763 | * | |
764 | * LOCKING: | |
765 | * caller. | |
766 | */ | |
767 | ||
6a62a04d TH |
768 | void ata_id_string(const u16 *id, unsigned char *s, |
769 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
770 | { |
771 | unsigned int c; | |
772 | ||
773 | while (len > 0) { | |
774 | c = id[ofs] >> 8; | |
775 | *s = c; | |
776 | s++; | |
777 | ||
778 | c = id[ofs] & 0xff; | |
779 | *s = c; | |
780 | s++; | |
781 | ||
782 | ofs++; | |
783 | len -= 2; | |
784 | } | |
785 | } | |
786 | ||
0e949ff3 | 787 | /** |
6a62a04d | 788 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
789 | * @id: IDENTIFY DEVICE results we will examine |
790 | * @s: string into which data is output | |
791 | * @ofs: offset into identify device page | |
792 | * @len: length of string to return. must be an odd number. | |
793 | * | |
6a62a04d | 794 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
795 | * trims trailing spaces and terminates the resulting string with |
796 | * null. @len must be actual maximum length (even number) + 1. | |
797 | * | |
798 | * LOCKING: | |
799 | * caller. | |
800 | */ | |
6a62a04d TH |
801 | void ata_id_c_string(const u16 *id, unsigned char *s, |
802 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
803 | { |
804 | unsigned char *p; | |
805 | ||
806 | WARN_ON(!(len & 1)); | |
807 | ||
6a62a04d | 808 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
809 | |
810 | p = s + strnlen(s, len - 1); | |
811 | while (p > s && p[-1] == ' ') | |
812 | p--; | |
813 | *p = '\0'; | |
814 | } | |
0baab86b | 815 | |
1e999736 AC |
816 | static u64 ata_tf_to_lba48(struct ata_taskfile *tf) |
817 | { | |
818 | u64 sectors = 0; | |
819 | ||
820 | sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; | |
821 | sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; | |
822 | sectors |= (tf->hob_lbal & 0xff) << 24; | |
823 | sectors |= (tf->lbah & 0xff) << 16; | |
824 | sectors |= (tf->lbam & 0xff) << 8; | |
825 | sectors |= (tf->lbal & 0xff); | |
826 | ||
827 | return ++sectors; | |
828 | } | |
829 | ||
830 | static u64 ata_tf_to_lba(struct ata_taskfile *tf) | |
831 | { | |
832 | u64 sectors = 0; | |
833 | ||
834 | sectors |= (tf->device & 0x0f) << 24; | |
835 | sectors |= (tf->lbah & 0xff) << 16; | |
836 | sectors |= (tf->lbam & 0xff) << 8; | |
837 | sectors |= (tf->lbal & 0xff); | |
838 | ||
839 | return ++sectors; | |
840 | } | |
841 | ||
842 | /** | |
843 | * ata_read_native_max_address_ext - LBA48 native max query | |
844 | * @dev: Device to query | |
845 | * | |
846 | * Perform an LBA48 size query upon the device in question. Return the | |
847 | * actual LBA48 size or zero if the command fails. | |
848 | */ | |
849 | ||
850 | static u64 ata_read_native_max_address_ext(struct ata_device *dev) | |
851 | { | |
852 | unsigned int err; | |
853 | struct ata_taskfile tf; | |
854 | ||
855 | ata_tf_init(dev, &tf); | |
856 | ||
857 | tf.command = ATA_CMD_READ_NATIVE_MAX_EXT; | |
858 | tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | ATA_TFLAG_ISADDR; | |
859 | tf.protocol |= ATA_PROT_NODATA; | |
860 | tf.device |= 0x40; | |
861 | ||
862 | err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); | |
863 | if (err) | |
864 | return 0; | |
865 | ||
866 | return ata_tf_to_lba48(&tf); | |
867 | } | |
868 | ||
869 | /** | |
870 | * ata_read_native_max_address - LBA28 native max query | |
871 | * @dev: Device to query | |
872 | * | |
873 | * Performa an LBA28 size query upon the device in question. Return the | |
874 | * actual LBA28 size or zero if the command fails. | |
875 | */ | |
876 | ||
877 | static u64 ata_read_native_max_address(struct ata_device *dev) | |
878 | { | |
879 | unsigned int err; | |
880 | struct ata_taskfile tf; | |
881 | ||
882 | ata_tf_init(dev, &tf); | |
883 | ||
884 | tf.command = ATA_CMD_READ_NATIVE_MAX; | |
885 | tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; | |
886 | tf.protocol |= ATA_PROT_NODATA; | |
887 | tf.device |= 0x40; | |
888 | ||
889 | err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); | |
890 | if (err) | |
891 | return 0; | |
892 | ||
893 | return ata_tf_to_lba(&tf); | |
894 | } | |
895 | ||
896 | /** | |
897 | * ata_set_native_max_address_ext - LBA48 native max set | |
898 | * @dev: Device to query | |
6b38d1d1 | 899 | * @new_sectors: new max sectors value to set for the device |
1e999736 AC |
900 | * |
901 | * Perform an LBA48 size set max upon the device in question. Return the | |
902 | * actual LBA48 size or zero if the command fails. | |
903 | */ | |
904 | ||
905 | static u64 ata_set_native_max_address_ext(struct ata_device *dev, u64 new_sectors) | |
906 | { | |
907 | unsigned int err; | |
908 | struct ata_taskfile tf; | |
909 | ||
910 | new_sectors--; | |
911 | ||
912 | ata_tf_init(dev, &tf); | |
913 | ||
914 | tf.command = ATA_CMD_SET_MAX_EXT; | |
915 | tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | ATA_TFLAG_ISADDR; | |
916 | tf.protocol |= ATA_PROT_NODATA; | |
917 | tf.device |= 0x40; | |
918 | ||
919 | tf.lbal = (new_sectors >> 0) & 0xff; | |
920 | tf.lbam = (new_sectors >> 8) & 0xff; | |
921 | tf.lbah = (new_sectors >> 16) & 0xff; | |
922 | ||
923 | tf.hob_lbal = (new_sectors >> 24) & 0xff; | |
924 | tf.hob_lbam = (new_sectors >> 32) & 0xff; | |
925 | tf.hob_lbah = (new_sectors >> 40) & 0xff; | |
926 | ||
927 | err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); | |
928 | if (err) | |
929 | return 0; | |
930 | ||
931 | return ata_tf_to_lba48(&tf); | |
932 | } | |
933 | ||
934 | /** | |
935 | * ata_set_native_max_address - LBA28 native max set | |
936 | * @dev: Device to query | |
6b38d1d1 | 937 | * @new_sectors: new max sectors value to set for the device |
1e999736 AC |
938 | * |
939 | * Perform an LBA28 size set max upon the device in question. Return the | |
940 | * actual LBA28 size or zero if the command fails. | |
941 | */ | |
942 | ||
943 | static u64 ata_set_native_max_address(struct ata_device *dev, u64 new_sectors) | |
944 | { | |
945 | unsigned int err; | |
946 | struct ata_taskfile tf; | |
947 | ||
948 | new_sectors--; | |
949 | ||
950 | ata_tf_init(dev, &tf); | |
951 | ||
952 | tf.command = ATA_CMD_SET_MAX; | |
953 | tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; | |
954 | tf.protocol |= ATA_PROT_NODATA; | |
955 | ||
956 | tf.lbal = (new_sectors >> 0) & 0xff; | |
957 | tf.lbam = (new_sectors >> 8) & 0xff; | |
958 | tf.lbah = (new_sectors >> 16) & 0xff; | |
959 | tf.device |= ((new_sectors >> 24) & 0x0f) | 0x40; | |
960 | ||
961 | err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); | |
962 | if (err) | |
963 | return 0; | |
964 | ||
965 | return ata_tf_to_lba(&tf); | |
966 | } | |
967 | ||
968 | /** | |
969 | * ata_hpa_resize - Resize a device with an HPA set | |
970 | * @dev: Device to resize | |
971 | * | |
972 | * Read the size of an LBA28 or LBA48 disk with HPA features and resize | |
973 | * it if required to the full size of the media. The caller must check | |
974 | * the drive has the HPA feature set enabled. | |
975 | */ | |
976 | ||
977 | static u64 ata_hpa_resize(struct ata_device *dev) | |
978 | { | |
979 | u64 sectors = dev->n_sectors; | |
980 | u64 hpa_sectors; | |
a617c09f | 981 | |
1e999736 AC |
982 | if (ata_id_has_lba48(dev->id)) |
983 | hpa_sectors = ata_read_native_max_address_ext(dev); | |
984 | else | |
985 | hpa_sectors = ata_read_native_max_address(dev); | |
986 | ||
1e999736 AC |
987 | if (hpa_sectors > sectors) { |
988 | ata_dev_printk(dev, KERN_INFO, | |
989 | "Host Protected Area detected:\n" | |
990 | "\tcurrent size: %lld sectors\n" | |
991 | "\tnative size: %lld sectors\n", | |
bd1d5ec6 | 992 | (long long)sectors, (long long)hpa_sectors); |
1e999736 AC |
993 | |
994 | if (ata_ignore_hpa) { | |
995 | if (ata_id_has_lba48(dev->id)) | |
996 | hpa_sectors = ata_set_native_max_address_ext(dev, hpa_sectors); | |
997 | else | |
bd1d5ec6 AM |
998 | hpa_sectors = ata_set_native_max_address(dev, |
999 | hpa_sectors); | |
1e999736 AC |
1000 | |
1001 | if (hpa_sectors) { | |
bd1d5ec6 AM |
1002 | ata_dev_printk(dev, KERN_INFO, "native size " |
1003 | "increased to %lld sectors\n", | |
1004 | (long long)hpa_sectors); | |
1e999736 AC |
1005 | return hpa_sectors; |
1006 | } | |
1007 | } | |
37301a55 TH |
1008 | } else if (hpa_sectors < sectors) |
1009 | ata_dev_printk(dev, KERN_WARNING, "%s 1: hpa sectors (%lld) " | |
1010 | "is smaller than sectors (%lld)\n", __FUNCTION__, | |
1011 | (long long)hpa_sectors, (long long)sectors); | |
1012 | ||
1e999736 AC |
1013 | return sectors; |
1014 | } | |
1015 | ||
2940740b TH |
1016 | static u64 ata_id_n_sectors(const u16 *id) |
1017 | { | |
1018 | if (ata_id_has_lba(id)) { | |
1019 | if (ata_id_has_lba48(id)) | |
1020 | return ata_id_u64(id, 100); | |
1021 | else | |
1022 | return ata_id_u32(id, 60); | |
1023 | } else { | |
1024 | if (ata_id_current_chs_valid(id)) | |
1025 | return ata_id_u32(id, 57); | |
1026 | else | |
1027 | return id[1] * id[3] * id[6]; | |
1028 | } | |
1029 | } | |
1030 | ||
10305f0f AC |
1031 | /** |
1032 | * ata_id_to_dma_mode - Identify DMA mode from id block | |
1033 | * @dev: device to identify | |
cc261267 | 1034 | * @unknown: mode to assume if we cannot tell |
10305f0f AC |
1035 | * |
1036 | * Set up the timing values for the device based upon the identify | |
1037 | * reported values for the DMA mode. This function is used by drivers | |
1038 | * which rely upon firmware configured modes, but wish to report the | |
1039 | * mode correctly when possible. | |
1040 | * | |
1041 | * In addition we emit similarly formatted messages to the default | |
1042 | * ata_dev_set_mode handler, in order to provide consistency of | |
1043 | * presentation. | |
1044 | */ | |
1045 | ||
1046 | void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown) | |
1047 | { | |
1048 | unsigned int mask; | |
1049 | u8 mode; | |
1050 | ||
1051 | /* Pack the DMA modes */ | |
1052 | mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA; | |
1053 | if (dev->id[53] & 0x04) | |
1054 | mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA; | |
1055 | ||
1056 | /* Select the mode in use */ | |
1057 | mode = ata_xfer_mask2mode(mask); | |
1058 | ||
1059 | if (mode != 0) { | |
1060 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", | |
1061 | ata_mode_string(mask)); | |
1062 | } else { | |
1063 | /* SWDMA perhaps ? */ | |
1064 | mode = unknown; | |
1065 | ata_dev_printk(dev, KERN_INFO, "configured for DMA\n"); | |
1066 | } | |
1067 | ||
1068 | /* Configure the device reporting */ | |
1069 | dev->xfer_mode = mode; | |
1070 | dev->xfer_shift = ata_xfer_mode2shift(mode); | |
1071 | } | |
1072 | ||
0baab86b EF |
1073 | /** |
1074 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
1075 | * @ap: ATA channel to manipulate | |
1076 | * @device: ATA device (numbered from zero) to select | |
1077 | * | |
1078 | * This function performs no actual function. | |
1079 | * | |
1080 | * May be used as the dev_select() entry in ata_port_operations. | |
1081 | * | |
1082 | * LOCKING: | |
1083 | * caller. | |
1084 | */ | |
1da177e4 LT |
1085 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
1086 | { | |
1087 | } | |
1088 | ||
0baab86b | 1089 | |
1da177e4 LT |
1090 | /** |
1091 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
1092 | * @ap: ATA channel to manipulate | |
1093 | * @device: ATA device (numbered from zero) to select | |
1094 | * | |
1095 | * Use the method defined in the ATA specification to | |
1096 | * make either device 0, or device 1, active on the | |
0baab86b EF |
1097 | * ATA channel. Works with both PIO and MMIO. |
1098 | * | |
1099 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
1100 | * |
1101 | * LOCKING: | |
1102 | * caller. | |
1103 | */ | |
1104 | ||
1105 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
1106 | { | |
1107 | u8 tmp; | |
1108 | ||
1109 | if (device == 0) | |
1110 | tmp = ATA_DEVICE_OBS; | |
1111 | else | |
1112 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
1113 | ||
0d5ff566 | 1114 | iowrite8(tmp, ap->ioaddr.device_addr); |
1da177e4 LT |
1115 | ata_pause(ap); /* needed; also flushes, for mmio */ |
1116 | } | |
1117 | ||
1118 | /** | |
1119 | * ata_dev_select - Select device 0/1 on ATA bus | |
1120 | * @ap: ATA channel to manipulate | |
1121 | * @device: ATA device (numbered from zero) to select | |
1122 | * @wait: non-zero to wait for Status register BSY bit to clear | |
1123 | * @can_sleep: non-zero if context allows sleeping | |
1124 | * | |
1125 | * Use the method defined in the ATA specification to | |
1126 | * make either device 0, or device 1, active on the | |
1127 | * ATA channel. | |
1128 | * | |
1129 | * This is a high-level version of ata_std_dev_select(), | |
1130 | * which additionally provides the services of inserting | |
1131 | * the proper pauses and status polling, where needed. | |
1132 | * | |
1133 | * LOCKING: | |
1134 | * caller. | |
1135 | */ | |
1136 | ||
1137 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
1138 | unsigned int wait, unsigned int can_sleep) | |
1139 | { | |
88574551 | 1140 | if (ata_msg_probe(ap)) |
44877b4e TH |
1141 | ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " |
1142 | "device %u, wait %u\n", device, wait); | |
1da177e4 LT |
1143 | |
1144 | if (wait) | |
1145 | ata_wait_idle(ap); | |
1146 | ||
1147 | ap->ops->dev_select(ap, device); | |
1148 | ||
1149 | if (wait) { | |
1150 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
1151 | msleep(150); | |
1152 | ata_wait_idle(ap); | |
1153 | } | |
1154 | } | |
1155 | ||
1156 | /** | |
1157 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 1158 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 1159 | * |
0bd3300a TH |
1160 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
1161 | * page. | |
1da177e4 LT |
1162 | * |
1163 | * LOCKING: | |
1164 | * caller. | |
1165 | */ | |
1166 | ||
0bd3300a | 1167 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
1168 | { |
1169 | DPRINTK("49==0x%04x " | |
1170 | "53==0x%04x " | |
1171 | "63==0x%04x " | |
1172 | "64==0x%04x " | |
1173 | "75==0x%04x \n", | |
0bd3300a TH |
1174 | id[49], |
1175 | id[53], | |
1176 | id[63], | |
1177 | id[64], | |
1178 | id[75]); | |
1da177e4 LT |
1179 | DPRINTK("80==0x%04x " |
1180 | "81==0x%04x " | |
1181 | "82==0x%04x " | |
1182 | "83==0x%04x " | |
1183 | "84==0x%04x \n", | |
0bd3300a TH |
1184 | id[80], |
1185 | id[81], | |
1186 | id[82], | |
1187 | id[83], | |
1188 | id[84]); | |
1da177e4 LT |
1189 | DPRINTK("88==0x%04x " |
1190 | "93==0x%04x\n", | |
0bd3300a TH |
1191 | id[88], |
1192 | id[93]); | |
1da177e4 LT |
1193 | } |
1194 | ||
cb95d562 TH |
1195 | /** |
1196 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
1197 | * @id: IDENTIFY data to compute xfer mask from | |
1198 | * | |
1199 | * Compute the xfermask for this device. This is not as trivial | |
1200 | * as it seems if we must consider early devices correctly. | |
1201 | * | |
1202 | * FIXME: pre IDE drive timing (do we care ?). | |
1203 | * | |
1204 | * LOCKING: | |
1205 | * None. | |
1206 | * | |
1207 | * RETURNS: | |
1208 | * Computed xfermask | |
1209 | */ | |
1210 | static unsigned int ata_id_xfermask(const u16 *id) | |
1211 | { | |
1212 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
1213 | ||
1214 | /* Usual case. Word 53 indicates word 64 is valid */ | |
1215 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
1216 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
1217 | pio_mask <<= 3; | |
1218 | pio_mask |= 0x7; | |
1219 | } else { | |
1220 | /* If word 64 isn't valid then Word 51 high byte holds | |
1221 | * the PIO timing number for the maximum. Turn it into | |
1222 | * a mask. | |
1223 | */ | |
7a0f1c8a | 1224 | u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; |
46767aeb AC |
1225 | if (mode < 5) /* Valid PIO range */ |
1226 | pio_mask = (2 << mode) - 1; | |
1227 | else | |
1228 | pio_mask = 1; | |
cb95d562 TH |
1229 | |
1230 | /* But wait.. there's more. Design your standards by | |
1231 | * committee and you too can get a free iordy field to | |
1232 | * process. However its the speeds not the modes that | |
1233 | * are supported... Note drivers using the timing API | |
1234 | * will get this right anyway | |
1235 | */ | |
1236 | } | |
1237 | ||
1238 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
fb21f0d0 | 1239 | |
b352e57d AC |
1240 | if (ata_id_is_cfa(id)) { |
1241 | /* | |
1242 | * Process compact flash extended modes | |
1243 | */ | |
1244 | int pio = id[163] & 0x7; | |
1245 | int dma = (id[163] >> 3) & 7; | |
1246 | ||
1247 | if (pio) | |
1248 | pio_mask |= (1 << 5); | |
1249 | if (pio > 1) | |
1250 | pio_mask |= (1 << 6); | |
1251 | if (dma) | |
1252 | mwdma_mask |= (1 << 3); | |
1253 | if (dma > 1) | |
1254 | mwdma_mask |= (1 << 4); | |
1255 | } | |
1256 | ||
fb21f0d0 TH |
1257 | udma_mask = 0; |
1258 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
1259 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
cb95d562 TH |
1260 | |
1261 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
1262 | } | |
1263 | ||
86e45b6b TH |
1264 | /** |
1265 | * ata_port_queue_task - Queue port_task | |
1266 | * @ap: The ata_port to queue port_task for | |
e2a7f77a | 1267 | * @fn: workqueue function to be scheduled |
65f27f38 | 1268 | * @data: data for @fn to use |
e2a7f77a | 1269 | * @delay: delay time for workqueue function |
86e45b6b TH |
1270 | * |
1271 | * Schedule @fn(@data) for execution after @delay jiffies using | |
1272 | * port_task. There is one port_task per port and it's the | |
1273 | * user(low level driver)'s responsibility to make sure that only | |
1274 | * one task is active at any given time. | |
1275 | * | |
1276 | * libata core layer takes care of synchronization between | |
1277 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
1278 | * synchronization. | |
1279 | * | |
1280 | * LOCKING: | |
1281 | * Inherited from caller. | |
1282 | */ | |
65f27f38 | 1283 | void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, |
86e45b6b TH |
1284 | unsigned long delay) |
1285 | { | |
65f27f38 DH |
1286 | PREPARE_DELAYED_WORK(&ap->port_task, fn); |
1287 | ap->port_task_data = data; | |
86e45b6b | 1288 | |
45a66c1c ON |
1289 | /* may fail if ata_port_flush_task() in progress */ |
1290 | queue_delayed_work(ata_wq, &ap->port_task, delay); | |
86e45b6b TH |
1291 | } |
1292 | ||
1293 | /** | |
1294 | * ata_port_flush_task - Flush port_task | |
1295 | * @ap: The ata_port to flush port_task for | |
1296 | * | |
1297 | * After this function completes, port_task is guranteed not to | |
1298 | * be running or scheduled. | |
1299 | * | |
1300 | * LOCKING: | |
1301 | * Kernel thread context (may sleep) | |
1302 | */ | |
1303 | void ata_port_flush_task(struct ata_port *ap) | |
1304 | { | |
86e45b6b TH |
1305 | DPRINTK("ENTER\n"); |
1306 | ||
45a66c1c | 1307 | cancel_rearming_delayed_work(&ap->port_task); |
86e45b6b | 1308 | |
0dd4b21f BP |
1309 | if (ata_msg_ctl(ap)) |
1310 | ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); | |
86e45b6b TH |
1311 | } |
1312 | ||
7102d230 | 1313 | static void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 1314 | { |
77853bf2 | 1315 | struct completion *waiting = qc->private_data; |
a2a7a662 | 1316 | |
a2a7a662 | 1317 | complete(waiting); |
a2a7a662 TH |
1318 | } |
1319 | ||
1320 | /** | |
2432697b | 1321 | * ata_exec_internal_sg - execute libata internal command |
a2a7a662 TH |
1322 | * @dev: Device to which the command is sent |
1323 | * @tf: Taskfile registers for the command and the result | |
d69cf37d | 1324 | * @cdb: CDB for packet command |
a2a7a662 | 1325 | * @dma_dir: Data tranfer direction of the command |
2432697b TH |
1326 | * @sg: sg list for the data buffer of the command |
1327 | * @n_elem: Number of sg entries | |
a2a7a662 TH |
1328 | * |
1329 | * Executes libata internal command with timeout. @tf contains | |
1330 | * command on entry and result on return. Timeout and error | |
1331 | * conditions are reported via return value. No recovery action | |
1332 | * is taken after a command times out. It's caller's duty to | |
1333 | * clean up after timeout. | |
1334 | * | |
1335 | * LOCKING: | |
1336 | * None. Should be called with kernel context, might sleep. | |
551e8889 TH |
1337 | * |
1338 | * RETURNS: | |
1339 | * Zero on success, AC_ERR_* mask on failure | |
a2a7a662 | 1340 | */ |
2432697b TH |
1341 | unsigned ata_exec_internal_sg(struct ata_device *dev, |
1342 | struct ata_taskfile *tf, const u8 *cdb, | |
1343 | int dma_dir, struct scatterlist *sg, | |
1344 | unsigned int n_elem) | |
a2a7a662 | 1345 | { |
3373efd8 | 1346 | struct ata_port *ap = dev->ap; |
a2a7a662 TH |
1347 | u8 command = tf->command; |
1348 | struct ata_queued_cmd *qc; | |
2ab7db1f | 1349 | unsigned int tag, preempted_tag; |
dedaf2b0 | 1350 | u32 preempted_sactive, preempted_qc_active; |
60be6b9a | 1351 | DECLARE_COMPLETION_ONSTACK(wait); |
a2a7a662 | 1352 | unsigned long flags; |
77853bf2 | 1353 | unsigned int err_mask; |
d95a717f | 1354 | int rc; |
a2a7a662 | 1355 | |
ba6a1308 | 1356 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 | 1357 | |
e3180499 | 1358 | /* no internal command while frozen */ |
b51e9e5d | 1359 | if (ap->pflags & ATA_PFLAG_FROZEN) { |
ba6a1308 | 1360 | spin_unlock_irqrestore(ap->lock, flags); |
e3180499 TH |
1361 | return AC_ERR_SYSTEM; |
1362 | } | |
1363 | ||
2ab7db1f | 1364 | /* initialize internal qc */ |
a2a7a662 | 1365 | |
2ab7db1f TH |
1366 | /* XXX: Tag 0 is used for drivers with legacy EH as some |
1367 | * drivers choke if any other tag is given. This breaks | |
1368 | * ata_tag_internal() test for those drivers. Don't use new | |
1369 | * EH stuff without converting to it. | |
1370 | */ | |
1371 | if (ap->ops->error_handler) | |
1372 | tag = ATA_TAG_INTERNAL; | |
1373 | else | |
1374 | tag = 0; | |
1375 | ||
6cec4a39 | 1376 | if (test_and_set_bit(tag, &ap->qc_allocated)) |
2ab7db1f | 1377 | BUG(); |
f69499f4 | 1378 | qc = __ata_qc_from_tag(ap, tag); |
2ab7db1f TH |
1379 | |
1380 | qc->tag = tag; | |
1381 | qc->scsicmd = NULL; | |
1382 | qc->ap = ap; | |
1383 | qc->dev = dev; | |
1384 | ata_qc_reinit(qc); | |
1385 | ||
1386 | preempted_tag = ap->active_tag; | |
dedaf2b0 TH |
1387 | preempted_sactive = ap->sactive; |
1388 | preempted_qc_active = ap->qc_active; | |
2ab7db1f | 1389 | ap->active_tag = ATA_TAG_POISON; |
dedaf2b0 TH |
1390 | ap->sactive = 0; |
1391 | ap->qc_active = 0; | |
2ab7db1f TH |
1392 | |
1393 | /* prepare & issue qc */ | |
a2a7a662 | 1394 | qc->tf = *tf; |
d69cf37d TH |
1395 | if (cdb) |
1396 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
e61e0672 | 1397 | qc->flags |= ATA_QCFLAG_RESULT_TF; |
a2a7a662 TH |
1398 | qc->dma_dir = dma_dir; |
1399 | if (dma_dir != DMA_NONE) { | |
2432697b TH |
1400 | unsigned int i, buflen = 0; |
1401 | ||
1402 | for (i = 0; i < n_elem; i++) | |
1403 | buflen += sg[i].length; | |
1404 | ||
1405 | ata_sg_init(qc, sg, n_elem); | |
49c80429 | 1406 | qc->nbytes = buflen; |
a2a7a662 TH |
1407 | } |
1408 | ||
77853bf2 | 1409 | qc->private_data = &wait; |
a2a7a662 TH |
1410 | qc->complete_fn = ata_qc_complete_internal; |
1411 | ||
8e0e694a | 1412 | ata_qc_issue(qc); |
a2a7a662 | 1413 | |
ba6a1308 | 1414 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 | 1415 | |
a8601e5f | 1416 | rc = wait_for_completion_timeout(&wait, ata_probe_timeout); |
d95a717f TH |
1417 | |
1418 | ata_port_flush_task(ap); | |
41ade50c | 1419 | |
d95a717f | 1420 | if (!rc) { |
ba6a1308 | 1421 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 TH |
1422 | |
1423 | /* We're racing with irq here. If we lose, the | |
1424 | * following test prevents us from completing the qc | |
d95a717f TH |
1425 | * twice. If we win, the port is frozen and will be |
1426 | * cleaned up by ->post_internal_cmd(). | |
a2a7a662 | 1427 | */ |
77853bf2 | 1428 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
d95a717f TH |
1429 | qc->err_mask |= AC_ERR_TIMEOUT; |
1430 | ||
1431 | if (ap->ops->error_handler) | |
1432 | ata_port_freeze(ap); | |
1433 | else | |
1434 | ata_qc_complete(qc); | |
f15a1daf | 1435 | |
0dd4b21f BP |
1436 | if (ata_msg_warn(ap)) |
1437 | ata_dev_printk(dev, KERN_WARNING, | |
88574551 | 1438 | "qc timeout (cmd 0x%x)\n", command); |
a2a7a662 TH |
1439 | } |
1440 | ||
ba6a1308 | 1441 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 TH |
1442 | } |
1443 | ||
d95a717f TH |
1444 | /* do post_internal_cmd */ |
1445 | if (ap->ops->post_internal_cmd) | |
1446 | ap->ops->post_internal_cmd(qc); | |
1447 | ||
a51d644a TH |
1448 | /* perform minimal error analysis */ |
1449 | if (qc->flags & ATA_QCFLAG_FAILED) { | |
1450 | if (qc->result_tf.command & (ATA_ERR | ATA_DF)) | |
1451 | qc->err_mask |= AC_ERR_DEV; | |
1452 | ||
1453 | if (!qc->err_mask) | |
1454 | qc->err_mask |= AC_ERR_OTHER; | |
1455 | ||
1456 | if (qc->err_mask & ~AC_ERR_OTHER) | |
1457 | qc->err_mask &= ~AC_ERR_OTHER; | |
d95a717f TH |
1458 | } |
1459 | ||
15869303 | 1460 | /* finish up */ |
ba6a1308 | 1461 | spin_lock_irqsave(ap->lock, flags); |
15869303 | 1462 | |
e61e0672 | 1463 | *tf = qc->result_tf; |
77853bf2 TH |
1464 | err_mask = qc->err_mask; |
1465 | ||
1466 | ata_qc_free(qc); | |
2ab7db1f | 1467 | ap->active_tag = preempted_tag; |
dedaf2b0 TH |
1468 | ap->sactive = preempted_sactive; |
1469 | ap->qc_active = preempted_qc_active; | |
77853bf2 | 1470 | |
1f7dd3e9 TH |
1471 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. |
1472 | * Until those drivers are fixed, we detect the condition | |
1473 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1474 | * port. | |
1475 | * | |
1476 | * Note that this doesn't change any behavior as internal | |
1477 | * command failure results in disabling the device in the | |
1478 | * higher layer for LLDDs without new reset/EH callbacks. | |
1479 | * | |
1480 | * Kill the following code as soon as those drivers are fixed. | |
1481 | */ | |
198e0fed | 1482 | if (ap->flags & ATA_FLAG_DISABLED) { |
1f7dd3e9 TH |
1483 | err_mask |= AC_ERR_SYSTEM; |
1484 | ata_port_probe(ap); | |
1485 | } | |
1486 | ||
ba6a1308 | 1487 | spin_unlock_irqrestore(ap->lock, flags); |
15869303 | 1488 | |
77853bf2 | 1489 | return err_mask; |
a2a7a662 TH |
1490 | } |
1491 | ||
2432697b | 1492 | /** |
33480a0e | 1493 | * ata_exec_internal - execute libata internal command |
2432697b TH |
1494 | * @dev: Device to which the command is sent |
1495 | * @tf: Taskfile registers for the command and the result | |
1496 | * @cdb: CDB for packet command | |
1497 | * @dma_dir: Data tranfer direction of the command | |
1498 | * @buf: Data buffer of the command | |
1499 | * @buflen: Length of data buffer | |
1500 | * | |
1501 | * Wrapper around ata_exec_internal_sg() which takes simple | |
1502 | * buffer instead of sg list. | |
1503 | * | |
1504 | * LOCKING: | |
1505 | * None. Should be called with kernel context, might sleep. | |
1506 | * | |
1507 | * RETURNS: | |
1508 | * Zero on success, AC_ERR_* mask on failure | |
1509 | */ | |
1510 | unsigned ata_exec_internal(struct ata_device *dev, | |
1511 | struct ata_taskfile *tf, const u8 *cdb, | |
1512 | int dma_dir, void *buf, unsigned int buflen) | |
1513 | { | |
33480a0e TH |
1514 | struct scatterlist *psg = NULL, sg; |
1515 | unsigned int n_elem = 0; | |
2432697b | 1516 | |
33480a0e TH |
1517 | if (dma_dir != DMA_NONE) { |
1518 | WARN_ON(!buf); | |
1519 | sg_init_one(&sg, buf, buflen); | |
1520 | psg = &sg; | |
1521 | n_elem++; | |
1522 | } | |
2432697b | 1523 | |
33480a0e | 1524 | return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem); |
2432697b TH |
1525 | } |
1526 | ||
977e6b9f TH |
1527 | /** |
1528 | * ata_do_simple_cmd - execute simple internal command | |
1529 | * @dev: Device to which the command is sent | |
1530 | * @cmd: Opcode to execute | |
1531 | * | |
1532 | * Execute a 'simple' command, that only consists of the opcode | |
1533 | * 'cmd' itself, without filling any other registers | |
1534 | * | |
1535 | * LOCKING: | |
1536 | * Kernel thread context (may sleep). | |
1537 | * | |
1538 | * RETURNS: | |
1539 | * Zero on success, AC_ERR_* mask on failure | |
e58eb583 | 1540 | */ |
77b08fb5 | 1541 | unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) |
e58eb583 TH |
1542 | { |
1543 | struct ata_taskfile tf; | |
e58eb583 TH |
1544 | |
1545 | ata_tf_init(dev, &tf); | |
1546 | ||
1547 | tf.command = cmd; | |
1548 | tf.flags |= ATA_TFLAG_DEVICE; | |
1549 | tf.protocol = ATA_PROT_NODATA; | |
1550 | ||
977e6b9f | 1551 | return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
e58eb583 TH |
1552 | } |
1553 | ||
1bc4ccff AC |
1554 | /** |
1555 | * ata_pio_need_iordy - check if iordy needed | |
1556 | * @adev: ATA device | |
1557 | * | |
1558 | * Check if the current speed of the device requires IORDY. Used | |
1559 | * by various controllers for chip configuration. | |
1560 | */ | |
a617c09f | 1561 | |
1bc4ccff AC |
1562 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) |
1563 | { | |
432729f0 AC |
1564 | /* Controller doesn't support IORDY. Probably a pointless check |
1565 | as the caller should know this */ | |
1566 | if (adev->ap->flags & ATA_FLAG_NO_IORDY) | |
1bc4ccff | 1567 | return 0; |
432729f0 AC |
1568 | /* PIO3 and higher it is mandatory */ |
1569 | if (adev->pio_mode > XFER_PIO_2) | |
1570 | return 1; | |
1571 | /* We turn it on when possible */ | |
1572 | if (ata_id_has_iordy(adev->id)) | |
1bc4ccff | 1573 | return 1; |
432729f0 AC |
1574 | return 0; |
1575 | } | |
2e9edbf8 | 1576 | |
432729f0 AC |
1577 | /** |
1578 | * ata_pio_mask_no_iordy - Return the non IORDY mask | |
1579 | * @adev: ATA device | |
1580 | * | |
1581 | * Compute the highest mode possible if we are not using iordy. Return | |
1582 | * -1 if no iordy mode is available. | |
1583 | */ | |
a617c09f | 1584 | |
432729f0 AC |
1585 | static u32 ata_pio_mask_no_iordy(const struct ata_device *adev) |
1586 | { | |
1bc4ccff | 1587 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ |
1bc4ccff | 1588 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ |
432729f0 | 1589 | u16 pio = adev->id[ATA_ID_EIDE_PIO]; |
1bc4ccff AC |
1590 | /* Is the speed faster than the drive allows non IORDY ? */ |
1591 | if (pio) { | |
1592 | /* This is cycle times not frequency - watch the logic! */ | |
1593 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
432729f0 AC |
1594 | return 3 << ATA_SHIFT_PIO; |
1595 | return 7 << ATA_SHIFT_PIO; | |
1bc4ccff AC |
1596 | } |
1597 | } | |
432729f0 | 1598 | return 3 << ATA_SHIFT_PIO; |
1bc4ccff AC |
1599 | } |
1600 | ||
1da177e4 | 1601 | /** |
49016aca | 1602 | * ata_dev_read_id - Read ID data from the specified device |
49016aca TH |
1603 | * @dev: target device |
1604 | * @p_class: pointer to class of the target device (may be changed) | |
bff04647 | 1605 | * @flags: ATA_READID_* flags |
fe635c7e | 1606 | * @id: buffer to read IDENTIFY data into |
1da177e4 | 1607 | * |
49016aca TH |
1608 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1609 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
aec5c3c1 TH |
1610 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS |
1611 | * for pre-ATA4 drives. | |
1da177e4 LT |
1612 | * |
1613 | * LOCKING: | |
49016aca TH |
1614 | * Kernel thread context (may sleep) |
1615 | * | |
1616 | * RETURNS: | |
1617 | * 0 on success, -errno otherwise. | |
1da177e4 | 1618 | */ |
a9beec95 | 1619 | int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, |
bff04647 | 1620 | unsigned int flags, u16 *id) |
1da177e4 | 1621 | { |
3373efd8 | 1622 | struct ata_port *ap = dev->ap; |
49016aca | 1623 | unsigned int class = *p_class; |
a0123703 | 1624 | struct ata_taskfile tf; |
49016aca TH |
1625 | unsigned int err_mask = 0; |
1626 | const char *reason; | |
54936f8b | 1627 | int may_fallback = 1, tried_spinup = 0; |
49016aca | 1628 | int rc; |
1da177e4 | 1629 | |
0dd4b21f | 1630 | if (ata_msg_ctl(ap)) |
44877b4e | 1631 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); |
1da177e4 | 1632 | |
49016aca | 1633 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
49016aca | 1634 | retry: |
3373efd8 | 1635 | ata_tf_init(dev, &tf); |
a0123703 | 1636 | |
49016aca TH |
1637 | switch (class) { |
1638 | case ATA_DEV_ATA: | |
a0123703 | 1639 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1640 | break; |
1641 | case ATA_DEV_ATAPI: | |
a0123703 | 1642 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1643 | break; |
1644 | default: | |
1645 | rc = -ENODEV; | |
1646 | reason = "unsupported class"; | |
1647 | goto err_out; | |
1da177e4 LT |
1648 | } |
1649 | ||
a0123703 | 1650 | tf.protocol = ATA_PROT_PIO; |
81afe893 TH |
1651 | |
1652 | /* Some devices choke if TF registers contain garbage. Make | |
1653 | * sure those are properly initialized. | |
1654 | */ | |
1655 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
1656 | ||
1657 | /* Device presence detection is unreliable on some | |
1658 | * controllers. Always poll IDENTIFY if available. | |
1659 | */ | |
1660 | tf.flags |= ATA_TFLAG_POLLING; | |
1da177e4 | 1661 | |
3373efd8 | 1662 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, |
49016aca | 1663 | id, sizeof(id[0]) * ATA_ID_WORDS); |
a0123703 | 1664 | if (err_mask) { |
800b3996 | 1665 | if (err_mask & AC_ERR_NODEV_HINT) { |
55a8e2c8 | 1666 | DPRINTK("ata%u.%d: NODEV after polling detection\n", |
44877b4e | 1667 | ap->print_id, dev->devno); |
55a8e2c8 TH |
1668 | return -ENOENT; |
1669 | } | |
1670 | ||
54936f8b TH |
1671 | /* Device or controller might have reported the wrong |
1672 | * device class. Give a shot at the other IDENTIFY if | |
1673 | * the current one is aborted by the device. | |
1674 | */ | |
1675 | if (may_fallback && | |
1676 | (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { | |
1677 | may_fallback = 0; | |
1678 | ||
1679 | if (class == ATA_DEV_ATA) | |
1680 | class = ATA_DEV_ATAPI; | |
1681 | else | |
1682 | class = ATA_DEV_ATA; | |
1683 | goto retry; | |
1684 | } | |
1685 | ||
49016aca TH |
1686 | rc = -EIO; |
1687 | reason = "I/O error"; | |
1da177e4 LT |
1688 | goto err_out; |
1689 | } | |
1690 | ||
54936f8b TH |
1691 | /* Falling back doesn't make sense if ID data was read |
1692 | * successfully at least once. | |
1693 | */ | |
1694 | may_fallback = 0; | |
1695 | ||
49016aca | 1696 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 | 1697 | |
49016aca | 1698 | /* sanity check */ |
a4f5749b | 1699 | rc = -EINVAL; |
6070068b | 1700 | reason = "device reports invalid type"; |
a4f5749b TH |
1701 | |
1702 | if (class == ATA_DEV_ATA) { | |
1703 | if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) | |
1704 | goto err_out; | |
1705 | } else { | |
1706 | if (ata_id_is_ata(id)) | |
1707 | goto err_out; | |
49016aca TH |
1708 | } |
1709 | ||
169439c2 ML |
1710 | if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) { |
1711 | tried_spinup = 1; | |
1712 | /* | |
1713 | * Drive powered-up in standby mode, and requires a specific | |
1714 | * SET_FEATURES spin-up subcommand before it will accept | |
1715 | * anything other than the original IDENTIFY command. | |
1716 | */ | |
1717 | ata_tf_init(dev, &tf); | |
1718 | tf.command = ATA_CMD_SET_FEATURES; | |
1719 | tf.feature = SETFEATURES_SPINUP; | |
1720 | tf.protocol = ATA_PROT_NODATA; | |
1721 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
1722 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); | |
1723 | if (err_mask) { | |
1724 | rc = -EIO; | |
1725 | reason = "SPINUP failed"; | |
1726 | goto err_out; | |
1727 | } | |
1728 | /* | |
1729 | * If the drive initially returned incomplete IDENTIFY info, | |
1730 | * we now must reissue the IDENTIFY command. | |
1731 | */ | |
1732 | if (id[2] == 0x37c8) | |
1733 | goto retry; | |
1734 | } | |
1735 | ||
bff04647 | 1736 | if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { |
49016aca TH |
1737 | /* |
1738 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1739 | * SRST RESET | |
1740 | * IDENTIFY | |
1741 | * INITIALIZE DEVICE PARAMETERS | |
1742 | * anything else.. | |
1743 | * Some drives were very specific about that exact sequence. | |
1744 | */ | |
1745 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
3373efd8 | 1746 | err_mask = ata_dev_init_params(dev, id[3], id[6]); |
49016aca TH |
1747 | if (err_mask) { |
1748 | rc = -EIO; | |
1749 | reason = "INIT_DEV_PARAMS failed"; | |
1750 | goto err_out; | |
1751 | } | |
1752 | ||
1753 | /* current CHS translation info (id[53-58]) might be | |
1754 | * changed. reread the identify device info. | |
1755 | */ | |
bff04647 | 1756 | flags &= ~ATA_READID_POSTRESET; |
49016aca TH |
1757 | goto retry; |
1758 | } | |
1759 | } | |
1760 | ||
1761 | *p_class = class; | |
fe635c7e | 1762 | |
49016aca TH |
1763 | return 0; |
1764 | ||
1765 | err_out: | |
88574551 | 1766 | if (ata_msg_warn(ap)) |
0dd4b21f | 1767 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " |
88574551 | 1768 | "(%s, err_mask=0x%x)\n", reason, err_mask); |
49016aca TH |
1769 | return rc; |
1770 | } | |
1771 | ||
3373efd8 | 1772 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
4b2f3ede | 1773 | { |
3373efd8 | 1774 | return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); |
4b2f3ede TH |
1775 | } |
1776 | ||
a6e6ce8e TH |
1777 | static void ata_dev_config_ncq(struct ata_device *dev, |
1778 | char *desc, size_t desc_sz) | |
1779 | { | |
1780 | struct ata_port *ap = dev->ap; | |
1781 | int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); | |
1782 | ||
1783 | if (!ata_id_has_ncq(dev->id)) { | |
1784 | desc[0] = '\0'; | |
1785 | return; | |
1786 | } | |
6919a0a6 AC |
1787 | if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) { |
1788 | snprintf(desc, desc_sz, "NCQ (not used)"); | |
1789 | return; | |
1790 | } | |
a6e6ce8e | 1791 | if (ap->flags & ATA_FLAG_NCQ) { |
cca3974e | 1792 | hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); |
a6e6ce8e TH |
1793 | dev->flags |= ATA_DFLAG_NCQ; |
1794 | } | |
1795 | ||
1796 | if (hdepth >= ddepth) | |
1797 | snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); | |
1798 | else | |
1799 | snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); | |
1800 | } | |
1801 | ||
49016aca | 1802 | /** |
ffeae418 | 1803 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
ffeae418 TH |
1804 | * @dev: Target device to configure |
1805 | * | |
1806 | * Configure @dev according to @dev->id. Generic and low-level | |
1807 | * driver specific fixups are also applied. | |
49016aca TH |
1808 | * |
1809 | * LOCKING: | |
ffeae418 TH |
1810 | * Kernel thread context (may sleep) |
1811 | * | |
1812 | * RETURNS: | |
1813 | * 0 on success, -errno otherwise | |
49016aca | 1814 | */ |
efdaedc4 | 1815 | int ata_dev_configure(struct ata_device *dev) |
49016aca | 1816 | { |
3373efd8 | 1817 | struct ata_port *ap = dev->ap; |
6746544c TH |
1818 | struct ata_eh_context *ehc = &ap->eh_context; |
1819 | int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; | |
1148c3a7 | 1820 | const u16 *id = dev->id; |
ff8854b2 | 1821 | unsigned int xfer_mask; |
b352e57d | 1822 | char revbuf[7]; /* XYZ-99\0 */ |
3f64f565 EM |
1823 | char fwrevbuf[ATA_ID_FW_REV_LEN+1]; |
1824 | char modelbuf[ATA_ID_PROD_LEN+1]; | |
e6d902a3 | 1825 | int rc; |
49016aca | 1826 | |
0dd4b21f | 1827 | if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { |
44877b4e TH |
1828 | ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", |
1829 | __FUNCTION__); | |
ffeae418 | 1830 | return 0; |
49016aca TH |
1831 | } |
1832 | ||
0dd4b21f | 1833 | if (ata_msg_probe(ap)) |
44877b4e | 1834 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); |
1da177e4 | 1835 | |
6746544c TH |
1836 | /* let ACPI work its magic */ |
1837 | rc = ata_acpi_on_devcfg(dev); | |
1838 | if (rc) | |
1839 | return rc; | |
08573a86 | 1840 | |
c39f5ebe | 1841 | /* print device capabilities */ |
0dd4b21f | 1842 | if (ata_msg_probe(ap)) |
88574551 TH |
1843 | ata_dev_printk(dev, KERN_DEBUG, |
1844 | "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " | |
1845 | "85:%04x 86:%04x 87:%04x 88:%04x\n", | |
0dd4b21f | 1846 | __FUNCTION__, |
f15a1daf TH |
1847 | id[49], id[82], id[83], id[84], |
1848 | id[85], id[86], id[87], id[88]); | |
c39f5ebe | 1849 | |
208a9933 | 1850 | /* initialize to-be-configured parameters */ |
ea1dd4e1 | 1851 | dev->flags &= ~ATA_DFLAG_CFG_MASK; |
208a9933 TH |
1852 | dev->max_sectors = 0; |
1853 | dev->cdb_len = 0; | |
1854 | dev->n_sectors = 0; | |
1855 | dev->cylinders = 0; | |
1856 | dev->heads = 0; | |
1857 | dev->sectors = 0; | |
1858 | ||
1da177e4 LT |
1859 | /* |
1860 | * common ATA, ATAPI feature tests | |
1861 | */ | |
1862 | ||
ff8854b2 | 1863 | /* find max transfer mode; for printk only */ |
1148c3a7 | 1864 | xfer_mask = ata_id_xfermask(id); |
1da177e4 | 1865 | |
0dd4b21f BP |
1866 | if (ata_msg_probe(ap)) |
1867 | ata_dump_id(id); | |
1da177e4 | 1868 | |
ef143d57 AL |
1869 | /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ |
1870 | ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, | |
1871 | sizeof(fwrevbuf)); | |
1872 | ||
1873 | ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD, | |
1874 | sizeof(modelbuf)); | |
1875 | ||
1da177e4 LT |
1876 | /* ATA-specific feature tests */ |
1877 | if (dev->class == ATA_DEV_ATA) { | |
b352e57d AC |
1878 | if (ata_id_is_cfa(id)) { |
1879 | if (id[162] & 1) /* CPRM may make this media unusable */ | |
44877b4e TH |
1880 | ata_dev_printk(dev, KERN_WARNING, |
1881 | "supports DRM functions and may " | |
1882 | "not be fully accessable.\n"); | |
b352e57d AC |
1883 | snprintf(revbuf, 7, "CFA"); |
1884 | } | |
1885 | else | |
1886 | snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); | |
1887 | ||
1148c3a7 | 1888 | dev->n_sectors = ata_id_n_sectors(id); |
2940740b | 1889 | |
3f64f565 EM |
1890 | if (dev->id[59] & 0x100) |
1891 | dev->multi_count = dev->id[59] & 0xff; | |
1892 | ||
1148c3a7 | 1893 | if (ata_id_has_lba(id)) { |
4c2d721a | 1894 | const char *lba_desc; |
a6e6ce8e | 1895 | char ncq_desc[20]; |
8bf62ece | 1896 | |
4c2d721a TH |
1897 | lba_desc = "LBA"; |
1898 | dev->flags |= ATA_DFLAG_LBA; | |
1148c3a7 | 1899 | if (ata_id_has_lba48(id)) { |
8bf62ece | 1900 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a | 1901 | lba_desc = "LBA48"; |
6fc49adb TH |
1902 | |
1903 | if (dev->n_sectors >= (1UL << 28) && | |
1904 | ata_id_has_flush_ext(id)) | |
1905 | dev->flags |= ATA_DFLAG_FLUSH_EXT; | |
4c2d721a | 1906 | } |
8bf62ece | 1907 | |
1e999736 AC |
1908 | if (ata_id_hpa_enabled(dev->id)) |
1909 | dev->n_sectors = ata_hpa_resize(dev); | |
1910 | ||
a6e6ce8e TH |
1911 | /* config NCQ */ |
1912 | ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); | |
1913 | ||
8bf62ece | 1914 | /* print device info to dmesg */ |
3f64f565 EM |
1915 | if (ata_msg_drv(ap) && print_info) { |
1916 | ata_dev_printk(dev, KERN_INFO, | |
1917 | "%s: %s, %s, max %s\n", | |
1918 | revbuf, modelbuf, fwrevbuf, | |
1919 | ata_mode_string(xfer_mask)); | |
1920 | ata_dev_printk(dev, KERN_INFO, | |
1921 | "%Lu sectors, multi %u: %s %s\n", | |
f15a1daf | 1922 | (unsigned long long)dev->n_sectors, |
3f64f565 EM |
1923 | dev->multi_count, lba_desc, ncq_desc); |
1924 | } | |
ffeae418 | 1925 | } else { |
8bf62ece AL |
1926 | /* CHS */ |
1927 | ||
1928 | /* Default translation */ | |
1148c3a7 TH |
1929 | dev->cylinders = id[1]; |
1930 | dev->heads = id[3]; | |
1931 | dev->sectors = id[6]; | |
8bf62ece | 1932 | |
1148c3a7 | 1933 | if (ata_id_current_chs_valid(id)) { |
8bf62ece | 1934 | /* Current CHS translation is valid. */ |
1148c3a7 TH |
1935 | dev->cylinders = id[54]; |
1936 | dev->heads = id[55]; | |
1937 | dev->sectors = id[56]; | |
8bf62ece AL |
1938 | } |
1939 | ||
1940 | /* print device info to dmesg */ | |
3f64f565 | 1941 | if (ata_msg_drv(ap) && print_info) { |
88574551 | 1942 | ata_dev_printk(dev, KERN_INFO, |
3f64f565 EM |
1943 | "%s: %s, %s, max %s\n", |
1944 | revbuf, modelbuf, fwrevbuf, | |
1945 | ata_mode_string(xfer_mask)); | |
a84471fe | 1946 | ata_dev_printk(dev, KERN_INFO, |
3f64f565 EM |
1947 | "%Lu sectors, multi %u, CHS %u/%u/%u\n", |
1948 | (unsigned long long)dev->n_sectors, | |
1949 | dev->multi_count, dev->cylinders, | |
1950 | dev->heads, dev->sectors); | |
1951 | } | |
07f6f7d0 AL |
1952 | } |
1953 | ||
6e7846e9 | 1954 | dev->cdb_len = 16; |
1da177e4 LT |
1955 | } |
1956 | ||
1957 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1958 | else if (dev->class == ATA_DEV_ATAPI) { |
08a556db AL |
1959 | char *cdb_intr_string = ""; |
1960 | ||
1148c3a7 | 1961 | rc = atapi_cdb_len(id); |
1da177e4 | 1962 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
0dd4b21f | 1963 | if (ata_msg_warn(ap)) |
88574551 TH |
1964 | ata_dev_printk(dev, KERN_WARNING, |
1965 | "unsupported CDB len\n"); | |
ffeae418 | 1966 | rc = -EINVAL; |
1da177e4 LT |
1967 | goto err_out_nosup; |
1968 | } | |
6e7846e9 | 1969 | dev->cdb_len = (unsigned int) rc; |
1da177e4 | 1970 | |
08a556db | 1971 | if (ata_id_cdb_intr(dev->id)) { |
312f7da2 | 1972 | dev->flags |= ATA_DFLAG_CDB_INTR; |
08a556db AL |
1973 | cdb_intr_string = ", CDB intr"; |
1974 | } | |
312f7da2 | 1975 | |
1da177e4 | 1976 | /* print device info to dmesg */ |
5afc8142 | 1977 | if (ata_msg_drv(ap) && print_info) |
ef143d57 AL |
1978 | ata_dev_printk(dev, KERN_INFO, |
1979 | "ATAPI: %s, %s, max %s%s\n", | |
1980 | modelbuf, fwrevbuf, | |
12436c30 TH |
1981 | ata_mode_string(xfer_mask), |
1982 | cdb_intr_string); | |
1da177e4 LT |
1983 | } |
1984 | ||
914ed354 TH |
1985 | /* determine max_sectors */ |
1986 | dev->max_sectors = ATA_MAX_SECTORS; | |
1987 | if (dev->flags & ATA_DFLAG_LBA48) | |
1988 | dev->max_sectors = ATA_MAX_SECTORS_LBA48; | |
1989 | ||
93590859 AC |
1990 | if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { |
1991 | /* Let the user know. We don't want to disallow opens for | |
1992 | rescue purposes, or in case the vendor is just a blithering | |
1993 | idiot */ | |
1994 | if (print_info) { | |
1995 | ata_dev_printk(dev, KERN_WARNING, | |
1996 | "Drive reports diagnostics failure. This may indicate a drive\n"); | |
1997 | ata_dev_printk(dev, KERN_WARNING, | |
1998 | "fault or invalid emulation. Contact drive vendor for information.\n"); | |
1999 | } | |
2000 | } | |
2001 | ||
4b2f3ede | 2002 | /* limit bridge transfers to udma5, 200 sectors */ |
3373efd8 | 2003 | if (ata_dev_knobble(dev)) { |
5afc8142 | 2004 | if (ata_msg_drv(ap) && print_info) |
f15a1daf TH |
2005 | ata_dev_printk(dev, KERN_INFO, |
2006 | "applying bridge limits\n"); | |
5a529139 | 2007 | dev->udma_mask &= ATA_UDMA5; |
4b2f3ede TH |
2008 | dev->max_sectors = ATA_MAX_SECTORS; |
2009 | } | |
2010 | ||
18d6e9d5 | 2011 | if (ata_device_blacklisted(dev) & ATA_HORKAGE_MAX_SEC_128) |
03ec52de TH |
2012 | dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, |
2013 | dev->max_sectors); | |
18d6e9d5 | 2014 | |
4b2f3ede | 2015 | if (ap->ops->dev_config) |
cd0d3bbc | 2016 | ap->ops->dev_config(dev); |
4b2f3ede | 2017 | |
0dd4b21f BP |
2018 | if (ata_msg_probe(ap)) |
2019 | ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", | |
2020 | __FUNCTION__, ata_chk_status(ap)); | |
ffeae418 | 2021 | return 0; |
1da177e4 LT |
2022 | |
2023 | err_out_nosup: | |
0dd4b21f | 2024 | if (ata_msg_probe(ap)) |
88574551 TH |
2025 | ata_dev_printk(dev, KERN_DEBUG, |
2026 | "%s: EXIT, err\n", __FUNCTION__); | |
ffeae418 | 2027 | return rc; |
1da177e4 LT |
2028 | } |
2029 | ||
be0d18df | 2030 | /** |
2e41e8e6 | 2031 | * ata_cable_40wire - return 40 wire cable type |
be0d18df AC |
2032 | * @ap: port |
2033 | * | |
2e41e8e6 | 2034 | * Helper method for drivers which want to hardwire 40 wire cable |
be0d18df AC |
2035 | * detection. |
2036 | */ | |
2037 | ||
2038 | int ata_cable_40wire(struct ata_port *ap) | |
2039 | { | |
2040 | return ATA_CBL_PATA40; | |
2041 | } | |
2042 | ||
2043 | /** | |
2e41e8e6 | 2044 | * ata_cable_80wire - return 80 wire cable type |
be0d18df AC |
2045 | * @ap: port |
2046 | * | |
2e41e8e6 | 2047 | * Helper method for drivers which want to hardwire 80 wire cable |
be0d18df AC |
2048 | * detection. |
2049 | */ | |
2050 | ||
2051 | int ata_cable_80wire(struct ata_port *ap) | |
2052 | { | |
2053 | return ATA_CBL_PATA80; | |
2054 | } | |
2055 | ||
2056 | /** | |
2057 | * ata_cable_unknown - return unknown PATA cable. | |
2058 | * @ap: port | |
2059 | * | |
2060 | * Helper method for drivers which have no PATA cable detection. | |
2061 | */ | |
2062 | ||
2063 | int ata_cable_unknown(struct ata_port *ap) | |
2064 | { | |
2065 | return ATA_CBL_PATA_UNK; | |
2066 | } | |
2067 | ||
2068 | /** | |
2069 | * ata_cable_sata - return SATA cable type | |
2070 | * @ap: port | |
2071 | * | |
2072 | * Helper method for drivers which have SATA cables | |
2073 | */ | |
2074 | ||
2075 | int ata_cable_sata(struct ata_port *ap) | |
2076 | { | |
2077 | return ATA_CBL_SATA; | |
2078 | } | |
2079 | ||
1da177e4 LT |
2080 | /** |
2081 | * ata_bus_probe - Reset and probe ATA bus | |
2082 | * @ap: Bus to probe | |
2083 | * | |
0cba632b JG |
2084 | * Master ATA bus probing function. Initiates a hardware-dependent |
2085 | * bus reset, then attempts to identify any devices found on | |
2086 | * the bus. | |
2087 | * | |
1da177e4 | 2088 | * LOCKING: |
0cba632b | 2089 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2090 | * |
2091 | * RETURNS: | |
96072e69 | 2092 | * Zero on success, negative errno otherwise. |
1da177e4 LT |
2093 | */ |
2094 | ||
80289167 | 2095 | int ata_bus_probe(struct ata_port *ap) |
1da177e4 | 2096 | { |
28ca5c57 | 2097 | unsigned int classes[ATA_MAX_DEVICES]; |
14d2bac1 | 2098 | int tries[ATA_MAX_DEVICES]; |
4ae72a1e | 2099 | int i, rc; |
e82cbdb9 | 2100 | struct ata_device *dev; |
1da177e4 | 2101 | |
28ca5c57 | 2102 | ata_port_probe(ap); |
c19ba8af | 2103 | |
14d2bac1 TH |
2104 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
2105 | tries[i] = ATA_PROBE_MAX_TRIES; | |
2106 | ||
2107 | retry: | |
2044470c | 2108 | /* reset and determine device classes */ |
52783c5d | 2109 | ap->ops->phy_reset(ap); |
2061a47a | 2110 | |
52783c5d TH |
2111 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2112 | dev = &ap->device[i]; | |
c19ba8af | 2113 | |
52783c5d TH |
2114 | if (!(ap->flags & ATA_FLAG_DISABLED) && |
2115 | dev->class != ATA_DEV_UNKNOWN) | |
2116 | classes[dev->devno] = dev->class; | |
2117 | else | |
2118 | classes[dev->devno] = ATA_DEV_NONE; | |
2044470c | 2119 | |
52783c5d | 2120 | dev->class = ATA_DEV_UNKNOWN; |
28ca5c57 | 2121 | } |
1da177e4 | 2122 | |
52783c5d | 2123 | ata_port_probe(ap); |
2044470c | 2124 | |
b6079ca4 AC |
2125 | /* after the reset the device state is PIO 0 and the controller |
2126 | state is undefined. Record the mode */ | |
2127 | ||
2128 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
2129 | ap->device[i].pio_mode = XFER_PIO_0; | |
2130 | ||
f31f0cc2 JG |
2131 | /* read IDENTIFY page and configure devices. We have to do the identify |
2132 | specific sequence bass-ackwards so that PDIAG- is released by | |
2133 | the slave device */ | |
2134 | ||
2135 | for (i = ATA_MAX_DEVICES - 1; i >= 0; i--) { | |
e82cbdb9 | 2136 | dev = &ap->device[i]; |
28ca5c57 | 2137 | |
ec573755 TH |
2138 | if (tries[i]) |
2139 | dev->class = classes[i]; | |
ffeae418 | 2140 | |
14d2bac1 | 2141 | if (!ata_dev_enabled(dev)) |
ffeae418 | 2142 | continue; |
ffeae418 | 2143 | |
bff04647 TH |
2144 | rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, |
2145 | dev->id); | |
14d2bac1 TH |
2146 | if (rc) |
2147 | goto fail; | |
f31f0cc2 JG |
2148 | } |
2149 | ||
be0d18df AC |
2150 | /* Now ask for the cable type as PDIAG- should have been released */ |
2151 | if (ap->ops->cable_detect) | |
2152 | ap->cbl = ap->ops->cable_detect(ap); | |
2153 | ||
f31f0cc2 JG |
2154 | /* After the identify sequence we can now set up the devices. We do |
2155 | this in the normal order so that the user doesn't get confused */ | |
2156 | ||
2157 | for(i = 0; i < ATA_MAX_DEVICES; i++) { | |
2158 | dev = &ap->device[i]; | |
2159 | if (!ata_dev_enabled(dev)) | |
2160 | continue; | |
14d2bac1 | 2161 | |
efdaedc4 TH |
2162 | ap->eh_context.i.flags |= ATA_EHI_PRINTINFO; |
2163 | rc = ata_dev_configure(dev); | |
2164 | ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO; | |
14d2bac1 TH |
2165 | if (rc) |
2166 | goto fail; | |
1da177e4 LT |
2167 | } |
2168 | ||
e82cbdb9 | 2169 | /* configure transfer mode */ |
3adcebb2 | 2170 | rc = ata_set_mode(ap, &dev); |
4ae72a1e | 2171 | if (rc) |
51713d35 | 2172 | goto fail; |
1da177e4 | 2173 | |
e82cbdb9 TH |
2174 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
2175 | if (ata_dev_enabled(&ap->device[i])) | |
2176 | return 0; | |
1da177e4 | 2177 | |
e82cbdb9 TH |
2178 | /* no device present, disable port */ |
2179 | ata_port_disable(ap); | |
1da177e4 | 2180 | ap->ops->port_disable(ap); |
96072e69 | 2181 | return -ENODEV; |
14d2bac1 TH |
2182 | |
2183 | fail: | |
4ae72a1e TH |
2184 | tries[dev->devno]--; |
2185 | ||
14d2bac1 TH |
2186 | switch (rc) { |
2187 | case -EINVAL: | |
4ae72a1e | 2188 | /* eeek, something went very wrong, give up */ |
14d2bac1 TH |
2189 | tries[dev->devno] = 0; |
2190 | break; | |
4ae72a1e TH |
2191 | |
2192 | case -ENODEV: | |
2193 | /* give it just one more chance */ | |
2194 | tries[dev->devno] = min(tries[dev->devno], 1); | |
14d2bac1 | 2195 | case -EIO: |
4ae72a1e TH |
2196 | if (tries[dev->devno] == 1) { |
2197 | /* This is the last chance, better to slow | |
2198 | * down than lose it. | |
2199 | */ | |
2200 | sata_down_spd_limit(ap); | |
2201 | ata_down_xfermask_limit(dev, ATA_DNXFER_PIO); | |
2202 | } | |
14d2bac1 TH |
2203 | } |
2204 | ||
4ae72a1e | 2205 | if (!tries[dev->devno]) |
3373efd8 | 2206 | ata_dev_disable(dev); |
ec573755 | 2207 | |
14d2bac1 | 2208 | goto retry; |
1da177e4 LT |
2209 | } |
2210 | ||
2211 | /** | |
0cba632b JG |
2212 | * ata_port_probe - Mark port as enabled |
2213 | * @ap: Port for which we indicate enablement | |
1da177e4 | 2214 | * |
0cba632b JG |
2215 | * Modify @ap data structure such that the system |
2216 | * thinks that the entire port is enabled. | |
2217 | * | |
cca3974e | 2218 | * LOCKING: host lock, or some other form of |
0cba632b | 2219 | * serialization. |
1da177e4 LT |
2220 | */ |
2221 | ||
2222 | void ata_port_probe(struct ata_port *ap) | |
2223 | { | |
198e0fed | 2224 | ap->flags &= ~ATA_FLAG_DISABLED; |
1da177e4 LT |
2225 | } |
2226 | ||
3be680b7 TH |
2227 | /** |
2228 | * sata_print_link_status - Print SATA link status | |
2229 | * @ap: SATA port to printk link status about | |
2230 | * | |
2231 | * This function prints link speed and status of a SATA link. | |
2232 | * | |
2233 | * LOCKING: | |
2234 | * None. | |
2235 | */ | |
43727fbc | 2236 | void sata_print_link_status(struct ata_port *ap) |
3be680b7 | 2237 | { |
6d5f9732 | 2238 | u32 sstatus, scontrol, tmp; |
3be680b7 | 2239 | |
81952c54 | 2240 | if (sata_scr_read(ap, SCR_STATUS, &sstatus)) |
3be680b7 | 2241 | return; |
81952c54 | 2242 | sata_scr_read(ap, SCR_CONTROL, &scontrol); |
3be680b7 | 2243 | |
81952c54 | 2244 | if (ata_port_online(ap)) { |
3be680b7 | 2245 | tmp = (sstatus >> 4) & 0xf; |
f15a1daf TH |
2246 | ata_port_printk(ap, KERN_INFO, |
2247 | "SATA link up %s (SStatus %X SControl %X)\n", | |
2248 | sata_spd_string(tmp), sstatus, scontrol); | |
3be680b7 | 2249 | } else { |
f15a1daf TH |
2250 | ata_port_printk(ap, KERN_INFO, |
2251 | "SATA link down (SStatus %X SControl %X)\n", | |
2252 | sstatus, scontrol); | |
3be680b7 TH |
2253 | } |
2254 | } | |
2255 | ||
1da177e4 | 2256 | /** |
780a87f7 JG |
2257 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
2258 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 2259 | * |
780a87f7 JG |
2260 | * This function issues commands to standard SATA Sxxx |
2261 | * PHY registers, to wake up the phy (and device), and | |
2262 | * clear any reset condition. | |
1da177e4 LT |
2263 | * |
2264 | * LOCKING: | |
0cba632b | 2265 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2266 | * |
2267 | */ | |
2268 | void __sata_phy_reset(struct ata_port *ap) | |
2269 | { | |
2270 | u32 sstatus; | |
2271 | unsigned long timeout = jiffies + (HZ * 5); | |
2272 | ||
2273 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e | 2274 | /* issue phy wake/reset */ |
81952c54 | 2275 | sata_scr_write_flush(ap, SCR_CONTROL, 0x301); |
62ba2841 TH |
2276 | /* Couldn't find anything in SATA I/II specs, but |
2277 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
2278 | mdelay(1); | |
1da177e4 | 2279 | } |
81952c54 TH |
2280 | /* phy wake/clear reset */ |
2281 | sata_scr_write_flush(ap, SCR_CONTROL, 0x300); | |
1da177e4 LT |
2282 | |
2283 | /* wait for phy to become ready, if necessary */ | |
2284 | do { | |
2285 | msleep(200); | |
81952c54 | 2286 | sata_scr_read(ap, SCR_STATUS, &sstatus); |
1da177e4 LT |
2287 | if ((sstatus & 0xf) != 1) |
2288 | break; | |
2289 | } while (time_before(jiffies, timeout)); | |
2290 | ||
3be680b7 TH |
2291 | /* print link status */ |
2292 | sata_print_link_status(ap); | |
656563e3 | 2293 | |
3be680b7 | 2294 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 2295 | if (!ata_port_offline(ap)) |
1da177e4 | 2296 | ata_port_probe(ap); |
3be680b7 | 2297 | else |
1da177e4 | 2298 | ata_port_disable(ap); |
1da177e4 | 2299 | |
198e0fed | 2300 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2301 | return; |
2302 | ||
2303 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
2304 | ata_port_disable(ap); | |
2305 | return; | |
2306 | } | |
2307 | ||
2308 | ap->cbl = ATA_CBL_SATA; | |
2309 | } | |
2310 | ||
2311 | /** | |
780a87f7 JG |
2312 | * sata_phy_reset - Reset SATA bus. |
2313 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 2314 | * |
780a87f7 JG |
2315 | * This function resets the SATA bus, and then probes |
2316 | * the bus for devices. | |
1da177e4 LT |
2317 | * |
2318 | * LOCKING: | |
0cba632b | 2319 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2320 | * |
2321 | */ | |
2322 | void sata_phy_reset(struct ata_port *ap) | |
2323 | { | |
2324 | __sata_phy_reset(ap); | |
198e0fed | 2325 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2326 | return; |
2327 | ata_bus_reset(ap); | |
2328 | } | |
2329 | ||
ebdfca6e AC |
2330 | /** |
2331 | * ata_dev_pair - return other device on cable | |
ebdfca6e AC |
2332 | * @adev: device |
2333 | * | |
2334 | * Obtain the other device on the same cable, or if none is | |
2335 | * present NULL is returned | |
2336 | */ | |
2e9edbf8 | 2337 | |
3373efd8 | 2338 | struct ata_device *ata_dev_pair(struct ata_device *adev) |
ebdfca6e | 2339 | { |
3373efd8 | 2340 | struct ata_port *ap = adev->ap; |
ebdfca6e | 2341 | struct ata_device *pair = &ap->device[1 - adev->devno]; |
e1211e3f | 2342 | if (!ata_dev_enabled(pair)) |
ebdfca6e AC |
2343 | return NULL; |
2344 | return pair; | |
2345 | } | |
2346 | ||
1da177e4 | 2347 | /** |
780a87f7 JG |
2348 | * ata_port_disable - Disable port. |
2349 | * @ap: Port to be disabled. | |
1da177e4 | 2350 | * |
780a87f7 JG |
2351 | * Modify @ap data structure such that the system |
2352 | * thinks that the entire port is disabled, and should | |
2353 | * never attempt to probe or communicate with devices | |
2354 | * on this port. | |
2355 | * | |
cca3974e | 2356 | * LOCKING: host lock, or some other form of |
780a87f7 | 2357 | * serialization. |
1da177e4 LT |
2358 | */ |
2359 | ||
2360 | void ata_port_disable(struct ata_port *ap) | |
2361 | { | |
2362 | ap->device[0].class = ATA_DEV_NONE; | |
2363 | ap->device[1].class = ATA_DEV_NONE; | |
198e0fed | 2364 | ap->flags |= ATA_FLAG_DISABLED; |
1da177e4 LT |
2365 | } |
2366 | ||
1c3fae4d | 2367 | /** |
3c567b7d | 2368 | * sata_down_spd_limit - adjust SATA spd limit downward |
1c3fae4d TH |
2369 | * @ap: Port to adjust SATA spd limit for |
2370 | * | |
2371 | * Adjust SATA spd limit of @ap downward. Note that this | |
2372 | * function only adjusts the limit. The change must be applied | |
3c567b7d | 2373 | * using sata_set_spd(). |
1c3fae4d TH |
2374 | * |
2375 | * LOCKING: | |
2376 | * Inherited from caller. | |
2377 | * | |
2378 | * RETURNS: | |
2379 | * 0 on success, negative errno on failure | |
2380 | */ | |
3c567b7d | 2381 | int sata_down_spd_limit(struct ata_port *ap) |
1c3fae4d | 2382 | { |
81952c54 TH |
2383 | u32 sstatus, spd, mask; |
2384 | int rc, highbit; | |
1c3fae4d | 2385 | |
81952c54 TH |
2386 | rc = sata_scr_read(ap, SCR_STATUS, &sstatus); |
2387 | if (rc) | |
2388 | return rc; | |
1c3fae4d TH |
2389 | |
2390 | mask = ap->sata_spd_limit; | |
2391 | if (mask <= 1) | |
2392 | return -EINVAL; | |
2393 | highbit = fls(mask) - 1; | |
2394 | mask &= ~(1 << highbit); | |
2395 | ||
81952c54 | 2396 | spd = (sstatus >> 4) & 0xf; |
1c3fae4d TH |
2397 | if (spd <= 1) |
2398 | return -EINVAL; | |
2399 | spd--; | |
2400 | mask &= (1 << spd) - 1; | |
2401 | if (!mask) | |
2402 | return -EINVAL; | |
2403 | ||
2404 | ap->sata_spd_limit = mask; | |
2405 | ||
f15a1daf TH |
2406 | ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", |
2407 | sata_spd_string(fls(mask))); | |
1c3fae4d TH |
2408 | |
2409 | return 0; | |
2410 | } | |
2411 | ||
3c567b7d | 2412 | static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) |
1c3fae4d TH |
2413 | { |
2414 | u32 spd, limit; | |
2415 | ||
2416 | if (ap->sata_spd_limit == UINT_MAX) | |
2417 | limit = 0; | |
2418 | else | |
2419 | limit = fls(ap->sata_spd_limit); | |
2420 | ||
2421 | spd = (*scontrol >> 4) & 0xf; | |
2422 | *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); | |
2423 | ||
2424 | return spd != limit; | |
2425 | } | |
2426 | ||
2427 | /** | |
3c567b7d | 2428 | * sata_set_spd_needed - is SATA spd configuration needed |
1c3fae4d TH |
2429 | * @ap: Port in question |
2430 | * | |
2431 | * Test whether the spd limit in SControl matches | |
2432 | * @ap->sata_spd_limit. This function is used to determine | |
2433 | * whether hardreset is necessary to apply SATA spd | |
2434 | * configuration. | |
2435 | * | |
2436 | * LOCKING: | |
2437 | * Inherited from caller. | |
2438 | * | |
2439 | * RETURNS: | |
2440 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
2441 | */ | |
3c567b7d | 2442 | int sata_set_spd_needed(struct ata_port *ap) |
1c3fae4d TH |
2443 | { |
2444 | u32 scontrol; | |
2445 | ||
81952c54 | 2446 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) |
1c3fae4d TH |
2447 | return 0; |
2448 | ||
3c567b7d | 2449 | return __sata_set_spd_needed(ap, &scontrol); |
1c3fae4d TH |
2450 | } |
2451 | ||
2452 | /** | |
3c567b7d | 2453 | * sata_set_spd - set SATA spd according to spd limit |
1c3fae4d TH |
2454 | * @ap: Port to set SATA spd for |
2455 | * | |
2456 | * Set SATA spd of @ap according to sata_spd_limit. | |
2457 | * | |
2458 | * LOCKING: | |
2459 | * Inherited from caller. | |
2460 | * | |
2461 | * RETURNS: | |
2462 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
81952c54 | 2463 | * changed. Negative errno if SCR registers are inaccessible. |
1c3fae4d | 2464 | */ |
3c567b7d | 2465 | int sata_set_spd(struct ata_port *ap) |
1c3fae4d TH |
2466 | { |
2467 | u32 scontrol; | |
81952c54 | 2468 | int rc; |
1c3fae4d | 2469 | |
81952c54 TH |
2470 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2471 | return rc; | |
1c3fae4d | 2472 | |
3c567b7d | 2473 | if (!__sata_set_spd_needed(ap, &scontrol)) |
1c3fae4d TH |
2474 | return 0; |
2475 | ||
81952c54 TH |
2476 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) |
2477 | return rc; | |
2478 | ||
1c3fae4d TH |
2479 | return 1; |
2480 | } | |
2481 | ||
452503f9 AC |
2482 | /* |
2483 | * This mode timing computation functionality is ported over from | |
2484 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
2485 | */ | |
2486 | /* | |
b352e57d | 2487 | * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). |
452503f9 | 2488 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except |
b352e57d AC |
2489 | * for UDMA6, which is currently supported only by Maxtor drives. |
2490 | * | |
2491 | * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. | |
452503f9 AC |
2492 | */ |
2493 | ||
2494 | static const struct ata_timing ata_timing[] = { | |
2495 | ||
2496 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
2497 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
2498 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
2499 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
2500 | ||
b352e57d AC |
2501 | { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, |
2502 | { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, | |
452503f9 AC |
2503 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, |
2504 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
2505 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
2506 | ||
2507 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2e9edbf8 | 2508 | |
452503f9 AC |
2509 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, |
2510 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
2511 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2e9edbf8 | 2512 | |
452503f9 AC |
2513 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, |
2514 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
2515 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
2516 | ||
b352e57d AC |
2517 | { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, |
2518 | { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, | |
452503f9 AC |
2519 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, |
2520 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
2521 | ||
2522 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
2523 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
2524 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
2525 | ||
2526 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
2527 | ||
2528 | { 0xFF } | |
2529 | }; | |
2530 | ||
2531 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
2532 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
2533 | ||
2534 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
2535 | { | |
2536 | q->setup = EZ(t->setup * 1000, T); | |
2537 | q->act8b = EZ(t->act8b * 1000, T); | |
2538 | q->rec8b = EZ(t->rec8b * 1000, T); | |
2539 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
2540 | q->active = EZ(t->active * 1000, T); | |
2541 | q->recover = EZ(t->recover * 1000, T); | |
2542 | q->cycle = EZ(t->cycle * 1000, T); | |
2543 | q->udma = EZ(t->udma * 1000, UT); | |
2544 | } | |
2545 | ||
2546 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
2547 | struct ata_timing *m, unsigned int what) | |
2548 | { | |
2549 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
2550 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
2551 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
2552 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
2553 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
2554 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
2555 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
2556 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
2557 | } | |
2558 | ||
2559 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
2560 | { | |
2561 | const struct ata_timing *t; | |
2562 | ||
2563 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 2564 | if (t->mode == 0xFF) |
452503f9 | 2565 | return NULL; |
2e9edbf8 | 2566 | return t; |
452503f9 AC |
2567 | } |
2568 | ||
2569 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
2570 | struct ata_timing *t, int T, int UT) | |
2571 | { | |
2572 | const struct ata_timing *s; | |
2573 | struct ata_timing p; | |
2574 | ||
2575 | /* | |
2e9edbf8 | 2576 | * Find the mode. |
75b1f2f8 | 2577 | */ |
452503f9 AC |
2578 | |
2579 | if (!(s = ata_timing_find_mode(speed))) | |
2580 | return -EINVAL; | |
2581 | ||
75b1f2f8 AL |
2582 | memcpy(t, s, sizeof(*s)); |
2583 | ||
452503f9 AC |
2584 | /* |
2585 | * If the drive is an EIDE drive, it can tell us it needs extended | |
2586 | * PIO/MW_DMA cycle timing. | |
2587 | */ | |
2588 | ||
2589 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
2590 | memset(&p, 0, sizeof(p)); | |
2591 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
2592 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
2593 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
2594 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
2595 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
2596 | } | |
2597 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
2598 | } | |
2599 | ||
2600 | /* | |
2601 | * Convert the timing to bus clock counts. | |
2602 | */ | |
2603 | ||
75b1f2f8 | 2604 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
2605 | |
2606 | /* | |
c893a3ae RD |
2607 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
2608 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
2609 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
2610 | */ |
2611 | ||
fd3367af | 2612 | if (speed > XFER_PIO_6) { |
452503f9 AC |
2613 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); |
2614 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
2615 | } | |
2616 | ||
2617 | /* | |
c893a3ae | 2618 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
2619 | */ |
2620 | ||
2621 | if (t->act8b + t->rec8b < t->cyc8b) { | |
2622 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
2623 | t->rec8b = t->cyc8b - t->act8b; | |
2624 | } | |
2625 | ||
2626 | if (t->active + t->recover < t->cycle) { | |
2627 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
2628 | t->recover = t->cycle - t->active; | |
2629 | } | |
a617c09f | 2630 | |
4f701d1e AC |
2631 | /* In a few cases quantisation may produce enough errors to |
2632 | leave t->cycle too low for the sum of active and recovery | |
2633 | if so we must correct this */ | |
2634 | if (t->active + t->recover > t->cycle) | |
2635 | t->cycle = t->active + t->recover; | |
452503f9 AC |
2636 | |
2637 | return 0; | |
2638 | } | |
2639 | ||
cf176e1a TH |
2640 | /** |
2641 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
cf176e1a | 2642 | * @dev: Device to adjust xfer masks |
458337db | 2643 | * @sel: ATA_DNXFER_* selector |
cf176e1a TH |
2644 | * |
2645 | * Adjust xfer masks of @dev downward. Note that this function | |
2646 | * does not apply the change. Invoking ata_set_mode() afterwards | |
2647 | * will apply the limit. | |
2648 | * | |
2649 | * LOCKING: | |
2650 | * Inherited from caller. | |
2651 | * | |
2652 | * RETURNS: | |
2653 | * 0 on success, negative errno on failure | |
2654 | */ | |
458337db | 2655 | int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) |
cf176e1a | 2656 | { |
458337db TH |
2657 | char buf[32]; |
2658 | unsigned int orig_mask, xfer_mask; | |
2659 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
2660 | int quiet, highbit; | |
cf176e1a | 2661 | |
458337db TH |
2662 | quiet = !!(sel & ATA_DNXFER_QUIET); |
2663 | sel &= ~ATA_DNXFER_QUIET; | |
cf176e1a | 2664 | |
458337db TH |
2665 | xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask, |
2666 | dev->mwdma_mask, | |
2667 | dev->udma_mask); | |
2668 | ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask); | |
cf176e1a | 2669 | |
458337db TH |
2670 | switch (sel) { |
2671 | case ATA_DNXFER_PIO: | |
2672 | highbit = fls(pio_mask) - 1; | |
2673 | pio_mask &= ~(1 << highbit); | |
2674 | break; | |
2675 | ||
2676 | case ATA_DNXFER_DMA: | |
2677 | if (udma_mask) { | |
2678 | highbit = fls(udma_mask) - 1; | |
2679 | udma_mask &= ~(1 << highbit); | |
2680 | if (!udma_mask) | |
2681 | return -ENOENT; | |
2682 | } else if (mwdma_mask) { | |
2683 | highbit = fls(mwdma_mask) - 1; | |
2684 | mwdma_mask &= ~(1 << highbit); | |
2685 | if (!mwdma_mask) | |
2686 | return -ENOENT; | |
2687 | } | |
2688 | break; | |
2689 | ||
2690 | case ATA_DNXFER_40C: | |
2691 | udma_mask &= ATA_UDMA_MASK_40C; | |
2692 | break; | |
2693 | ||
2694 | case ATA_DNXFER_FORCE_PIO0: | |
2695 | pio_mask &= 1; | |
2696 | case ATA_DNXFER_FORCE_PIO: | |
2697 | mwdma_mask = 0; | |
2698 | udma_mask = 0; | |
2699 | break; | |
2700 | ||
458337db TH |
2701 | default: |
2702 | BUG(); | |
2703 | } | |
2704 | ||
2705 | xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
2706 | ||
2707 | if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask) | |
2708 | return -ENOENT; | |
2709 | ||
2710 | if (!quiet) { | |
2711 | if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) | |
2712 | snprintf(buf, sizeof(buf), "%s:%s", | |
2713 | ata_mode_string(xfer_mask), | |
2714 | ata_mode_string(xfer_mask & ATA_MASK_PIO)); | |
2715 | else | |
2716 | snprintf(buf, sizeof(buf), "%s", | |
2717 | ata_mode_string(xfer_mask)); | |
2718 | ||
2719 | ata_dev_printk(dev, KERN_WARNING, | |
2720 | "limiting speed to %s\n", buf); | |
2721 | } | |
cf176e1a TH |
2722 | |
2723 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
2724 | &dev->udma_mask); | |
2725 | ||
cf176e1a | 2726 | return 0; |
cf176e1a TH |
2727 | } |
2728 | ||
3373efd8 | 2729 | static int ata_dev_set_mode(struct ata_device *dev) |
1da177e4 | 2730 | { |
baa1e78a | 2731 | struct ata_eh_context *ehc = &dev->ap->eh_context; |
83206a29 TH |
2732 | unsigned int err_mask; |
2733 | int rc; | |
1da177e4 | 2734 | |
e8384607 | 2735 | dev->flags &= ~ATA_DFLAG_PIO; |
1da177e4 LT |
2736 | if (dev->xfer_shift == ATA_SHIFT_PIO) |
2737 | dev->flags |= ATA_DFLAG_PIO; | |
2738 | ||
3373efd8 | 2739 | err_mask = ata_dev_set_xfermode(dev); |
11750a40 AC |
2740 | /* Old CFA may refuse this command, which is just fine */ |
2741 | if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) | |
2742 | err_mask &= ~AC_ERR_DEV; | |
2743 | ||
83206a29 | 2744 | if (err_mask) { |
f15a1daf TH |
2745 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " |
2746 | "(err_mask=0x%x)\n", err_mask); | |
83206a29 TH |
2747 | return -EIO; |
2748 | } | |
1da177e4 | 2749 | |
baa1e78a | 2750 | ehc->i.flags |= ATA_EHI_POST_SETMODE; |
3373efd8 | 2751 | rc = ata_dev_revalidate(dev, 0); |
baa1e78a | 2752 | ehc->i.flags &= ~ATA_EHI_POST_SETMODE; |
5eb45c02 | 2753 | if (rc) |
83206a29 | 2754 | return rc; |
48a8a14f | 2755 | |
23e71c3d TH |
2756 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
2757 | dev->xfer_shift, (int)dev->xfer_mode); | |
1da177e4 | 2758 | |
f15a1daf TH |
2759 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", |
2760 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
83206a29 | 2761 | return 0; |
1da177e4 LT |
2762 | } |
2763 | ||
1da177e4 | 2764 | /** |
04351821 | 2765 | * ata_do_set_mode - Program timings and issue SET FEATURES - XFER |
1da177e4 | 2766 | * @ap: port on which timings will be programmed |
e82cbdb9 | 2767 | * @r_failed_dev: out paramter for failed device |
1da177e4 | 2768 | * |
04351821 AC |
2769 | * Standard implementation of the function used to tune and set |
2770 | * ATA device disk transfer mode (PIO3, UDMA6, etc.). If | |
2771 | * ata_dev_set_mode() fails, pointer to the failing device is | |
e82cbdb9 | 2772 | * returned in @r_failed_dev. |
780a87f7 | 2773 | * |
1da177e4 | 2774 | * LOCKING: |
0cba632b | 2775 | * PCI/etc. bus probe sem. |
e82cbdb9 TH |
2776 | * |
2777 | * RETURNS: | |
2778 | * 0 on success, negative errno otherwise | |
1da177e4 | 2779 | */ |
04351821 AC |
2780 | |
2781 | int ata_do_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) | |
1da177e4 | 2782 | { |
e8e0619f | 2783 | struct ata_device *dev; |
e82cbdb9 | 2784 | int i, rc = 0, used_dma = 0, found = 0; |
1da177e4 | 2785 | |
3adcebb2 | 2786 | |
a6d5a51c TH |
2787 | /* step 1: calculate xfer_mask */ |
2788 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
acf356b1 | 2789 | unsigned int pio_mask, dma_mask; |
a6d5a51c | 2790 | |
e8e0619f TH |
2791 | dev = &ap->device[i]; |
2792 | ||
e1211e3f | 2793 | if (!ata_dev_enabled(dev)) |
a6d5a51c TH |
2794 | continue; |
2795 | ||
3373efd8 | 2796 | ata_dev_xfermask(dev); |
1da177e4 | 2797 | |
acf356b1 TH |
2798 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); |
2799 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
2800 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); | |
2801 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
5444a6f4 | 2802 | |
4f65977d | 2803 | found = 1; |
5444a6f4 AC |
2804 | if (dev->dma_mode) |
2805 | used_dma = 1; | |
a6d5a51c | 2806 | } |
4f65977d | 2807 | if (!found) |
e82cbdb9 | 2808 | goto out; |
a6d5a51c TH |
2809 | |
2810 | /* step 2: always set host PIO timings */ | |
e8e0619f TH |
2811 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2812 | dev = &ap->device[i]; | |
2813 | if (!ata_dev_enabled(dev)) | |
2814 | continue; | |
2815 | ||
2816 | if (!dev->pio_mode) { | |
f15a1daf | 2817 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); |
e8e0619f | 2818 | rc = -EINVAL; |
e82cbdb9 | 2819 | goto out; |
e8e0619f TH |
2820 | } |
2821 | ||
2822 | dev->xfer_mode = dev->pio_mode; | |
2823 | dev->xfer_shift = ATA_SHIFT_PIO; | |
2824 | if (ap->ops->set_piomode) | |
2825 | ap->ops->set_piomode(ap, dev); | |
2826 | } | |
1da177e4 | 2827 | |
a6d5a51c | 2828 | /* step 3: set host DMA timings */ |
e8e0619f TH |
2829 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2830 | dev = &ap->device[i]; | |
2831 | ||
2832 | if (!ata_dev_enabled(dev) || !dev->dma_mode) | |
2833 | continue; | |
2834 | ||
2835 | dev->xfer_mode = dev->dma_mode; | |
2836 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
2837 | if (ap->ops->set_dmamode) | |
2838 | ap->ops->set_dmamode(ap, dev); | |
2839 | } | |
1da177e4 LT |
2840 | |
2841 | /* step 4: update devices' xfer mode */ | |
83206a29 | 2842 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e8e0619f | 2843 | dev = &ap->device[i]; |
1da177e4 | 2844 | |
18d90deb | 2845 | /* don't update suspended devices' xfer mode */ |
9666f400 | 2846 | if (!ata_dev_enabled(dev)) |
83206a29 TH |
2847 | continue; |
2848 | ||
3373efd8 | 2849 | rc = ata_dev_set_mode(dev); |
5bbc53f4 | 2850 | if (rc) |
e82cbdb9 | 2851 | goto out; |
83206a29 | 2852 | } |
1da177e4 | 2853 | |
e8e0619f TH |
2854 | /* Record simplex status. If we selected DMA then the other |
2855 | * host channels are not permitted to do so. | |
5444a6f4 | 2856 | */ |
cca3974e | 2857 | if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) |
032af1ce | 2858 | ap->host->simplex_claimed = ap; |
5444a6f4 | 2859 | |
e82cbdb9 TH |
2860 | out: |
2861 | if (rc) | |
2862 | *r_failed_dev = dev; | |
2863 | return rc; | |
1da177e4 LT |
2864 | } |
2865 | ||
04351821 AC |
2866 | /** |
2867 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
2868 | * @ap: port on which timings will be programmed | |
2869 | * @r_failed_dev: out paramter for failed device | |
2870 | * | |
2871 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If | |
2872 | * ata_set_mode() fails, pointer to the failing device is | |
2873 | * returned in @r_failed_dev. | |
2874 | * | |
2875 | * LOCKING: | |
2876 | * PCI/etc. bus probe sem. | |
2877 | * | |
2878 | * RETURNS: | |
2879 | * 0 on success, negative errno otherwise | |
2880 | */ | |
2881 | int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) | |
2882 | { | |
2883 | /* has private set_mode? */ | |
2884 | if (ap->ops->set_mode) | |
2885 | return ap->ops->set_mode(ap, r_failed_dev); | |
2886 | return ata_do_set_mode(ap, r_failed_dev); | |
2887 | } | |
2888 | ||
1fdffbce JG |
2889 | /** |
2890 | * ata_tf_to_host - issue ATA taskfile to host controller | |
2891 | * @ap: port to which command is being issued | |
2892 | * @tf: ATA taskfile register set | |
2893 | * | |
2894 | * Issues ATA taskfile register set to ATA host controller, | |
2895 | * with proper synchronization with interrupt handler and | |
2896 | * other threads. | |
2897 | * | |
2898 | * LOCKING: | |
cca3974e | 2899 | * spin_lock_irqsave(host lock) |
1fdffbce JG |
2900 | */ |
2901 | ||
2902 | static inline void ata_tf_to_host(struct ata_port *ap, | |
2903 | const struct ata_taskfile *tf) | |
2904 | { | |
2905 | ap->ops->tf_load(ap, tf); | |
2906 | ap->ops->exec_command(ap, tf); | |
2907 | } | |
2908 | ||
1da177e4 LT |
2909 | /** |
2910 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
2911 | * @ap: port containing status register to be polled | |
2912 | * @tmout_pat: impatience timeout | |
2913 | * @tmout: overall timeout | |
2914 | * | |
780a87f7 JG |
2915 | * Sleep until ATA Status register bit BSY clears, |
2916 | * or a timeout occurs. | |
2917 | * | |
d1adc1bb TH |
2918 | * LOCKING: |
2919 | * Kernel thread context (may sleep). | |
2920 | * | |
2921 | * RETURNS: | |
2922 | * 0 on success, -errno otherwise. | |
1da177e4 | 2923 | */ |
d1adc1bb TH |
2924 | int ata_busy_sleep(struct ata_port *ap, |
2925 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
2926 | { |
2927 | unsigned long timer_start, timeout; | |
2928 | u8 status; | |
2929 | ||
2930 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
2931 | timer_start = jiffies; | |
2932 | timeout = timer_start + tmout_pat; | |
d1adc1bb TH |
2933 | while (status != 0xff && (status & ATA_BUSY) && |
2934 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
2935 | msleep(50); |
2936 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
2937 | } | |
2938 | ||
d1adc1bb | 2939 | if (status != 0xff && (status & ATA_BUSY)) |
f15a1daf | 2940 | ata_port_printk(ap, KERN_WARNING, |
35aa7a43 JG |
2941 | "port is slow to respond, please be patient " |
2942 | "(Status 0x%x)\n", status); | |
1da177e4 LT |
2943 | |
2944 | timeout = timer_start + tmout; | |
d1adc1bb TH |
2945 | while (status != 0xff && (status & ATA_BUSY) && |
2946 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
2947 | msleep(50); |
2948 | status = ata_chk_status(ap); | |
2949 | } | |
2950 | ||
d1adc1bb TH |
2951 | if (status == 0xff) |
2952 | return -ENODEV; | |
2953 | ||
1da177e4 | 2954 | if (status & ATA_BUSY) { |
f15a1daf | 2955 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
35aa7a43 JG |
2956 | "(%lu secs, Status 0x%x)\n", |
2957 | tmout / HZ, status); | |
d1adc1bb | 2958 | return -EBUSY; |
1da177e4 LT |
2959 | } |
2960 | ||
2961 | return 0; | |
2962 | } | |
2963 | ||
d4b2bab4 TH |
2964 | /** |
2965 | * ata_wait_ready - sleep until BSY clears, or timeout | |
2966 | * @ap: port containing status register to be polled | |
2967 | * @deadline: deadline jiffies for the operation | |
2968 | * | |
2969 | * Sleep until ATA Status register bit BSY clears, or timeout | |
2970 | * occurs. | |
2971 | * | |
2972 | * LOCKING: | |
2973 | * Kernel thread context (may sleep). | |
2974 | * | |
2975 | * RETURNS: | |
2976 | * 0 on success, -errno otherwise. | |
2977 | */ | |
2978 | int ata_wait_ready(struct ata_port *ap, unsigned long deadline) | |
2979 | { | |
2980 | unsigned long start = jiffies; | |
2981 | int warned = 0; | |
2982 | ||
2983 | while (1) { | |
2984 | u8 status = ata_chk_status(ap); | |
2985 | unsigned long now = jiffies; | |
2986 | ||
2987 | if (!(status & ATA_BUSY)) | |
2988 | return 0; | |
fd7fe701 | 2989 | if (!ata_port_online(ap) && status == 0xff) |
d4b2bab4 TH |
2990 | return -ENODEV; |
2991 | if (time_after(now, deadline)) | |
2992 | return -EBUSY; | |
2993 | ||
2994 | if (!warned && time_after(now, start + 5 * HZ) && | |
2995 | (deadline - now > 3 * HZ)) { | |
2996 | ata_port_printk(ap, KERN_WARNING, | |
2997 | "port is slow to respond, please be patient " | |
2998 | "(Status 0x%x)\n", status); | |
2999 | warned = 1; | |
3000 | } | |
3001 | ||
3002 | msleep(50); | |
3003 | } | |
3004 | } | |
3005 | ||
3006 | static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, | |
3007 | unsigned long deadline) | |
1da177e4 LT |
3008 | { |
3009 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
3010 | unsigned int dev0 = devmask & (1 << 0); | |
3011 | unsigned int dev1 = devmask & (1 << 1); | |
9b89391c | 3012 | int rc, ret = 0; |
1da177e4 LT |
3013 | |
3014 | /* if device 0 was found in ata_devchk, wait for its | |
3015 | * BSY bit to clear | |
3016 | */ | |
d4b2bab4 TH |
3017 | if (dev0) { |
3018 | rc = ata_wait_ready(ap, deadline); | |
9b89391c TH |
3019 | if (rc) { |
3020 | if (rc != -ENODEV) | |
3021 | return rc; | |
3022 | ret = rc; | |
3023 | } | |
d4b2bab4 | 3024 | } |
1da177e4 | 3025 | |
e141d999 TH |
3026 | /* if device 1 was found in ata_devchk, wait for register |
3027 | * access briefly, then wait for BSY to clear. | |
1da177e4 | 3028 | */ |
e141d999 TH |
3029 | if (dev1) { |
3030 | int i; | |
1da177e4 LT |
3031 | |
3032 | ap->ops->dev_select(ap, 1); | |
e141d999 TH |
3033 | |
3034 | /* Wait for register access. Some ATAPI devices fail | |
3035 | * to set nsect/lbal after reset, so don't waste too | |
3036 | * much time on it. We're gonna wait for !BSY anyway. | |
3037 | */ | |
3038 | for (i = 0; i < 2; i++) { | |
3039 | u8 nsect, lbal; | |
3040 | ||
3041 | nsect = ioread8(ioaddr->nsect_addr); | |
3042 | lbal = ioread8(ioaddr->lbal_addr); | |
3043 | if ((nsect == 1) && (lbal == 1)) | |
3044 | break; | |
3045 | msleep(50); /* give drive a breather */ | |
3046 | } | |
3047 | ||
d4b2bab4 | 3048 | rc = ata_wait_ready(ap, deadline); |
9b89391c TH |
3049 | if (rc) { |
3050 | if (rc != -ENODEV) | |
3051 | return rc; | |
3052 | ret = rc; | |
3053 | } | |
d4b2bab4 | 3054 | } |
1da177e4 LT |
3055 | |
3056 | /* is all this really necessary? */ | |
3057 | ap->ops->dev_select(ap, 0); | |
3058 | if (dev1) | |
3059 | ap->ops->dev_select(ap, 1); | |
3060 | if (dev0) | |
3061 | ap->ops->dev_select(ap, 0); | |
d4b2bab4 | 3062 | |
9b89391c | 3063 | return ret; |
1da177e4 LT |
3064 | } |
3065 | ||
d4b2bab4 TH |
3066 | static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, |
3067 | unsigned long deadline) | |
1da177e4 LT |
3068 | { |
3069 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
3070 | ||
44877b4e | 3071 | DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); |
1da177e4 LT |
3072 | |
3073 | /* software reset. causes dev0 to be selected */ | |
0d5ff566 TH |
3074 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
3075 | udelay(20); /* FIXME: flush */ | |
3076 | iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
3077 | udelay(20); /* FIXME: flush */ | |
3078 | iowrite8(ap->ctl, ioaddr->ctl_addr); | |
1da177e4 LT |
3079 | |
3080 | /* spec mandates ">= 2ms" before checking status. | |
3081 | * We wait 150ms, because that was the magic delay used for | |
3082 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
3083 | * between when the ATA command register is written, and then | |
3084 | * status is checked. Because waiting for "a while" before | |
3085 | * checking status is fine, post SRST, we perform this magic | |
3086 | * delay here as well. | |
09c7ad79 AC |
3087 | * |
3088 | * Old drivers/ide uses the 2mS rule and then waits for ready | |
1da177e4 LT |
3089 | */ |
3090 | msleep(150); | |
3091 | ||
2e9edbf8 | 3092 | /* Before we perform post reset processing we want to see if |
298a41ca TH |
3093 | * the bus shows 0xFF because the odd clown forgets the D7 |
3094 | * pulldown resistor. | |
3095 | */ | |
d1adc1bb | 3096 | if (ata_check_status(ap) == 0xFF) |
9b89391c | 3097 | return -ENODEV; |
09c7ad79 | 3098 | |
d4b2bab4 | 3099 | return ata_bus_post_reset(ap, devmask, deadline); |
1da177e4 LT |
3100 | } |
3101 | ||
3102 | /** | |
3103 | * ata_bus_reset - reset host port and associated ATA channel | |
3104 | * @ap: port to reset | |
3105 | * | |
3106 | * This is typically the first time we actually start issuing | |
3107 | * commands to the ATA channel. We wait for BSY to clear, then | |
3108 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
3109 | * result. Determine what devices, if any, are on the channel | |
3110 | * by looking at the device 0/1 error register. Look at the signature | |
3111 | * stored in each device's taskfile registers, to determine if | |
3112 | * the device is ATA or ATAPI. | |
3113 | * | |
3114 | * LOCKING: | |
0cba632b | 3115 | * PCI/etc. bus probe sem. |
cca3974e | 3116 | * Obtains host lock. |
1da177e4 LT |
3117 | * |
3118 | * SIDE EFFECTS: | |
198e0fed | 3119 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
1da177e4 LT |
3120 | */ |
3121 | ||
3122 | void ata_bus_reset(struct ata_port *ap) | |
3123 | { | |
3124 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
3125 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
3126 | u8 err; | |
aec5c3c1 | 3127 | unsigned int dev0, dev1 = 0, devmask = 0; |
9b89391c | 3128 | int rc; |
1da177e4 | 3129 | |
44877b4e | 3130 | DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); |
1da177e4 LT |
3131 | |
3132 | /* determine if device 0/1 are present */ | |
3133 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
3134 | dev0 = 1; | |
3135 | else { | |
3136 | dev0 = ata_devchk(ap, 0); | |
3137 | if (slave_possible) | |
3138 | dev1 = ata_devchk(ap, 1); | |
3139 | } | |
3140 | ||
3141 | if (dev0) | |
3142 | devmask |= (1 << 0); | |
3143 | if (dev1) | |
3144 | devmask |= (1 << 1); | |
3145 | ||
3146 | /* select device 0 again */ | |
3147 | ap->ops->dev_select(ap, 0); | |
3148 | ||
3149 | /* issue bus reset */ | |
9b89391c TH |
3150 | if (ap->flags & ATA_FLAG_SRST) { |
3151 | rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); | |
3152 | if (rc && rc != -ENODEV) | |
aec5c3c1 | 3153 | goto err_out; |
9b89391c | 3154 | } |
1da177e4 LT |
3155 | |
3156 | /* | |
3157 | * determine by signature whether we have ATA or ATAPI devices | |
3158 | */ | |
b4dc7623 | 3159 | ap->device[0].class = ata_dev_try_classify(ap, 0, &err); |
1da177e4 | 3160 | if ((slave_possible) && (err != 0x81)) |
b4dc7623 | 3161 | ap->device[1].class = ata_dev_try_classify(ap, 1, &err); |
1da177e4 LT |
3162 | |
3163 | /* re-enable interrupts */ | |
83625006 | 3164 | ap->ops->irq_on(ap); |
1da177e4 LT |
3165 | |
3166 | /* is double-select really necessary? */ | |
3167 | if (ap->device[1].class != ATA_DEV_NONE) | |
3168 | ap->ops->dev_select(ap, 1); | |
3169 | if (ap->device[0].class != ATA_DEV_NONE) | |
3170 | ap->ops->dev_select(ap, 0); | |
3171 | ||
3172 | /* if no devices were detected, disable this port */ | |
3173 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
3174 | (ap->device[1].class == ATA_DEV_NONE)) | |
3175 | goto err_out; | |
3176 | ||
3177 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
3178 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
0d5ff566 | 3179 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
1da177e4 LT |
3180 | } |
3181 | ||
3182 | DPRINTK("EXIT\n"); | |
3183 | return; | |
3184 | ||
3185 | err_out: | |
f15a1daf | 3186 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
1da177e4 LT |
3187 | ap->ops->port_disable(ap); |
3188 | ||
3189 | DPRINTK("EXIT\n"); | |
3190 | } | |
3191 | ||
d7bb4cc7 TH |
3192 | /** |
3193 | * sata_phy_debounce - debounce SATA phy status | |
3194 | * @ap: ATA port to debounce SATA phy status for | |
3195 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
d4b2bab4 | 3196 | * @deadline: deadline jiffies for the operation |
d7bb4cc7 TH |
3197 | * |
3198 | * Make sure SStatus of @ap reaches stable state, determined by | |
3199 | * holding the same value where DET is not 1 for @duration polled | |
3200 | * every @interval, before @timeout. Timeout constraints the | |
d4b2bab4 TH |
3201 | * beginning of the stable state. Because DET gets stuck at 1 on |
3202 | * some controllers after hot unplugging, this functions waits | |
d7bb4cc7 TH |
3203 | * until timeout then returns 0 if DET is stable at 1. |
3204 | * | |
d4b2bab4 TH |
3205 | * @timeout is further limited by @deadline. The sooner of the |
3206 | * two is used. | |
3207 | * | |
d7bb4cc7 TH |
3208 | * LOCKING: |
3209 | * Kernel thread context (may sleep) | |
3210 | * | |
3211 | * RETURNS: | |
3212 | * 0 on success, -errno on failure. | |
3213 | */ | |
d4b2bab4 TH |
3214 | int sata_phy_debounce(struct ata_port *ap, const unsigned long *params, |
3215 | unsigned long deadline) | |
7a7921e8 | 3216 | { |
d7bb4cc7 | 3217 | unsigned long interval_msec = params[0]; |
d4b2bab4 TH |
3218 | unsigned long duration = msecs_to_jiffies(params[1]); |
3219 | unsigned long last_jiffies, t; | |
d7bb4cc7 TH |
3220 | u32 last, cur; |
3221 | int rc; | |
3222 | ||
d4b2bab4 TH |
3223 | t = jiffies + msecs_to_jiffies(params[2]); |
3224 | if (time_before(t, deadline)) | |
3225 | deadline = t; | |
3226 | ||
d7bb4cc7 TH |
3227 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) |
3228 | return rc; | |
3229 | cur &= 0xf; | |
3230 | ||
3231 | last = cur; | |
3232 | last_jiffies = jiffies; | |
3233 | ||
3234 | while (1) { | |
3235 | msleep(interval_msec); | |
3236 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
3237 | return rc; | |
3238 | cur &= 0xf; | |
3239 | ||
3240 | /* DET stable? */ | |
3241 | if (cur == last) { | |
d4b2bab4 | 3242 | if (cur == 1 && time_before(jiffies, deadline)) |
d7bb4cc7 TH |
3243 | continue; |
3244 | if (time_after(jiffies, last_jiffies + duration)) | |
3245 | return 0; | |
3246 | continue; | |
3247 | } | |
3248 | ||
3249 | /* unstable, start over */ | |
3250 | last = cur; | |
3251 | last_jiffies = jiffies; | |
3252 | ||
d4b2bab4 TH |
3253 | /* check deadline */ |
3254 | if (time_after(jiffies, deadline)) | |
d7bb4cc7 TH |
3255 | return -EBUSY; |
3256 | } | |
3257 | } | |
3258 | ||
3259 | /** | |
3260 | * sata_phy_resume - resume SATA phy | |
3261 | * @ap: ATA port to resume SATA phy for | |
3262 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
d4b2bab4 | 3263 | * @deadline: deadline jiffies for the operation |
d7bb4cc7 TH |
3264 | * |
3265 | * Resume SATA phy of @ap and debounce it. | |
3266 | * | |
3267 | * LOCKING: | |
3268 | * Kernel thread context (may sleep) | |
3269 | * | |
3270 | * RETURNS: | |
3271 | * 0 on success, -errno on failure. | |
3272 | */ | |
d4b2bab4 TH |
3273 | int sata_phy_resume(struct ata_port *ap, const unsigned long *params, |
3274 | unsigned long deadline) | |
d7bb4cc7 TH |
3275 | { |
3276 | u32 scontrol; | |
81952c54 TH |
3277 | int rc; |
3278 | ||
3279 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
3280 | return rc; | |
7a7921e8 | 3281 | |
852ee16a | 3282 | scontrol = (scontrol & 0x0f0) | 0x300; |
81952c54 TH |
3283 | |
3284 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
3285 | return rc; | |
7a7921e8 | 3286 | |
d7bb4cc7 TH |
3287 | /* Some PHYs react badly if SStatus is pounded immediately |
3288 | * after resuming. Delay 200ms before debouncing. | |
3289 | */ | |
3290 | msleep(200); | |
7a7921e8 | 3291 | |
d4b2bab4 | 3292 | return sata_phy_debounce(ap, params, deadline); |
7a7921e8 TH |
3293 | } |
3294 | ||
f5914a46 TH |
3295 | /** |
3296 | * ata_std_prereset - prepare for reset | |
3297 | * @ap: ATA port to be reset | |
d4b2bab4 | 3298 | * @deadline: deadline jiffies for the operation |
f5914a46 | 3299 | * |
b8cffc6a TH |
3300 | * @ap is about to be reset. Initialize it. Failure from |
3301 | * prereset makes libata abort whole reset sequence and give up | |
3302 | * that port, so prereset should be best-effort. It does its | |
3303 | * best to prepare for reset sequence but if things go wrong, it | |
3304 | * should just whine, not fail. | |
f5914a46 TH |
3305 | * |
3306 | * LOCKING: | |
3307 | * Kernel thread context (may sleep) | |
3308 | * | |
3309 | * RETURNS: | |
3310 | * 0 on success, -errno otherwise. | |
3311 | */ | |
d4b2bab4 | 3312 | int ata_std_prereset(struct ata_port *ap, unsigned long deadline) |
f5914a46 TH |
3313 | { |
3314 | struct ata_eh_context *ehc = &ap->eh_context; | |
e9c83914 | 3315 | const unsigned long *timing = sata_ehc_deb_timing(ehc); |
f5914a46 TH |
3316 | int rc; |
3317 | ||
31daabda | 3318 | /* handle link resume */ |
28324304 TH |
3319 | if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && |
3320 | (ap->flags & ATA_FLAG_HRST_TO_RESUME)) | |
3321 | ehc->i.action |= ATA_EH_HARDRESET; | |
3322 | ||
f5914a46 TH |
3323 | /* if we're about to do hardreset, nothing more to do */ |
3324 | if (ehc->i.action & ATA_EH_HARDRESET) | |
3325 | return 0; | |
3326 | ||
3327 | /* if SATA, resume phy */ | |
a16abc0b | 3328 | if (ap->flags & ATA_FLAG_SATA) { |
d4b2bab4 | 3329 | rc = sata_phy_resume(ap, timing, deadline); |
b8cffc6a TH |
3330 | /* whine about phy resume failure but proceed */ |
3331 | if (rc && rc != -EOPNOTSUPP) | |
f5914a46 TH |
3332 | ata_port_printk(ap, KERN_WARNING, "failed to resume " |
3333 | "link for reset (errno=%d)\n", rc); | |
f5914a46 TH |
3334 | } |
3335 | ||
3336 | /* Wait for !BSY if the controller can wait for the first D2H | |
3337 | * Reg FIS and we don't know that no device is attached. | |
3338 | */ | |
b8cffc6a TH |
3339 | if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) { |
3340 | rc = ata_wait_ready(ap, deadline); | |
6dffaf61 | 3341 | if (rc && rc != -ENODEV) { |
b8cffc6a TH |
3342 | ata_port_printk(ap, KERN_WARNING, "device not ready " |
3343 | "(errno=%d), forcing hardreset\n", rc); | |
3344 | ehc->i.action |= ATA_EH_HARDRESET; | |
3345 | } | |
3346 | } | |
f5914a46 TH |
3347 | |
3348 | return 0; | |
3349 | } | |
3350 | ||
c2bd5804 TH |
3351 | /** |
3352 | * ata_std_softreset - reset host port via ATA SRST | |
3353 | * @ap: port to reset | |
c2bd5804 | 3354 | * @classes: resulting classes of attached devices |
d4b2bab4 | 3355 | * @deadline: deadline jiffies for the operation |
c2bd5804 | 3356 | * |
52783c5d | 3357 | * Reset host port using ATA SRST. |
c2bd5804 TH |
3358 | * |
3359 | * LOCKING: | |
3360 | * Kernel thread context (may sleep) | |
3361 | * | |
3362 | * RETURNS: | |
3363 | * 0 on success, -errno otherwise. | |
3364 | */ | |
d4b2bab4 TH |
3365 | int ata_std_softreset(struct ata_port *ap, unsigned int *classes, |
3366 | unsigned long deadline) | |
c2bd5804 TH |
3367 | { |
3368 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
d4b2bab4 TH |
3369 | unsigned int devmask = 0; |
3370 | int rc; | |
c2bd5804 TH |
3371 | u8 err; |
3372 | ||
3373 | DPRINTK("ENTER\n"); | |
3374 | ||
81952c54 | 3375 | if (ata_port_offline(ap)) { |
3a39746a TH |
3376 | classes[0] = ATA_DEV_NONE; |
3377 | goto out; | |
3378 | } | |
3379 | ||
c2bd5804 TH |
3380 | /* determine if device 0/1 are present */ |
3381 | if (ata_devchk(ap, 0)) | |
3382 | devmask |= (1 << 0); | |
3383 | if (slave_possible && ata_devchk(ap, 1)) | |
3384 | devmask |= (1 << 1); | |
3385 | ||
c2bd5804 TH |
3386 | /* select device 0 again */ |
3387 | ap->ops->dev_select(ap, 0); | |
3388 | ||
3389 | /* issue bus reset */ | |
3390 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
d4b2bab4 | 3391 | rc = ata_bus_softreset(ap, devmask, deadline); |
9b89391c TH |
3392 | /* if link is occupied, -ENODEV too is an error */ |
3393 | if (rc && (rc != -ENODEV || sata_scr_valid(ap))) { | |
d4b2bab4 TH |
3394 | ata_port_printk(ap, KERN_ERR, "SRST failed (errno=%d)\n", rc); |
3395 | return rc; | |
c2bd5804 TH |
3396 | } |
3397 | ||
3398 | /* determine by signature whether we have ATA or ATAPI devices */ | |
3399 | classes[0] = ata_dev_try_classify(ap, 0, &err); | |
3400 | if (slave_possible && err != 0x81) | |
3401 | classes[1] = ata_dev_try_classify(ap, 1, &err); | |
3402 | ||
3a39746a | 3403 | out: |
c2bd5804 TH |
3404 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
3405 | return 0; | |
3406 | } | |
3407 | ||
3408 | /** | |
b6103f6d | 3409 | * sata_port_hardreset - reset port via SATA phy reset |
c2bd5804 | 3410 | * @ap: port to reset |
b6103f6d | 3411 | * @timing: timing parameters { interval, duratinon, timeout } in msec |
d4b2bab4 | 3412 | * @deadline: deadline jiffies for the operation |
c2bd5804 TH |
3413 | * |
3414 | * SATA phy-reset host port using DET bits of SControl register. | |
c2bd5804 TH |
3415 | * |
3416 | * LOCKING: | |
3417 | * Kernel thread context (may sleep) | |
3418 | * | |
3419 | * RETURNS: | |
3420 | * 0 on success, -errno otherwise. | |
3421 | */ | |
d4b2bab4 TH |
3422 | int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing, |
3423 | unsigned long deadline) | |
c2bd5804 | 3424 | { |
852ee16a | 3425 | u32 scontrol; |
81952c54 | 3426 | int rc; |
852ee16a | 3427 | |
c2bd5804 TH |
3428 | DPRINTK("ENTER\n"); |
3429 | ||
3c567b7d | 3430 | if (sata_set_spd_needed(ap)) { |
1c3fae4d TH |
3431 | /* SATA spec says nothing about how to reconfigure |
3432 | * spd. To be on the safe side, turn off phy during | |
3433 | * reconfiguration. This works for at least ICH7 AHCI | |
3434 | * and Sil3124. | |
3435 | */ | |
81952c54 | 3436 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
b6103f6d | 3437 | goto out; |
81952c54 | 3438 | |
a34b6fc0 | 3439 | scontrol = (scontrol & 0x0f0) | 0x304; |
81952c54 TH |
3440 | |
3441 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
b6103f6d | 3442 | goto out; |
1c3fae4d | 3443 | |
3c567b7d | 3444 | sata_set_spd(ap); |
1c3fae4d TH |
3445 | } |
3446 | ||
3447 | /* issue phy wake/reset */ | |
81952c54 | 3448 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
b6103f6d | 3449 | goto out; |
81952c54 | 3450 | |
852ee16a | 3451 | scontrol = (scontrol & 0x0f0) | 0x301; |
81952c54 TH |
3452 | |
3453 | if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) | |
b6103f6d | 3454 | goto out; |
c2bd5804 | 3455 | |
1c3fae4d | 3456 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
c2bd5804 TH |
3457 | * 10.4.2 says at least 1 ms. |
3458 | */ | |
3459 | msleep(1); | |
3460 | ||
1c3fae4d | 3461 | /* bring phy back */ |
d4b2bab4 | 3462 | rc = sata_phy_resume(ap, timing, deadline); |
b6103f6d TH |
3463 | out: |
3464 | DPRINTK("EXIT, rc=%d\n", rc); | |
3465 | return rc; | |
3466 | } | |
3467 | ||
3468 | /** | |
3469 | * sata_std_hardreset - reset host port via SATA phy reset | |
3470 | * @ap: port to reset | |
3471 | * @class: resulting class of attached device | |
d4b2bab4 | 3472 | * @deadline: deadline jiffies for the operation |
b6103f6d TH |
3473 | * |
3474 | * SATA phy-reset host port using DET bits of SControl register, | |
3475 | * wait for !BSY and classify the attached device. | |
3476 | * | |
3477 | * LOCKING: | |
3478 | * Kernel thread context (may sleep) | |
3479 | * | |
3480 | * RETURNS: | |
3481 | * 0 on success, -errno otherwise. | |
3482 | */ | |
d4b2bab4 TH |
3483 | int sata_std_hardreset(struct ata_port *ap, unsigned int *class, |
3484 | unsigned long deadline) | |
b6103f6d TH |
3485 | { |
3486 | const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context); | |
3487 | int rc; | |
3488 | ||
3489 | DPRINTK("ENTER\n"); | |
3490 | ||
3491 | /* do hardreset */ | |
d4b2bab4 | 3492 | rc = sata_port_hardreset(ap, timing, deadline); |
b6103f6d TH |
3493 | if (rc) { |
3494 | ata_port_printk(ap, KERN_ERR, | |
3495 | "COMRESET failed (errno=%d)\n", rc); | |
3496 | return rc; | |
3497 | } | |
c2bd5804 | 3498 | |
c2bd5804 | 3499 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 3500 | if (ata_port_offline(ap)) { |
c2bd5804 TH |
3501 | *class = ATA_DEV_NONE; |
3502 | DPRINTK("EXIT, link offline\n"); | |
3503 | return 0; | |
3504 | } | |
3505 | ||
34fee227 TH |
3506 | /* wait a while before checking status, see SRST for more info */ |
3507 | msleep(150); | |
3508 | ||
d4b2bab4 | 3509 | rc = ata_wait_ready(ap, deadline); |
9b89391c TH |
3510 | /* link occupied, -ENODEV too is an error */ |
3511 | if (rc) { | |
f15a1daf | 3512 | ata_port_printk(ap, KERN_ERR, |
d4b2bab4 TH |
3513 | "COMRESET failed (errno=%d)\n", rc); |
3514 | return rc; | |
c2bd5804 TH |
3515 | } |
3516 | ||
3a39746a TH |
3517 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
3518 | ||
c2bd5804 TH |
3519 | *class = ata_dev_try_classify(ap, 0, NULL); |
3520 | ||
3521 | DPRINTK("EXIT, class=%u\n", *class); | |
3522 | return 0; | |
3523 | } | |
3524 | ||
3525 | /** | |
3526 | * ata_std_postreset - standard postreset callback | |
3527 | * @ap: the target ata_port | |
3528 | * @classes: classes of attached devices | |
3529 | * | |
3530 | * This function is invoked after a successful reset. Note that | |
3531 | * the device might have been reset more than once using | |
3532 | * different reset methods before postreset is invoked. | |
c2bd5804 | 3533 | * |
c2bd5804 TH |
3534 | * LOCKING: |
3535 | * Kernel thread context (may sleep) | |
3536 | */ | |
3537 | void ata_std_postreset(struct ata_port *ap, unsigned int *classes) | |
3538 | { | |
dc2b3515 TH |
3539 | u32 serror; |
3540 | ||
c2bd5804 TH |
3541 | DPRINTK("ENTER\n"); |
3542 | ||
c2bd5804 | 3543 | /* print link status */ |
81952c54 | 3544 | sata_print_link_status(ap); |
c2bd5804 | 3545 | |
dc2b3515 TH |
3546 | /* clear SError */ |
3547 | if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) | |
3548 | sata_scr_write(ap, SCR_ERROR, serror); | |
3549 | ||
3a39746a | 3550 | /* re-enable interrupts */ |
83625006 AI |
3551 | if (!ap->ops->error_handler) |
3552 | ap->ops->irq_on(ap); | |
c2bd5804 TH |
3553 | |
3554 | /* is double-select really necessary? */ | |
3555 | if (classes[0] != ATA_DEV_NONE) | |
3556 | ap->ops->dev_select(ap, 1); | |
3557 | if (classes[1] != ATA_DEV_NONE) | |
3558 | ap->ops->dev_select(ap, 0); | |
3559 | ||
3a39746a TH |
3560 | /* bail out if no device is present */ |
3561 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
3562 | DPRINTK("EXIT, no device\n"); | |
3563 | return; | |
3564 | } | |
3565 | ||
3566 | /* set up device control */ | |
0d5ff566 TH |
3567 | if (ap->ioaddr.ctl_addr) |
3568 | iowrite8(ap->ctl, ap->ioaddr.ctl_addr); | |
c2bd5804 TH |
3569 | |
3570 | DPRINTK("EXIT\n"); | |
3571 | } | |
3572 | ||
623a3128 TH |
3573 | /** |
3574 | * ata_dev_same_device - Determine whether new ID matches configured device | |
623a3128 TH |
3575 | * @dev: device to compare against |
3576 | * @new_class: class of the new device | |
3577 | * @new_id: IDENTIFY page of the new device | |
3578 | * | |
3579 | * Compare @new_class and @new_id against @dev and determine | |
3580 | * whether @dev is the device indicated by @new_class and | |
3581 | * @new_id. | |
3582 | * | |
3583 | * LOCKING: | |
3584 | * None. | |
3585 | * | |
3586 | * RETURNS: | |
3587 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
3588 | */ | |
3373efd8 TH |
3589 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, |
3590 | const u16 *new_id) | |
623a3128 TH |
3591 | { |
3592 | const u16 *old_id = dev->id; | |
a0cf733b TH |
3593 | unsigned char model[2][ATA_ID_PROD_LEN + 1]; |
3594 | unsigned char serial[2][ATA_ID_SERNO_LEN + 1]; | |
623a3128 TH |
3595 | |
3596 | if (dev->class != new_class) { | |
f15a1daf TH |
3597 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", |
3598 | dev->class, new_class); | |
623a3128 TH |
3599 | return 0; |
3600 | } | |
3601 | ||
a0cf733b TH |
3602 | ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0])); |
3603 | ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1])); | |
3604 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0])); | |
3605 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1])); | |
623a3128 TH |
3606 | |
3607 | if (strcmp(model[0], model[1])) { | |
f15a1daf TH |
3608 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " |
3609 | "'%s' != '%s'\n", model[0], model[1]); | |
623a3128 TH |
3610 | return 0; |
3611 | } | |
3612 | ||
3613 | if (strcmp(serial[0], serial[1])) { | |
f15a1daf TH |
3614 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " |
3615 | "'%s' != '%s'\n", serial[0], serial[1]); | |
623a3128 TH |
3616 | return 0; |
3617 | } | |
3618 | ||
623a3128 TH |
3619 | return 1; |
3620 | } | |
3621 | ||
3622 | /** | |
fe30911b | 3623 | * ata_dev_reread_id - Re-read IDENTIFY data |
3fae450c | 3624 | * @dev: target ATA device |
bff04647 | 3625 | * @readid_flags: read ID flags |
623a3128 TH |
3626 | * |
3627 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
3628 | * the port. | |
3629 | * | |
3630 | * LOCKING: | |
3631 | * Kernel thread context (may sleep) | |
3632 | * | |
3633 | * RETURNS: | |
3634 | * 0 on success, negative errno otherwise | |
3635 | */ | |
fe30911b | 3636 | int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags) |
623a3128 | 3637 | { |
5eb45c02 | 3638 | unsigned int class = dev->class; |
f15a1daf | 3639 | u16 *id = (void *)dev->ap->sector_buf; |
623a3128 TH |
3640 | int rc; |
3641 | ||
fe635c7e | 3642 | /* read ID data */ |
bff04647 | 3643 | rc = ata_dev_read_id(dev, &class, readid_flags, id); |
623a3128 | 3644 | if (rc) |
fe30911b | 3645 | return rc; |
623a3128 TH |
3646 | |
3647 | /* is the device still there? */ | |
fe30911b TH |
3648 | if (!ata_dev_same_device(dev, class, id)) |
3649 | return -ENODEV; | |
623a3128 | 3650 | |
fe635c7e | 3651 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); |
fe30911b TH |
3652 | return 0; |
3653 | } | |
3654 | ||
3655 | /** | |
3656 | * ata_dev_revalidate - Revalidate ATA device | |
3657 | * @dev: device to revalidate | |
3658 | * @readid_flags: read ID flags | |
3659 | * | |
3660 | * Re-read IDENTIFY page, make sure @dev is still attached to the | |
3661 | * port and reconfigure it according to the new IDENTIFY page. | |
3662 | * | |
3663 | * LOCKING: | |
3664 | * Kernel thread context (may sleep) | |
3665 | * | |
3666 | * RETURNS: | |
3667 | * 0 on success, negative errno otherwise | |
3668 | */ | |
3669 | int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags) | |
3670 | { | |
6ddcd3b0 | 3671 | u64 n_sectors = dev->n_sectors; |
fe30911b TH |
3672 | int rc; |
3673 | ||
3674 | if (!ata_dev_enabled(dev)) | |
3675 | return -ENODEV; | |
3676 | ||
3677 | /* re-read ID */ | |
3678 | rc = ata_dev_reread_id(dev, readid_flags); | |
3679 | if (rc) | |
3680 | goto fail; | |
623a3128 TH |
3681 | |
3682 | /* configure device according to the new ID */ | |
efdaedc4 | 3683 | rc = ata_dev_configure(dev); |
6ddcd3b0 TH |
3684 | if (rc) |
3685 | goto fail; | |
3686 | ||
3687 | /* verify n_sectors hasn't changed */ | |
3688 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != n_sectors) { | |
3689 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " | |
3690 | "%llu != %llu\n", | |
3691 | (unsigned long long)n_sectors, | |
3692 | (unsigned long long)dev->n_sectors); | |
3693 | rc = -ENODEV; | |
3694 | goto fail; | |
3695 | } | |
3696 | ||
3697 | return 0; | |
623a3128 TH |
3698 | |
3699 | fail: | |
f15a1daf | 3700 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); |
623a3128 TH |
3701 | return rc; |
3702 | } | |
3703 | ||
6919a0a6 AC |
3704 | struct ata_blacklist_entry { |
3705 | const char *model_num; | |
3706 | const char *model_rev; | |
3707 | unsigned long horkage; | |
3708 | }; | |
3709 | ||
3710 | static const struct ata_blacklist_entry ata_device_blacklist [] = { | |
3711 | /* Devices with DMA related problems under Linux */ | |
3712 | { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, | |
3713 | { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, | |
3714 | { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, | |
3715 | { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, | |
3716 | { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, | |
3717 | { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, | |
3718 | { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, | |
3719 | { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, | |
3720 | { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, | |
3721 | { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, | |
3722 | { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, | |
3723 | { "CRD-84", NULL, ATA_HORKAGE_NODMA }, | |
3724 | { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, | |
3725 | { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, | |
3726 | { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, | |
3727 | { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, | |
3728 | { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, | |
3729 | { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, | |
3730 | { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, | |
3731 | { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, | |
3732 | { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, | |
3733 | { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, | |
3734 | { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, | |
3735 | { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, | |
3736 | { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, | |
3737 | { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, | |
6919a0a6 AC |
3738 | { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, |
3739 | { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, | |
3740 | { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA }, | |
39f19886 | 3741 | { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, |
5acd50f6 | 3742 | { "IOMEGA ZIP 250 ATAPI", NULL, ATA_HORKAGE_NODMA }, /* temporary fix */ |
39ce7128 TH |
3743 | { "IOMEGA ZIP 250 ATAPI Floppy", |
3744 | NULL, ATA_HORKAGE_NODMA }, | |
6919a0a6 | 3745 | |
18d6e9d5 | 3746 | /* Weird ATAPI devices */ |
40a1d531 | 3747 | { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, |
18d6e9d5 | 3748 | |
6919a0a6 AC |
3749 | /* Devices we expect to fail diagnostics */ |
3750 | ||
3751 | /* Devices where NCQ should be avoided */ | |
3752 | /* NCQ is slow */ | |
3753 | { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, | |
09125ea6 TH |
3754 | /* http://thread.gmane.org/gmane.linux.ide/14907 */ |
3755 | { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, | |
7acfaf30 PR |
3756 | /* NCQ is broken */ |
3757 | { "Maxtor 6L250S0", "BANC1G10", ATA_HORKAGE_NONCQ }, | |
471e44b2 | 3758 | { "Maxtor 6B200M0", "BANC1B10", ATA_HORKAGE_NONCQ }, |
96442925 JA |
3759 | /* NCQ hard hangs device under heavier load, needs hard power cycle */ |
3760 | { "Maxtor 6B250S0", "BANC1B70", ATA_HORKAGE_NONCQ }, | |
36e337d0 RH |
3761 | /* Blacklist entries taken from Silicon Image 3124/3132 |
3762 | Windows driver .inf file - also several Linux problem reports */ | |
3763 | { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, | |
3764 | { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, | |
3765 | { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, | |
bd9c5a39 TH |
3766 | /* Drives which do spurious command completion */ |
3767 | { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, }, | |
2f8fcebb | 3768 | { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, }, |
e14cbfa6 | 3769 | { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, }, |
2f8fcebb | 3770 | { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, |
6919a0a6 AC |
3771 | |
3772 | /* Devices with NCQ limits */ | |
3773 | ||
3774 | /* End Marker */ | |
3775 | { } | |
1da177e4 | 3776 | }; |
2e9edbf8 | 3777 | |
6919a0a6 | 3778 | unsigned long ata_device_blacklisted(const struct ata_device *dev) |
1da177e4 | 3779 | { |
8bfa79fc TH |
3780 | unsigned char model_num[ATA_ID_PROD_LEN + 1]; |
3781 | unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; | |
6919a0a6 | 3782 | const struct ata_blacklist_entry *ad = ata_device_blacklist; |
3a778275 | 3783 | |
8bfa79fc TH |
3784 | ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); |
3785 | ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); | |
1da177e4 | 3786 | |
6919a0a6 | 3787 | while (ad->model_num) { |
8bfa79fc | 3788 | if (!strcmp(ad->model_num, model_num)) { |
6919a0a6 AC |
3789 | if (ad->model_rev == NULL) |
3790 | return ad->horkage; | |
8bfa79fc | 3791 | if (!strcmp(ad->model_rev, model_rev)) |
6919a0a6 | 3792 | return ad->horkage; |
f4b15fef | 3793 | } |
6919a0a6 | 3794 | ad++; |
f4b15fef | 3795 | } |
1da177e4 LT |
3796 | return 0; |
3797 | } | |
3798 | ||
6919a0a6 AC |
3799 | static int ata_dma_blacklisted(const struct ata_device *dev) |
3800 | { | |
3801 | /* We don't support polling DMA. | |
3802 | * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) | |
3803 | * if the LLDD handles only interrupts in the HSM_ST_LAST state. | |
3804 | */ | |
3805 | if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) && | |
3806 | (dev->flags & ATA_DFLAG_CDB_INTR)) | |
3807 | return 1; | |
3808 | return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0; | |
3809 | } | |
3810 | ||
a6d5a51c TH |
3811 | /** |
3812 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
a6d5a51c TH |
3813 | * @dev: Device to compute xfermask for |
3814 | * | |
acf356b1 TH |
3815 | * Compute supported xfermask of @dev and store it in |
3816 | * dev->*_mask. This function is responsible for applying all | |
3817 | * known limits including host controller limits, device | |
3818 | * blacklist, etc... | |
a6d5a51c TH |
3819 | * |
3820 | * LOCKING: | |
3821 | * None. | |
a6d5a51c | 3822 | */ |
3373efd8 | 3823 | static void ata_dev_xfermask(struct ata_device *dev) |
1da177e4 | 3824 | { |
3373efd8 | 3825 | struct ata_port *ap = dev->ap; |
cca3974e | 3826 | struct ata_host *host = ap->host; |
a6d5a51c | 3827 | unsigned long xfer_mask; |
1da177e4 | 3828 | |
37deecb5 | 3829 | /* controller modes available */ |
565083e1 TH |
3830 | xfer_mask = ata_pack_xfermask(ap->pio_mask, |
3831 | ap->mwdma_mask, ap->udma_mask); | |
3832 | ||
8343f889 | 3833 | /* drive modes available */ |
37deecb5 TH |
3834 | xfer_mask &= ata_pack_xfermask(dev->pio_mask, |
3835 | dev->mwdma_mask, dev->udma_mask); | |
3836 | xfer_mask &= ata_id_xfermask(dev->id); | |
565083e1 | 3837 | |
b352e57d AC |
3838 | /* |
3839 | * CFA Advanced TrueIDE timings are not allowed on a shared | |
3840 | * cable | |
3841 | */ | |
3842 | if (ata_dev_pair(dev)) { | |
3843 | /* No PIO5 or PIO6 */ | |
3844 | xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); | |
3845 | /* No MWDMA3 or MWDMA 4 */ | |
3846 | xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); | |
3847 | } | |
3848 | ||
37deecb5 TH |
3849 | if (ata_dma_blacklisted(dev)) { |
3850 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
f15a1daf TH |
3851 | ata_dev_printk(dev, KERN_WARNING, |
3852 | "device is on DMA blacklist, disabling DMA\n"); | |
37deecb5 | 3853 | } |
a6d5a51c | 3854 | |
14d66ab7 PV |
3855 | if ((host->flags & ATA_HOST_SIMPLEX) && |
3856 | host->simplex_claimed && host->simplex_claimed != ap) { | |
37deecb5 TH |
3857 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); |
3858 | ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " | |
3859 | "other device, disabling DMA\n"); | |
5444a6f4 | 3860 | } |
565083e1 | 3861 | |
e424675f JG |
3862 | if (ap->flags & ATA_FLAG_NO_IORDY) |
3863 | xfer_mask &= ata_pio_mask_no_iordy(dev); | |
3864 | ||
5444a6f4 | 3865 | if (ap->ops->mode_filter) |
a76b62ca | 3866 | xfer_mask = ap->ops->mode_filter(dev, xfer_mask); |
5444a6f4 | 3867 | |
8343f889 RH |
3868 | /* Apply cable rule here. Don't apply it early because when |
3869 | * we handle hot plug the cable type can itself change. | |
3870 | * Check this last so that we know if the transfer rate was | |
3871 | * solely limited by the cable. | |
3872 | * Unknown or 80 wire cables reported host side are checked | |
3873 | * drive side as well. Cases where we know a 40wire cable | |
3874 | * is used safely for 80 are not checked here. | |
3875 | */ | |
3876 | if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) | |
3877 | /* UDMA/44 or higher would be available */ | |
3878 | if((ap->cbl == ATA_CBL_PATA40) || | |
3879 | (ata_drive_40wire(dev->id) && | |
3880 | (ap->cbl == ATA_CBL_PATA_UNK || | |
3881 | ap->cbl == ATA_CBL_PATA80))) { | |
3882 | ata_dev_printk(dev, KERN_WARNING, | |
3883 | "limited to UDMA/33 due to 40-wire cable\n"); | |
3884 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
3885 | } | |
3886 | ||
565083e1 TH |
3887 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, |
3888 | &dev->mwdma_mask, &dev->udma_mask); | |
1da177e4 LT |
3889 | } |
3890 | ||
1da177e4 LT |
3891 | /** |
3892 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
1da177e4 LT |
3893 | * @dev: Device to which command will be sent |
3894 | * | |
780a87f7 JG |
3895 | * Issue SET FEATURES - XFER MODE command to device @dev |
3896 | * on port @ap. | |
3897 | * | |
1da177e4 | 3898 | * LOCKING: |
0cba632b | 3899 | * PCI/etc. bus probe sem. |
83206a29 TH |
3900 | * |
3901 | * RETURNS: | |
3902 | * 0 on success, AC_ERR_* mask otherwise. | |
1da177e4 LT |
3903 | */ |
3904 | ||
3373efd8 | 3905 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) |
1da177e4 | 3906 | { |
a0123703 | 3907 | struct ata_taskfile tf; |
83206a29 | 3908 | unsigned int err_mask; |
1da177e4 LT |
3909 | |
3910 | /* set up set-features taskfile */ | |
3911 | DPRINTK("set features - xfer mode\n"); | |
3912 | ||
464cf177 TH |
3913 | /* Some controllers and ATAPI devices show flaky interrupt |
3914 | * behavior after setting xfer mode. Use polling instead. | |
3915 | */ | |
3373efd8 | 3916 | ata_tf_init(dev, &tf); |
a0123703 TH |
3917 | tf.command = ATA_CMD_SET_FEATURES; |
3918 | tf.feature = SETFEATURES_XFER; | |
464cf177 | 3919 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING; |
a0123703 TH |
3920 | tf.protocol = ATA_PROT_NODATA; |
3921 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 3922 | |
3373efd8 | 3923 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
1da177e4 | 3924 | |
83206a29 TH |
3925 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3926 | return err_mask; | |
1da177e4 LT |
3927 | } |
3928 | ||
8bf62ece AL |
3929 | /** |
3930 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
8bf62ece | 3931 | * @dev: Device to which command will be sent |
e2a7f77a RD |
3932 | * @heads: Number of heads (taskfile parameter) |
3933 | * @sectors: Number of sectors (taskfile parameter) | |
8bf62ece AL |
3934 | * |
3935 | * LOCKING: | |
6aff8f1f TH |
3936 | * Kernel thread context (may sleep) |
3937 | * | |
3938 | * RETURNS: | |
3939 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece | 3940 | */ |
3373efd8 TH |
3941 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
3942 | u16 heads, u16 sectors) | |
8bf62ece | 3943 | { |
a0123703 | 3944 | struct ata_taskfile tf; |
6aff8f1f | 3945 | unsigned int err_mask; |
8bf62ece AL |
3946 | |
3947 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
3948 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
00b6f5e9 | 3949 | return AC_ERR_INVALID; |
8bf62ece AL |
3950 | |
3951 | /* set up init dev params taskfile */ | |
3952 | DPRINTK("init dev params \n"); | |
3953 | ||
3373efd8 | 3954 | ata_tf_init(dev, &tf); |
a0123703 TH |
3955 | tf.command = ATA_CMD_INIT_DEV_PARAMS; |
3956 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3957 | tf.protocol = ATA_PROT_NODATA; | |
3958 | tf.nsect = sectors; | |
3959 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 3960 | |
3373efd8 | 3961 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
8bf62ece | 3962 | |
6aff8f1f TH |
3963 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3964 | return err_mask; | |
8bf62ece AL |
3965 | } |
3966 | ||
1da177e4 | 3967 | /** |
0cba632b JG |
3968 | * ata_sg_clean - Unmap DMA memory associated with command |
3969 | * @qc: Command containing DMA memory to be released | |
3970 | * | |
3971 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
3972 | * |
3973 | * LOCKING: | |
cca3974e | 3974 | * spin_lock_irqsave(host lock) |
1da177e4 | 3975 | */ |
70e6ad0c | 3976 | void ata_sg_clean(struct ata_queued_cmd *qc) |
1da177e4 LT |
3977 | { |
3978 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 3979 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3980 | int dir = qc->dma_dir; |
cedc9a47 | 3981 | void *pad_buf = NULL; |
1da177e4 | 3982 | |
a4631474 TH |
3983 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
3984 | WARN_ON(sg == NULL); | |
1da177e4 LT |
3985 | |
3986 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 3987 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 3988 | |
2c13b7ce | 3989 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 3990 | |
cedc9a47 JG |
3991 | /* if we padded the buffer out to 32-bit bound, and data |
3992 | * xfer direction is from-device, we must copy from the | |
3993 | * pad buffer back into the supplied buffer | |
3994 | */ | |
3995 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
3996 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3997 | ||
3998 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d | 3999 | if (qc->n_elem) |
2f1f610b | 4000 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); |
cedc9a47 JG |
4001 | /* restore last sg */ |
4002 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
4003 | if (pad_buf) { | |
4004 | struct scatterlist *psg = &qc->pad_sgent; | |
4005 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
4006 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 4007 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
4008 | } |
4009 | } else { | |
2e242fa9 | 4010 | if (qc->n_elem) |
2f1f610b | 4011 | dma_unmap_single(ap->dev, |
e1410f2d JG |
4012 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), |
4013 | dir); | |
cedc9a47 JG |
4014 | /* restore sg */ |
4015 | sg->length += qc->pad_len; | |
4016 | if (pad_buf) | |
4017 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
4018 | pad_buf, qc->pad_len); | |
4019 | } | |
1da177e4 LT |
4020 | |
4021 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 4022 | qc->__sg = NULL; |
1da177e4 LT |
4023 | } |
4024 | ||
4025 | /** | |
4026 | * ata_fill_sg - Fill PCI IDE PRD table | |
4027 | * @qc: Metadata associated with taskfile to be transferred | |
4028 | * | |
780a87f7 JG |
4029 | * Fill PCI IDE PRD (scatter-gather) table with segments |
4030 | * associated with the current disk command. | |
4031 | * | |
1da177e4 | 4032 | * LOCKING: |
cca3974e | 4033 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4034 | * |
4035 | */ | |
4036 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
4037 | { | |
1da177e4 | 4038 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
4039 | struct scatterlist *sg; |
4040 | unsigned int idx; | |
1da177e4 | 4041 | |
a4631474 | 4042 | WARN_ON(qc->__sg == NULL); |
f131883e | 4043 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
4044 | |
4045 | idx = 0; | |
cedc9a47 | 4046 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
4047 | u32 addr, offset; |
4048 | u32 sg_len, len; | |
4049 | ||
4050 | /* determine if physical DMA addr spans 64K boundary. | |
4051 | * Note h/w doesn't support 64-bit, so we unconditionally | |
4052 | * truncate dma_addr_t to u32. | |
4053 | */ | |
4054 | addr = (u32) sg_dma_address(sg); | |
4055 | sg_len = sg_dma_len(sg); | |
4056 | ||
4057 | while (sg_len) { | |
4058 | offset = addr & 0xffff; | |
4059 | len = sg_len; | |
4060 | if ((offset + sg_len) > 0x10000) | |
4061 | len = 0x10000 - offset; | |
4062 | ||
4063 | ap->prd[idx].addr = cpu_to_le32(addr); | |
4064 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
4065 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
4066 | ||
4067 | idx++; | |
4068 | sg_len -= len; | |
4069 | addr += len; | |
4070 | } | |
4071 | } | |
4072 | ||
4073 | if (idx) | |
4074 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
4075 | } | |
b9a4197e | 4076 | |
d26fc955 AC |
4077 | /** |
4078 | * ata_fill_sg_dumb - Fill PCI IDE PRD table | |
4079 | * @qc: Metadata associated with taskfile to be transferred | |
4080 | * | |
4081 | * Fill PCI IDE PRD (scatter-gather) table with segments | |
4082 | * associated with the current disk command. Perform the fill | |
4083 | * so that we avoid writing any length 64K records for | |
4084 | * controllers that don't follow the spec. | |
4085 | * | |
4086 | * LOCKING: | |
4087 | * spin_lock_irqsave(host lock) | |
4088 | * | |
4089 | */ | |
4090 | static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) | |
4091 | { | |
4092 | struct ata_port *ap = qc->ap; | |
4093 | struct scatterlist *sg; | |
4094 | unsigned int idx; | |
4095 | ||
4096 | WARN_ON(qc->__sg == NULL); | |
4097 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); | |
4098 | ||
4099 | idx = 0; | |
4100 | ata_for_each_sg(sg, qc) { | |
4101 | u32 addr, offset; | |
4102 | u32 sg_len, len, blen; | |
4103 | ||
4104 | /* determine if physical DMA addr spans 64K boundary. | |
4105 | * Note h/w doesn't support 64-bit, so we unconditionally | |
4106 | * truncate dma_addr_t to u32. | |
4107 | */ | |
4108 | addr = (u32) sg_dma_address(sg); | |
4109 | sg_len = sg_dma_len(sg); | |
4110 | ||
4111 | while (sg_len) { | |
4112 | offset = addr & 0xffff; | |
4113 | len = sg_len; | |
4114 | if ((offset + sg_len) > 0x10000) | |
4115 | len = 0x10000 - offset; | |
4116 | ||
4117 | blen = len & 0xffff; | |
4118 | ap->prd[idx].addr = cpu_to_le32(addr); | |
4119 | if (blen == 0) { | |
4120 | /* Some PATA chipsets like the CS5530 can't | |
4121 | cope with 0x0000 meaning 64K as the spec says */ | |
4122 | ap->prd[idx].flags_len = cpu_to_le32(0x8000); | |
4123 | blen = 0x8000; | |
4124 | ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000); | |
4125 | } | |
4126 | ap->prd[idx].flags_len = cpu_to_le32(blen); | |
4127 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
4128 | ||
4129 | idx++; | |
4130 | sg_len -= len; | |
4131 | addr += len; | |
4132 | } | |
4133 | } | |
4134 | ||
4135 | if (idx) | |
4136 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
4137 | } | |
4138 | ||
1da177e4 LT |
4139 | /** |
4140 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
4141 | * @qc: Metadata associated with taskfile to check | |
4142 | * | |
780a87f7 JG |
4143 | * Allow low-level driver to filter ATA PACKET commands, returning |
4144 | * a status indicating whether or not it is OK to use DMA for the | |
4145 | * supplied PACKET command. | |
4146 | * | |
1da177e4 | 4147 | * LOCKING: |
cca3974e | 4148 | * spin_lock_irqsave(host lock) |
0cba632b | 4149 | * |
1da177e4 LT |
4150 | * RETURNS: 0 when ATAPI DMA can be used |
4151 | * nonzero otherwise | |
4152 | */ | |
4153 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
4154 | { | |
4155 | struct ata_port *ap = qc->ap; | |
b9a4197e TH |
4156 | |
4157 | /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a | |
4158 | * few ATAPI devices choke on such DMA requests. | |
4159 | */ | |
4160 | if (unlikely(qc->nbytes & 15)) | |
4161 | return 1; | |
6f23a31d | 4162 | |
1da177e4 | 4163 | if (ap->ops->check_atapi_dma) |
b9a4197e | 4164 | return ap->ops->check_atapi_dma(qc); |
1da177e4 | 4165 | |
b9a4197e | 4166 | return 0; |
1da177e4 | 4167 | } |
b9a4197e | 4168 | |
1da177e4 LT |
4169 | /** |
4170 | * ata_qc_prep - Prepare taskfile for submission | |
4171 | * @qc: Metadata associated with taskfile to be prepared | |
4172 | * | |
780a87f7 JG |
4173 | * Prepare ATA taskfile for submission. |
4174 | * | |
1da177e4 | 4175 | * LOCKING: |
cca3974e | 4176 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4177 | */ |
4178 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
4179 | { | |
4180 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4181 | return; | |
4182 | ||
4183 | ata_fill_sg(qc); | |
4184 | } | |
4185 | ||
d26fc955 AC |
4186 | /** |
4187 | * ata_dumb_qc_prep - Prepare taskfile for submission | |
4188 | * @qc: Metadata associated with taskfile to be prepared | |
4189 | * | |
4190 | * Prepare ATA taskfile for submission. | |
4191 | * | |
4192 | * LOCKING: | |
4193 | * spin_lock_irqsave(host lock) | |
4194 | */ | |
4195 | void ata_dumb_qc_prep(struct ata_queued_cmd *qc) | |
4196 | { | |
4197 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4198 | return; | |
4199 | ||
4200 | ata_fill_sg_dumb(qc); | |
4201 | } | |
4202 | ||
e46834cd BK |
4203 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } |
4204 | ||
0cba632b JG |
4205 | /** |
4206 | * ata_sg_init_one - Associate command with memory buffer | |
4207 | * @qc: Command to be associated | |
4208 | * @buf: Memory buffer | |
4209 | * @buflen: Length of memory buffer, in bytes. | |
4210 | * | |
4211 | * Initialize the data-related elements of queued_cmd @qc | |
4212 | * to point to a single memory buffer, @buf of byte length @buflen. | |
4213 | * | |
4214 | * LOCKING: | |
cca3974e | 4215 | * spin_lock_irqsave(host lock) |
0cba632b JG |
4216 | */ |
4217 | ||
1da177e4 LT |
4218 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
4219 | { | |
1da177e4 LT |
4220 | qc->flags |= ATA_QCFLAG_SINGLE; |
4221 | ||
cedc9a47 | 4222 | qc->__sg = &qc->sgent; |
1da177e4 | 4223 | qc->n_elem = 1; |
cedc9a47 | 4224 | qc->orig_n_elem = 1; |
1da177e4 | 4225 | qc->buf_virt = buf; |
233277ca | 4226 | qc->nbytes = buflen; |
1da177e4 | 4227 | |
61c0596c | 4228 | sg_init_one(&qc->sgent, buf, buflen); |
1da177e4 LT |
4229 | } |
4230 | ||
0cba632b JG |
4231 | /** |
4232 | * ata_sg_init - Associate command with scatter-gather table. | |
4233 | * @qc: Command to be associated | |
4234 | * @sg: Scatter-gather table. | |
4235 | * @n_elem: Number of elements in s/g table. | |
4236 | * | |
4237 | * Initialize the data-related elements of queued_cmd @qc | |
4238 | * to point to a scatter-gather table @sg, containing @n_elem | |
4239 | * elements. | |
4240 | * | |
4241 | * LOCKING: | |
cca3974e | 4242 | * spin_lock_irqsave(host lock) |
0cba632b JG |
4243 | */ |
4244 | ||
1da177e4 LT |
4245 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
4246 | unsigned int n_elem) | |
4247 | { | |
4248 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 4249 | qc->__sg = sg; |
1da177e4 | 4250 | qc->n_elem = n_elem; |
cedc9a47 | 4251 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
4252 | } |
4253 | ||
4254 | /** | |
0cba632b JG |
4255 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
4256 | * @qc: Command with memory buffer to be mapped. | |
4257 | * | |
4258 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
4259 | * |
4260 | * LOCKING: | |
cca3974e | 4261 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4262 | * |
4263 | * RETURNS: | |
0cba632b | 4264 | * Zero on success, negative on error. |
1da177e4 LT |
4265 | */ |
4266 | ||
4267 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
4268 | { | |
4269 | struct ata_port *ap = qc->ap; | |
4270 | int dir = qc->dma_dir; | |
cedc9a47 | 4271 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 4272 | dma_addr_t dma_address; |
2e242fa9 | 4273 | int trim_sg = 0; |
1da177e4 | 4274 | |
cedc9a47 JG |
4275 | /* we must lengthen transfers to end on a 32-bit boundary */ |
4276 | qc->pad_len = sg->length & 3; | |
4277 | if (qc->pad_len) { | |
4278 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
4279 | struct scatterlist *psg = &qc->pad_sgent; | |
4280 | ||
a4631474 | 4281 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
4282 | |
4283 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
4284 | ||
4285 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
4286 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
4287 | qc->pad_len); | |
4288 | ||
4289 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
4290 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
4291 | /* trim sg */ | |
4292 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
4293 | if (sg->length == 0) |
4294 | trim_sg = 1; | |
cedc9a47 JG |
4295 | |
4296 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
4297 | sg->length, qc->pad_len); | |
4298 | } | |
4299 | ||
2e242fa9 TH |
4300 | if (trim_sg) { |
4301 | qc->n_elem--; | |
e1410f2d JG |
4302 | goto skip_map; |
4303 | } | |
4304 | ||
2f1f610b | 4305 | dma_address = dma_map_single(ap->dev, qc->buf_virt, |
32529e01 | 4306 | sg->length, dir); |
537a95d9 TH |
4307 | if (dma_mapping_error(dma_address)) { |
4308 | /* restore sg */ | |
4309 | sg->length += qc->pad_len; | |
1da177e4 | 4310 | return -1; |
537a95d9 | 4311 | } |
1da177e4 LT |
4312 | |
4313 | sg_dma_address(sg) = dma_address; | |
32529e01 | 4314 | sg_dma_len(sg) = sg->length; |
1da177e4 | 4315 | |
2e242fa9 | 4316 | skip_map: |
1da177e4 LT |
4317 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
4318 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
4319 | ||
4320 | return 0; | |
4321 | } | |
4322 | ||
4323 | /** | |
0cba632b JG |
4324 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
4325 | * @qc: Command with scatter-gather table to be mapped. | |
4326 | * | |
4327 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
4328 | * |
4329 | * LOCKING: | |
cca3974e | 4330 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4331 | * |
4332 | * RETURNS: | |
0cba632b | 4333 | * Zero on success, negative on error. |
1da177e4 LT |
4334 | * |
4335 | */ | |
4336 | ||
4337 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
4338 | { | |
4339 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
4340 | struct scatterlist *sg = qc->__sg; |
4341 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 4342 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 | 4343 | |
44877b4e | 4344 | VPRINTK("ENTER, ata%u\n", ap->print_id); |
a4631474 | 4345 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 4346 | |
cedc9a47 JG |
4347 | /* we must lengthen transfers to end on a 32-bit boundary */ |
4348 | qc->pad_len = lsg->length & 3; | |
4349 | if (qc->pad_len) { | |
4350 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
4351 | struct scatterlist *psg = &qc->pad_sgent; | |
4352 | unsigned int offset; | |
4353 | ||
a4631474 | 4354 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
4355 | |
4356 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
4357 | ||
4358 | /* | |
4359 | * psg->page/offset are used to copy to-be-written | |
4360 | * data in this function or read data in ata_sg_clean. | |
4361 | */ | |
4362 | offset = lsg->offset + lsg->length - qc->pad_len; | |
4363 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
4364 | psg->offset = offset_in_page(offset); | |
4365 | ||
4366 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
4367 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
4368 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 4369 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
4370 | } |
4371 | ||
4372 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
4373 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
4374 | /* trim last sg */ | |
4375 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
4376 | if (lsg->length == 0) |
4377 | trim_sg = 1; | |
cedc9a47 JG |
4378 | |
4379 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
4380 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
4381 | } | |
4382 | ||
e1410f2d JG |
4383 | pre_n_elem = qc->n_elem; |
4384 | if (trim_sg && pre_n_elem) | |
4385 | pre_n_elem--; | |
4386 | ||
4387 | if (!pre_n_elem) { | |
4388 | n_elem = 0; | |
4389 | goto skip_map; | |
4390 | } | |
4391 | ||
1da177e4 | 4392 | dir = qc->dma_dir; |
2f1f610b | 4393 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
4394 | if (n_elem < 1) { |
4395 | /* restore last sg */ | |
4396 | lsg->length += qc->pad_len; | |
1da177e4 | 4397 | return -1; |
537a95d9 | 4398 | } |
1da177e4 LT |
4399 | |
4400 | DPRINTK("%d sg elements mapped\n", n_elem); | |
4401 | ||
e1410f2d | 4402 | skip_map: |
1da177e4 LT |
4403 | qc->n_elem = n_elem; |
4404 | ||
4405 | return 0; | |
4406 | } | |
4407 | ||
0baab86b | 4408 | /** |
c893a3ae | 4409 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
4410 | * @buf: Buffer to swap |
4411 | * @buf_words: Number of 16-bit words in buffer. | |
4412 | * | |
4413 | * Swap halves of 16-bit words if needed to convert from | |
4414 | * little-endian byte order to native cpu byte order, or | |
4415 | * vice-versa. | |
4416 | * | |
4417 | * LOCKING: | |
6f0ef4fa | 4418 | * Inherited from caller. |
0baab86b | 4419 | */ |
1da177e4 LT |
4420 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
4421 | { | |
4422 | #ifdef __BIG_ENDIAN | |
4423 | unsigned int i; | |
4424 | ||
4425 | for (i = 0; i < buf_words; i++) | |
4426 | buf[i] = le16_to_cpu(buf[i]); | |
4427 | #endif /* __BIG_ENDIAN */ | |
4428 | } | |
4429 | ||
6ae4cfb5 | 4430 | /** |
0d5ff566 | 4431 | * ata_data_xfer - Transfer data by PIO |
a6b2c5d4 | 4432 | * @adev: device to target |
6ae4cfb5 AL |
4433 | * @buf: data buffer |
4434 | * @buflen: buffer length | |
344babaa | 4435 | * @write_data: read/write |
6ae4cfb5 AL |
4436 | * |
4437 | * Transfer data from/to the device data register by PIO. | |
4438 | * | |
4439 | * LOCKING: | |
4440 | * Inherited from caller. | |
6ae4cfb5 | 4441 | */ |
0d5ff566 TH |
4442 | void ata_data_xfer(struct ata_device *adev, unsigned char *buf, |
4443 | unsigned int buflen, int write_data) | |
1da177e4 | 4444 | { |
a6b2c5d4 | 4445 | struct ata_port *ap = adev->ap; |
6ae4cfb5 | 4446 | unsigned int words = buflen >> 1; |
1da177e4 | 4447 | |
6ae4cfb5 | 4448 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 4449 | if (write_data) |
0d5ff566 | 4450 | iowrite16_rep(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 4451 | else |
0d5ff566 | 4452 | ioread16_rep(ap->ioaddr.data_addr, buf, words); |
6ae4cfb5 AL |
4453 | |
4454 | /* Transfer trailing 1 byte, if any. */ | |
4455 | if (unlikely(buflen & 0x01)) { | |
4456 | u16 align_buf[1] = { 0 }; | |
4457 | unsigned char *trailing_buf = buf + buflen - 1; | |
4458 | ||
4459 | if (write_data) { | |
4460 | memcpy(align_buf, trailing_buf, 1); | |
0d5ff566 | 4461 | iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); |
6ae4cfb5 | 4462 | } else { |
0d5ff566 | 4463 | align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr)); |
6ae4cfb5 AL |
4464 | memcpy(trailing_buf, align_buf, 1); |
4465 | } | |
4466 | } | |
1da177e4 LT |
4467 | } |
4468 | ||
75e99585 | 4469 | /** |
0d5ff566 | 4470 | * ata_data_xfer_noirq - Transfer data by PIO |
75e99585 AC |
4471 | * @adev: device to target |
4472 | * @buf: data buffer | |
4473 | * @buflen: buffer length | |
4474 | * @write_data: read/write | |
4475 | * | |
88574551 | 4476 | * Transfer data from/to the device data register by PIO. Do the |
75e99585 AC |
4477 | * transfer with interrupts disabled. |
4478 | * | |
4479 | * LOCKING: | |
4480 | * Inherited from caller. | |
4481 | */ | |
0d5ff566 TH |
4482 | void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, |
4483 | unsigned int buflen, int write_data) | |
75e99585 AC |
4484 | { |
4485 | unsigned long flags; | |
4486 | local_irq_save(flags); | |
0d5ff566 | 4487 | ata_data_xfer(adev, buf, buflen, write_data); |
75e99585 AC |
4488 | local_irq_restore(flags); |
4489 | } | |
4490 | ||
4491 | ||
6ae4cfb5 | 4492 | /** |
5a5dbd18 | 4493 | * ata_pio_sector - Transfer a sector of data. |
6ae4cfb5 AL |
4494 | * @qc: Command on going |
4495 | * | |
5a5dbd18 | 4496 | * Transfer qc->sect_size bytes of data from/to the ATA device. |
6ae4cfb5 AL |
4497 | * |
4498 | * LOCKING: | |
4499 | * Inherited from caller. | |
4500 | */ | |
4501 | ||
1da177e4 LT |
4502 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
4503 | { | |
4504 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 4505 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
4506 | struct ata_port *ap = qc->ap; |
4507 | struct page *page; | |
4508 | unsigned int offset; | |
4509 | unsigned char *buf; | |
4510 | ||
5a5dbd18 | 4511 | if (qc->curbytes == qc->nbytes - qc->sect_size) |
14be71f4 | 4512 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
4513 | |
4514 | page = sg[qc->cursg].page; | |
726f0785 | 4515 | offset = sg[qc->cursg].offset + qc->cursg_ofs; |
1da177e4 LT |
4516 | |
4517 | /* get the current page and offset */ | |
4518 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
4519 | offset %= PAGE_SIZE; | |
4520 | ||
1da177e4 LT |
4521 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
4522 | ||
91b8b313 AL |
4523 | if (PageHighMem(page)) { |
4524 | unsigned long flags; | |
4525 | ||
a6b2c5d4 | 4526 | /* FIXME: use a bounce buffer */ |
91b8b313 AL |
4527 | local_irq_save(flags); |
4528 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 4529 | |
91b8b313 | 4530 | /* do the actual data transfer */ |
5a5dbd18 | 4531 | ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); |
1da177e4 | 4532 | |
91b8b313 AL |
4533 | kunmap_atomic(buf, KM_IRQ0); |
4534 | local_irq_restore(flags); | |
4535 | } else { | |
4536 | buf = page_address(page); | |
5a5dbd18 | 4537 | ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); |
91b8b313 | 4538 | } |
1da177e4 | 4539 | |
5a5dbd18 ML |
4540 | qc->curbytes += qc->sect_size; |
4541 | qc->cursg_ofs += qc->sect_size; | |
1da177e4 | 4542 | |
726f0785 | 4543 | if (qc->cursg_ofs == (&sg[qc->cursg])->length) { |
1da177e4 LT |
4544 | qc->cursg++; |
4545 | qc->cursg_ofs = 0; | |
4546 | } | |
1da177e4 | 4547 | } |
1da177e4 | 4548 | |
07f6f7d0 | 4549 | /** |
5a5dbd18 | 4550 | * ata_pio_sectors - Transfer one or many sectors. |
07f6f7d0 AL |
4551 | * @qc: Command on going |
4552 | * | |
5a5dbd18 | 4553 | * Transfer one or many sectors of data from/to the |
07f6f7d0 AL |
4554 | * ATA device for the DRQ request. |
4555 | * | |
4556 | * LOCKING: | |
4557 | * Inherited from caller. | |
4558 | */ | |
1da177e4 | 4559 | |
07f6f7d0 AL |
4560 | static void ata_pio_sectors(struct ata_queued_cmd *qc) |
4561 | { | |
4562 | if (is_multi_taskfile(&qc->tf)) { | |
4563 | /* READ/WRITE MULTIPLE */ | |
4564 | unsigned int nsect; | |
4565 | ||
587005de | 4566 | WARN_ON(qc->dev->multi_count == 0); |
1da177e4 | 4567 | |
5a5dbd18 | 4568 | nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, |
726f0785 | 4569 | qc->dev->multi_count); |
07f6f7d0 AL |
4570 | while (nsect--) |
4571 | ata_pio_sector(qc); | |
4572 | } else | |
4573 | ata_pio_sector(qc); | |
4574 | } | |
4575 | ||
c71c1857 AL |
4576 | /** |
4577 | * atapi_send_cdb - Write CDB bytes to hardware | |
4578 | * @ap: Port to which ATAPI device is attached. | |
4579 | * @qc: Taskfile currently active | |
4580 | * | |
4581 | * When device has indicated its readiness to accept | |
4582 | * a CDB, this function is called. Send the CDB. | |
4583 | * | |
4584 | * LOCKING: | |
4585 | * caller. | |
4586 | */ | |
4587 | ||
4588 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
4589 | { | |
4590 | /* send SCSI cdb */ | |
4591 | DPRINTK("send cdb\n"); | |
db024d53 | 4592 | WARN_ON(qc->dev->cdb_len < 12); |
c71c1857 | 4593 | |
a6b2c5d4 | 4594 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); |
c71c1857 AL |
4595 | ata_altstatus(ap); /* flush */ |
4596 | ||
4597 | switch (qc->tf.protocol) { | |
4598 | case ATA_PROT_ATAPI: | |
4599 | ap->hsm_task_state = HSM_ST; | |
4600 | break; | |
4601 | case ATA_PROT_ATAPI_NODATA: | |
4602 | ap->hsm_task_state = HSM_ST_LAST; | |
4603 | break; | |
4604 | case ATA_PROT_ATAPI_DMA: | |
4605 | ap->hsm_task_state = HSM_ST_LAST; | |
4606 | /* initiate bmdma */ | |
4607 | ap->ops->bmdma_start(qc); | |
4608 | break; | |
4609 | } | |
1da177e4 LT |
4610 | } |
4611 | ||
6ae4cfb5 AL |
4612 | /** |
4613 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4614 | * @qc: Command on going | |
4615 | * @bytes: number of bytes | |
4616 | * | |
4617 | * Transfer Transfer data from/to the ATAPI device. | |
4618 | * | |
4619 | * LOCKING: | |
4620 | * Inherited from caller. | |
4621 | * | |
4622 | */ | |
4623 | ||
1da177e4 LT |
4624 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
4625 | { | |
4626 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 4627 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
4628 | struct ata_port *ap = qc->ap; |
4629 | struct page *page; | |
4630 | unsigned char *buf; | |
4631 | unsigned int offset, count; | |
4632 | ||
563a6e1f | 4633 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 4634 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
4635 | |
4636 | next_sg: | |
563a6e1f | 4637 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 4638 | /* |
563a6e1f AL |
4639 | * The end of qc->sg is reached and the device expects |
4640 | * more data to transfer. In order not to overrun qc->sg | |
4641 | * and fulfill length specified in the byte count register, | |
4642 | * - for read case, discard trailing data from the device | |
4643 | * - for write case, padding zero data to the device | |
4644 | */ | |
4645 | u16 pad_buf[1] = { 0 }; | |
4646 | unsigned int words = bytes >> 1; | |
4647 | unsigned int i; | |
4648 | ||
4649 | if (words) /* warning if bytes > 1 */ | |
f15a1daf TH |
4650 | ata_dev_printk(qc->dev, KERN_WARNING, |
4651 | "%u bytes trailing data\n", bytes); | |
563a6e1f AL |
4652 | |
4653 | for (i = 0; i < words; i++) | |
a6b2c5d4 | 4654 | ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write); |
563a6e1f | 4655 | |
14be71f4 | 4656 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
4657 | return; |
4658 | } | |
4659 | ||
cedc9a47 | 4660 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 4661 | |
1da177e4 LT |
4662 | page = sg->page; |
4663 | offset = sg->offset + qc->cursg_ofs; | |
4664 | ||
4665 | /* get the current page and offset */ | |
4666 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
4667 | offset %= PAGE_SIZE; | |
4668 | ||
6952df03 | 4669 | /* don't overrun current sg */ |
32529e01 | 4670 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
4671 | |
4672 | /* don't cross page boundaries */ | |
4673 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
4674 | ||
7282aa4b AL |
4675 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
4676 | ||
91b8b313 AL |
4677 | if (PageHighMem(page)) { |
4678 | unsigned long flags; | |
4679 | ||
a6b2c5d4 | 4680 | /* FIXME: use bounce buffer */ |
91b8b313 AL |
4681 | local_irq_save(flags); |
4682 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 4683 | |
91b8b313 | 4684 | /* do the actual data transfer */ |
a6b2c5d4 | 4685 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
7282aa4b | 4686 | |
91b8b313 AL |
4687 | kunmap_atomic(buf, KM_IRQ0); |
4688 | local_irq_restore(flags); | |
4689 | } else { | |
4690 | buf = page_address(page); | |
a6b2c5d4 | 4691 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
91b8b313 | 4692 | } |
1da177e4 LT |
4693 | |
4694 | bytes -= count; | |
4695 | qc->curbytes += count; | |
4696 | qc->cursg_ofs += count; | |
4697 | ||
32529e01 | 4698 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
4699 | qc->cursg++; |
4700 | qc->cursg_ofs = 0; | |
4701 | } | |
4702 | ||
563a6e1f | 4703 | if (bytes) |
1da177e4 | 4704 | goto next_sg; |
1da177e4 LT |
4705 | } |
4706 | ||
6ae4cfb5 AL |
4707 | /** |
4708 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4709 | * @qc: Command on going | |
4710 | * | |
4711 | * Transfer Transfer data from/to the ATAPI device. | |
4712 | * | |
4713 | * LOCKING: | |
4714 | * Inherited from caller. | |
6ae4cfb5 AL |
4715 | */ |
4716 | ||
1da177e4 LT |
4717 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
4718 | { | |
4719 | struct ata_port *ap = qc->ap; | |
4720 | struct ata_device *dev = qc->dev; | |
4721 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
4722 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
4723 | ||
eec4c3f3 AL |
4724 | /* Abuse qc->result_tf for temp storage of intermediate TF |
4725 | * here to save some kernel stack usage. | |
4726 | * For normal completion, qc->result_tf is not relevant. For | |
4727 | * error, qc->result_tf is later overwritten by ata_qc_complete(). | |
4728 | * So, the correctness of qc->result_tf is not affected. | |
4729 | */ | |
4730 | ap->ops->tf_read(ap, &qc->result_tf); | |
4731 | ireason = qc->result_tf.nsect; | |
4732 | bc_lo = qc->result_tf.lbam; | |
4733 | bc_hi = qc->result_tf.lbah; | |
1da177e4 LT |
4734 | bytes = (bc_hi << 8) | bc_lo; |
4735 | ||
4736 | /* shall be cleared to zero, indicating xfer of data */ | |
4737 | if (ireason & (1 << 0)) | |
4738 | goto err_out; | |
4739 | ||
4740 | /* make sure transfer direction matches expected */ | |
4741 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
4742 | if (do_write != i_write) | |
4743 | goto err_out; | |
4744 | ||
44877b4e | 4745 | VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); |
312f7da2 | 4746 | |
1da177e4 LT |
4747 | __atapi_pio_bytes(qc, bytes); |
4748 | ||
4749 | return; | |
4750 | ||
4751 | err_out: | |
f15a1daf | 4752 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); |
11a56d24 | 4753 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 4754 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
4755 | } |
4756 | ||
4757 | /** | |
c234fb00 AL |
4758 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. |
4759 | * @ap: the target ata_port | |
4760 | * @qc: qc on going | |
1da177e4 | 4761 | * |
c234fb00 AL |
4762 | * RETURNS: |
4763 | * 1 if ok in workqueue, 0 otherwise. | |
1da177e4 | 4764 | */ |
c234fb00 AL |
4765 | |
4766 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) | |
1da177e4 | 4767 | { |
c234fb00 AL |
4768 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4769 | return 1; | |
1da177e4 | 4770 | |
c234fb00 AL |
4771 | if (ap->hsm_task_state == HSM_ST_FIRST) { |
4772 | if (qc->tf.protocol == ATA_PROT_PIO && | |
4773 | (qc->tf.flags & ATA_TFLAG_WRITE)) | |
4774 | return 1; | |
1da177e4 | 4775 | |
c234fb00 AL |
4776 | if (is_atapi_taskfile(&qc->tf) && |
4777 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
4778 | return 1; | |
fe79e683 AL |
4779 | } |
4780 | ||
c234fb00 AL |
4781 | return 0; |
4782 | } | |
1da177e4 | 4783 | |
c17ea20d TH |
4784 | /** |
4785 | * ata_hsm_qc_complete - finish a qc running on standard HSM | |
4786 | * @qc: Command to complete | |
4787 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4788 | * | |
4789 | * Finish @qc which is running on standard HSM. | |
4790 | * | |
4791 | * LOCKING: | |
cca3974e | 4792 | * If @in_wq is zero, spin_lock_irqsave(host lock). |
c17ea20d TH |
4793 | * Otherwise, none on entry and grabs host lock. |
4794 | */ | |
4795 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) | |
4796 | { | |
4797 | struct ata_port *ap = qc->ap; | |
4798 | unsigned long flags; | |
4799 | ||
4800 | if (ap->ops->error_handler) { | |
4801 | if (in_wq) { | |
ba6a1308 | 4802 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d | 4803 | |
cca3974e JG |
4804 | /* EH might have kicked in while host lock is |
4805 | * released. | |
c17ea20d TH |
4806 | */ |
4807 | qc = ata_qc_from_tag(ap, qc->tag); | |
4808 | if (qc) { | |
4809 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { | |
83625006 | 4810 | ap->ops->irq_on(ap); |
c17ea20d TH |
4811 | ata_qc_complete(qc); |
4812 | } else | |
4813 | ata_port_freeze(ap); | |
4814 | } | |
4815 | ||
ba6a1308 | 4816 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
4817 | } else { |
4818 | if (likely(!(qc->err_mask & AC_ERR_HSM))) | |
4819 | ata_qc_complete(qc); | |
4820 | else | |
4821 | ata_port_freeze(ap); | |
4822 | } | |
4823 | } else { | |
4824 | if (in_wq) { | |
ba6a1308 | 4825 | spin_lock_irqsave(ap->lock, flags); |
83625006 | 4826 | ap->ops->irq_on(ap); |
c17ea20d | 4827 | ata_qc_complete(qc); |
ba6a1308 | 4828 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
4829 | } else |
4830 | ata_qc_complete(qc); | |
4831 | } | |
4832 | } | |
4833 | ||
bb5cb290 AL |
4834 | /** |
4835 | * ata_hsm_move - move the HSM to the next state. | |
4836 | * @ap: the target ata_port | |
4837 | * @qc: qc on going | |
4838 | * @status: current device status | |
4839 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4840 | * | |
4841 | * RETURNS: | |
4842 | * 1 when poll next status needed, 0 otherwise. | |
4843 | */ | |
9a1004d0 TH |
4844 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, |
4845 | u8 status, int in_wq) | |
e2cec771 | 4846 | { |
bb5cb290 AL |
4847 | unsigned long flags = 0; |
4848 | int poll_next; | |
4849 | ||
6912ccd5 AL |
4850 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); |
4851 | ||
bb5cb290 AL |
4852 | /* Make sure ata_qc_issue_prot() does not throw things |
4853 | * like DMA polling into the workqueue. Notice that | |
4854 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). | |
4855 | */ | |
c234fb00 | 4856 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); |
bb5cb290 | 4857 | |
e2cec771 | 4858 | fsm_start: |
999bb6f4 | 4859 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
44877b4e | 4860 | ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); |
999bb6f4 | 4861 | |
e2cec771 AL |
4862 | switch (ap->hsm_task_state) { |
4863 | case HSM_ST_FIRST: | |
bb5cb290 AL |
4864 | /* Send first data block or PACKET CDB */ |
4865 | ||
4866 | /* If polling, we will stay in the work queue after | |
4867 | * sending the data. Otherwise, interrupt handler | |
4868 | * takes over after sending the data. | |
4869 | */ | |
4870 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
4871 | ||
e2cec771 | 4872 | /* check device status */ |
3655d1d3 AL |
4873 | if (unlikely((status & ATA_DRQ) == 0)) { |
4874 | /* handle BSY=0, DRQ=0 as error */ | |
4875 | if (likely(status & (ATA_ERR | ATA_DF))) | |
4876 | /* device stops HSM for abort/error */ | |
4877 | qc->err_mask |= AC_ERR_DEV; | |
4878 | else | |
4879 | /* HSM violation. Let EH handle this */ | |
4880 | qc->err_mask |= AC_ERR_HSM; | |
4881 | ||
14be71f4 | 4882 | ap->hsm_task_state = HSM_ST_ERR; |
e2cec771 | 4883 | goto fsm_start; |
1da177e4 LT |
4884 | } |
4885 | ||
71601958 AL |
4886 | /* Device should not ask for data transfer (DRQ=1) |
4887 | * when it finds something wrong. | |
eee6c32f AL |
4888 | * We ignore DRQ here and stop the HSM by |
4889 | * changing hsm_task_state to HSM_ST_ERR and | |
4890 | * let the EH abort the command or reset the device. | |
71601958 AL |
4891 | */ |
4892 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
44877b4e TH |
4893 | ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device " |
4894 | "error, dev_stat 0x%X\n", status); | |
3655d1d3 | 4895 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4896 | ap->hsm_task_state = HSM_ST_ERR; |
4897 | goto fsm_start; | |
71601958 | 4898 | } |
1da177e4 | 4899 | |
bb5cb290 AL |
4900 | /* Send the CDB (atapi) or the first data block (ata pio out). |
4901 | * During the state transition, interrupt handler shouldn't | |
4902 | * be invoked before the data transfer is complete and | |
4903 | * hsm_task_state is changed. Hence, the following locking. | |
4904 | */ | |
4905 | if (in_wq) | |
ba6a1308 | 4906 | spin_lock_irqsave(ap->lock, flags); |
1da177e4 | 4907 | |
bb5cb290 AL |
4908 | if (qc->tf.protocol == ATA_PROT_PIO) { |
4909 | /* PIO data out protocol. | |
4910 | * send first data block. | |
4911 | */ | |
0565c26d | 4912 | |
bb5cb290 AL |
4913 | /* ata_pio_sectors() might change the state |
4914 | * to HSM_ST_LAST. so, the state is changed here | |
4915 | * before ata_pio_sectors(). | |
4916 | */ | |
4917 | ap->hsm_task_state = HSM_ST; | |
4918 | ata_pio_sectors(qc); | |
4919 | ata_altstatus(ap); /* flush */ | |
4920 | } else | |
4921 | /* send CDB */ | |
4922 | atapi_send_cdb(ap, qc); | |
4923 | ||
4924 | if (in_wq) | |
ba6a1308 | 4925 | spin_unlock_irqrestore(ap->lock, flags); |
bb5cb290 AL |
4926 | |
4927 | /* if polling, ata_pio_task() handles the rest. | |
4928 | * otherwise, interrupt handler takes over from here. | |
4929 | */ | |
e2cec771 | 4930 | break; |
1c848984 | 4931 | |
e2cec771 AL |
4932 | case HSM_ST: |
4933 | /* complete command or read/write the data register */ | |
4934 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
4935 | /* ATAPI PIO protocol */ | |
4936 | if ((status & ATA_DRQ) == 0) { | |
3655d1d3 AL |
4937 | /* No more data to transfer or device error. |
4938 | * Device error will be tagged in HSM_ST_LAST. | |
4939 | */ | |
e2cec771 AL |
4940 | ap->hsm_task_state = HSM_ST_LAST; |
4941 | goto fsm_start; | |
4942 | } | |
1da177e4 | 4943 | |
71601958 AL |
4944 | /* Device should not ask for data transfer (DRQ=1) |
4945 | * when it finds something wrong. | |
eee6c32f AL |
4946 | * We ignore DRQ here and stop the HSM by |
4947 | * changing hsm_task_state to HSM_ST_ERR and | |
4948 | * let the EH abort the command or reset the device. | |
71601958 AL |
4949 | */ |
4950 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
44877b4e TH |
4951 | ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " |
4952 | "device error, dev_stat 0x%X\n", | |
4953 | status); | |
3655d1d3 | 4954 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4955 | ap->hsm_task_state = HSM_ST_ERR; |
4956 | goto fsm_start; | |
71601958 | 4957 | } |
1da177e4 | 4958 | |
e2cec771 | 4959 | atapi_pio_bytes(qc); |
7fb6ec28 | 4960 | |
e2cec771 AL |
4961 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) |
4962 | /* bad ireason reported by device */ | |
4963 | goto fsm_start; | |
1da177e4 | 4964 | |
e2cec771 AL |
4965 | } else { |
4966 | /* ATA PIO protocol */ | |
4967 | if (unlikely((status & ATA_DRQ) == 0)) { | |
4968 | /* handle BSY=0, DRQ=0 as error */ | |
3655d1d3 AL |
4969 | if (likely(status & (ATA_ERR | ATA_DF))) |
4970 | /* device stops HSM for abort/error */ | |
4971 | qc->err_mask |= AC_ERR_DEV; | |
4972 | else | |
55a8e2c8 TH |
4973 | /* HSM violation. Let EH handle this. |
4974 | * Phantom devices also trigger this | |
4975 | * condition. Mark hint. | |
4976 | */ | |
4977 | qc->err_mask |= AC_ERR_HSM | | |
4978 | AC_ERR_NODEV_HINT; | |
3655d1d3 | 4979 | |
e2cec771 AL |
4980 | ap->hsm_task_state = HSM_ST_ERR; |
4981 | goto fsm_start; | |
4982 | } | |
1da177e4 | 4983 | |
eee6c32f AL |
4984 | /* For PIO reads, some devices may ask for |
4985 | * data transfer (DRQ=1) alone with ERR=1. | |
4986 | * We respect DRQ here and transfer one | |
4987 | * block of junk data before changing the | |
4988 | * hsm_task_state to HSM_ST_ERR. | |
4989 | * | |
4990 | * For PIO writes, ERR=1 DRQ=1 doesn't make | |
4991 | * sense since the data block has been | |
4992 | * transferred to the device. | |
71601958 AL |
4993 | */ |
4994 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
71601958 AL |
4995 | /* data might be corrputed */ |
4996 | qc->err_mask |= AC_ERR_DEV; | |
eee6c32f AL |
4997 | |
4998 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { | |
4999 | ata_pio_sectors(qc); | |
5000 | ata_altstatus(ap); | |
5001 | status = ata_wait_idle(ap); | |
5002 | } | |
5003 | ||
3655d1d3 AL |
5004 | if (status & (ATA_BUSY | ATA_DRQ)) |
5005 | qc->err_mask |= AC_ERR_HSM; | |
5006 | ||
eee6c32f AL |
5007 | /* ata_pio_sectors() might change the |
5008 | * state to HSM_ST_LAST. so, the state | |
5009 | * is changed after ata_pio_sectors(). | |
5010 | */ | |
5011 | ap->hsm_task_state = HSM_ST_ERR; | |
5012 | goto fsm_start; | |
71601958 AL |
5013 | } |
5014 | ||
e2cec771 AL |
5015 | ata_pio_sectors(qc); |
5016 | ||
5017 | if (ap->hsm_task_state == HSM_ST_LAST && | |
5018 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
5019 | /* all data read */ | |
5020 | ata_altstatus(ap); | |
52a32205 | 5021 | status = ata_wait_idle(ap); |
e2cec771 AL |
5022 | goto fsm_start; |
5023 | } | |
5024 | } | |
5025 | ||
5026 | ata_altstatus(ap); /* flush */ | |
bb5cb290 | 5027 | poll_next = 1; |
1da177e4 LT |
5028 | break; |
5029 | ||
14be71f4 | 5030 | case HSM_ST_LAST: |
6912ccd5 AL |
5031 | if (unlikely(!ata_ok(status))) { |
5032 | qc->err_mask |= __ac_err_mask(status); | |
e2cec771 AL |
5033 | ap->hsm_task_state = HSM_ST_ERR; |
5034 | goto fsm_start; | |
5035 | } | |
5036 | ||
5037 | /* no more data to transfer */ | |
4332a771 | 5038 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", |
44877b4e | 5039 | ap->print_id, qc->dev->devno, status); |
e2cec771 | 5040 | |
6912ccd5 AL |
5041 | WARN_ON(qc->err_mask); |
5042 | ||
e2cec771 | 5043 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 5044 | |
e2cec771 | 5045 | /* complete taskfile transaction */ |
c17ea20d | 5046 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
5047 | |
5048 | poll_next = 0; | |
1da177e4 LT |
5049 | break; |
5050 | ||
14be71f4 | 5051 | case HSM_ST_ERR: |
e2cec771 AL |
5052 | /* make sure qc->err_mask is available to |
5053 | * know what's wrong and recover | |
5054 | */ | |
5055 | WARN_ON(qc->err_mask == 0); | |
5056 | ||
5057 | ap->hsm_task_state = HSM_ST_IDLE; | |
bb5cb290 | 5058 | |
999bb6f4 | 5059 | /* complete taskfile transaction */ |
c17ea20d | 5060 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
5061 | |
5062 | poll_next = 0; | |
e2cec771 AL |
5063 | break; |
5064 | default: | |
bb5cb290 | 5065 | poll_next = 0; |
6912ccd5 | 5066 | BUG(); |
1da177e4 LT |
5067 | } |
5068 | ||
bb5cb290 | 5069 | return poll_next; |
1da177e4 LT |
5070 | } |
5071 | ||
65f27f38 | 5072 | static void ata_pio_task(struct work_struct *work) |
8061f5f0 | 5073 | { |
65f27f38 DH |
5074 | struct ata_port *ap = |
5075 | container_of(work, struct ata_port, port_task.work); | |
5076 | struct ata_queued_cmd *qc = ap->port_task_data; | |
8061f5f0 | 5077 | u8 status; |
a1af3734 | 5078 | int poll_next; |
8061f5f0 | 5079 | |
7fb6ec28 | 5080 | fsm_start: |
a1af3734 | 5081 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); |
8061f5f0 | 5082 | |
a1af3734 AL |
5083 | /* |
5084 | * This is purely heuristic. This is a fast path. | |
5085 | * Sometimes when we enter, BSY will be cleared in | |
5086 | * a chk-status or two. If not, the drive is probably seeking | |
5087 | * or something. Snooze for a couple msecs, then | |
5088 | * chk-status again. If still busy, queue delayed work. | |
5089 | */ | |
5090 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
5091 | if (status & ATA_BUSY) { | |
5092 | msleep(2); | |
5093 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
5094 | if (status & ATA_BUSY) { | |
31ce6dae | 5095 | ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); |
a1af3734 AL |
5096 | return; |
5097 | } | |
8061f5f0 TH |
5098 | } |
5099 | ||
a1af3734 AL |
5100 | /* move the HSM */ |
5101 | poll_next = ata_hsm_move(ap, qc, status, 1); | |
8061f5f0 | 5102 | |
a1af3734 AL |
5103 | /* another command or interrupt handler |
5104 | * may be running at this point. | |
5105 | */ | |
5106 | if (poll_next) | |
7fb6ec28 | 5107 | goto fsm_start; |
8061f5f0 TH |
5108 | } |
5109 | ||
1da177e4 LT |
5110 | /** |
5111 | * ata_qc_new - Request an available ATA command, for queueing | |
5112 | * @ap: Port associated with device @dev | |
5113 | * @dev: Device from whom we request an available command structure | |
5114 | * | |
5115 | * LOCKING: | |
0cba632b | 5116 | * None. |
1da177e4 LT |
5117 | */ |
5118 | ||
5119 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
5120 | { | |
5121 | struct ata_queued_cmd *qc = NULL; | |
5122 | unsigned int i; | |
5123 | ||
e3180499 | 5124 | /* no command while frozen */ |
b51e9e5d | 5125 | if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) |
e3180499 TH |
5126 | return NULL; |
5127 | ||
2ab7db1f TH |
5128 | /* the last tag is reserved for internal command. */ |
5129 | for (i = 0; i < ATA_MAX_QUEUE - 1; i++) | |
6cec4a39 | 5130 | if (!test_and_set_bit(i, &ap->qc_allocated)) { |
f69499f4 | 5131 | qc = __ata_qc_from_tag(ap, i); |
1da177e4 LT |
5132 | break; |
5133 | } | |
5134 | ||
5135 | if (qc) | |
5136 | qc->tag = i; | |
5137 | ||
5138 | return qc; | |
5139 | } | |
5140 | ||
5141 | /** | |
5142 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
1da177e4 LT |
5143 | * @dev: Device from whom we request an available command structure |
5144 | * | |
5145 | * LOCKING: | |
0cba632b | 5146 | * None. |
1da177e4 LT |
5147 | */ |
5148 | ||
3373efd8 | 5149 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) |
1da177e4 | 5150 | { |
3373efd8 | 5151 | struct ata_port *ap = dev->ap; |
1da177e4 LT |
5152 | struct ata_queued_cmd *qc; |
5153 | ||
5154 | qc = ata_qc_new(ap); | |
5155 | if (qc) { | |
1da177e4 LT |
5156 | qc->scsicmd = NULL; |
5157 | qc->ap = ap; | |
5158 | qc->dev = dev; | |
1da177e4 | 5159 | |
2c13b7ce | 5160 | ata_qc_reinit(qc); |
1da177e4 LT |
5161 | } |
5162 | ||
5163 | return qc; | |
5164 | } | |
5165 | ||
1da177e4 LT |
5166 | /** |
5167 | * ata_qc_free - free unused ata_queued_cmd | |
5168 | * @qc: Command to complete | |
5169 | * | |
5170 | * Designed to free unused ata_queued_cmd object | |
5171 | * in case something prevents using it. | |
5172 | * | |
5173 | * LOCKING: | |
cca3974e | 5174 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
5175 | */ |
5176 | void ata_qc_free(struct ata_queued_cmd *qc) | |
5177 | { | |
4ba946e9 TH |
5178 | struct ata_port *ap = qc->ap; |
5179 | unsigned int tag; | |
5180 | ||
a4631474 | 5181 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 5182 | |
4ba946e9 TH |
5183 | qc->flags = 0; |
5184 | tag = qc->tag; | |
5185 | if (likely(ata_tag_valid(tag))) { | |
4ba946e9 | 5186 | qc->tag = ATA_TAG_POISON; |
6cec4a39 | 5187 | clear_bit(tag, &ap->qc_allocated); |
4ba946e9 | 5188 | } |
1da177e4 LT |
5189 | } |
5190 | ||
76014427 | 5191 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 5192 | { |
dedaf2b0 TH |
5193 | struct ata_port *ap = qc->ap; |
5194 | ||
a4631474 TH |
5195 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
5196 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
5197 | |
5198 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
5199 | ata_sg_clean(qc); | |
5200 | ||
7401abf2 | 5201 | /* command should be marked inactive atomically with qc completion */ |
dedaf2b0 TH |
5202 | if (qc->tf.protocol == ATA_PROT_NCQ) |
5203 | ap->sactive &= ~(1 << qc->tag); | |
5204 | else | |
5205 | ap->active_tag = ATA_TAG_POISON; | |
7401abf2 | 5206 | |
3f3791d3 AL |
5207 | /* atapi: mark qc as inactive to prevent the interrupt handler |
5208 | * from completing the command twice later, before the error handler | |
5209 | * is called. (when rc != 0 and atapi request sense is needed) | |
5210 | */ | |
5211 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
dedaf2b0 | 5212 | ap->qc_active &= ~(1 << qc->tag); |
3f3791d3 | 5213 | |
1da177e4 | 5214 | /* call completion callback */ |
77853bf2 | 5215 | qc->complete_fn(qc); |
1da177e4 LT |
5216 | } |
5217 | ||
39599a53 TH |
5218 | static void fill_result_tf(struct ata_queued_cmd *qc) |
5219 | { | |
5220 | struct ata_port *ap = qc->ap; | |
5221 | ||
39599a53 | 5222 | qc->result_tf.flags = qc->tf.flags; |
4742d54f | 5223 | ap->ops->tf_read(ap, &qc->result_tf); |
39599a53 TH |
5224 | } |
5225 | ||
f686bcb8 TH |
5226 | /** |
5227 | * ata_qc_complete - Complete an active ATA command | |
5228 | * @qc: Command to complete | |
5229 | * @err_mask: ATA Status register contents | |
5230 | * | |
5231 | * Indicate to the mid and upper layers that an ATA | |
5232 | * command has completed, with either an ok or not-ok status. | |
5233 | * | |
5234 | * LOCKING: | |
cca3974e | 5235 | * spin_lock_irqsave(host lock) |
f686bcb8 TH |
5236 | */ |
5237 | void ata_qc_complete(struct ata_queued_cmd *qc) | |
5238 | { | |
5239 | struct ata_port *ap = qc->ap; | |
5240 | ||
5241 | /* XXX: New EH and old EH use different mechanisms to | |
5242 | * synchronize EH with regular execution path. | |
5243 | * | |
5244 | * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. | |
5245 | * Normal execution path is responsible for not accessing a | |
5246 | * failed qc. libata core enforces the rule by returning NULL | |
5247 | * from ata_qc_from_tag() for failed qcs. | |
5248 | * | |
5249 | * Old EH depends on ata_qc_complete() nullifying completion | |
5250 | * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does | |
5251 | * not synchronize with interrupt handler. Only PIO task is | |
5252 | * taken care of. | |
5253 | */ | |
5254 | if (ap->ops->error_handler) { | |
b51e9e5d | 5255 | WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); |
f686bcb8 TH |
5256 | |
5257 | if (unlikely(qc->err_mask)) | |
5258 | qc->flags |= ATA_QCFLAG_FAILED; | |
5259 | ||
5260 | if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { | |
5261 | if (!ata_tag_internal(qc->tag)) { | |
5262 | /* always fill result TF for failed qc */ | |
39599a53 | 5263 | fill_result_tf(qc); |
f686bcb8 TH |
5264 | ata_qc_schedule_eh(qc); |
5265 | return; | |
5266 | } | |
5267 | } | |
5268 | ||
5269 | /* read result TF if requested */ | |
5270 | if (qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 5271 | fill_result_tf(qc); |
f686bcb8 TH |
5272 | |
5273 | __ata_qc_complete(qc); | |
5274 | } else { | |
5275 | if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) | |
5276 | return; | |
5277 | ||
5278 | /* read result TF if failed or requested */ | |
5279 | if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 5280 | fill_result_tf(qc); |
f686bcb8 TH |
5281 | |
5282 | __ata_qc_complete(qc); | |
5283 | } | |
5284 | } | |
5285 | ||
dedaf2b0 TH |
5286 | /** |
5287 | * ata_qc_complete_multiple - Complete multiple qcs successfully | |
5288 | * @ap: port in question | |
5289 | * @qc_active: new qc_active mask | |
5290 | * @finish_qc: LLDD callback invoked before completing a qc | |
5291 | * | |
5292 | * Complete in-flight commands. This functions is meant to be | |
5293 | * called from low-level driver's interrupt routine to complete | |
5294 | * requests normally. ap->qc_active and @qc_active is compared | |
5295 | * and commands are completed accordingly. | |
5296 | * | |
5297 | * LOCKING: | |
cca3974e | 5298 | * spin_lock_irqsave(host lock) |
dedaf2b0 TH |
5299 | * |
5300 | * RETURNS: | |
5301 | * Number of completed commands on success, -errno otherwise. | |
5302 | */ | |
5303 | int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, | |
5304 | void (*finish_qc)(struct ata_queued_cmd *)) | |
5305 | { | |
5306 | int nr_done = 0; | |
5307 | u32 done_mask; | |
5308 | int i; | |
5309 | ||
5310 | done_mask = ap->qc_active ^ qc_active; | |
5311 | ||
5312 | if (unlikely(done_mask & qc_active)) { | |
5313 | ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " | |
5314 | "(%08x->%08x)\n", ap->qc_active, qc_active); | |
5315 | return -EINVAL; | |
5316 | } | |
5317 | ||
5318 | for (i = 0; i < ATA_MAX_QUEUE; i++) { | |
5319 | struct ata_queued_cmd *qc; | |
5320 | ||
5321 | if (!(done_mask & (1 << i))) | |
5322 | continue; | |
5323 | ||
5324 | if ((qc = ata_qc_from_tag(ap, i))) { | |
5325 | if (finish_qc) | |
5326 | finish_qc(qc); | |
5327 | ata_qc_complete(qc); | |
5328 | nr_done++; | |
5329 | } | |
5330 | } | |
5331 | ||
5332 | return nr_done; | |
5333 | } | |
5334 | ||
1da177e4 LT |
5335 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) |
5336 | { | |
5337 | struct ata_port *ap = qc->ap; | |
5338 | ||
5339 | switch (qc->tf.protocol) { | |
3dc1d881 | 5340 | case ATA_PROT_NCQ: |
1da177e4 LT |
5341 | case ATA_PROT_DMA: |
5342 | case ATA_PROT_ATAPI_DMA: | |
5343 | return 1; | |
5344 | ||
5345 | case ATA_PROT_ATAPI: | |
5346 | case ATA_PROT_PIO: | |
1da177e4 LT |
5347 | if (ap->flags & ATA_FLAG_PIO_DMA) |
5348 | return 1; | |
5349 | ||
5350 | /* fall through */ | |
5351 | ||
5352 | default: | |
5353 | return 0; | |
5354 | } | |
5355 | ||
5356 | /* never reached */ | |
5357 | } | |
5358 | ||
5359 | /** | |
5360 | * ata_qc_issue - issue taskfile to device | |
5361 | * @qc: command to issue to device | |
5362 | * | |
5363 | * Prepare an ATA command to submission to device. | |
5364 | * This includes mapping the data into a DMA-able | |
5365 | * area, filling in the S/G table, and finally | |
5366 | * writing the taskfile to hardware, starting the command. | |
5367 | * | |
5368 | * LOCKING: | |
cca3974e | 5369 | * spin_lock_irqsave(host lock) |
1da177e4 | 5370 | */ |
8e0e694a | 5371 | void ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
5372 | { |
5373 | struct ata_port *ap = qc->ap; | |
5374 | ||
dedaf2b0 TH |
5375 | /* Make sure only one non-NCQ command is outstanding. The |
5376 | * check is skipped for old EH because it reuses active qc to | |
5377 | * request ATAPI sense. | |
5378 | */ | |
5379 | WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag)); | |
5380 | ||
5381 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
5382 | WARN_ON(ap->sactive & (1 << qc->tag)); | |
5383 | ap->sactive |= 1 << qc->tag; | |
5384 | } else { | |
5385 | WARN_ON(ap->sactive); | |
5386 | ap->active_tag = qc->tag; | |
5387 | } | |
5388 | ||
e4a70e76 | 5389 | qc->flags |= ATA_QCFLAG_ACTIVE; |
dedaf2b0 | 5390 | ap->qc_active |= 1 << qc->tag; |
e4a70e76 | 5391 | |
1da177e4 LT |
5392 | if (ata_should_dma_map(qc)) { |
5393 | if (qc->flags & ATA_QCFLAG_SG) { | |
5394 | if (ata_sg_setup(qc)) | |
8e436af9 | 5395 | goto sg_err; |
1da177e4 LT |
5396 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
5397 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 5398 | goto sg_err; |
1da177e4 LT |
5399 | } |
5400 | } else { | |
5401 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
5402 | } | |
5403 | ||
5404 | ap->ops->qc_prep(qc); | |
5405 | ||
8e0e694a TH |
5406 | qc->err_mask |= ap->ops->qc_issue(qc); |
5407 | if (unlikely(qc->err_mask)) | |
5408 | goto err; | |
5409 | return; | |
1da177e4 | 5410 | |
8e436af9 TH |
5411 | sg_err: |
5412 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
8e0e694a TH |
5413 | qc->err_mask |= AC_ERR_SYSTEM; |
5414 | err: | |
5415 | ata_qc_complete(qc); | |
1da177e4 LT |
5416 | } |
5417 | ||
5418 | /** | |
5419 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
5420 | * @qc: command to issue to device | |
5421 | * | |
5422 | * Using various libata functions and hooks, this function | |
5423 | * starts an ATA command. ATA commands are grouped into | |
5424 | * classes called "protocols", and issuing each type of protocol | |
5425 | * is slightly different. | |
5426 | * | |
0baab86b EF |
5427 | * May be used as the qc_issue() entry in ata_port_operations. |
5428 | * | |
1da177e4 | 5429 | * LOCKING: |
cca3974e | 5430 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
5431 | * |
5432 | * RETURNS: | |
9a3d9eb0 | 5433 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
5434 | */ |
5435 | ||
9a3d9eb0 | 5436 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
5437 | { |
5438 | struct ata_port *ap = qc->ap; | |
5439 | ||
e50362ec AL |
5440 | /* Use polling pio if the LLD doesn't handle |
5441 | * interrupt driven pio and atapi CDB interrupt. | |
5442 | */ | |
5443 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
5444 | switch (qc->tf.protocol) { | |
5445 | case ATA_PROT_PIO: | |
e3472cbe | 5446 | case ATA_PROT_NODATA: |
e50362ec AL |
5447 | case ATA_PROT_ATAPI: |
5448 | case ATA_PROT_ATAPI_NODATA: | |
5449 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
5450 | break; | |
5451 | case ATA_PROT_ATAPI_DMA: | |
5452 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
3a778275 | 5453 | /* see ata_dma_blacklisted() */ |
e50362ec AL |
5454 | BUG(); |
5455 | break; | |
5456 | default: | |
5457 | break; | |
5458 | } | |
5459 | } | |
5460 | ||
312f7da2 | 5461 | /* select the device */ |
1da177e4 LT |
5462 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
5463 | ||
312f7da2 | 5464 | /* start the command */ |
1da177e4 LT |
5465 | switch (qc->tf.protocol) { |
5466 | case ATA_PROT_NODATA: | |
312f7da2 AL |
5467 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
5468 | ata_qc_set_polling(qc); | |
5469 | ||
e5338254 | 5470 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
5471 | ap->hsm_task_state = HSM_ST_LAST; |
5472 | ||
5473 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 5474 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
312f7da2 | 5475 | |
1da177e4 LT |
5476 | break; |
5477 | ||
5478 | case ATA_PROT_DMA: | |
587005de | 5479 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 5480 | |
1da177e4 LT |
5481 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
5482 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
5483 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 5484 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
5485 | break; |
5486 | ||
312f7da2 AL |
5487 | case ATA_PROT_PIO: |
5488 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
5489 | ata_qc_set_polling(qc); | |
1da177e4 | 5490 | |
e5338254 | 5491 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 | 5492 | |
54f00389 AL |
5493 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
5494 | /* PIO data out protocol */ | |
5495 | ap->hsm_task_state = HSM_ST_FIRST; | |
31ce6dae | 5496 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
5497 | |
5498 | /* always send first data block using | |
e27486db | 5499 | * the ata_pio_task() codepath. |
54f00389 | 5500 | */ |
312f7da2 | 5501 | } else { |
54f00389 AL |
5502 | /* PIO data in protocol */ |
5503 | ap->hsm_task_state = HSM_ST; | |
5504 | ||
5505 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 5506 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
5507 | |
5508 | /* if polling, ata_pio_task() handles the rest. | |
5509 | * otherwise, interrupt handler takes over from here. | |
5510 | */ | |
312f7da2 AL |
5511 | } |
5512 | ||
1da177e4 LT |
5513 | break; |
5514 | ||
1da177e4 | 5515 | case ATA_PROT_ATAPI: |
1da177e4 | 5516 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
5517 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
5518 | ata_qc_set_polling(qc); | |
5519 | ||
e5338254 | 5520 | ata_tf_to_host(ap, &qc->tf); |
f6ef65e6 | 5521 | |
312f7da2 AL |
5522 | ap->hsm_task_state = HSM_ST_FIRST; |
5523 | ||
5524 | /* send cdb by polling if no cdb interrupt */ | |
5525 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
5526 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
31ce6dae | 5527 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
5528 | break; |
5529 | ||
5530 | case ATA_PROT_ATAPI_DMA: | |
587005de | 5531 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 5532 | |
1da177e4 LT |
5533 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
5534 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
5535 | ap->hsm_task_state = HSM_ST_FIRST; |
5536 | ||
5537 | /* send cdb by polling if no cdb interrupt */ | |
5538 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
31ce6dae | 5539 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
5540 | break; |
5541 | ||
5542 | default: | |
5543 | WARN_ON(1); | |
9a3d9eb0 | 5544 | return AC_ERR_SYSTEM; |
1da177e4 LT |
5545 | } |
5546 | ||
5547 | return 0; | |
5548 | } | |
5549 | ||
1da177e4 LT |
5550 | /** |
5551 | * ata_host_intr - Handle host interrupt for given (port, task) | |
5552 | * @ap: Port on which interrupt arrived (possibly...) | |
5553 | * @qc: Taskfile currently active in engine | |
5554 | * | |
5555 | * Handle host interrupt for given queued command. Currently, | |
5556 | * only DMA interrupts are handled. All other commands are | |
5557 | * handled via polling with interrupts disabled (nIEN bit). | |
5558 | * | |
5559 | * LOCKING: | |
cca3974e | 5560 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
5561 | * |
5562 | * RETURNS: | |
5563 | * One if interrupt was handled, zero if not (shared irq). | |
5564 | */ | |
5565 | ||
5566 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
5567 | struct ata_queued_cmd *qc) | |
5568 | { | |
ea54763f | 5569 | struct ata_eh_info *ehi = &ap->eh_info; |
312f7da2 | 5570 | u8 status, host_stat = 0; |
1da177e4 | 5571 | |
312f7da2 | 5572 | VPRINTK("ata%u: protocol %d task_state %d\n", |
44877b4e | 5573 | ap->print_id, qc->tf.protocol, ap->hsm_task_state); |
1da177e4 | 5574 | |
312f7da2 AL |
5575 | /* Check whether we are expecting interrupt in this state */ |
5576 | switch (ap->hsm_task_state) { | |
5577 | case HSM_ST_FIRST: | |
6912ccd5 AL |
5578 | /* Some pre-ATAPI-4 devices assert INTRQ |
5579 | * at this state when ready to receive CDB. | |
5580 | */ | |
1da177e4 | 5581 | |
312f7da2 AL |
5582 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. |
5583 | * The flag was turned on only for atapi devices. | |
5584 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
5585 | */ | |
5586 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 5587 | goto idle_irq; |
1da177e4 | 5588 | break; |
312f7da2 AL |
5589 | case HSM_ST_LAST: |
5590 | if (qc->tf.protocol == ATA_PROT_DMA || | |
5591 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
5592 | /* check status of DMA engine */ | |
5593 | host_stat = ap->ops->bmdma_status(ap); | |
44877b4e TH |
5594 | VPRINTK("ata%u: host_stat 0x%X\n", |
5595 | ap->print_id, host_stat); | |
312f7da2 AL |
5596 | |
5597 | /* if it's not our irq... */ | |
5598 | if (!(host_stat & ATA_DMA_INTR)) | |
5599 | goto idle_irq; | |
5600 | ||
5601 | /* before we do anything else, clear DMA-Start bit */ | |
5602 | ap->ops->bmdma_stop(qc); | |
a4f16610 AL |
5603 | |
5604 | if (unlikely(host_stat & ATA_DMA_ERR)) { | |
5605 | /* error when transfering data to/from memory */ | |
5606 | qc->err_mask |= AC_ERR_HOST_BUS; | |
5607 | ap->hsm_task_state = HSM_ST_ERR; | |
5608 | } | |
312f7da2 AL |
5609 | } |
5610 | break; | |
5611 | case HSM_ST: | |
5612 | break; | |
1da177e4 LT |
5613 | default: |
5614 | goto idle_irq; | |
5615 | } | |
5616 | ||
312f7da2 AL |
5617 | /* check altstatus */ |
5618 | status = ata_altstatus(ap); | |
5619 | if (status & ATA_BUSY) | |
5620 | goto idle_irq; | |
1da177e4 | 5621 | |
312f7da2 AL |
5622 | /* check main status, clearing INTRQ */ |
5623 | status = ata_chk_status(ap); | |
5624 | if (unlikely(status & ATA_BUSY)) | |
5625 | goto idle_irq; | |
1da177e4 | 5626 | |
312f7da2 AL |
5627 | /* ack bmdma irq events */ |
5628 | ap->ops->irq_clear(ap); | |
1da177e4 | 5629 | |
bb5cb290 | 5630 | ata_hsm_move(ap, qc, status, 0); |
ea54763f TH |
5631 | |
5632 | if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || | |
5633 | qc->tf.protocol == ATA_PROT_ATAPI_DMA)) | |
5634 | ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); | |
5635 | ||
1da177e4 LT |
5636 | return 1; /* irq handled */ |
5637 | ||
5638 | idle_irq: | |
5639 | ap->stats.idle_irq++; | |
5640 | ||
5641 | #ifdef ATA_IRQ_TRAP | |
5642 | if ((ap->stats.idle_irq % 1000) == 0) { | |
83625006 | 5643 | ap->ops->irq_ack(ap, 0); /* debug trap */ |
f15a1daf | 5644 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
23cfce89 | 5645 | return 1; |
1da177e4 LT |
5646 | } |
5647 | #endif | |
5648 | return 0; /* irq not handled */ | |
5649 | } | |
5650 | ||
5651 | /** | |
5652 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b | 5653 | * @irq: irq line (unused) |
cca3974e | 5654 | * @dev_instance: pointer to our ata_host information structure |
1da177e4 | 5655 | * |
0cba632b JG |
5656 | * Default interrupt handler for PCI IDE devices. Calls |
5657 | * ata_host_intr() for each port that is not disabled. | |
5658 | * | |
1da177e4 | 5659 | * LOCKING: |
cca3974e | 5660 | * Obtains host lock during operation. |
1da177e4 LT |
5661 | * |
5662 | * RETURNS: | |
0cba632b | 5663 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
5664 | */ |
5665 | ||
7d12e780 | 5666 | irqreturn_t ata_interrupt (int irq, void *dev_instance) |
1da177e4 | 5667 | { |
cca3974e | 5668 | struct ata_host *host = dev_instance; |
1da177e4 LT |
5669 | unsigned int i; |
5670 | unsigned int handled = 0; | |
5671 | unsigned long flags; | |
5672 | ||
5673 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
cca3974e | 5674 | spin_lock_irqsave(&host->lock, flags); |
1da177e4 | 5675 | |
cca3974e | 5676 | for (i = 0; i < host->n_ports; i++) { |
1da177e4 LT |
5677 | struct ata_port *ap; |
5678 | ||
cca3974e | 5679 | ap = host->ports[i]; |
c1389503 | 5680 | if (ap && |
029f5468 | 5681 | !(ap->flags & ATA_FLAG_DISABLED)) { |
1da177e4 LT |
5682 | struct ata_queued_cmd *qc; |
5683 | ||
5684 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
312f7da2 | 5685 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 5686 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
5687 | handled |= ata_host_intr(ap, qc); |
5688 | } | |
5689 | } | |
5690 | ||
cca3974e | 5691 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 LT |
5692 | |
5693 | return IRQ_RETVAL(handled); | |
5694 | } | |
5695 | ||
34bf2170 TH |
5696 | /** |
5697 | * sata_scr_valid - test whether SCRs are accessible | |
5698 | * @ap: ATA port to test SCR accessibility for | |
5699 | * | |
5700 | * Test whether SCRs are accessible for @ap. | |
5701 | * | |
5702 | * LOCKING: | |
5703 | * None. | |
5704 | * | |
5705 | * RETURNS: | |
5706 | * 1 if SCRs are accessible, 0 otherwise. | |
5707 | */ | |
5708 | int sata_scr_valid(struct ata_port *ap) | |
5709 | { | |
a16abc0b | 5710 | return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read; |
34bf2170 TH |
5711 | } |
5712 | ||
5713 | /** | |
5714 | * sata_scr_read - read SCR register of the specified port | |
5715 | * @ap: ATA port to read SCR for | |
5716 | * @reg: SCR to read | |
5717 | * @val: Place to store read value | |
5718 | * | |
5719 | * Read SCR register @reg of @ap into *@val. This function is | |
5720 | * guaranteed to succeed if the cable type of the port is SATA | |
5721 | * and the port implements ->scr_read. | |
5722 | * | |
5723 | * LOCKING: | |
5724 | * None. | |
5725 | * | |
5726 | * RETURNS: | |
5727 | * 0 on success, negative errno on failure. | |
5728 | */ | |
5729 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | |
5730 | { | |
5731 | if (sata_scr_valid(ap)) { | |
5732 | *val = ap->ops->scr_read(ap, reg); | |
5733 | return 0; | |
5734 | } | |
5735 | return -EOPNOTSUPP; | |
5736 | } | |
5737 | ||
5738 | /** | |
5739 | * sata_scr_write - write SCR register of the specified port | |
5740 | * @ap: ATA port to write SCR for | |
5741 | * @reg: SCR to write | |
5742 | * @val: value to write | |
5743 | * | |
5744 | * Write @val to SCR register @reg of @ap. This function is | |
5745 | * guaranteed to succeed if the cable type of the port is SATA | |
5746 | * and the port implements ->scr_read. | |
5747 | * | |
5748 | * LOCKING: | |
5749 | * None. | |
5750 | * | |
5751 | * RETURNS: | |
5752 | * 0 on success, negative errno on failure. | |
5753 | */ | |
5754 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) | |
5755 | { | |
5756 | if (sata_scr_valid(ap)) { | |
5757 | ap->ops->scr_write(ap, reg, val); | |
5758 | return 0; | |
5759 | } | |
5760 | return -EOPNOTSUPP; | |
5761 | } | |
5762 | ||
5763 | /** | |
5764 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
5765 | * @ap: ATA port to write SCR for | |
5766 | * @reg: SCR to write | |
5767 | * @val: value to write | |
5768 | * | |
5769 | * This function is identical to sata_scr_write() except that this | |
5770 | * function performs flush after writing to the register. | |
5771 | * | |
5772 | * LOCKING: | |
5773 | * None. | |
5774 | * | |
5775 | * RETURNS: | |
5776 | * 0 on success, negative errno on failure. | |
5777 | */ | |
5778 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) | |
5779 | { | |
5780 | if (sata_scr_valid(ap)) { | |
5781 | ap->ops->scr_write(ap, reg, val); | |
5782 | ap->ops->scr_read(ap, reg); | |
5783 | return 0; | |
5784 | } | |
5785 | return -EOPNOTSUPP; | |
5786 | } | |
5787 | ||
5788 | /** | |
5789 | * ata_port_online - test whether the given port is online | |
5790 | * @ap: ATA port to test | |
5791 | * | |
5792 | * Test whether @ap is online. Note that this function returns 0 | |
5793 | * if online status of @ap cannot be obtained, so | |
5794 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5795 | * | |
5796 | * LOCKING: | |
5797 | * None. | |
5798 | * | |
5799 | * RETURNS: | |
5800 | * 1 if the port online status is available and online. | |
5801 | */ | |
5802 | int ata_port_online(struct ata_port *ap) | |
5803 | { | |
5804 | u32 sstatus; | |
5805 | ||
5806 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) | |
5807 | return 1; | |
5808 | return 0; | |
5809 | } | |
5810 | ||
5811 | /** | |
5812 | * ata_port_offline - test whether the given port is offline | |
5813 | * @ap: ATA port to test | |
5814 | * | |
5815 | * Test whether @ap is offline. Note that this function returns | |
5816 | * 0 if offline status of @ap cannot be obtained, so | |
5817 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5818 | * | |
5819 | * LOCKING: | |
5820 | * None. | |
5821 | * | |
5822 | * RETURNS: | |
5823 | * 1 if the port offline status is available and offline. | |
5824 | */ | |
5825 | int ata_port_offline(struct ata_port *ap) | |
5826 | { | |
5827 | u32 sstatus; | |
5828 | ||
5829 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) | |
5830 | return 1; | |
5831 | return 0; | |
5832 | } | |
0baab86b | 5833 | |
77b08fb5 | 5834 | int ata_flush_cache(struct ata_device *dev) |
9b847548 | 5835 | { |
977e6b9f | 5836 | unsigned int err_mask; |
9b847548 JA |
5837 | u8 cmd; |
5838 | ||
5839 | if (!ata_try_flush_cache(dev)) | |
5840 | return 0; | |
5841 | ||
6fc49adb | 5842 | if (dev->flags & ATA_DFLAG_FLUSH_EXT) |
9b847548 JA |
5843 | cmd = ATA_CMD_FLUSH_EXT; |
5844 | else | |
5845 | cmd = ATA_CMD_FLUSH; | |
5846 | ||
977e6b9f TH |
5847 | err_mask = ata_do_simple_cmd(dev, cmd); |
5848 | if (err_mask) { | |
5849 | ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); | |
5850 | return -EIO; | |
5851 | } | |
5852 | ||
5853 | return 0; | |
9b847548 JA |
5854 | } |
5855 | ||
6ffa01d8 | 5856 | #ifdef CONFIG_PM |
cca3974e JG |
5857 | static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, |
5858 | unsigned int action, unsigned int ehi_flags, | |
5859 | int wait) | |
500530f6 TH |
5860 | { |
5861 | unsigned long flags; | |
5862 | int i, rc; | |
5863 | ||
cca3974e JG |
5864 | for (i = 0; i < host->n_ports; i++) { |
5865 | struct ata_port *ap = host->ports[i]; | |
500530f6 TH |
5866 | |
5867 | /* Previous resume operation might still be in | |
5868 | * progress. Wait for PM_PENDING to clear. | |
5869 | */ | |
5870 | if (ap->pflags & ATA_PFLAG_PM_PENDING) { | |
5871 | ata_port_wait_eh(ap); | |
5872 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5873 | } | |
5874 | ||
5875 | /* request PM ops to EH */ | |
5876 | spin_lock_irqsave(ap->lock, flags); | |
5877 | ||
5878 | ap->pm_mesg = mesg; | |
5879 | if (wait) { | |
5880 | rc = 0; | |
5881 | ap->pm_result = &rc; | |
5882 | } | |
5883 | ||
5884 | ap->pflags |= ATA_PFLAG_PM_PENDING; | |
5885 | ap->eh_info.action |= action; | |
5886 | ap->eh_info.flags |= ehi_flags; | |
5887 | ||
5888 | ata_port_schedule_eh(ap); | |
5889 | ||
5890 | spin_unlock_irqrestore(ap->lock, flags); | |
5891 | ||
5892 | /* wait and check result */ | |
5893 | if (wait) { | |
5894 | ata_port_wait_eh(ap); | |
5895 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5896 | if (rc) | |
5897 | return rc; | |
5898 | } | |
5899 | } | |
5900 | ||
5901 | return 0; | |
5902 | } | |
5903 | ||
5904 | /** | |
cca3974e JG |
5905 | * ata_host_suspend - suspend host |
5906 | * @host: host to suspend | |
500530f6 TH |
5907 | * @mesg: PM message |
5908 | * | |
cca3974e | 5909 | * Suspend @host. Actual operation is performed by EH. This |
500530f6 TH |
5910 | * function requests EH to perform PM operations and waits for EH |
5911 | * to finish. | |
5912 | * | |
5913 | * LOCKING: | |
5914 | * Kernel thread context (may sleep). | |
5915 | * | |
5916 | * RETURNS: | |
5917 | * 0 on success, -errno on failure. | |
5918 | */ | |
cca3974e | 5919 | int ata_host_suspend(struct ata_host *host, pm_message_t mesg) |
500530f6 | 5920 | { |
9666f400 | 5921 | int rc; |
500530f6 | 5922 | |
cca3974e | 5923 | rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); |
9666f400 TH |
5924 | if (rc == 0) |
5925 | host->dev->power.power_state = mesg; | |
500530f6 TH |
5926 | return rc; |
5927 | } | |
5928 | ||
5929 | /** | |
cca3974e JG |
5930 | * ata_host_resume - resume host |
5931 | * @host: host to resume | |
500530f6 | 5932 | * |
cca3974e | 5933 | * Resume @host. Actual operation is performed by EH. This |
500530f6 TH |
5934 | * function requests EH to perform PM operations and returns. |
5935 | * Note that all resume operations are performed parallely. | |
5936 | * | |
5937 | * LOCKING: | |
5938 | * Kernel thread context (may sleep). | |
5939 | */ | |
cca3974e | 5940 | void ata_host_resume(struct ata_host *host) |
500530f6 | 5941 | { |
cca3974e JG |
5942 | ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, |
5943 | ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); | |
5944 | host->dev->power.power_state = PMSG_ON; | |
500530f6 | 5945 | } |
6ffa01d8 | 5946 | #endif |
500530f6 | 5947 | |
c893a3ae RD |
5948 | /** |
5949 | * ata_port_start - Set port up for dma. | |
5950 | * @ap: Port to initialize | |
5951 | * | |
5952 | * Called just after data structures for each port are | |
5953 | * initialized. Allocates space for PRD table. | |
5954 | * | |
5955 | * May be used as the port_start() entry in ata_port_operations. | |
5956 | * | |
5957 | * LOCKING: | |
5958 | * Inherited from caller. | |
5959 | */ | |
f0d36efd | 5960 | int ata_port_start(struct ata_port *ap) |
1da177e4 | 5961 | { |
2f1f610b | 5962 | struct device *dev = ap->dev; |
6037d6bb | 5963 | int rc; |
1da177e4 | 5964 | |
f0d36efd TH |
5965 | ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, |
5966 | GFP_KERNEL); | |
1da177e4 LT |
5967 | if (!ap->prd) |
5968 | return -ENOMEM; | |
5969 | ||
6037d6bb | 5970 | rc = ata_pad_alloc(ap, dev); |
f0d36efd | 5971 | if (rc) |
6037d6bb | 5972 | return rc; |
1da177e4 | 5973 | |
f0d36efd TH |
5974 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, |
5975 | (unsigned long long)ap->prd_dma); | |
1da177e4 LT |
5976 | return 0; |
5977 | } | |
5978 | ||
3ef3b43d TH |
5979 | /** |
5980 | * ata_dev_init - Initialize an ata_device structure | |
5981 | * @dev: Device structure to initialize | |
5982 | * | |
5983 | * Initialize @dev in preparation for probing. | |
5984 | * | |
5985 | * LOCKING: | |
5986 | * Inherited from caller. | |
5987 | */ | |
5988 | void ata_dev_init(struct ata_device *dev) | |
5989 | { | |
5990 | struct ata_port *ap = dev->ap; | |
72fa4b74 TH |
5991 | unsigned long flags; |
5992 | ||
5a04bf4b TH |
5993 | /* SATA spd limit is bound to the first device */ |
5994 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5995 | ||
72fa4b74 TH |
5996 | /* High bits of dev->flags are used to record warm plug |
5997 | * requests which occur asynchronously. Synchronize using | |
cca3974e | 5998 | * host lock. |
72fa4b74 | 5999 | */ |
ba6a1308 | 6000 | spin_lock_irqsave(ap->lock, flags); |
72fa4b74 | 6001 | dev->flags &= ~ATA_DFLAG_INIT_MASK; |
ba6a1308 | 6002 | spin_unlock_irqrestore(ap->lock, flags); |
3ef3b43d | 6003 | |
72fa4b74 TH |
6004 | memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, |
6005 | sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); | |
3ef3b43d TH |
6006 | dev->pio_mask = UINT_MAX; |
6007 | dev->mwdma_mask = UINT_MAX; | |
6008 | dev->udma_mask = UINT_MAX; | |
6009 | } | |
6010 | ||
1da177e4 | 6011 | /** |
f3187195 TH |
6012 | * ata_port_alloc - allocate and initialize basic ATA port resources |
6013 | * @host: ATA host this allocated port belongs to | |
1da177e4 | 6014 | * |
f3187195 TH |
6015 | * Allocate and initialize basic ATA port resources. |
6016 | * | |
6017 | * RETURNS: | |
6018 | * Allocate ATA port on success, NULL on failure. | |
0cba632b | 6019 | * |
1da177e4 | 6020 | * LOCKING: |
f3187195 | 6021 | * Inherited from calling layer (may sleep). |
1da177e4 | 6022 | */ |
f3187195 | 6023 | struct ata_port *ata_port_alloc(struct ata_host *host) |
1da177e4 | 6024 | { |
f3187195 | 6025 | struct ata_port *ap; |
1da177e4 LT |
6026 | unsigned int i; |
6027 | ||
f3187195 TH |
6028 | DPRINTK("ENTER\n"); |
6029 | ||
6030 | ap = kzalloc(sizeof(*ap), GFP_KERNEL); | |
6031 | if (!ap) | |
6032 | return NULL; | |
6033 | ||
f4d6d004 | 6034 | ap->pflags |= ATA_PFLAG_INITIALIZING; |
cca3974e | 6035 | ap->lock = &host->lock; |
198e0fed | 6036 | ap->flags = ATA_FLAG_DISABLED; |
f3187195 | 6037 | ap->print_id = -1; |
1da177e4 | 6038 | ap->ctl = ATA_DEVCTL_OBS; |
cca3974e | 6039 | ap->host = host; |
f3187195 TH |
6040 | ap->dev = host->dev; |
6041 | ||
5a04bf4b | 6042 | ap->hw_sata_spd_limit = UINT_MAX; |
1da177e4 LT |
6043 | ap->active_tag = ATA_TAG_POISON; |
6044 | ap->last_ctl = 0xFF; | |
bd5d825c BP |
6045 | |
6046 | #if defined(ATA_VERBOSE_DEBUG) | |
6047 | /* turn on all debugging levels */ | |
6048 | ap->msg_enable = 0x00FF; | |
6049 | #elif defined(ATA_DEBUG) | |
6050 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; | |
88574551 | 6051 | #else |
0dd4b21f | 6052 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; |
bd5d825c | 6053 | #endif |
1da177e4 | 6054 | |
65f27f38 DH |
6055 | INIT_DELAYED_WORK(&ap->port_task, NULL); |
6056 | INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); | |
6057 | INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); | |
a72ec4ce | 6058 | INIT_LIST_HEAD(&ap->eh_done_q); |
c6cf9e99 | 6059 | init_waitqueue_head(&ap->eh_wait_q); |
1da177e4 | 6060 | |
838df628 | 6061 | ap->cbl = ATA_CBL_NONE; |
838df628 | 6062 | |
acf356b1 TH |
6063 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
6064 | struct ata_device *dev = &ap->device[i]; | |
38d87234 | 6065 | dev->ap = ap; |
72fa4b74 | 6066 | dev->devno = i; |
3ef3b43d | 6067 | ata_dev_init(dev); |
acf356b1 | 6068 | } |
1da177e4 LT |
6069 | |
6070 | #ifdef ATA_IRQ_TRAP | |
6071 | ap->stats.unhandled_irq = 1; | |
6072 | ap->stats.idle_irq = 1; | |
6073 | #endif | |
1da177e4 | 6074 | return ap; |
1da177e4 LT |
6075 | } |
6076 | ||
f0d36efd TH |
6077 | static void ata_host_release(struct device *gendev, void *res) |
6078 | { | |
6079 | struct ata_host *host = dev_get_drvdata(gendev); | |
6080 | int i; | |
6081 | ||
6082 | for (i = 0; i < host->n_ports; i++) { | |
6083 | struct ata_port *ap = host->ports[i]; | |
6084 | ||
ecef7253 TH |
6085 | if (!ap) |
6086 | continue; | |
6087 | ||
6088 | if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop) | |
f0d36efd | 6089 | ap->ops->port_stop(ap); |
f0d36efd TH |
6090 | } |
6091 | ||
ecef7253 | 6092 | if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop) |
f0d36efd | 6093 | host->ops->host_stop(host); |
1aa56cca | 6094 | |
1aa506e4 TH |
6095 | for (i = 0; i < host->n_ports; i++) { |
6096 | struct ata_port *ap = host->ports[i]; | |
6097 | ||
4911487a TH |
6098 | if (!ap) |
6099 | continue; | |
6100 | ||
6101 | if (ap->scsi_host) | |
1aa506e4 TH |
6102 | scsi_host_put(ap->scsi_host); |
6103 | ||
4911487a | 6104 | kfree(ap); |
1aa506e4 TH |
6105 | host->ports[i] = NULL; |
6106 | } | |
6107 | ||
1aa56cca | 6108 | dev_set_drvdata(gendev, NULL); |
f0d36efd TH |
6109 | } |
6110 | ||
f3187195 TH |
6111 | /** |
6112 | * ata_host_alloc - allocate and init basic ATA host resources | |
6113 | * @dev: generic device this host is associated with | |
6114 | * @max_ports: maximum number of ATA ports associated with this host | |
6115 | * | |
6116 | * Allocate and initialize basic ATA host resources. LLD calls | |
6117 | * this function to allocate a host, initializes it fully and | |
6118 | * attaches it using ata_host_register(). | |
6119 | * | |
6120 | * @max_ports ports are allocated and host->n_ports is | |
6121 | * initialized to @max_ports. The caller is allowed to decrease | |
6122 | * host->n_ports before calling ata_host_register(). The unused | |
6123 | * ports will be automatically freed on registration. | |
6124 | * | |
6125 | * RETURNS: | |
6126 | * Allocate ATA host on success, NULL on failure. | |
6127 | * | |
6128 | * LOCKING: | |
6129 | * Inherited from calling layer (may sleep). | |
6130 | */ | |
6131 | struct ata_host *ata_host_alloc(struct device *dev, int max_ports) | |
6132 | { | |
6133 | struct ata_host *host; | |
6134 | size_t sz; | |
6135 | int i; | |
6136 | ||
6137 | DPRINTK("ENTER\n"); | |
6138 | ||
6139 | if (!devres_open_group(dev, NULL, GFP_KERNEL)) | |
6140 | return NULL; | |
6141 | ||
6142 | /* alloc a container for our list of ATA ports (buses) */ | |
6143 | sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *); | |
6144 | /* alloc a container for our list of ATA ports (buses) */ | |
6145 | host = devres_alloc(ata_host_release, sz, GFP_KERNEL); | |
6146 | if (!host) | |
6147 | goto err_out; | |
6148 | ||
6149 | devres_add(dev, host); | |
6150 | dev_set_drvdata(dev, host); | |
6151 | ||
6152 | spin_lock_init(&host->lock); | |
6153 | host->dev = dev; | |
6154 | host->n_ports = max_ports; | |
6155 | ||
6156 | /* allocate ports bound to this host */ | |
6157 | for (i = 0; i < max_ports; i++) { | |
6158 | struct ata_port *ap; | |
6159 | ||
6160 | ap = ata_port_alloc(host); | |
6161 | if (!ap) | |
6162 | goto err_out; | |
6163 | ||
6164 | ap->port_no = i; | |
6165 | host->ports[i] = ap; | |
6166 | } | |
6167 | ||
6168 | devres_remove_group(dev, NULL); | |
6169 | return host; | |
6170 | ||
6171 | err_out: | |
6172 | devres_release_group(dev, NULL); | |
6173 | return NULL; | |
6174 | } | |
6175 | ||
f5cda257 TH |
6176 | /** |
6177 | * ata_host_alloc_pinfo - alloc host and init with port_info array | |
6178 | * @dev: generic device this host is associated with | |
6179 | * @ppi: array of ATA port_info to initialize host with | |
6180 | * @n_ports: number of ATA ports attached to this host | |
6181 | * | |
6182 | * Allocate ATA host and initialize with info from @ppi. If NULL | |
6183 | * terminated, @ppi may contain fewer entries than @n_ports. The | |
6184 | * last entry will be used for the remaining ports. | |
6185 | * | |
6186 | * RETURNS: | |
6187 | * Allocate ATA host on success, NULL on failure. | |
6188 | * | |
6189 | * LOCKING: | |
6190 | * Inherited from calling layer (may sleep). | |
6191 | */ | |
6192 | struct ata_host *ata_host_alloc_pinfo(struct device *dev, | |
6193 | const struct ata_port_info * const * ppi, | |
6194 | int n_ports) | |
6195 | { | |
6196 | const struct ata_port_info *pi; | |
6197 | struct ata_host *host; | |
6198 | int i, j; | |
6199 | ||
6200 | host = ata_host_alloc(dev, n_ports); | |
6201 | if (!host) | |
6202 | return NULL; | |
6203 | ||
6204 | for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) { | |
6205 | struct ata_port *ap = host->ports[i]; | |
6206 | ||
6207 | if (ppi[j]) | |
6208 | pi = ppi[j++]; | |
6209 | ||
6210 | ap->pio_mask = pi->pio_mask; | |
6211 | ap->mwdma_mask = pi->mwdma_mask; | |
6212 | ap->udma_mask = pi->udma_mask; | |
6213 | ap->flags |= pi->flags; | |
6214 | ap->ops = pi->port_ops; | |
6215 | ||
6216 | if (!host->ops && (pi->port_ops != &ata_dummy_port_ops)) | |
6217 | host->ops = pi->port_ops; | |
6218 | if (!host->private_data && pi->private_data) | |
6219 | host->private_data = pi->private_data; | |
6220 | } | |
6221 | ||
6222 | return host; | |
6223 | } | |
6224 | ||
ecef7253 TH |
6225 | /** |
6226 | * ata_host_start - start and freeze ports of an ATA host | |
6227 | * @host: ATA host to start ports for | |
6228 | * | |
6229 | * Start and then freeze ports of @host. Started status is | |
6230 | * recorded in host->flags, so this function can be called | |
6231 | * multiple times. Ports are guaranteed to get started only | |
f3187195 TH |
6232 | * once. If host->ops isn't initialized yet, its set to the |
6233 | * first non-dummy port ops. | |
ecef7253 TH |
6234 | * |
6235 | * LOCKING: | |
6236 | * Inherited from calling layer (may sleep). | |
6237 | * | |
6238 | * RETURNS: | |
6239 | * 0 if all ports are started successfully, -errno otherwise. | |
6240 | */ | |
6241 | int ata_host_start(struct ata_host *host) | |
6242 | { | |
6243 | int i, rc; | |
6244 | ||
6245 | if (host->flags & ATA_HOST_STARTED) | |
6246 | return 0; | |
6247 | ||
6248 | for (i = 0; i < host->n_ports; i++) { | |
6249 | struct ata_port *ap = host->ports[i]; | |
6250 | ||
f3187195 TH |
6251 | if (!host->ops && !ata_port_is_dummy(ap)) |
6252 | host->ops = ap->ops; | |
6253 | ||
ecef7253 TH |
6254 | if (ap->ops->port_start) { |
6255 | rc = ap->ops->port_start(ap); | |
6256 | if (rc) { | |
6257 | ata_port_printk(ap, KERN_ERR, "failed to " | |
6258 | "start port (errno=%d)\n", rc); | |
6259 | goto err_out; | |
6260 | } | |
6261 | } | |
6262 | ||
6263 | ata_eh_freeze_port(ap); | |
6264 | } | |
6265 | ||
6266 | host->flags |= ATA_HOST_STARTED; | |
6267 | return 0; | |
6268 | ||
6269 | err_out: | |
6270 | while (--i >= 0) { | |
6271 | struct ata_port *ap = host->ports[i]; | |
6272 | ||
6273 | if (ap->ops->port_stop) | |
6274 | ap->ops->port_stop(ap); | |
6275 | } | |
6276 | return rc; | |
6277 | } | |
6278 | ||
b03732f0 | 6279 | /** |
cca3974e JG |
6280 | * ata_sas_host_init - Initialize a host struct |
6281 | * @host: host to initialize | |
6282 | * @dev: device host is attached to | |
6283 | * @flags: host flags | |
6284 | * @ops: port_ops | |
b03732f0 BK |
6285 | * |
6286 | * LOCKING: | |
6287 | * PCI/etc. bus probe sem. | |
6288 | * | |
6289 | */ | |
f3187195 | 6290 | /* KILLME - the only user left is ipr */ |
cca3974e JG |
6291 | void ata_host_init(struct ata_host *host, struct device *dev, |
6292 | unsigned long flags, const struct ata_port_operations *ops) | |
b03732f0 | 6293 | { |
cca3974e JG |
6294 | spin_lock_init(&host->lock); |
6295 | host->dev = dev; | |
6296 | host->flags = flags; | |
6297 | host->ops = ops; | |
b03732f0 BK |
6298 | } |
6299 | ||
f3187195 TH |
6300 | /** |
6301 | * ata_host_register - register initialized ATA host | |
6302 | * @host: ATA host to register | |
6303 | * @sht: template for SCSI host | |
6304 | * | |
6305 | * Register initialized ATA host. @host is allocated using | |
6306 | * ata_host_alloc() and fully initialized by LLD. This function | |
6307 | * starts ports, registers @host with ATA and SCSI layers and | |
6308 | * probe registered devices. | |
6309 | * | |
6310 | * LOCKING: | |
6311 | * Inherited from calling layer (may sleep). | |
6312 | * | |
6313 | * RETURNS: | |
6314 | * 0 on success, -errno otherwise. | |
6315 | */ | |
6316 | int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) | |
6317 | { | |
6318 | int i, rc; | |
6319 | ||
6320 | /* host must have been started */ | |
6321 | if (!(host->flags & ATA_HOST_STARTED)) { | |
6322 | dev_printk(KERN_ERR, host->dev, | |
6323 | "BUG: trying to register unstarted host\n"); | |
6324 | WARN_ON(1); | |
6325 | return -EINVAL; | |
6326 | } | |
6327 | ||
6328 | /* Blow away unused ports. This happens when LLD can't | |
6329 | * determine the exact number of ports to allocate at | |
6330 | * allocation time. | |
6331 | */ | |
6332 | for (i = host->n_ports; host->ports[i]; i++) | |
6333 | kfree(host->ports[i]); | |
6334 | ||
6335 | /* give ports names and add SCSI hosts */ | |
6336 | for (i = 0; i < host->n_ports; i++) | |
6337 | host->ports[i]->print_id = ata_print_id++; | |
6338 | ||
6339 | rc = ata_scsi_add_hosts(host, sht); | |
6340 | if (rc) | |
6341 | return rc; | |
6342 | ||
fafbae87 TH |
6343 | /* associate with ACPI nodes */ |
6344 | ata_acpi_associate(host); | |
6345 | ||
f3187195 TH |
6346 | /* set cable, sata_spd_limit and report */ |
6347 | for (i = 0; i < host->n_ports; i++) { | |
6348 | struct ata_port *ap = host->ports[i]; | |
6349 | int irq_line; | |
6350 | u32 scontrol; | |
6351 | unsigned long xfer_mask; | |
6352 | ||
6353 | /* set SATA cable type if still unset */ | |
6354 | if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA)) | |
6355 | ap->cbl = ATA_CBL_SATA; | |
6356 | ||
6357 | /* init sata_spd_limit to the current value */ | |
6358 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { | |
6359 | int spd = (scontrol >> 4) & 0xf; | |
afe3cc51 TH |
6360 | if (spd) |
6361 | ap->hw_sata_spd_limit &= (1 << spd) - 1; | |
f3187195 TH |
6362 | } |
6363 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
6364 | ||
6365 | /* report the secondary IRQ for second channel legacy */ | |
6366 | irq_line = host->irq; | |
6367 | if (i == 1 && host->irq2) | |
6368 | irq_line = host->irq2; | |
6369 | ||
6370 | xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask, | |
6371 | ap->udma_mask); | |
6372 | ||
6373 | /* print per-port info to dmesg */ | |
6374 | if (!ata_port_is_dummy(ap)) | |
6375 | ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p " | |
6376 | "ctl 0x%p bmdma 0x%p irq %d\n", | |
a16abc0b | 6377 | (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P', |
f3187195 TH |
6378 | ata_mode_string(xfer_mask), |
6379 | ap->ioaddr.cmd_addr, | |
6380 | ap->ioaddr.ctl_addr, | |
6381 | ap->ioaddr.bmdma_addr, | |
6382 | irq_line); | |
6383 | else | |
6384 | ata_port_printk(ap, KERN_INFO, "DUMMY\n"); | |
6385 | } | |
6386 | ||
6387 | /* perform each probe synchronously */ | |
6388 | DPRINTK("probe begin\n"); | |
6389 | for (i = 0; i < host->n_ports; i++) { | |
6390 | struct ata_port *ap = host->ports[i]; | |
6391 | int rc; | |
6392 | ||
6393 | /* probe */ | |
6394 | if (ap->ops->error_handler) { | |
6395 | struct ata_eh_info *ehi = &ap->eh_info; | |
6396 | unsigned long flags; | |
6397 | ||
6398 | ata_port_probe(ap); | |
6399 | ||
6400 | /* kick EH for boot probing */ | |
6401 | spin_lock_irqsave(ap->lock, flags); | |
6402 | ||
6403 | ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1; | |
6404 | ehi->action |= ATA_EH_SOFTRESET; | |
6405 | ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; | |
6406 | ||
f4d6d004 | 6407 | ap->pflags &= ~ATA_PFLAG_INITIALIZING; |
f3187195 TH |
6408 | ap->pflags |= ATA_PFLAG_LOADING; |
6409 | ata_port_schedule_eh(ap); | |
6410 | ||
6411 | spin_unlock_irqrestore(ap->lock, flags); | |
6412 | ||
6413 | /* wait for EH to finish */ | |
6414 | ata_port_wait_eh(ap); | |
6415 | } else { | |
6416 | DPRINTK("ata%u: bus probe begin\n", ap->print_id); | |
6417 | rc = ata_bus_probe(ap); | |
6418 | DPRINTK("ata%u: bus probe end\n", ap->print_id); | |
6419 | ||
6420 | if (rc) { | |
6421 | /* FIXME: do something useful here? | |
6422 | * Current libata behavior will | |
6423 | * tear down everything when | |
6424 | * the module is removed | |
6425 | * or the h/w is unplugged. | |
6426 | */ | |
6427 | } | |
6428 | } | |
6429 | } | |
6430 | ||
6431 | /* probes are done, now scan each port's disk(s) */ | |
6432 | DPRINTK("host probe begin\n"); | |
6433 | for (i = 0; i < host->n_ports; i++) { | |
6434 | struct ata_port *ap = host->ports[i]; | |
6435 | ||
6436 | ata_scsi_scan_host(ap); | |
6437 | } | |
6438 | ||
6439 | return 0; | |
6440 | } | |
6441 | ||
f5cda257 TH |
6442 | /** |
6443 | * ata_host_activate - start host, request IRQ and register it | |
6444 | * @host: target ATA host | |
6445 | * @irq: IRQ to request | |
6446 | * @irq_handler: irq_handler used when requesting IRQ | |
6447 | * @irq_flags: irq_flags used when requesting IRQ | |
6448 | * @sht: scsi_host_template to use when registering the host | |
6449 | * | |
6450 | * After allocating an ATA host and initializing it, most libata | |
6451 | * LLDs perform three steps to activate the host - start host, | |
6452 | * request IRQ and register it. This helper takes necessasry | |
6453 | * arguments and performs the three steps in one go. | |
6454 | * | |
6455 | * LOCKING: | |
6456 | * Inherited from calling layer (may sleep). | |
6457 | * | |
6458 | * RETURNS: | |
6459 | * 0 on success, -errno otherwise. | |
6460 | */ | |
6461 | int ata_host_activate(struct ata_host *host, int irq, | |
6462 | irq_handler_t irq_handler, unsigned long irq_flags, | |
6463 | struct scsi_host_template *sht) | |
6464 | { | |
6465 | int rc; | |
6466 | ||
6467 | rc = ata_host_start(host); | |
6468 | if (rc) | |
6469 | return rc; | |
6470 | ||
6471 | rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags, | |
6472 | dev_driver_string(host->dev), host); | |
6473 | if (rc) | |
6474 | return rc; | |
6475 | ||
4031826b TH |
6476 | /* Used to print device info at probe */ |
6477 | host->irq = irq; | |
6478 | ||
f5cda257 TH |
6479 | rc = ata_host_register(host, sht); |
6480 | /* if failed, just free the IRQ and leave ports alone */ | |
6481 | if (rc) | |
6482 | devm_free_irq(host->dev, irq, host); | |
6483 | ||
6484 | return rc; | |
6485 | } | |
6486 | ||
720ba126 TH |
6487 | /** |
6488 | * ata_port_detach - Detach ATA port in prepration of device removal | |
6489 | * @ap: ATA port to be detached | |
6490 | * | |
6491 | * Detach all ATA devices and the associated SCSI devices of @ap; | |
6492 | * then, remove the associated SCSI host. @ap is guaranteed to | |
6493 | * be quiescent on return from this function. | |
6494 | * | |
6495 | * LOCKING: | |
6496 | * Kernel thread context (may sleep). | |
6497 | */ | |
6498 | void ata_port_detach(struct ata_port *ap) | |
6499 | { | |
6500 | unsigned long flags; | |
6501 | int i; | |
6502 | ||
6503 | if (!ap->ops->error_handler) | |
c3cf30a9 | 6504 | goto skip_eh; |
720ba126 TH |
6505 | |
6506 | /* tell EH we're leaving & flush EH */ | |
ba6a1308 | 6507 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 6508 | ap->pflags |= ATA_PFLAG_UNLOADING; |
ba6a1308 | 6509 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
6510 | |
6511 | ata_port_wait_eh(ap); | |
6512 | ||
6513 | /* EH is now guaranteed to see UNLOADING, so no new device | |
6514 | * will be attached. Disable all existing devices. | |
6515 | */ | |
ba6a1308 | 6516 | spin_lock_irqsave(ap->lock, flags); |
720ba126 TH |
6517 | |
6518 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
6519 | ata_dev_disable(&ap->device[i]); | |
6520 | ||
ba6a1308 | 6521 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
6522 | |
6523 | /* Final freeze & EH. All in-flight commands are aborted. EH | |
6524 | * will be skipped and retrials will be terminated with bad | |
6525 | * target. | |
6526 | */ | |
ba6a1308 | 6527 | spin_lock_irqsave(ap->lock, flags); |
720ba126 | 6528 | ata_port_freeze(ap); /* won't be thawed */ |
ba6a1308 | 6529 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
6530 | |
6531 | ata_port_wait_eh(ap); | |
45a66c1c | 6532 | cancel_rearming_delayed_work(&ap->hotplug_task); |
720ba126 | 6533 | |
c3cf30a9 | 6534 | skip_eh: |
720ba126 | 6535 | /* remove the associated SCSI host */ |
cca3974e | 6536 | scsi_remove_host(ap->scsi_host); |
720ba126 TH |
6537 | } |
6538 | ||
0529c159 TH |
6539 | /** |
6540 | * ata_host_detach - Detach all ports of an ATA host | |
6541 | * @host: Host to detach | |
6542 | * | |
6543 | * Detach all ports of @host. | |
6544 | * | |
6545 | * LOCKING: | |
6546 | * Kernel thread context (may sleep). | |
6547 | */ | |
6548 | void ata_host_detach(struct ata_host *host) | |
6549 | { | |
6550 | int i; | |
6551 | ||
6552 | for (i = 0; i < host->n_ports; i++) | |
6553 | ata_port_detach(host->ports[i]); | |
6554 | } | |
6555 | ||
1da177e4 LT |
6556 | /** |
6557 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
6558 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
6559 | * |
6560 | * Utility function which initializes data_addr, error_addr, | |
6561 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
6562 | * device_addr, status_addr, and command_addr to standard offsets | |
6563 | * relative to cmd_addr. | |
6564 | * | |
6565 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 6566 | */ |
0baab86b | 6567 | |
1da177e4 LT |
6568 | void ata_std_ports(struct ata_ioports *ioaddr) |
6569 | { | |
6570 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
6571 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
6572 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
6573 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
6574 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
6575 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
6576 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
6577 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
6578 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
6579 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
6580 | } | |
6581 | ||
0baab86b | 6582 | |
374b1873 JG |
6583 | #ifdef CONFIG_PCI |
6584 | ||
1da177e4 LT |
6585 | /** |
6586 | * ata_pci_remove_one - PCI layer callback for device removal | |
6587 | * @pdev: PCI device that was removed | |
6588 | * | |
b878ca5d TH |
6589 | * PCI layer indicates to libata via this hook that hot-unplug or |
6590 | * module unload event has occurred. Detach all ports. Resource | |
6591 | * release is handled via devres. | |
1da177e4 LT |
6592 | * |
6593 | * LOCKING: | |
6594 | * Inherited from PCI layer (may sleep). | |
6595 | */ | |
f0d36efd | 6596 | void ata_pci_remove_one(struct pci_dev *pdev) |
1da177e4 LT |
6597 | { |
6598 | struct device *dev = pci_dev_to_dev(pdev); | |
cca3974e | 6599 | struct ata_host *host = dev_get_drvdata(dev); |
1da177e4 | 6600 | |
b878ca5d | 6601 | ata_host_detach(host); |
1da177e4 LT |
6602 | } |
6603 | ||
6604 | /* move to PCI subsystem */ | |
057ace5e | 6605 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
6606 | { |
6607 | unsigned long tmp = 0; | |
6608 | ||
6609 | switch (bits->width) { | |
6610 | case 1: { | |
6611 | u8 tmp8 = 0; | |
6612 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
6613 | tmp = tmp8; | |
6614 | break; | |
6615 | } | |
6616 | case 2: { | |
6617 | u16 tmp16 = 0; | |
6618 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
6619 | tmp = tmp16; | |
6620 | break; | |
6621 | } | |
6622 | case 4: { | |
6623 | u32 tmp32 = 0; | |
6624 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
6625 | tmp = tmp32; | |
6626 | break; | |
6627 | } | |
6628 | ||
6629 | default: | |
6630 | return -EINVAL; | |
6631 | } | |
6632 | ||
6633 | tmp &= bits->mask; | |
6634 | ||
6635 | return (tmp == bits->val) ? 1 : 0; | |
6636 | } | |
9b847548 | 6637 | |
6ffa01d8 | 6638 | #ifdef CONFIG_PM |
3c5100c1 | 6639 | void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) |
9b847548 JA |
6640 | { |
6641 | pci_save_state(pdev); | |
4c90d971 | 6642 | pci_disable_device(pdev); |
500530f6 | 6643 | |
4c90d971 | 6644 | if (mesg.event == PM_EVENT_SUSPEND) |
500530f6 | 6645 | pci_set_power_state(pdev, PCI_D3hot); |
9b847548 JA |
6646 | } |
6647 | ||
553c4aa6 | 6648 | int ata_pci_device_do_resume(struct pci_dev *pdev) |
9b847548 | 6649 | { |
553c4aa6 TH |
6650 | int rc; |
6651 | ||
9b847548 JA |
6652 | pci_set_power_state(pdev, PCI_D0); |
6653 | pci_restore_state(pdev); | |
553c4aa6 | 6654 | |
b878ca5d | 6655 | rc = pcim_enable_device(pdev); |
553c4aa6 TH |
6656 | if (rc) { |
6657 | dev_printk(KERN_ERR, &pdev->dev, | |
6658 | "failed to enable device after resume (%d)\n", rc); | |
6659 | return rc; | |
6660 | } | |
6661 | ||
9b847548 | 6662 | pci_set_master(pdev); |
553c4aa6 | 6663 | return 0; |
500530f6 TH |
6664 | } |
6665 | ||
3c5100c1 | 6666 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) |
500530f6 | 6667 | { |
cca3974e | 6668 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
500530f6 TH |
6669 | int rc = 0; |
6670 | ||
cca3974e | 6671 | rc = ata_host_suspend(host, mesg); |
500530f6 TH |
6672 | if (rc) |
6673 | return rc; | |
6674 | ||
3c5100c1 | 6675 | ata_pci_device_do_suspend(pdev, mesg); |
500530f6 TH |
6676 | |
6677 | return 0; | |
6678 | } | |
6679 | ||
6680 | int ata_pci_device_resume(struct pci_dev *pdev) | |
6681 | { | |
cca3974e | 6682 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
553c4aa6 | 6683 | int rc; |
500530f6 | 6684 | |
553c4aa6 TH |
6685 | rc = ata_pci_device_do_resume(pdev); |
6686 | if (rc == 0) | |
6687 | ata_host_resume(host); | |
6688 | return rc; | |
9b847548 | 6689 | } |
6ffa01d8 TH |
6690 | #endif /* CONFIG_PM */ |
6691 | ||
1da177e4 LT |
6692 | #endif /* CONFIG_PCI */ |
6693 | ||
6694 | ||
1da177e4 LT |
6695 | static int __init ata_init(void) |
6696 | { | |
a8601e5f | 6697 | ata_probe_timeout *= HZ; |
1da177e4 LT |
6698 | ata_wq = create_workqueue("ata"); |
6699 | if (!ata_wq) | |
6700 | return -ENOMEM; | |
6701 | ||
453b07ac TH |
6702 | ata_aux_wq = create_singlethread_workqueue("ata_aux"); |
6703 | if (!ata_aux_wq) { | |
6704 | destroy_workqueue(ata_wq); | |
6705 | return -ENOMEM; | |
6706 | } | |
6707 | ||
1da177e4 LT |
6708 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); |
6709 | return 0; | |
6710 | } | |
6711 | ||
6712 | static void __exit ata_exit(void) | |
6713 | { | |
6714 | destroy_workqueue(ata_wq); | |
453b07ac | 6715 | destroy_workqueue(ata_aux_wq); |
1da177e4 LT |
6716 | } |
6717 | ||
a4625085 | 6718 | subsys_initcall(ata_init); |
1da177e4 LT |
6719 | module_exit(ata_exit); |
6720 | ||
67846b30 | 6721 | static unsigned long ratelimit_time; |
34af946a | 6722 | static DEFINE_SPINLOCK(ata_ratelimit_lock); |
67846b30 JG |
6723 | |
6724 | int ata_ratelimit(void) | |
6725 | { | |
6726 | int rc; | |
6727 | unsigned long flags; | |
6728 | ||
6729 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
6730 | ||
6731 | if (time_after(jiffies, ratelimit_time)) { | |
6732 | rc = 1; | |
6733 | ratelimit_time = jiffies + (HZ/5); | |
6734 | } else | |
6735 | rc = 0; | |
6736 | ||
6737 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
6738 | ||
6739 | return rc; | |
6740 | } | |
6741 | ||
c22daff4 TH |
6742 | /** |
6743 | * ata_wait_register - wait until register value changes | |
6744 | * @reg: IO-mapped register | |
6745 | * @mask: Mask to apply to read register value | |
6746 | * @val: Wait condition | |
6747 | * @interval_msec: polling interval in milliseconds | |
6748 | * @timeout_msec: timeout in milliseconds | |
6749 | * | |
6750 | * Waiting for some bits of register to change is a common | |
6751 | * operation for ATA controllers. This function reads 32bit LE | |
6752 | * IO-mapped register @reg and tests for the following condition. | |
6753 | * | |
6754 | * (*@reg & mask) != val | |
6755 | * | |
6756 | * If the condition is met, it returns; otherwise, the process is | |
6757 | * repeated after @interval_msec until timeout. | |
6758 | * | |
6759 | * LOCKING: | |
6760 | * Kernel thread context (may sleep) | |
6761 | * | |
6762 | * RETURNS: | |
6763 | * The final register value. | |
6764 | */ | |
6765 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
6766 | unsigned long interval_msec, | |
6767 | unsigned long timeout_msec) | |
6768 | { | |
6769 | unsigned long timeout; | |
6770 | u32 tmp; | |
6771 | ||
6772 | tmp = ioread32(reg); | |
6773 | ||
6774 | /* Calculate timeout _after_ the first read to make sure | |
6775 | * preceding writes reach the controller before starting to | |
6776 | * eat away the timeout. | |
6777 | */ | |
6778 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
6779 | ||
6780 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
6781 | msleep(interval_msec); | |
6782 | tmp = ioread32(reg); | |
6783 | } | |
6784 | ||
6785 | return tmp; | |
6786 | } | |
6787 | ||
dd5b06c4 TH |
6788 | /* |
6789 | * Dummy port_ops | |
6790 | */ | |
6791 | static void ata_dummy_noret(struct ata_port *ap) { } | |
6792 | static int ata_dummy_ret0(struct ata_port *ap) { return 0; } | |
6793 | static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } | |
6794 | ||
6795 | static u8 ata_dummy_check_status(struct ata_port *ap) | |
6796 | { | |
6797 | return ATA_DRDY; | |
6798 | } | |
6799 | ||
6800 | static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) | |
6801 | { | |
6802 | return AC_ERR_SYSTEM; | |
6803 | } | |
6804 | ||
6805 | const struct ata_port_operations ata_dummy_port_ops = { | |
6806 | .port_disable = ata_port_disable, | |
6807 | .check_status = ata_dummy_check_status, | |
6808 | .check_altstatus = ata_dummy_check_status, | |
6809 | .dev_select = ata_noop_dev_select, | |
6810 | .qc_prep = ata_noop_qc_prep, | |
6811 | .qc_issue = ata_dummy_qc_issue, | |
6812 | .freeze = ata_dummy_noret, | |
6813 | .thaw = ata_dummy_noret, | |
6814 | .error_handler = ata_dummy_noret, | |
6815 | .post_internal_cmd = ata_dummy_qc_noret, | |
6816 | .irq_clear = ata_dummy_noret, | |
6817 | .port_start = ata_dummy_ret0, | |
6818 | .port_stop = ata_dummy_noret, | |
6819 | }; | |
6820 | ||
21b0ad4f TH |
6821 | const struct ata_port_info ata_dummy_port_info = { |
6822 | .port_ops = &ata_dummy_port_ops, | |
6823 | }; | |
6824 | ||
1da177e4 LT |
6825 | /* |
6826 | * libata is essentially a library of internal helper functions for | |
6827 | * low-level ATA host controller drivers. As such, the API/ABI is | |
6828 | * likely to change as new drivers are added and updated. | |
6829 | * Do not depend on ABI/API stability. | |
6830 | */ | |
6831 | ||
e9c83914 TH |
6832 | EXPORT_SYMBOL_GPL(sata_deb_timing_normal); |
6833 | EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); | |
6834 | EXPORT_SYMBOL_GPL(sata_deb_timing_long); | |
dd5b06c4 | 6835 | EXPORT_SYMBOL_GPL(ata_dummy_port_ops); |
21b0ad4f | 6836 | EXPORT_SYMBOL_GPL(ata_dummy_port_info); |
1da177e4 LT |
6837 | EXPORT_SYMBOL_GPL(ata_std_bios_param); |
6838 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
cca3974e | 6839 | EXPORT_SYMBOL_GPL(ata_host_init); |
f3187195 | 6840 | EXPORT_SYMBOL_GPL(ata_host_alloc); |
f5cda257 | 6841 | EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo); |
ecef7253 | 6842 | EXPORT_SYMBOL_GPL(ata_host_start); |
f3187195 | 6843 | EXPORT_SYMBOL_GPL(ata_host_register); |
f5cda257 | 6844 | EXPORT_SYMBOL_GPL(ata_host_activate); |
0529c159 | 6845 | EXPORT_SYMBOL_GPL(ata_host_detach); |
1da177e4 LT |
6846 | EXPORT_SYMBOL_GPL(ata_sg_init); |
6847 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
9a1004d0 | 6848 | EXPORT_SYMBOL_GPL(ata_hsm_move); |
f686bcb8 | 6849 | EXPORT_SYMBOL_GPL(ata_qc_complete); |
dedaf2b0 | 6850 | EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); |
1da177e4 | 6851 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
1da177e4 LT |
6852 | EXPORT_SYMBOL_GPL(ata_tf_load); |
6853 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
6854 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
6855 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
43727fbc | 6856 | EXPORT_SYMBOL_GPL(sata_print_link_status); |
1da177e4 LT |
6857 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); |
6858 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
6859 | EXPORT_SYMBOL_GPL(ata_check_status); | |
6860 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
6861 | EXPORT_SYMBOL_GPL(ata_exec_command); |
6862 | EXPORT_SYMBOL_GPL(ata_port_start); | |
d92e74d3 | 6863 | EXPORT_SYMBOL_GPL(ata_sff_port_start); |
1da177e4 | 6864 | EXPORT_SYMBOL_GPL(ata_interrupt); |
04351821 | 6865 | EXPORT_SYMBOL_GPL(ata_do_set_mode); |
0d5ff566 TH |
6866 | EXPORT_SYMBOL_GPL(ata_data_xfer); |
6867 | EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); | |
1da177e4 | 6868 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
d26fc955 | 6869 | EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); |
e46834cd | 6870 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); |
1da177e4 LT |
6871 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
6872 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
6873 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
6874 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
6875 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
6d97dbd7 TH |
6876 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); |
6877 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); | |
6878 | EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); | |
6879 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); | |
6880 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); | |
1da177e4 | 6881 | EXPORT_SYMBOL_GPL(ata_port_probe); |
10305f0f | 6882 | EXPORT_SYMBOL_GPL(ata_dev_disable); |
3c567b7d | 6883 | EXPORT_SYMBOL_GPL(sata_set_spd); |
d7bb4cc7 TH |
6884 | EXPORT_SYMBOL_GPL(sata_phy_debounce); |
6885 | EXPORT_SYMBOL_GPL(sata_phy_resume); | |
1da177e4 LT |
6886 | EXPORT_SYMBOL_GPL(sata_phy_reset); |
6887 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
6888 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
f5914a46 | 6889 | EXPORT_SYMBOL_GPL(ata_std_prereset); |
c2bd5804 | 6890 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
b6103f6d | 6891 | EXPORT_SYMBOL_GPL(sata_port_hardreset); |
c2bd5804 TH |
6892 | EXPORT_SYMBOL_GPL(sata_std_hardreset); |
6893 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
2e9edbf8 JG |
6894 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
6895 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
1da177e4 | 6896 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 6897 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
c22daff4 | 6898 | EXPORT_SYMBOL_GPL(ata_wait_register); |
6f8b9958 | 6899 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
d4b2bab4 | 6900 | EXPORT_SYMBOL_GPL(ata_wait_ready); |
86e45b6b | 6901 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
6902 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
6903 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
1da177e4 | 6904 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
83c47bcb | 6905 | EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); |
a6e6ce8e | 6906 | EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); |
1da177e4 | 6907 | EXPORT_SYMBOL_GPL(ata_host_intr); |
34bf2170 TH |
6908 | EXPORT_SYMBOL_GPL(sata_scr_valid); |
6909 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
6910 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
6911 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
6912 | EXPORT_SYMBOL_GPL(ata_port_online); | |
6913 | EXPORT_SYMBOL_GPL(ata_port_offline); | |
6ffa01d8 | 6914 | #ifdef CONFIG_PM |
cca3974e JG |
6915 | EXPORT_SYMBOL_GPL(ata_host_suspend); |
6916 | EXPORT_SYMBOL_GPL(ata_host_resume); | |
6ffa01d8 | 6917 | #endif /* CONFIG_PM */ |
6a62a04d TH |
6918 | EXPORT_SYMBOL_GPL(ata_id_string); |
6919 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
10305f0f | 6920 | EXPORT_SYMBOL_GPL(ata_id_to_dma_mode); |
6919a0a6 | 6921 | EXPORT_SYMBOL_GPL(ata_device_blacklisted); |
1da177e4 LT |
6922 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
6923 | ||
1bc4ccff | 6924 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
6925 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
6926 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
6927 | ||
1da177e4 LT |
6928 | #ifdef CONFIG_PCI |
6929 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
d583bc18 | 6930 | EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); |
1626aeb8 | 6931 | EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); |
d583bc18 | 6932 | EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); |
1da177e4 LT |
6933 | EXPORT_SYMBOL_GPL(ata_pci_init_one); |
6934 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
6ffa01d8 | 6935 | #ifdef CONFIG_PM |
500530f6 TH |
6936 | EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); |
6937 | EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); | |
9b847548 JA |
6938 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
6939 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
6ffa01d8 | 6940 | #endif /* CONFIG_PM */ |
67951ade AC |
6941 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
6942 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
1da177e4 | 6943 | #endif /* CONFIG_PCI */ |
9b847548 | 6944 | |
ece1d636 | 6945 | EXPORT_SYMBOL_GPL(ata_eng_timeout); |
7b70fc03 TH |
6946 | EXPORT_SYMBOL_GPL(ata_port_schedule_eh); |
6947 | EXPORT_SYMBOL_GPL(ata_port_abort); | |
e3180499 TH |
6948 | EXPORT_SYMBOL_GPL(ata_port_freeze); |
6949 | EXPORT_SYMBOL_GPL(ata_eh_freeze_port); | |
6950 | EXPORT_SYMBOL_GPL(ata_eh_thaw_port); | |
ece1d636 TH |
6951 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
6952 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
022bdb07 | 6953 | EXPORT_SYMBOL_GPL(ata_do_eh); |
83625006 AI |
6954 | EXPORT_SYMBOL_GPL(ata_irq_on); |
6955 | EXPORT_SYMBOL_GPL(ata_dummy_irq_on); | |
6956 | EXPORT_SYMBOL_GPL(ata_irq_ack); | |
6957 | EXPORT_SYMBOL_GPL(ata_dummy_irq_ack); | |
a619f981 | 6958 | EXPORT_SYMBOL_GPL(ata_dev_try_classify); |
be0d18df AC |
6959 | |
6960 | EXPORT_SYMBOL_GPL(ata_cable_40wire); | |
6961 | EXPORT_SYMBOL_GPL(ata_cable_80wire); | |
6962 | EXPORT_SYMBOL_GPL(ata_cable_unknown); | |
6963 | EXPORT_SYMBOL_GPL(ata_cable_sata); |