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dmaengine, async_tx: support alignment checks
[net-next-2.6.git] / crypto / async_tx / async_memcpy.c
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1/*
2 * copy offload engine support
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
26#include <linux/kernel.h>
27#include <linux/highmem.h>
28#include <linux/mm.h>
29#include <linux/dma-mapping.h>
30#include <linux/async_tx.h>
31
32/**
33 * async_memcpy - attempt to copy memory with a dma engine.
34 * @dest: destination page
35 * @src: src page
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36 * @dest_offset: offset into 'dest' to start transaction
37 * @src_offset: offset into 'src' to start transaction
9bc89cd8 38 * @len: length in bytes
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39 * @submit: submission / completion modifiers
40 *
41 * honored flags: ASYNC_TX_ACK
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42 */
43struct dma_async_tx_descriptor *
44async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
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45 unsigned int src_offset, size_t len,
46 struct async_submit_ctl *submit)
9bc89cd8 47{
a08abd8c 48 struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMCPY,
47437b2c 49 &dest, 1, &src, 1, len);
9bc89cd8 50 struct dma_device *device = chan ? chan->device : NULL;
0036731c 51 struct dma_async_tx_descriptor *tx = NULL;
9bc89cd8 52
83544ae9 53 if (device && is_dma_copy_aligned(device, src_offset, dest_offset, len)) {
0036731c 54 dma_addr_t dma_dest, dma_src;
0403e382 55 unsigned long dma_prep_flags = 0;
9bc89cd8 56
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57 if (submit->cb_fn)
58 dma_prep_flags |= DMA_PREP_INTERRUPT;
59 if (submit->flags & ASYNC_TX_FENCE)
60 dma_prep_flags |= DMA_PREP_FENCE;
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61 dma_dest = dma_map_page(device->dev, dest, dest_offset, len,
62 DMA_FROM_DEVICE);
9bc89cd8 63
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64 dma_src = dma_map_page(device->dev, src, src_offset, len,
65 DMA_TO_DEVICE);
9bc89cd8 66
0036731c 67 tx = device->device_prep_dma_memcpy(chan, dma_dest, dma_src,
d4c56f97 68 len, dma_prep_flags);
0036731c 69 }
9bc89cd8 70
0036731c 71 if (tx) {
3280ab3e 72 pr_debug("%s: (async) len: %zu\n", __func__, len);
a08abd8c 73 async_tx_submit(chan, tx, submit);
0036731c 74 } else {
9bc89cd8 75 void *dest_buf, *src_buf;
3280ab3e 76 pr_debug("%s: (sync) len: %zu\n", __func__, len);
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77
78 /* wait for any prerequisite operations */
a08abd8c 79 async_tx_quiesce(&submit->depend_tx);
9bc89cd8 80
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81 dest_buf = kmap_atomic(dest, KM_USER0) + dest_offset;
82 src_buf = kmap_atomic(src, KM_USER1) + src_offset;
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83
84 memcpy(dest_buf, src_buf, len);
85
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86 kunmap_atomic(dest_buf, KM_USER0);
87 kunmap_atomic(src_buf, KM_USER1);
9bc89cd8 88
a08abd8c 89 async_tx_sync_epilog(submit);
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90 }
91
92 return tx;
93}
94EXPORT_SYMBOL_GPL(async_memcpy);
95
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96MODULE_AUTHOR("Intel Corporation");
97MODULE_DESCRIPTION("asynchronous memcpy api");
98MODULE_LICENSE("GPL");