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xen: clarify locking used when pinning a pagetable.
[net-next-2.6.git] / arch / x86 / xen / mmu.c
CommitLineData
3b827c1b
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1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
3b827c1b 43#include <linux/bug.h>
3b827c1b
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44
45#include <asm/pgtable.h>
46#include <asm/tlbflush.h>
5deb30d1 47#include <asm/fixmap.h>
3b827c1b 48#include <asm/mmu_context.h>
f4f97b3e 49#include <asm/paravirt.h>
cbcd79c2 50#include <asm/linkage.h>
3b827c1b
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51
52#include <asm/xen/hypercall.h>
f4f97b3e 53#include <asm/xen/hypervisor.h>
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54
55#include <xen/page.h>
56#include <xen/interface/xen.h>
57
f4f97b3e 58#include "multicalls.h"
3b827c1b
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59#include "mmu.h"
60
d6182fbf
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61/*
62 * Just beyond the highest usermode address. STACK_TOP_MAX has a
63 * redzone above it, so round it up to a PGD boundary.
64 */
65#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
66
67
d451bb7a 68#define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
cf0923ea 69#define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
d451bb7a 70
cf0923ea 71/* Placeholder for holes in the address space */
cbcd79c2 72static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
cf0923ea
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73 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
74
75 /* Array of pointers to pages containing p2m entries */
cbcd79c2 76static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
cf0923ea 77 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
d451bb7a 78
d5edbc1f 79/* Arrays of p2m arrays expressed in mfns used for save/restore */
cbcd79c2 80static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
d5edbc1f 81
cbcd79c2
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82static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
83 __page_aligned_bss;
d5edbc1f 84
d451bb7a
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85static inline unsigned p2m_top_index(unsigned long pfn)
86{
8006ec3e 87 BUG_ON(pfn >= MAX_DOMAIN_PAGES);
d451bb7a
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88 return pfn / P2M_ENTRIES_PER_PAGE;
89}
90
91static inline unsigned p2m_index(unsigned long pfn)
92{
93 return pfn % P2M_ENTRIES_PER_PAGE;
94}
95
d5edbc1f
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96/* Build the parallel p2m_top_mfn structures */
97void xen_setup_mfn_list_list(void)
98{
99 unsigned pfn, idx;
100
101 for(pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
102 unsigned topidx = p2m_top_index(pfn);
103
104 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
105 }
106
107 for(idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
108 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
109 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
110 }
111
112 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
113
114 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
115 virt_to_mfn(p2m_top_mfn_list);
116 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
117}
118
119/* Set up p2m_top to point to the domain-builder provided p2m pages */
d451bb7a
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120void __init xen_build_dynamic_phys_to_machine(void)
121{
d451bb7a 122 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
8006ec3e 123 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
d5edbc1f 124 unsigned pfn;
d451bb7a 125
8006ec3e 126 for(pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
d451bb7a
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127 unsigned topidx = p2m_top_index(pfn);
128
129 p2m_top[topidx] = &mfn_list[pfn];
130 }
131}
132
133unsigned long get_phys_to_machine(unsigned long pfn)
134{
135 unsigned topidx, idx;
136
8006ec3e
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137 if (unlikely(pfn >= MAX_DOMAIN_PAGES))
138 return INVALID_P2M_ENTRY;
139
d451bb7a 140 topidx = p2m_top_index(pfn);
d451bb7a
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141 idx = p2m_index(pfn);
142 return p2m_top[topidx][idx];
143}
15ce6005 144EXPORT_SYMBOL_GPL(get_phys_to_machine);
d451bb7a 145
d5edbc1f 146static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
d451bb7a
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147{
148 unsigned long *p;
149 unsigned i;
150
151 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
152 BUG_ON(p == NULL);
153
154 for(i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
155 p[i] = INVALID_P2M_ENTRY;
156
cf0923ea 157 if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
d451bb7a 158 free_page((unsigned long)p);
d5edbc1f
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159 else
160 *mfnp = virt_to_mfn(p);
d451bb7a
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161}
162
163void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
164{
165 unsigned topidx, idx;
166
167 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
168 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
8006ec3e
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169 return;
170 }
171
172 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
173 BUG_ON(mfn != INVALID_P2M_ENTRY);
d451bb7a
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174 return;
175 }
176
177 topidx = p2m_top_index(pfn);
cf0923ea 178 if (p2m_top[topidx] == p2m_missing) {
d451bb7a
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179 /* no need to allocate a page to store an invalid entry */
180 if (mfn == INVALID_P2M_ENTRY)
181 return;
d5edbc1f 182 alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]);
d451bb7a
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183 }
184
185 idx = p2m_index(pfn);
186 p2m_top[topidx][idx] = mfn;
187}
188
ce803e70 189xmaddr_t arbitrary_virt_to_machine(void *vaddr)
3b827c1b 190{
ce803e70 191 unsigned long address = (unsigned long)vaddr;
da7bfc50 192 unsigned int level;
f0646e43 193 pte_t *pte = lookup_address(address, &level);
de067814 194 unsigned offset = address & ~PAGE_MASK;
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195
196 BUG_ON(pte == NULL);
197
ebd879e3 198 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
3b827c1b
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199}
200
201void make_lowmem_page_readonly(void *vaddr)
202{
203 pte_t *pte, ptev;
204 unsigned long address = (unsigned long)vaddr;
da7bfc50 205 unsigned int level;
3b827c1b 206
f0646e43 207 pte = lookup_address(address, &level);
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208 BUG_ON(pte == NULL);
209
210 ptev = pte_wrprotect(*pte);
211
212 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
213 BUG();
214}
215
216void make_lowmem_page_readwrite(void *vaddr)
217{
218 pte_t *pte, ptev;
219 unsigned long address = (unsigned long)vaddr;
da7bfc50 220 unsigned int level;
3b827c1b 221
f0646e43 222 pte = lookup_address(address, &level);
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223 BUG_ON(pte == NULL);
224
225 ptev = pte_mkwrite(*pte);
226
227 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
228 BUG();
229}
230
231
e2426cf8
JF
232static bool page_pinned(void *ptr)
233{
234 struct page *page = virt_to_page(ptr);
235
236 return PagePinned(page);
237}
238
400d3494 239static void extend_mmu_update(const struct mmu_update *update)
3b827c1b 240{
d66bf8fc
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241 struct multicall_space mcs;
242 struct mmu_update *u;
3b827c1b 243
400d3494
JF
244 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
245
246 if (mcs.mc != NULL)
247 mcs.mc->args[1]++;
248 else {
249 mcs = __xen_mc_entry(sizeof(*u));
250 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
251 }
d66bf8fc 252
d66bf8fc 253 u = mcs.args;
400d3494
JF
254 *u = *update;
255}
256
257void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
258{
259 struct mmu_update u;
260
261 preempt_disable();
262
263 xen_mc_batch();
264
ce803e70
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265 /* ptr may be ioremapped for 64-bit pagetable setup */
266 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494
JF
267 u.val = pmd_val_ma(val);
268 extend_mmu_update(&u);
d66bf8fc
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269
270 xen_mc_issue(PARAVIRT_LAZY_MMU);
271
272 preempt_enable();
3b827c1b
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273}
274
e2426cf8
JF
275void xen_set_pmd(pmd_t *ptr, pmd_t val)
276{
277 /* If page is not pinned, we can just update the entry
278 directly */
279 if (!page_pinned(ptr)) {
280 *ptr = val;
281 return;
282 }
283
284 xen_set_pmd_hyper(ptr, val);
285}
286
3b827c1b
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287/*
288 * Associate a virtual page frame with a given physical page frame
289 * and protection flags for that frame.
290 */
291void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
292{
836fe2f2 293 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
3b827c1b
JF
294}
295
296void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
297 pte_t *ptep, pte_t pteval)
298{
2bd50036
JF
299 /* updates to init_mm may be done without lock */
300 if (mm == &init_mm)
301 preempt_disable();
302
d66bf8fc 303 if (mm == current->mm || mm == &init_mm) {
8965c1c0 304 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
d66bf8fc
JF
305 struct multicall_space mcs;
306 mcs = xen_mc_entry(0);
307
308 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
309 xen_mc_issue(PARAVIRT_LAZY_MMU);
2bd50036 310 goto out;
d66bf8fc
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311 } else
312 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
2bd50036 313 goto out;
d66bf8fc
JF
314 }
315 xen_set_pte(ptep, pteval);
2bd50036
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316
317out:
318 if (mm == &init_mm)
319 preempt_enable();
3b827c1b
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320}
321
e57778a1 322pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
947a69c9 323{
e57778a1
JF
324 /* Just return the pte as-is. We preserve the bits on commit */
325 return *ptep;
326}
327
328void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
329 pte_t *ptep, pte_t pte)
330{
400d3494 331 struct mmu_update u;
e57778a1 332
400d3494 333 xen_mc_batch();
947a69c9 334
400d3494
JF
335 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
336 u.val = pte_val_ma(pte);
337 extend_mmu_update(&u);
947a69c9 338
e57778a1 339 xen_mc_issue(PARAVIRT_LAZY_MMU);
947a69c9
JF
340}
341
ebb9cfe2
JF
342/* Assume pteval_t is equivalent to all the other *val_t types. */
343static pteval_t pte_mfn_to_pfn(pteval_t val)
947a69c9 344{
ebb9cfe2 345 if (val & _PAGE_PRESENT) {
59438c9f 346 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 347 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 348 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
ebb9cfe2 349 }
947a69c9 350
ebb9cfe2 351 return val;
947a69c9
JF
352}
353
ebb9cfe2 354static pteval_t pte_pfn_to_mfn(pteval_t val)
947a69c9 355{
ebb9cfe2 356 if (val & _PAGE_PRESENT) {
59438c9f 357 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 358 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 359 val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
947a69c9
JF
360 }
361
ebb9cfe2 362 return val;
947a69c9
JF
363}
364
ebb9cfe2 365pteval_t xen_pte_val(pte_t pte)
947a69c9 366{
ebb9cfe2 367 return pte_mfn_to_pfn(pte.pte);
947a69c9 368}
947a69c9 369
947a69c9
JF
370pgdval_t xen_pgd_val(pgd_t pgd)
371{
ebb9cfe2 372 return pte_mfn_to_pfn(pgd.pgd);
947a69c9
JF
373}
374
375pte_t xen_make_pte(pteval_t pte)
376{
ebb9cfe2
JF
377 pte = pte_pfn_to_mfn(pte);
378 return native_make_pte(pte);
947a69c9
JF
379}
380
381pgd_t xen_make_pgd(pgdval_t pgd)
382{
ebb9cfe2
JF
383 pgd = pte_pfn_to_mfn(pgd);
384 return native_make_pgd(pgd);
947a69c9
JF
385}
386
387pmdval_t xen_pmd_val(pmd_t pmd)
388{
ebb9cfe2 389 return pte_mfn_to_pfn(pmd.pmd);
947a69c9 390}
28499143 391
e2426cf8 392void xen_set_pud_hyper(pud_t *ptr, pud_t val)
f4f97b3e 393{
400d3494 394 struct mmu_update u;
f4f97b3e 395
d66bf8fc
JF
396 preempt_disable();
397
400d3494
JF
398 xen_mc_batch();
399
ce803e70
JF
400 /* ptr may be ioremapped for 64-bit pagetable setup */
401 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494
JF
402 u.val = pud_val_ma(val);
403 extend_mmu_update(&u);
d66bf8fc
JF
404
405 xen_mc_issue(PARAVIRT_LAZY_MMU);
406
407 preempt_enable();
f4f97b3e
JF
408}
409
e2426cf8
JF
410void xen_set_pud(pud_t *ptr, pud_t val)
411{
412 /* If page is not pinned, we can just update the entry
413 directly */
414 if (!page_pinned(ptr)) {
415 *ptr = val;
416 return;
417 }
418
419 xen_set_pud_hyper(ptr, val);
420}
421
f4f97b3e
JF
422void xen_set_pte(pte_t *ptep, pte_t pte)
423{
f6e58732 424#ifdef CONFIG_X86_PAE
f4f97b3e
JF
425 ptep->pte_high = pte.pte_high;
426 smp_wmb();
427 ptep->pte_low = pte.pte_low;
f6e58732
JF
428#else
429 *ptep = pte;
430#endif
f4f97b3e
JF
431}
432
f6e58732 433#ifdef CONFIG_X86_PAE
3b827c1b
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434void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
435{
f6e58732 436 set_64bit((u64 *)ptep, native_pte_val(pte));
3b827c1b
JF
437}
438
439void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
440{
441 ptep->pte_low = 0;
442 smp_wmb(); /* make sure low gets written first */
443 ptep->pte_high = 0;
444}
445
446void xen_pmd_clear(pmd_t *pmdp)
447{
e2426cf8 448 set_pmd(pmdp, __pmd(0));
3b827c1b 449}
f6e58732 450#endif /* CONFIG_X86_PAE */
3b827c1b 451
abf33038 452pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 453{
ebb9cfe2 454 pmd = pte_pfn_to_mfn(pmd);
947a69c9 455 return native_make_pmd(pmd);
3b827c1b 456}
3b827c1b 457
f6e58732
JF
458#if PAGETABLE_LEVELS == 4
459pudval_t xen_pud_val(pud_t pud)
460{
461 return pte_mfn_to_pfn(pud.pud);
462}
463
464pud_t xen_make_pud(pudval_t pud)
465{
466 pud = pte_pfn_to_mfn(pud);
467
468 return native_make_pud(pud);
469}
470
d6182fbf 471pgd_t *xen_get_user_pgd(pgd_t *pgd)
f6e58732 472{
d6182fbf
JF
473 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
474 unsigned offset = pgd - pgd_page;
475 pgd_t *user_ptr = NULL;
f6e58732 476
d6182fbf
JF
477 if (offset < pgd_index(USER_LIMIT)) {
478 struct page *page = virt_to_page(pgd_page);
479 user_ptr = (pgd_t *)page->private;
480 if (user_ptr)
481 user_ptr += offset;
482 }
f6e58732 483
d6182fbf
JF
484 return user_ptr;
485}
486
487static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
488{
489 struct mmu_update u;
f6e58732
JF
490
491 u.ptr = virt_to_machine(ptr).maddr;
492 u.val = pgd_val_ma(val);
493 extend_mmu_update(&u);
d6182fbf
JF
494}
495
496/*
497 * Raw hypercall-based set_pgd, intended for in early boot before
498 * there's a page structure. This implies:
499 * 1. The only existing pagetable is the kernel's
500 * 2. It is always pinned
501 * 3. It has no user pagetable attached to it
502 */
503void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
504{
505 preempt_disable();
506
507 xen_mc_batch();
508
509 __xen_set_pgd_hyper(ptr, val);
f6e58732
JF
510
511 xen_mc_issue(PARAVIRT_LAZY_MMU);
512
513 preempt_enable();
514}
515
516void xen_set_pgd(pgd_t *ptr, pgd_t val)
517{
d6182fbf
JF
518 pgd_t *user_ptr = xen_get_user_pgd(ptr);
519
f6e58732
JF
520 /* If page is not pinned, we can just update the entry
521 directly */
522 if (!page_pinned(ptr)) {
523 *ptr = val;
d6182fbf
JF
524 if (user_ptr) {
525 WARN_ON(page_pinned(user_ptr));
526 *user_ptr = val;
527 }
f6e58732
JF
528 return;
529 }
530
d6182fbf
JF
531 /* If it's pinned, then we can at least batch the kernel and
532 user updates together. */
533 xen_mc_batch();
534
535 __xen_set_pgd_hyper(ptr, val);
536 if (user_ptr)
537 __xen_set_pgd_hyper(user_ptr, val);
538
539 xen_mc_issue(PARAVIRT_LAZY_MMU);
f6e58732
JF
540}
541#endif /* PAGETABLE_LEVELS == 4 */
542
f4f97b3e 543/*
5deb30d1
JF
544 * (Yet another) pagetable walker. This one is intended for pinning a
545 * pagetable. This means that it walks a pagetable and calls the
546 * callback function on each page it finds making up the page table,
547 * at every level. It walks the entire pagetable, but it only bothers
548 * pinning pte pages which are below limit. In the normal case this
549 * will be STACK_TOP_MAX, but at boot we need to pin up to
550 * FIXADDR_TOP.
551 *
552 * For 32-bit the important bit is that we don't pin beyond there,
553 * because then we start getting into Xen's ptes.
554 *
555 * For 64-bit, we must skip the Xen hole in the middle of the address
556 * space, just after the big x86-64 virtual hole.
557 */
558static int pgd_walk(pgd_t *pgd, int (*func)(struct page *, enum pt_level),
f4f97b3e 559 unsigned long limit)
3b827c1b 560{
f4f97b3e 561 int flush = 0;
5deb30d1
JF
562 unsigned hole_low, hole_high;
563 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
564 unsigned pgdidx, pudidx, pmdidx;
f4f97b3e 565
5deb30d1
JF
566 /* The limit is the last byte to be touched */
567 limit--;
568 BUG_ON(limit >= FIXADDR_TOP);
3b827c1b
JF
569
570 if (xen_feature(XENFEAT_auto_translated_physmap))
f4f97b3e
JF
571 return 0;
572
5deb30d1
JF
573 /*
574 * 64-bit has a great big hole in the middle of the address
575 * space, which contains the Xen mappings. On 32-bit these
576 * will end up making a zero-sized hole and so is a no-op.
577 */
d6182fbf 578 hole_low = pgd_index(USER_LIMIT);
5deb30d1
JF
579 hole_high = pgd_index(PAGE_OFFSET);
580
581 pgdidx_limit = pgd_index(limit);
582#if PTRS_PER_PUD > 1
583 pudidx_limit = pud_index(limit);
584#else
585 pudidx_limit = 0;
586#endif
587#if PTRS_PER_PMD > 1
588 pmdidx_limit = pmd_index(limit);
589#else
590 pmdidx_limit = 0;
591#endif
592
5deb30d1 593 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
f4f97b3e 594 pud_t *pud;
3b827c1b 595
5deb30d1
JF
596 if (pgdidx >= hole_low && pgdidx < hole_high)
597 continue;
f4f97b3e 598
5deb30d1 599 if (!pgd_val(pgd[pgdidx]))
3b827c1b 600 continue;
f4f97b3e 601
5deb30d1 602 pud = pud_offset(&pgd[pgdidx], 0);
3b827c1b
JF
603
604 if (PTRS_PER_PUD > 1) /* not folded */
74260714 605 flush |= (*func)(virt_to_page(pud), PT_PUD);
f4f97b3e 606
5deb30d1 607 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
f4f97b3e 608 pmd_t *pmd;
f4f97b3e 609
5deb30d1
JF
610 if (pgdidx == pgdidx_limit &&
611 pudidx > pudidx_limit)
612 goto out;
3b827c1b 613
5deb30d1 614 if (pud_none(pud[pudidx]))
3b827c1b 615 continue;
f4f97b3e 616
5deb30d1 617 pmd = pmd_offset(&pud[pudidx], 0);
3b827c1b
JF
618
619 if (PTRS_PER_PMD > 1) /* not folded */
74260714 620 flush |= (*func)(virt_to_page(pmd), PT_PMD);
f4f97b3e 621
5deb30d1
JF
622 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
623 struct page *pte;
624
625 if (pgdidx == pgdidx_limit &&
626 pudidx == pudidx_limit &&
627 pmdidx > pmdidx_limit)
628 goto out;
3b827c1b 629
5deb30d1 630 if (pmd_none(pmd[pmdidx]))
3b827c1b
JF
631 continue;
632
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JF
633 pte = pmd_page(pmd[pmdidx]);
634 flush |= (*func)(pte, PT_PTE);
3b827c1b
JF
635 }
636 }
637 }
11ad93e5 638
5deb30d1 639out:
11ad93e5
JF
640 /* Do the top level last, so that the callbacks can use it as
641 a cue to do final things like tlb flushes. */
642 flush |= (*func)(virt_to_page(pgd), PT_PGD);
f4f97b3e
JF
643
644 return flush;
3b827c1b
JF
645}
646
74260714
JF
647static spinlock_t *lock_pte(struct page *page)
648{
649 spinlock_t *ptl = NULL;
650
651#if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS
652 ptl = __pte_lockptr(page);
653 spin_lock(ptl);
654#endif
655
656 return ptl;
657}
658
659static void do_unlock(void *v)
660{
661 spinlock_t *ptl = v;
662 spin_unlock(ptl);
663}
664
665static void xen_do_pin(unsigned level, unsigned long pfn)
666{
667 struct mmuext_op *op;
668 struct multicall_space mcs;
669
670 mcs = __xen_mc_entry(sizeof(*op));
671 op = mcs.args;
672 op->cmd = level;
673 op->arg1.mfn = pfn_to_mfn(pfn);
674 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
675}
676
677static int pin_page(struct page *page, enum pt_level level)
f4f97b3e 678{
d60cd46b 679 unsigned pgfl = TestSetPagePinned(page);
f4f97b3e
JF
680 int flush;
681
682 if (pgfl)
683 flush = 0; /* already pinned */
684 else if (PageHighMem(page))
685 /* kmaps need flushing if we found an unpinned
686 highpage */
687 flush = 1;
688 else {
689 void *pt = lowmem_page_address(page);
690 unsigned long pfn = page_to_pfn(page);
691 struct multicall_space mcs = __xen_mc_entry(0);
74260714 692 spinlock_t *ptl;
f4f97b3e
JF
693
694 flush = 0;
695
11ad93e5
JF
696 /*
697 * We need to hold the pagetable lock between the time
698 * we make the pagetable RO and when we actually pin
699 * it. If we don't, then other users may come in and
700 * attempt to update the pagetable by writing it,
701 * which will fail because the memory is RO but not
702 * pinned, so Xen won't do the trap'n'emulate.
703 *
704 * If we're using split pte locks, we can't hold the
705 * entire pagetable's worth of locks during the
706 * traverse, because we may wrap the preempt count (8
707 * bits). The solution is to mark RO and pin each PTE
708 * page while holding the lock. This means the number
709 * of locks we end up holding is never more than a
710 * batch size (~32 entries, at present).
711 *
712 * If we're not using split pte locks, we needn't pin
713 * the PTE pages independently, because we're
714 * protected by the overall pagetable lock.
715 */
74260714
JF
716 ptl = NULL;
717 if (level == PT_PTE)
718 ptl = lock_pte(page);
719
f4f97b3e
JF
720 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
721 pfn_pte(pfn, PAGE_KERNEL_RO),
74260714
JF
722 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
723
11ad93e5 724 if (ptl) {
74260714
JF
725 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
726
74260714
JF
727 /* Queue a deferred unlock for when this batch
728 is completed. */
729 xen_mc_callback(do_unlock, ptl);
730 }
f4f97b3e
JF
731 }
732
733 return flush;
734}
3b827c1b 735
f4f97b3e
JF
736/* This is called just after a mm has been created, but it has not
737 been used yet. We need to make sure that its pagetable is all
738 read-only, and can be pinned. */
3b827c1b
JF
739void xen_pgd_pin(pgd_t *pgd)
740{
f4f97b3e 741 xen_mc_batch();
3b827c1b 742
d6182fbf 743 if (pgd_walk(pgd, pin_page, USER_LIMIT)) {
f87e4cac
JF
744 /* re-enable interrupts for kmap_flush_unused */
745 xen_mc_issue(0);
f4f97b3e 746 kmap_flush_unused();
f87e4cac
JF
747 xen_mc_batch();
748 }
f4f97b3e 749
d6182fbf
JF
750#ifdef CONFIG_X86_64
751 {
752 pgd_t *user_pgd = xen_get_user_pgd(pgd);
753
754 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
755
756 if (user_pgd) {
757 pin_page(virt_to_page(user_pgd), PT_PGD);
758 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(user_pgd)));
759 }
760 }
761#else /* CONFIG_X86_32 */
5deb30d1
JF
762#ifdef CONFIG_X86_PAE
763 /* Need to make sure unshared kernel PMD is pinnable */
764 pin_page(virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), PT_PMD);
765#endif
28499143 766 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
d6182fbf 767#endif /* CONFIG_X86_64 */
f4f97b3e 768 xen_mc_issue(0);
3b827c1b
JF
769}
770
0e91398f
JF
771/*
772 * On save, we need to pin all pagetables to make sure they get their
773 * mfns turned into pfns. Search the list for any unpinned pgds and pin
774 * them (unpinned pgds are not currently in use, probably because the
775 * process is under construction or destruction).
776 */
777void xen_mm_pin_all(void)
778{
779 unsigned long flags;
780 struct page *page;
74260714 781
0e91398f 782 spin_lock_irqsave(&pgd_lock, flags);
f4f97b3e 783
0e91398f
JF
784 list_for_each_entry(page, &pgd_list, lru) {
785 if (!PagePinned(page)) {
786 xen_pgd_pin((pgd_t *)page_address(page));
787 SetPageSavePinned(page);
788 }
789 }
790
791 spin_unlock_irqrestore(&pgd_lock, flags);
3b827c1b
JF
792}
793
c1f2f09e
EH
794/*
795 * The init_mm pagetable is really pinned as soon as its created, but
796 * that's before we have page structures to store the bits. So do all
797 * the book-keeping now.
798 */
74260714 799static __init int mark_pinned(struct page *page, enum pt_level level)
3b827c1b 800{
f4f97b3e
JF
801 SetPagePinned(page);
802 return 0;
803}
3b827c1b 804
f4f97b3e
JF
805void __init xen_mark_init_mm_pinned(void)
806{
807 pgd_walk(init_mm.pgd, mark_pinned, FIXADDR_TOP);
808}
3b827c1b 809
74260714 810static int unpin_page(struct page *page, enum pt_level level)
f4f97b3e 811{
d60cd46b 812 unsigned pgfl = TestClearPagePinned(page);
3b827c1b 813
f4f97b3e
JF
814 if (pgfl && !PageHighMem(page)) {
815 void *pt = lowmem_page_address(page);
816 unsigned long pfn = page_to_pfn(page);
74260714
JF
817 spinlock_t *ptl = NULL;
818 struct multicall_space mcs;
819
11ad93e5
JF
820 /*
821 * Do the converse to pin_page. If we're using split
822 * pte locks, we must be holding the lock for while
823 * the pte page is unpinned but still RO to prevent
824 * concurrent updates from seeing it in this
825 * partially-pinned state.
826 */
74260714
JF
827 if (level == PT_PTE) {
828 ptl = lock_pte(page);
829
11ad93e5
JF
830 if (ptl)
831 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
74260714
JF
832 }
833
834 mcs = __xen_mc_entry(0);
f4f97b3e
JF
835
836 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
837 pfn_pte(pfn, PAGE_KERNEL),
74260714
JF
838 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
839
840 if (ptl) {
841 /* unlock when batch completed */
842 xen_mc_callback(do_unlock, ptl);
843 }
f4f97b3e
JF
844 }
845
846 return 0; /* never need to flush on unpin */
3b827c1b
JF
847}
848
f4f97b3e
JF
849/* Release a pagetables pages back as normal RW */
850static void xen_pgd_unpin(pgd_t *pgd)
851{
f4f97b3e
JF
852 xen_mc_batch();
853
74260714 854 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e 855
d6182fbf
JF
856#ifdef CONFIG_X86_64
857 {
858 pgd_t *user_pgd = xen_get_user_pgd(pgd);
859
860 if (user_pgd) {
861 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(user_pgd)));
862 unpin_page(virt_to_page(user_pgd), PT_PGD);
863 }
864 }
865#endif
866
5deb30d1
JF
867#ifdef CONFIG_X86_PAE
868 /* Need to make sure unshared kernel PMD is unpinned */
11ad93e5 869 unpin_page(virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), PT_PMD);
5deb30d1 870#endif
d6182fbf
JF
871
872 pgd_walk(pgd, unpin_page, USER_LIMIT);
f4f97b3e
JF
873
874 xen_mc_issue(0);
875}
3b827c1b 876
0e91398f
JF
877/*
878 * On resume, undo any pinning done at save, so that the rest of the
879 * kernel doesn't see any unexpected pinned pagetables.
880 */
881void xen_mm_unpin_all(void)
882{
883 unsigned long flags;
884 struct page *page;
885
886 spin_lock_irqsave(&pgd_lock, flags);
887
888 list_for_each_entry(page, &pgd_list, lru) {
889 if (PageSavePinned(page)) {
890 BUG_ON(!PagePinned(page));
0e91398f
JF
891 xen_pgd_unpin((pgd_t *)page_address(page));
892 ClearPageSavePinned(page);
893 }
894 }
895
896 spin_unlock_irqrestore(&pgd_lock, flags);
897}
898
3b827c1b
JF
899void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
900{
f4f97b3e 901 spin_lock(&next->page_table_lock);
3b827c1b 902 xen_pgd_pin(next->pgd);
f4f97b3e 903 spin_unlock(&next->page_table_lock);
3b827c1b
JF
904}
905
906void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
907{
f4f97b3e 908 spin_lock(&mm->page_table_lock);
3b827c1b 909 xen_pgd_pin(mm->pgd);
f4f97b3e 910 spin_unlock(&mm->page_table_lock);
3b827c1b
JF
911}
912
3b827c1b 913
f87e4cac
JF
914#ifdef CONFIG_SMP
915/* Another cpu may still have their %cr3 pointing at the pagetable, so
916 we need to repoint it somewhere else before we can unpin it. */
917static void drop_other_mm_ref(void *info)
918{
919 struct mm_struct *mm = info;
ce87b3d3 920 struct mm_struct *active_mm;
3b827c1b 921
ce87b3d3
JF
922#ifdef CONFIG_X86_64
923 active_mm = read_pda(active_mm);
924#else
925 active_mm = __get_cpu_var(cpu_tlbstate).active_mm;
926#endif
927
928 if (active_mm == mm)
f87e4cac 929 leave_mm(smp_processor_id());
9f79991d
JF
930
931 /* If this cpu still has a stale cr3 reference, then make sure
932 it has been flushed. */
933 if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) {
934 load_cr3(swapper_pg_dir);
935 arch_flush_lazy_cpu_mode();
936 }
f87e4cac 937}
3b827c1b 938
f87e4cac
JF
939static void drop_mm_ref(struct mm_struct *mm)
940{
9f79991d
JF
941 cpumask_t mask;
942 unsigned cpu;
943
f87e4cac
JF
944 if (current->active_mm == mm) {
945 if (current->mm == mm)
946 load_cr3(swapper_pg_dir);
947 else
948 leave_mm(smp_processor_id());
9f79991d
JF
949 arch_flush_lazy_cpu_mode();
950 }
951
952 /* Get the "official" set of cpus referring to our pagetable. */
953 mask = mm->cpu_vm_mask;
954
955 /* It's possible that a vcpu may have a stale reference to our
956 cr3, because its in lazy mode, and it hasn't yet flushed
957 its set of pending hypercalls yet. In this case, we can
958 look at its actual current cr3 value, and force it to flush
959 if needed. */
960 for_each_online_cpu(cpu) {
961 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
962 cpu_set(cpu, mask);
3b827c1b
JF
963 }
964
9f79991d 965 if (!cpus_empty(mask))
3b16cf87 966 smp_call_function_mask(mask, drop_other_mm_ref, mm, 1);
f87e4cac
JF
967}
968#else
969static void drop_mm_ref(struct mm_struct *mm)
970{
971 if (current->active_mm == mm)
972 load_cr3(swapper_pg_dir);
973}
974#endif
975
976/*
977 * While a process runs, Xen pins its pagetables, which means that the
978 * hypervisor forces it to be read-only, and it controls all updates
979 * to it. This means that all pagetable updates have to go via the
980 * hypervisor, which is moderately expensive.
981 *
982 * Since we're pulling the pagetable down, we switch to use init_mm,
983 * unpin old process pagetable and mark it all read-write, which
984 * allows further operations on it to be simple memory accesses.
985 *
986 * The only subtle point is that another CPU may be still using the
987 * pagetable because of lazy tlb flushing. This means we need need to
988 * switch all CPUs off this pagetable before we can unpin it.
989 */
990void xen_exit_mmap(struct mm_struct *mm)
991{
992 get_cpu(); /* make sure we don't move around */
993 drop_mm_ref(mm);
994 put_cpu();
3b827c1b 995
f120f13e 996 spin_lock(&mm->page_table_lock);
df912ea4
JF
997
998 /* pgd may not be pinned in the error exit path of execve */
e2426cf8 999 if (page_pinned(mm->pgd))
df912ea4 1000 xen_pgd_unpin(mm->pgd);
74260714 1001
f120f13e 1002 spin_unlock(&mm->page_table_lock);
3b827c1b 1003}