]>
Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Re-map IO memory to kernel address space so that we can access it. |
3 | * This is needed for high PCI addresses that aren't mapped in the | |
4 | * 640k-1MB IO memory area on PC's | |
5 | * | |
6 | * (C) Copyright 1995 1996 Linus Torvalds | |
7 | */ | |
8 | ||
e9332cac | 9 | #include <linux/bootmem.h> |
1da177e4 | 10 | #include <linux/init.h> |
a148ecfd | 11 | #include <linux/io.h> |
3cbd09e4 TG |
12 | #include <linux/module.h> |
13 | #include <linux/slab.h> | |
14 | #include <linux/vmalloc.h> | |
15 | ||
1da177e4 | 16 | #include <asm/cacheflush.h> |
3cbd09e4 TG |
17 | #include <asm/e820.h> |
18 | #include <asm/fixmap.h> | |
1da177e4 | 19 | #include <asm/pgtable.h> |
3cbd09e4 | 20 | #include <asm/tlbflush.h> |
f6df72e7 | 21 | #include <asm/pgalloc.h> |
d7677d40 | 22 | #include <asm/pat.h> |
1da177e4 | 23 | |
240d3a7c TG |
24 | #ifdef CONFIG_X86_64 |
25 | ||
59ea7463 | 26 | static inline int phys_addr_valid(unsigned long addr) |
240d3a7c | 27 | { |
59ea7463 | 28 | return addr < (1UL << boot_cpu_data.x86_phys_bits); |
240d3a7c | 29 | } |
240d3a7c | 30 | |
59ea7463 | 31 | unsigned long __phys_addr(unsigned long x) |
e3100c82 | 32 | { |
59ea7463 JS |
33 | if (x >= __START_KERNEL_map) { |
34 | x -= __START_KERNEL_map; | |
35 | VIRTUAL_BUG_ON(x >= KERNEL_IMAGE_SIZE); | |
36 | x += phys_base; | |
37 | } else { | |
38 | VIRTUAL_BUG_ON(x < PAGE_OFFSET); | |
39 | x -= PAGE_OFFSET; | |
40 | VIRTUAL_BUG_ON(system_state == SYSTEM_BOOTING ? x > MAXMEM : | |
41 | !phys_addr_valid(x)); | |
42 | } | |
43 | return x; | |
e3100c82 | 44 | } |
59ea7463 | 45 | EXPORT_SYMBOL(__phys_addr); |
e3100c82 TG |
46 | |
47 | #else | |
48 | ||
49 | static inline int phys_addr_valid(unsigned long addr) | |
50 | { | |
51 | return 1; | |
52 | } | |
53 | ||
59ea7463 JS |
54 | unsigned long __phys_addr(unsigned long x) |
55 | { | |
56 | /* VMALLOC_* aren't constants; not available at the boot time */ | |
57 | VIRTUAL_BUG_ON(x < PAGE_OFFSET || (system_state != SYSTEM_BOOTING && | |
58 | is_vmalloc_addr((void *)x))); | |
59 | return x - PAGE_OFFSET; | |
60 | } | |
61 | EXPORT_SYMBOL(__phys_addr); | |
62 | ||
240d3a7c TG |
63 | #endif |
64 | ||
5f5192b9 TG |
65 | int page_is_ram(unsigned long pagenr) |
66 | { | |
756a6c68 | 67 | resource_size_t addr, end; |
5f5192b9 TG |
68 | int i; |
69 | ||
d8a9e6a5 AV |
70 | /* |
71 | * A special case is the first 4Kb of memory; | |
72 | * This is a BIOS owned area, not kernel ram, but generally | |
73 | * not listed as such in the E820 table. | |
74 | */ | |
75 | if (pagenr == 0) | |
76 | return 0; | |
77 | ||
156fbc3f AV |
78 | /* |
79 | * Second special case: Some BIOSen report the PC BIOS | |
80 | * area (640->1Mb) as ram even though it is not. | |
81 | */ | |
82 | if (pagenr >= (BIOS_BEGIN >> PAGE_SHIFT) && | |
83 | pagenr < (BIOS_END >> PAGE_SHIFT)) | |
84 | return 0; | |
d8a9e6a5 | 85 | |
5f5192b9 TG |
86 | for (i = 0; i < e820.nr_map; i++) { |
87 | /* | |
88 | * Not usable memory: | |
89 | */ | |
90 | if (e820.map[i].type != E820_RAM) | |
91 | continue; | |
5f5192b9 TG |
92 | addr = (e820.map[i].addr + PAGE_SIZE-1) >> PAGE_SHIFT; |
93 | end = (e820.map[i].addr + e820.map[i].size) >> PAGE_SHIFT; | |
950f9d95 | 94 | |
950f9d95 | 95 | |
5f5192b9 TG |
96 | if ((pagenr >= addr) && (pagenr < end)) |
97 | return 1; | |
98 | } | |
99 | return 0; | |
100 | } | |
101 | ||
e9332cac TG |
102 | /* |
103 | * Fix up the linear direct mapping of the kernel to avoid cache attribute | |
104 | * conflicts. | |
105 | */ | |
3a96ce8c | 106 | int ioremap_change_attr(unsigned long vaddr, unsigned long size, |
107 | unsigned long prot_val) | |
e9332cac | 108 | { |
d806e5ee | 109 | unsigned long nrpages = size >> PAGE_SHIFT; |
93809be8 | 110 | int err; |
e9332cac | 111 | |
3a96ce8c | 112 | switch (prot_val) { |
113 | case _PAGE_CACHE_UC: | |
d806e5ee | 114 | default: |
1219333d | 115 | err = _set_memory_uc(vaddr, nrpages); |
d806e5ee | 116 | break; |
b310f381 | 117 | case _PAGE_CACHE_WC: |
118 | err = _set_memory_wc(vaddr, nrpages); | |
119 | break; | |
3a96ce8c | 120 | case _PAGE_CACHE_WB: |
1219333d | 121 | err = _set_memory_wb(vaddr, nrpages); |
d806e5ee TG |
122 | break; |
123 | } | |
e9332cac TG |
124 | |
125 | return err; | |
126 | } | |
127 | ||
1da177e4 LT |
128 | /* |
129 | * Remap an arbitrary physical address space into the kernel virtual | |
130 | * address space. Needed when the kernel wants to access high addresses | |
131 | * directly. | |
132 | * | |
133 | * NOTE! We need to allow non-page-aligned mappings too: we will obviously | |
134 | * have to convert them into an offset in a page-aligned mapping, but the | |
135 | * caller shouldn't need to know that small detail. | |
136 | */ | |
23016969 CL |
137 | static void __iomem *__ioremap_caller(resource_size_t phys_addr, |
138 | unsigned long size, unsigned long prot_val, void *caller) | |
1da177e4 | 139 | { |
756a6c68 IM |
140 | unsigned long pfn, offset, vaddr; |
141 | resource_size_t last_addr; | |
91eebf40 | 142 | struct vm_struct *area; |
d7677d40 | 143 | unsigned long new_prot_val; |
d806e5ee | 144 | pgprot_t prot; |
dee7cbb2 | 145 | int retval; |
1da177e4 LT |
146 | |
147 | /* Don't allow wraparound or zero size */ | |
148 | last_addr = phys_addr + size - 1; | |
149 | if (!size || last_addr < phys_addr) | |
150 | return NULL; | |
151 | ||
e3100c82 | 152 | if (!phys_addr_valid(phys_addr)) { |
6997ab49 | 153 | printk(KERN_WARNING "ioremap: invalid physical address %llx\n", |
4c8337ac | 154 | (unsigned long long)phys_addr); |
e3100c82 TG |
155 | WARN_ON_ONCE(1); |
156 | return NULL; | |
157 | } | |
158 | ||
1da177e4 LT |
159 | /* |
160 | * Don't remap the low PCI/ISA area, it's always mapped.. | |
161 | */ | |
162 | if (phys_addr >= ISA_START_ADDRESS && last_addr < ISA_END_ADDRESS) | |
4b40fcee | 163 | return (__force void __iomem *)phys_to_virt(phys_addr); |
1da177e4 LT |
164 | |
165 | /* | |
166 | * Don't allow anybody to remap normal RAM that we're using.. | |
167 | */ | |
cb8ab687 AS |
168 | for (pfn = phys_addr >> PAGE_SHIFT; |
169 | (pfn << PAGE_SHIFT) < (last_addr & PAGE_MASK); | |
170 | pfn++) { | |
bdd3cee2 | 171 | |
ba748d22 IM |
172 | int is_ram = page_is_ram(pfn); |
173 | ||
174 | if (is_ram && pfn_valid(pfn) && !PageReserved(pfn_to_page(pfn))) | |
266b9f87 | 175 | return NULL; |
ba748d22 | 176 | WARN_ON_ONCE(is_ram); |
1da177e4 LT |
177 | } |
178 | ||
d7677d40 | 179 | /* |
180 | * Mappings have to be page-aligned | |
181 | */ | |
182 | offset = phys_addr & ~PAGE_MASK; | |
183 | phys_addr &= PAGE_MASK; | |
184 | size = PAGE_ALIGN(last_addr+1) - phys_addr; | |
185 | ||
dee7cbb2 VP |
186 | retval = reserve_memtype(phys_addr, phys_addr + size, |
187 | prot_val, &new_prot_val); | |
188 | if (retval) { | |
b450e5e8 | 189 | pr_debug("Warning: reserve_memtype returned %d\n", retval); |
dee7cbb2 VP |
190 | return NULL; |
191 | } | |
192 | ||
193 | if (prot_val != new_prot_val) { | |
d7677d40 | 194 | /* |
195 | * Do not fallback to certain memory types with certain | |
196 | * requested type: | |
de33c442 SS |
197 | * - request is uc-, return cannot be write-back |
198 | * - request is uc-, return cannot be write-combine | |
b310f381 | 199 | * - request is write-combine, return cannot be write-back |
d7677d40 | 200 | */ |
de33c442 | 201 | if ((prot_val == _PAGE_CACHE_UC_MINUS && |
b310f381 | 202 | (new_prot_val == _PAGE_CACHE_WB || |
203 | new_prot_val == _PAGE_CACHE_WC)) || | |
204 | (prot_val == _PAGE_CACHE_WC && | |
d7677d40 | 205 | new_prot_val == _PAGE_CACHE_WB)) { |
b450e5e8 | 206 | pr_debug( |
6997ab49 | 207 | "ioremap error for 0x%llx-0x%llx, requested 0x%lx, got 0x%lx\n", |
4c8337ac RD |
208 | (unsigned long long)phys_addr, |
209 | (unsigned long long)(phys_addr + size), | |
6997ab49 | 210 | prot_val, new_prot_val); |
d7677d40 | 211 | free_memtype(phys_addr, phys_addr + size); |
212 | return NULL; | |
213 | } | |
214 | prot_val = new_prot_val; | |
215 | } | |
216 | ||
3a96ce8c | 217 | switch (prot_val) { |
218 | case _PAGE_CACHE_UC: | |
d806e5ee | 219 | default: |
55c62682 | 220 | prot = PAGE_KERNEL_NOCACHE; |
d806e5ee | 221 | break; |
de33c442 SS |
222 | case _PAGE_CACHE_UC_MINUS: |
223 | prot = PAGE_KERNEL_UC_MINUS; | |
224 | break; | |
b310f381 | 225 | case _PAGE_CACHE_WC: |
226 | prot = PAGE_KERNEL_WC; | |
227 | break; | |
3a96ce8c | 228 | case _PAGE_CACHE_WB: |
d806e5ee TG |
229 | prot = PAGE_KERNEL; |
230 | break; | |
231 | } | |
a148ecfd | 232 | |
1da177e4 LT |
233 | /* |
234 | * Ok, go for it.. | |
235 | */ | |
23016969 | 236 | area = get_vm_area_caller(size, VM_IOREMAP, caller); |
1da177e4 LT |
237 | if (!area) |
238 | return NULL; | |
239 | area->phys_addr = phys_addr; | |
e66aadbe TG |
240 | vaddr = (unsigned long) area->addr; |
241 | if (ioremap_page_range(vaddr, vaddr + size, phys_addr, prot)) { | |
d7677d40 | 242 | free_memtype(phys_addr, phys_addr + size); |
b16bf712 | 243 | free_vm_area(area); |
1da177e4 LT |
244 | return NULL; |
245 | } | |
e9332cac | 246 | |
3a96ce8c | 247 | if (ioremap_change_attr(vaddr, size, prot_val) < 0) { |
d7677d40 | 248 | free_memtype(phys_addr, phys_addr + size); |
e66aadbe | 249 | vunmap(area->addr); |
e9332cac TG |
250 | return NULL; |
251 | } | |
252 | ||
e66aadbe | 253 | return (void __iomem *) (vaddr + offset); |
1da177e4 | 254 | } |
1da177e4 LT |
255 | |
256 | /** | |
257 | * ioremap_nocache - map bus memory into CPU space | |
258 | * @offset: bus address of the memory | |
259 | * @size: size of the resource to map | |
260 | * | |
261 | * ioremap_nocache performs a platform specific sequence of operations to | |
262 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ | |
263 | * writew/writel functions and the other mmio helpers. The returned | |
264 | * address is not guaranteed to be usable directly as a virtual | |
91eebf40 | 265 | * address. |
1da177e4 LT |
266 | * |
267 | * This version of ioremap ensures that the memory is marked uncachable | |
268 | * on the CPU as well as honouring existing caching rules from things like | |
91eebf40 | 269 | * the PCI bus. Note that there are other caches and buffers on many |
1da177e4 LT |
270 | * busses. In particular driver authors should read up on PCI writes |
271 | * | |
272 | * It's useful if some control registers are in such an area and | |
273 | * write combining or read caching is not desirable: | |
91eebf40 | 274 | * |
1da177e4 LT |
275 | * Must be freed with iounmap. |
276 | */ | |
b9e76a00 | 277 | void __iomem *ioremap_nocache(resource_size_t phys_addr, unsigned long size) |
1da177e4 | 278 | { |
de33c442 SS |
279 | /* |
280 | * Ideally, this should be: | |
281 | * pat_wc_enabled ? _PAGE_CACHE_UC : _PAGE_CACHE_UC_MINUS; | |
282 | * | |
283 | * Till we fix all X drivers to use ioremap_wc(), we will use | |
284 | * UC MINUS. | |
285 | */ | |
286 | unsigned long val = _PAGE_CACHE_UC_MINUS; | |
287 | ||
288 | return __ioremap_caller(phys_addr, size, val, | |
23016969 | 289 | __builtin_return_address(0)); |
1da177e4 | 290 | } |
129f6946 | 291 | EXPORT_SYMBOL(ioremap_nocache); |
1da177e4 | 292 | |
b310f381 | 293 | /** |
294 | * ioremap_wc - map memory into CPU space write combined | |
295 | * @offset: bus address of the memory | |
296 | * @size: size of the resource to map | |
297 | * | |
298 | * This version of ioremap ensures that the memory is marked write combining. | |
299 | * Write combining allows faster writes to some hardware devices. | |
300 | * | |
301 | * Must be freed with iounmap. | |
302 | */ | |
303 | void __iomem *ioremap_wc(unsigned long phys_addr, unsigned long size) | |
304 | { | |
305 | if (pat_wc_enabled) | |
23016969 CL |
306 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC, |
307 | __builtin_return_address(0)); | |
b310f381 | 308 | else |
309 | return ioremap_nocache(phys_addr, size); | |
310 | } | |
311 | EXPORT_SYMBOL(ioremap_wc); | |
312 | ||
b9e76a00 | 313 | void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size) |
5f868152 | 314 | { |
23016969 CL |
315 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WB, |
316 | __builtin_return_address(0)); | |
5f868152 TG |
317 | } |
318 | EXPORT_SYMBOL(ioremap_cache); | |
319 | ||
bf5421c3 AK |
320 | /** |
321 | * iounmap - Free a IO remapping | |
322 | * @addr: virtual address from ioremap_* | |
323 | * | |
324 | * Caller must ensure there is only one unmapping for the same pointer. | |
325 | */ | |
1da177e4 LT |
326 | void iounmap(volatile void __iomem *addr) |
327 | { | |
bf5421c3 | 328 | struct vm_struct *p, *o; |
c23a4e96 AM |
329 | |
330 | if ((void __force *)addr <= high_memory) | |
1da177e4 LT |
331 | return; |
332 | ||
333 | /* | |
334 | * __ioremap special-cases the PCI/ISA range by not instantiating a | |
335 | * vm_area and by simply returning an address into the kernel mapping | |
336 | * of ISA space. So handle that here. | |
337 | */ | |
338 | if (addr >= phys_to_virt(ISA_START_ADDRESS) && | |
91eebf40 | 339 | addr < phys_to_virt(ISA_END_ADDRESS)) |
1da177e4 LT |
340 | return; |
341 | ||
91eebf40 TG |
342 | addr = (volatile void __iomem *) |
343 | (PAGE_MASK & (unsigned long __force)addr); | |
bf5421c3 AK |
344 | |
345 | /* Use the vm area unlocked, assuming the caller | |
346 | ensures there isn't another iounmap for the same address | |
347 | in parallel. Reuse of the virtual address is prevented by | |
348 | leaving it in the global lists until we're done with it. | |
349 | cpa takes care of the direct mappings. */ | |
350 | read_lock(&vmlist_lock); | |
351 | for (p = vmlist; p; p = p->next) { | |
352 | if (p->addr == addr) | |
353 | break; | |
354 | } | |
355 | read_unlock(&vmlist_lock); | |
356 | ||
357 | if (!p) { | |
91eebf40 | 358 | printk(KERN_ERR "iounmap: bad address %p\n", addr); |
c23a4e96 | 359 | dump_stack(); |
bf5421c3 | 360 | return; |
1da177e4 LT |
361 | } |
362 | ||
d7677d40 | 363 | free_memtype(p->phys_addr, p->phys_addr + get_vm_area_size(p)); |
364 | ||
bf5421c3 AK |
365 | /* Finally remove it */ |
366 | o = remove_vm_area((void *)addr); | |
367 | BUG_ON(p != o || o == NULL); | |
91eebf40 | 368 | kfree(p); |
1da177e4 | 369 | } |
129f6946 | 370 | EXPORT_SYMBOL(iounmap); |
1da177e4 | 371 | |
e045fb2a | 372 | /* |
373 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
374 | * access | |
375 | */ | |
376 | void *xlate_dev_mem_ptr(unsigned long phys) | |
377 | { | |
378 | void *addr; | |
379 | unsigned long start = phys & PAGE_MASK; | |
380 | ||
381 | /* If page is RAM, we can use __va. Otherwise ioremap and unmap. */ | |
382 | if (page_is_ram(start >> PAGE_SHIFT)) | |
383 | return __va(phys); | |
384 | ||
385 | addr = (void *)ioremap(start, PAGE_SIZE); | |
386 | if (addr) | |
387 | addr = (void *)((unsigned long)addr | (phys & ~PAGE_MASK)); | |
388 | ||
389 | return addr; | |
390 | } | |
391 | ||
392 | void unxlate_dev_mem_ptr(unsigned long phys, void *addr) | |
393 | { | |
394 | if (page_is_ram(phys >> PAGE_SHIFT)) | |
395 | return; | |
396 | ||
397 | iounmap((void __iomem *)((unsigned long)addr & PAGE_MASK)); | |
398 | return; | |
399 | } | |
400 | ||
240d3a7c | 401 | #ifdef CONFIG_X86_32 |
d18d6d65 IM |
402 | |
403 | int __initdata early_ioremap_debug; | |
404 | ||
405 | static int __init early_ioremap_debug_setup(char *str) | |
406 | { | |
407 | early_ioremap_debug = 1; | |
408 | ||
793b24a2 | 409 | return 0; |
d18d6d65 | 410 | } |
793b24a2 | 411 | early_param("early_ioremap_debug", early_ioremap_debug_setup); |
d18d6d65 | 412 | |
0947b2f3 | 413 | static __initdata int after_paging_init; |
c92a7a54 IC |
414 | static pte_t bm_pte[PAGE_SIZE/sizeof(pte_t)] |
415 | __section(.bss.page_aligned); | |
0947b2f3 | 416 | |
551889a6 | 417 | static inline pmd_t * __init early_ioremap_pmd(unsigned long addr) |
0947b2f3 | 418 | { |
37cc8d7f JF |
419 | /* Don't assume we're using swapper_pg_dir at this point */ |
420 | pgd_t *base = __va(read_cr3()); | |
421 | pgd_t *pgd = &base[pgd_index(addr)]; | |
551889a6 IC |
422 | pud_t *pud = pud_offset(pgd, addr); |
423 | pmd_t *pmd = pmd_offset(pud, addr); | |
424 | ||
425 | return pmd; | |
0947b2f3 HY |
426 | } |
427 | ||
551889a6 | 428 | static inline pte_t * __init early_ioremap_pte(unsigned long addr) |
0947b2f3 | 429 | { |
551889a6 | 430 | return &bm_pte[pte_index(addr)]; |
0947b2f3 HY |
431 | } |
432 | ||
beacfaac | 433 | void __init early_ioremap_init(void) |
0947b2f3 | 434 | { |
551889a6 | 435 | pmd_t *pmd; |
0947b2f3 | 436 | |
d18d6d65 | 437 | if (early_ioremap_debug) |
adafdf6a | 438 | printk(KERN_INFO "early_ioremap_init()\n"); |
d18d6d65 | 439 | |
551889a6 | 440 | pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)); |
0947b2f3 | 441 | memset(bm_pte, 0, sizeof(bm_pte)); |
b6fbb669 | 442 | pmd_populate_kernel(&init_mm, pmd, bm_pte); |
551889a6 | 443 | |
0e3a9549 | 444 | /* |
551889a6 | 445 | * The boot-ioremap range spans multiple pmds, for which |
0e3a9549 IM |
446 | * we are not prepared: |
447 | */ | |
551889a6 | 448 | if (pmd != early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END))) { |
0e3a9549 | 449 | WARN_ON(1); |
551889a6 IC |
450 | printk(KERN_WARNING "pmd %p != %p\n", |
451 | pmd, early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END))); | |
91eebf40 | 452 | printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", |
551889a6 | 453 | fix_to_virt(FIX_BTMAP_BEGIN)); |
91eebf40 | 454 | printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_END): %08lx\n", |
551889a6 | 455 | fix_to_virt(FIX_BTMAP_END)); |
91eebf40 TG |
456 | |
457 | printk(KERN_WARNING "FIX_BTMAP_END: %d\n", FIX_BTMAP_END); | |
458 | printk(KERN_WARNING "FIX_BTMAP_BEGIN: %d\n", | |
459 | FIX_BTMAP_BEGIN); | |
0e3a9549 | 460 | } |
0947b2f3 HY |
461 | } |
462 | ||
beacfaac | 463 | void __init early_ioremap_clear(void) |
0947b2f3 | 464 | { |
551889a6 | 465 | pmd_t *pmd; |
0947b2f3 | 466 | |
d18d6d65 | 467 | if (early_ioremap_debug) |
adafdf6a | 468 | printk(KERN_INFO "early_ioremap_clear()\n"); |
d18d6d65 | 469 | |
551889a6 IC |
470 | pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)); |
471 | pmd_clear(pmd); | |
6944a9c8 | 472 | paravirt_release_pte(__pa(bm_pte) >> PAGE_SHIFT); |
0947b2f3 HY |
473 | __flush_tlb_all(); |
474 | } | |
475 | ||
beacfaac | 476 | void __init early_ioremap_reset(void) |
0947b2f3 HY |
477 | { |
478 | enum fixed_addresses idx; | |
551889a6 IC |
479 | unsigned long addr, phys; |
480 | pte_t *pte; | |
0947b2f3 HY |
481 | |
482 | after_paging_init = 1; | |
64a8f852 | 483 | for (idx = FIX_BTMAP_BEGIN; idx >= FIX_BTMAP_END; idx--) { |
0947b2f3 | 484 | addr = fix_to_virt(idx); |
beacfaac | 485 | pte = early_ioremap_pte(addr); |
551889a6 IC |
486 | if (pte_present(*pte)) { |
487 | phys = pte_val(*pte) & PAGE_MASK; | |
0947b2f3 HY |
488 | set_fixmap(idx, phys); |
489 | } | |
490 | } | |
491 | } | |
492 | ||
beacfaac | 493 | static void __init __early_set_fixmap(enum fixed_addresses idx, |
0947b2f3 HY |
494 | unsigned long phys, pgprot_t flags) |
495 | { | |
551889a6 IC |
496 | unsigned long addr = __fix_to_virt(idx); |
497 | pte_t *pte; | |
0947b2f3 HY |
498 | |
499 | if (idx >= __end_of_fixed_addresses) { | |
500 | BUG(); | |
501 | return; | |
502 | } | |
beacfaac | 503 | pte = early_ioremap_pte(addr); |
0947b2f3 | 504 | if (pgprot_val(flags)) |
551889a6 | 505 | set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); |
0947b2f3 | 506 | else |
551889a6 | 507 | pte_clear(NULL, addr, pte); |
0947b2f3 HY |
508 | __flush_tlb_one(addr); |
509 | } | |
510 | ||
beacfaac | 511 | static inline void __init early_set_fixmap(enum fixed_addresses idx, |
0947b2f3 HY |
512 | unsigned long phys) |
513 | { | |
514 | if (after_paging_init) | |
515 | set_fixmap(idx, phys); | |
516 | else | |
beacfaac | 517 | __early_set_fixmap(idx, phys, PAGE_KERNEL); |
0947b2f3 HY |
518 | } |
519 | ||
beacfaac | 520 | static inline void __init early_clear_fixmap(enum fixed_addresses idx) |
0947b2f3 HY |
521 | { |
522 | if (after_paging_init) | |
523 | clear_fixmap(idx); | |
524 | else | |
beacfaac | 525 | __early_set_fixmap(idx, 0, __pgprot(0)); |
0947b2f3 HY |
526 | } |
527 | ||
1b42f516 IM |
528 | |
529 | int __initdata early_ioremap_nested; | |
530 | ||
d690b2af IM |
531 | static int __init check_early_ioremap_leak(void) |
532 | { | |
533 | if (!early_ioremap_nested) | |
534 | return 0; | |
535 | ||
536 | printk(KERN_WARNING | |
91eebf40 TG |
537 | "Debug warning: early ioremap leak of %d areas detected.\n", |
538 | early_ioremap_nested); | |
d690b2af | 539 | printk(KERN_WARNING |
91eebf40 | 540 | "please boot with early_ioremap_debug and report the dmesg.\n"); |
d690b2af IM |
541 | WARN_ON(1); |
542 | ||
543 | return 1; | |
544 | } | |
545 | late_initcall(check_early_ioremap_leak); | |
546 | ||
beacfaac | 547 | void __init *early_ioremap(unsigned long phys_addr, unsigned long size) |
1da177e4 LT |
548 | { |
549 | unsigned long offset, last_addr; | |
1b42f516 IM |
550 | unsigned int nrpages, nesting; |
551 | enum fixed_addresses idx0, idx; | |
552 | ||
553 | WARN_ON(system_state != SYSTEM_BOOTING); | |
554 | ||
555 | nesting = early_ioremap_nested; | |
d18d6d65 | 556 | if (early_ioremap_debug) { |
adafdf6a | 557 | printk(KERN_INFO "early_ioremap(%08lx, %08lx) [%d] => ", |
91eebf40 | 558 | phys_addr, size, nesting); |
d18d6d65 IM |
559 | dump_stack(); |
560 | } | |
1da177e4 LT |
561 | |
562 | /* Don't allow wraparound or zero size */ | |
563 | last_addr = phys_addr + size - 1; | |
bd796ed0 IM |
564 | if (!size || last_addr < phys_addr) { |
565 | WARN_ON(1); | |
1da177e4 | 566 | return NULL; |
bd796ed0 | 567 | } |
1da177e4 | 568 | |
bd796ed0 IM |
569 | if (nesting >= FIX_BTMAPS_NESTING) { |
570 | WARN_ON(1); | |
1b42f516 | 571 | return NULL; |
bd796ed0 | 572 | } |
1b42f516 | 573 | early_ioremap_nested++; |
1da177e4 LT |
574 | /* |
575 | * Mappings have to be page-aligned | |
576 | */ | |
577 | offset = phys_addr & ~PAGE_MASK; | |
578 | phys_addr &= PAGE_MASK; | |
579 | size = PAGE_ALIGN(last_addr) - phys_addr; | |
580 | ||
581 | /* | |
582 | * Mappings have to fit in the FIX_BTMAP area. | |
583 | */ | |
584 | nrpages = size >> PAGE_SHIFT; | |
bd796ed0 IM |
585 | if (nrpages > NR_FIX_BTMAPS) { |
586 | WARN_ON(1); | |
1da177e4 | 587 | return NULL; |
bd796ed0 | 588 | } |
1da177e4 LT |
589 | |
590 | /* | |
591 | * Ok, go for it.. | |
592 | */ | |
1b42f516 IM |
593 | idx0 = FIX_BTMAP_BEGIN - NR_FIX_BTMAPS*nesting; |
594 | idx = idx0; | |
1da177e4 | 595 | while (nrpages > 0) { |
beacfaac | 596 | early_set_fixmap(idx, phys_addr); |
1da177e4 LT |
597 | phys_addr += PAGE_SIZE; |
598 | --idx; | |
599 | --nrpages; | |
600 | } | |
d18d6d65 IM |
601 | if (early_ioremap_debug) |
602 | printk(KERN_CONT "%08lx + %08lx\n", offset, fix_to_virt(idx0)); | |
1b42f516 | 603 | |
91eebf40 | 604 | return (void *) (offset + fix_to_virt(idx0)); |
1da177e4 LT |
605 | } |
606 | ||
beacfaac | 607 | void __init early_iounmap(void *addr, unsigned long size) |
1da177e4 LT |
608 | { |
609 | unsigned long virt_addr; | |
610 | unsigned long offset; | |
611 | unsigned int nrpages; | |
612 | enum fixed_addresses idx; | |
226e9a93 | 613 | int nesting; |
1b42f516 IM |
614 | |
615 | nesting = --early_ioremap_nested; | |
226e9a93 IM |
616 | if (WARN_ON(nesting < 0)) |
617 | return; | |
1da177e4 | 618 | |
d18d6d65 | 619 | if (early_ioremap_debug) { |
adafdf6a | 620 | printk(KERN_INFO "early_iounmap(%p, %08lx) [%d]\n", addr, |
91eebf40 | 621 | size, nesting); |
d18d6d65 IM |
622 | dump_stack(); |
623 | } | |
624 | ||
1da177e4 | 625 | virt_addr = (unsigned long)addr; |
bd796ed0 IM |
626 | if (virt_addr < fix_to_virt(FIX_BTMAP_BEGIN)) { |
627 | WARN_ON(1); | |
1da177e4 | 628 | return; |
bd796ed0 | 629 | } |
1da177e4 LT |
630 | offset = virt_addr & ~PAGE_MASK; |
631 | nrpages = PAGE_ALIGN(offset + size - 1) >> PAGE_SHIFT; | |
632 | ||
1b42f516 | 633 | idx = FIX_BTMAP_BEGIN - NR_FIX_BTMAPS*nesting; |
1da177e4 | 634 | while (nrpages > 0) { |
beacfaac | 635 | early_clear_fixmap(idx); |
1da177e4 LT |
636 | --idx; |
637 | --nrpages; | |
638 | } | |
639 | } | |
1b42f516 IM |
640 | |
641 | void __this_fixmap_does_not_exist(void) | |
642 | { | |
643 | WARN_ON(1); | |
644 | } | |
240d3a7c TG |
645 | |
646 | #endif /* CONFIG_X86_32 */ |