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KVM: Document basic API
[net-next-2.6.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
6de4f3ad 21#include "kvm_cache_regs.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
6aa8b732
AK		 24#include <linux/types.h>
25#include <linux/string.h>
6aa8b732
AK		 26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
e495606d
AK		 33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
13673a90 36#include <asm/vmx.h>
6aa8b732 37
18552672
JR		 38/*
39 * When setting this variable to true it enables Two-Dimensional-Paging
40 * where the hardware walks 2 page tables:
41 * 1. the guest-virtual to guest-physical
42 * 2. while doing 1. it walks guest-physical to host-physical
43 * If the hardware supports that we don't need to do shadow paging.
44 */
2f333bcb 45bool tdp_enabled = false;
18552672 46
37a7d8b0
AK		 47#undef MMU_DEBUG
48
49#undef AUDIT
50
51#ifdef AUDIT
52static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
53#else
54static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
55#endif
56
57#ifdef MMU_DEBUG
58
59#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
60#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
61
62#else
63
64#define pgprintk(x...) do { } while (0)
65#define rmap_printk(x...) do { } while (0)
66
67#endif
68
69#if defined(MMU_DEBUG) || defined(AUDIT)
6ada8cca
AK		 70static int dbg = 0;
71module_param(dbg, bool, 0644);
37a7d8b0 72#endif
6aa8b732 73
582801a9
MT		 74static int oos_shadow = 1;
75module_param(oos_shadow, bool, 0644);
76
d6c69ee9
YD		 77#ifndef MMU_DEBUG
78#define ASSERT(x) do { } while (0)
79#else
6aa8b732
AK		 80#define ASSERT(x) \
81 if (!(x)) { \
82 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
83 __FILE__, __LINE__, #x); \
84 }
d6c69ee9 85#endif
6aa8b732 86
6aa8b732
AK		 87#define PT_FIRST_AVAIL_BITS_SHIFT 9
88#define PT64_SECOND_AVAIL_BITS_SHIFT 52
89
6aa8b732
AK		 90#define VALID_PAGE(x) ((x) != INVALID_PAGE)
91
92#define PT64_LEVEL_BITS 9
93
94#define PT64_LEVEL_SHIFT(level) \
d77c26fc 95 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK		 96
97#define PT64_LEVEL_MASK(level) \
98 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
99
100#define PT64_INDEX(address, level)\
101 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
102
103
104#define PT32_LEVEL_BITS 10
105
106#define PT32_LEVEL_SHIFT(level) \
d77c26fc 107 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK		 108
109#define PT32_LEVEL_MASK(level) \
110 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
111
112#define PT32_INDEX(address, level)\
113 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
114
115
27aba766 116#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK		 117#define PT64_DIR_BASE_ADDR_MASK \
118 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
119
120#define PT32_BASE_ADDR_MASK PAGE_MASK
121#define PT32_DIR_BASE_ADDR_MASK \
122 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
123
79539cec
AK		 124#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
125 | PT64_NX_MASK)
6aa8b732
AK		 126
127#define PFERR_PRESENT_MASK (1U << 0)
128#define PFERR_WRITE_MASK (1U << 1)
129#define PFERR_USER_MASK (1U << 2)
82725b20 130#define PFERR_RSVD_MASK (1U << 3)
73b1087e 131#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 132
6aa8b732
AK		 133#define PT_DIRECTORY_LEVEL 2
134#define PT_PAGE_TABLE_LEVEL 1
135
cd4a4e53
AK		 136#define RMAP_EXT 4
137
fe135d2c
AK		 138#define ACC_EXEC_MASK 1
139#define ACC_WRITE_MASK PT_WRITABLE_MASK
140#define ACC_USER_MASK PT_USER_MASK
141#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
142
07420171
AK		 143#define CREATE_TRACE_POINTS
144#include "mmutrace.h"
145
135f8c2b
AK		 146#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
147
cd4a4e53 148struct kvm_rmap_desc {
d555c333 149 u64 *sptes[RMAP_EXT];
cd4a4e53
AK		 150 struct kvm_rmap_desc *more;
151};
152
2d11123a
AK		 153struct kvm_shadow_walk_iterator {
154 u64 addr;
155 hpa_t shadow_addr;
156 int level;
157 u64 *sptep;
158 unsigned index;
159};
160
161#define for_each_shadow_entry(_vcpu, _addr, _walker) \
162 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
163 shadow_walk_okay(&(_walker)); \
164 shadow_walk_next(&(_walker)))
165
166
4731d4c7
MT		 167struct kvm_unsync_walk {
168 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
169};
170
ad8cfbe3
MT		 171typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
172
b5a33a75
AK		 173static struct kmem_cache *pte_chain_cache;
174static struct kmem_cache *rmap_desc_cache;
d3d25b04 175static struct kmem_cache *mmu_page_header_cache;
b5a33a75 176
c7addb90
AK		 177static u64 __read_mostly shadow_trap_nonpresent_pte;
178static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY		 179static u64 __read_mostly shadow_base_present_pte;
180static u64 __read_mostly shadow_nx_mask;
181static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
182static u64 __read_mostly shadow_user_mask;
183static u64 __read_mostly shadow_accessed_mask;
184static u64 __read_mostly shadow_dirty_mask;
c7addb90 185
82725b20
DE		 186static inline u64 rsvd_bits(int s, int e)
187{
188 return ((1ULL << (e - s + 1)) - 1) << s;
189}
190
c7addb90
AK		 191void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
192{
193 shadow_trap_nonpresent_pte = trap_pte;
194 shadow_notrap_nonpresent_pte = notrap_pte;
195}
196EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
197
7b52345e
SY		 198void kvm_mmu_set_base_ptes(u64 base_pte)
199{
200 shadow_base_present_pte = base_pte;
201}
202EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
203
204void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 205 u64 dirty_mask, u64 nx_mask, u64 x_mask)
7b52345e
SY		 206{
207 shadow_user_mask = user_mask;
208 shadow_accessed_mask = accessed_mask;
209 shadow_dirty_mask = dirty_mask;
210 shadow_nx_mask = nx_mask;
211 shadow_x_mask = x_mask;
212}
213EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
214
6aa8b732
AK		 215static int is_write_protection(struct kvm_vcpu *vcpu)
216{
ad312c7c 217 return vcpu->arch.cr0 & X86_CR0_WP;
6aa8b732
AK		 218}
219
220static int is_cpuid_PSE36(void)
221{
222 return 1;
223}
224
73b1087e
AK		 225static int is_nx(struct kvm_vcpu *vcpu)
226{
ad312c7c 227 return vcpu->arch.shadow_efer & EFER_NX;
73b1087e
AK		 228}
229
c7addb90
AK		 230static int is_shadow_present_pte(u64 pte)
231{
c7addb90
AK		 232 return pte != shadow_trap_nonpresent_pte
233 && pte != shadow_notrap_nonpresent_pte;
234}
235
05da4558
MT		 236static int is_large_pte(u64 pte)
237{
238 return pte & PT_PAGE_SIZE_MASK;
239}
240
6aa8b732
AK		 241static int is_writeble_pte(unsigned long pte)
242{
243 return pte & PT_WRITABLE_MASK;
244}
245
43a3795a 246static int is_dirty_gpte(unsigned long pte)
e3c5e7ec 247{
439e218a 248 return pte & PT_DIRTY_MASK;
e3c5e7ec
AK		 249}
250
43a3795a 251static int is_rmap_spte(u64 pte)
cd4a4e53 252{
4b1a80fa 253 return is_shadow_present_pte(pte);
cd4a4e53
AK		 254}
255
776e6633
MT		 256static int is_last_spte(u64 pte, int level)
257{
258 if (level == PT_PAGE_TABLE_LEVEL)
259 return 1;
260 if (level == PT_DIRECTORY_LEVEL && is_large_pte(pte))
261 return 1;
262 return 0;
263}
264
35149e21 265static pfn_t spte_to_pfn(u64 pte)
0b49ea86 266{
35149e21 267 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK		 268}
269
da928521
AK		 270static gfn_t pse36_gfn_delta(u32 gpte)
271{
272 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
273
274 return (gpte & PT32_DIR_PSE36_MASK) << shift;
275}
276
d555c333 277static void __set_spte(u64 *sptep, u64 spte)
e663ee64
AK		 278{
279#ifdef CONFIG_X86_64
280 set_64bit((unsigned long *)sptep, spte);
281#else
282 set_64bit((unsigned long long *)sptep, spte);
283#endif
284}
285
e2dec939 286static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 287 struct kmem_cache *base_cache, int min)
714b93da
AK		 288{
289 void *obj;
290
291 if (cache->nobjs >= min)
e2dec939 292 return 0;
714b93da 293 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 294 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 295 if (!obj)
e2dec939 296 return -ENOMEM;
714b93da
AK		 297 cache->objects[cache->nobjs++] = obj;
298 }
e2dec939 299 return 0;
714b93da
AK		 300}
301
302static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
303{
304 while (mc->nobjs)
305 kfree(mc->objects[--mc->nobjs]);
306}
307
c1158e63 308static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 309 int min)
c1158e63
AK		 310{
311 struct page *page;
312
313 if (cache->nobjs >= min)
314 return 0;
315 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 316 page = alloc_page(GFP_KERNEL);
c1158e63
AK		 317 if (!page)
318 return -ENOMEM;
319 set_page_private(page, 0);
320 cache->objects[cache->nobjs++] = page_address(page);
321 }
322 return 0;
323}
324
325static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
326{
327 while (mc->nobjs)
c4d198d5 328 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK		 329}
330
2e3e5882 331static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 332{
e2dec939
AK		 333 int r;
334
ad312c7c 335 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 336 pte_chain_cache, 4);
e2dec939
AK		 337 if (r)
338 goto out;
ad312c7c 339 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 340 rmap_desc_cache, 4);
d3d25b04
AK		 341 if (r)
342 goto out;
ad312c7c 343 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK		 344 if (r)
345 goto out;
ad312c7c 346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 347 mmu_page_header_cache, 4);
e2dec939
AK		 348out:
349 return r;
714b93da
AK		 350}
351
352static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
353{
ad312c7c
ZX		 354 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
355 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
356 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
357 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK		 358}
359
360static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
361 size_t size)
362{
363 void *p;
364
365 BUG_ON(!mc->nobjs);
366 p = mc->objects[--mc->nobjs];
714b93da
AK		 367 return p;
368}
369
714b93da
AK		 370static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
371{
ad312c7c 372 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK		 373 sizeof(struct kvm_pte_chain));
374}
375
90cb0529 376static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 377{
90cb0529 378 kfree(pc);
714b93da
AK		 379}
380
381static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
382{
ad312c7c 383 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK		 384 sizeof(struct kvm_rmap_desc));
385}
386
90cb0529 387static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 388{
90cb0529 389 kfree(rd);
714b93da
AK		 390}
391
05da4558
MT		 392/*
393 * Return the pointer to the largepage write count for a given
394 * gfn, handling slots that are not large page aligned.
395 */
396static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
397{
398 unsigned long idx;
399
ec04b260
JR		 400 idx = (gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL)) -
401 (slot->base_gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL));
402 return &slot->lpage_info[0][idx].write_count;
05da4558
MT		 403}
404
405static void account_shadowed(struct kvm *kvm, gfn_t gfn)
406{
407 int *write_count;
408
2843099f
IE		 409 gfn = unalias_gfn(kvm, gfn);
410 write_count = slot_largepage_idx(gfn,
411 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 412 *write_count += 1;
05da4558
MT		 413}
414
415static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
416{
417 int *write_count;
418
2843099f
IE		 419 gfn = unalias_gfn(kvm, gfn);
420 write_count = slot_largepage_idx(gfn,
421 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT		 422 *write_count -= 1;
423 WARN_ON(*write_count < 0);
424}
425
426static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
427{
2843099f 428 struct kvm_memory_slot *slot;
05da4558
MT		 429 int *largepage_idx;
430
2843099f
IE		 431 gfn = unalias_gfn(kvm, gfn);
432 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT		 433 if (slot) {
434 largepage_idx = slot_largepage_idx(gfn, slot);
435 return *largepage_idx;
436 }
437
438 return 1;
439}
440
441static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
442{
443 struct vm_area_struct *vma;
444 unsigned long addr;
4c2155ce 445 int ret = 0;
05da4558
MT		 446
447 addr = gfn_to_hva(kvm, gfn);
448 if (kvm_is_error_hva(addr))
4c2155ce 449 return ret;
05da4558 450
4c2155ce 451 down_read(&current->mm->mmap_sem);
05da4558
MT		 452 vma = find_vma(current->mm, addr);
453 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT		 454 ret = 1;
455 up_read(&current->mm->mmap_sem);
05da4558 456
4c2155ce 457 return ret;
05da4558
MT		 458}
459
460static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
461{
462 struct kvm_memory_slot *slot;
463
464 if (has_wrprotected_page(vcpu->kvm, large_gfn))
465 return 0;
466
467 if (!host_largepage_backed(vcpu->kvm, large_gfn))
468 return 0;
469
470 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
471 if (slot && slot->dirty_bitmap)
472 return 0;
473
474 return 1;
475}
476
290fc38d
IE		 477/*
478 * Take gfn and return the reverse mapping to it.
479 * Note: gfn must be unaliased before this function get called
480 */
481
05da4558 482static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE		 483{
484 struct kvm_memory_slot *slot;
05da4558 485 unsigned long idx;
290fc38d
IE		 486
487 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT		 488 if (!lpage)
489 return &slot->rmap[gfn - slot->base_gfn];
490
ec04b260
JR		 491 idx = (gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL)) -
492 (slot->base_gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL));
05da4558 493
ec04b260 494 return &slot->lpage_info[0][idx].rmap_pde;
290fc38d
IE		 495}
496
cd4a4e53
AK		 497/*
498 * Reverse mapping data structures:
499 *
290fc38d
IE		 500 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
501 * that points to page_address(page).
cd4a4e53 502 *
290fc38d
IE		 503 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
504 * containing more mappings.
53a27b39
MT		 505 *
506 * Returns the number of rmap entries before the spte was added or zero if
507 * the spte was not added.
508 *
cd4a4e53 509 */
53a27b39 510static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 511{
4db35314 512 struct kvm_mmu_page *sp;
cd4a4e53 513 struct kvm_rmap_desc *desc;
290fc38d 514 unsigned long *rmapp;
53a27b39 515 int i, count = 0;
cd4a4e53 516
43a3795a 517 if (!is_rmap_spte(*spte))
53a27b39 518 return count;
290fc38d 519 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK		 520 sp = page_header(__pa(spte));
521 sp->gfns[spte - sp->spt] = gfn;
05da4558 522 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 523 if (!*rmapp) {
cd4a4e53 524 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE		 525 *rmapp = (unsigned long)spte;
526 } else if (!(*rmapp & 1)) {
cd4a4e53 527 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 528 desc = mmu_alloc_rmap_desc(vcpu);
d555c333
AK		 529 desc->sptes[0] = (u64 *)*rmapp;
530 desc->sptes[1] = spte;
290fc38d 531 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK		 532 } else {
533 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 534 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
d555c333 535 while (desc->sptes[RMAP_EXT-1] && desc->more) {
cd4a4e53 536 desc = desc->more;
53a27b39
MT		 537 count += RMAP_EXT;
538 }
d555c333 539 if (desc->sptes[RMAP_EXT-1]) {
714b93da 540 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK		 541 desc = desc->more;
542 }
d555c333 543 for (i = 0; desc->sptes[i]; ++i)
cd4a4e53 544 ;
d555c333 545 desc->sptes[i] = spte;
cd4a4e53 546 }
53a27b39 547 return count;
cd4a4e53
AK		 548}
549
290fc38d 550static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK		 551 struct kvm_rmap_desc *desc,
552 int i,
553 struct kvm_rmap_desc *prev_desc)
554{
555 int j;
556
d555c333 557 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
cd4a4e53 558 ;
d555c333
AK		 559 desc->sptes[i] = desc->sptes[j];
560 desc->sptes[j] = NULL;
cd4a4e53
AK		 561 if (j != 0)
562 return;
563 if (!prev_desc && !desc->more)
d555c333 564 *rmapp = (unsigned long)desc->sptes[0];
cd4a4e53
AK		 565 else
566 if (prev_desc)
567 prev_desc->more = desc->more;
568 else
290fc38d 569 *rmapp = (unsigned long)desc->more | 1;
90cb0529 570 mmu_free_rmap_desc(desc);
cd4a4e53
AK		 571}
572
290fc38d 573static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 574{
cd4a4e53
AK		 575 struct kvm_rmap_desc *desc;
576 struct kvm_rmap_desc *prev_desc;
4db35314 577 struct kvm_mmu_page *sp;
35149e21 578 pfn_t pfn;
290fc38d 579 unsigned long *rmapp;
cd4a4e53
AK		 580 int i;
581
43a3795a 582 if (!is_rmap_spte(*spte))
cd4a4e53 583 return;
4db35314 584 sp = page_header(__pa(spte));
35149e21 585 pfn = spte_to_pfn(*spte);
7b52345e 586 if (*spte & shadow_accessed_mask)
35149e21 587 kvm_set_pfn_accessed(pfn);
b4231d61 588 if (is_writeble_pte(*spte))
35149e21 589 kvm_release_pfn_dirty(pfn);
b4231d61 590 else
35149e21 591 kvm_release_pfn_clean(pfn);
05da4558 592 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 593 if (!*rmapp) {
cd4a4e53
AK		 594 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
595 BUG();
290fc38d 596 } else if (!(*rmapp & 1)) {
cd4a4e53 597 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 598 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK		 599 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
600 spte, *spte);
601 BUG();
602 }
290fc38d 603 *rmapp = 0;
cd4a4e53
AK		 604 } else {
605 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 606 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK		 607 prev_desc = NULL;
608 while (desc) {
d555c333
AK		 609 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
610 if (desc->sptes[i] == spte) {
290fc38d 611 rmap_desc_remove_entry(rmapp,
714b93da 612 desc, i,
cd4a4e53
AK		 613 prev_desc);
614 return;
615 }
616 prev_desc = desc;
617 desc = desc->more;
618 }
619 BUG();
620 }
621}
622
98348e95 623static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 624{
374cbac0 625 struct kvm_rmap_desc *desc;
98348e95
IE		 626 struct kvm_rmap_desc *prev_desc;
627 u64 *prev_spte;
628 int i;
629
630 if (!*rmapp)
631 return NULL;
632 else if (!(*rmapp & 1)) {
633 if (!spte)
634 return (u64 *)*rmapp;
635 return NULL;
636 }
637 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
638 prev_desc = NULL;
639 prev_spte = NULL;
640 while (desc) {
d555c333 641 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
98348e95 642 if (prev_spte == spte)
d555c333
AK		 643 return desc->sptes[i];
644 prev_spte = desc->sptes[i];
98348e95
IE		 645 }
646 desc = desc->more;
647 }
648 return NULL;
649}
650
b1a36821 651static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 652{
290fc38d 653 unsigned long *rmapp;
374cbac0 654 u64 *spte;
caa5b8a5 655 int write_protected = 0;
374cbac0 656
4a4c9924 657 gfn = unalias_gfn(kvm, gfn);
05da4558 658 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 659
98348e95
IE		 660 spte = rmap_next(kvm, rmapp, NULL);
661 while (spte) {
374cbac0 662 BUG_ON(!spte);
374cbac0 663 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 664 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 665 if (is_writeble_pte(*spte)) {
d555c333 666 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED		 667 write_protected = 1;
668 }
9647c14c 669 spte = rmap_next(kvm, rmapp, spte);
374cbac0 670 }
855149aa 671 if (write_protected) {
35149e21 672 pfn_t pfn;
855149aa
IE		 673
674 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL		 675 pfn = spte_to_pfn(*spte);
676 kvm_set_pfn_dirty(pfn);
855149aa
IE		 677 }
678
05da4558
MT		 679 /* check for huge page mappings */
680 rmapp = gfn_to_rmap(kvm, gfn, 1);
681 spte = rmap_next(kvm, rmapp, NULL);
682 while (spte) {
683 BUG_ON(!spte);
684 BUG_ON(!(*spte & PT_PRESENT_MASK));
685 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
686 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
687 if (is_writeble_pte(*spte)) {
688 rmap_remove(kvm, spte);
689 --kvm->stat.lpages;
d555c333 690 __set_spte(spte, shadow_trap_nonpresent_pte);
6597ca09 691 spte = NULL;
05da4558
MT		 692 write_protected = 1;
693 }
694 spte = rmap_next(kvm, rmapp, spte);
695 }
696
b1a36821 697 return write_protected;
374cbac0
AK		 698}
699
e930bffe
AA		 700static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
701{
702 u64 *spte;
703 int need_tlb_flush = 0;
704
705 while ((spte = rmap_next(kvm, rmapp, NULL))) {
706 BUG_ON(!(*spte & PT_PRESENT_MASK));
707 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
708 rmap_remove(kvm, spte);
d555c333 709 __set_spte(spte, shadow_trap_nonpresent_pte);
e930bffe
AA		 710 need_tlb_flush = 1;
711 }
712 return need_tlb_flush;
713}
714
715static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
716 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
717{
718 int i;
719 int retval = 0;
720
721 /*
722 * If mmap_sem isn't taken, we can look the memslots with only
723 * the mmu_lock by skipping over the slots with userspace_addr == 0.
724 */
725 for (i = 0; i < kvm->nmemslots; i++) {
726 struct kvm_memory_slot *memslot = &kvm->memslots[i];
727 unsigned long start = memslot->userspace_addr;
728 unsigned long end;
729
730 /* mmu_lock protects userspace_addr */
731 if (!start)
732 continue;
733
734 end = start + (memslot->npages << PAGE_SHIFT);
735 if (hva >= start && hva < end) {
736 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
ec04b260
JR		 737 int idx = gfn_offset /
738 KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL);
e930bffe
AA		 739 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
740 retval |= handler(kvm,
ec04b260 741 &memslot->lpage_info[0][idx].rmap_pde);
e930bffe
AA		 742 }
743 }
744
745 return retval;
746}
747
748int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
749{
750 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
751}
752
753static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
754{
755 u64 *spte;
756 int young = 0;
757
534e38b4
SY		 758 /* always return old for EPT */
759 if (!shadow_accessed_mask)
760 return 0;
761
e930bffe
AA		 762 spte = rmap_next(kvm, rmapp, NULL);
763 while (spte) {
764 int _young;
765 u64 _spte = *spte;
766 BUG_ON(!(_spte & PT_PRESENT_MASK));
767 _young = _spte & PT_ACCESSED_MASK;
768 if (_young) {
769 young = 1;
770 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
771 }
772 spte = rmap_next(kvm, rmapp, spte);
773 }
774 return young;
775}
776
53a27b39
MT		 777#define RMAP_RECYCLE_THRESHOLD 1000
778
779static void rmap_recycle(struct kvm_vcpu *vcpu, gfn_t gfn, int lpage)
780{
781 unsigned long *rmapp;
782
783 gfn = unalias_gfn(vcpu->kvm, gfn);
784 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
785
786 kvm_unmap_rmapp(vcpu->kvm, rmapp);
787 kvm_flush_remote_tlbs(vcpu->kvm);
788}
789
e930bffe
AA		 790int kvm_age_hva(struct kvm *kvm, unsigned long hva)
791{
792 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
793}
794
d6c69ee9 795#ifdef MMU_DEBUG
47ad8e68 796static int is_empty_shadow_page(u64 *spt)
6aa8b732 797{
139bdb2d
AK		 798 u64 *pos;
799 u64 *end;
800
47ad8e68 801 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 802 if (is_shadow_present_pte(*pos)) {
b8688d51 803 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 804 pos, *pos);
6aa8b732 805 return 0;
139bdb2d 806 }
6aa8b732
AK		 807 return 1;
808}
d6c69ee9 809#endif
6aa8b732 810
4db35314 811static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 812{
4db35314
AK		 813 ASSERT(is_empty_shadow_page(sp->spt));
814 list_del(&sp->link);
815 __free_page(virt_to_page(sp->spt));
816 __free_page(virt_to_page(sp->gfns));
817 kfree(sp);
f05e70ac 818 ++kvm->arch.n_free_mmu_pages;
260746c0
AK		 819}
820
cea0f0e7
AK		 821static unsigned kvm_page_table_hashfn(gfn_t gfn)
822{
1ae0a13d 823 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK		 824}
825
25c0de2c
AK		 826static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
827 u64 *parent_pte)
6aa8b732 828{
4db35314 829 struct kvm_mmu_page *sp;
6aa8b732 830
ad312c7c
ZX		 831 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
832 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
833 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 834 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 835 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 836 INIT_LIST_HEAD(&sp->oos_link);
291f26bc 837 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK		 838 sp->multimapped = 0;
839 sp->parent_pte = parent_pte;
f05e70ac 840 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 841 return sp;
6aa8b732
AK		 842}
843
714b93da 844static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 845 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK		 846{
847 struct kvm_pte_chain *pte_chain;
848 struct hlist_node *node;
849 int i;
850
851 if (!parent_pte)
852 return;
4db35314
AK		 853 if (!sp->multimapped) {
854 u64 *old = sp->parent_pte;
cea0f0e7
AK		 855
856 if (!old) {
4db35314 857 sp->parent_pte = parent_pte;
cea0f0e7
AK		 858 return;
859 }
4db35314 860 sp->multimapped = 1;
714b93da 861 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK		 862 INIT_HLIST_HEAD(&sp->parent_ptes);
863 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 864 pte_chain->parent_ptes[0] = old;
865 }
4db35314 866 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK		 867 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
868 continue;
869 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
870 if (!pte_chain->parent_ptes[i]) {
871 pte_chain->parent_ptes[i] = parent_pte;
872 return;
873 }
874 }
714b93da 875 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 876 BUG_ON(!pte_chain);
4db35314 877 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 878 pte_chain->parent_ptes[0] = parent_pte;
879}
880
4db35314 881static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK		 882 u64 *parent_pte)
883{
884 struct kvm_pte_chain *pte_chain;
885 struct hlist_node *node;
886 int i;
887
4db35314
AK		 888 if (!sp->multimapped) {
889 BUG_ON(sp->parent_pte != parent_pte);
890 sp->parent_pte = NULL;
cea0f0e7
AK		 891 return;
892 }
4db35314 893 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK		 894 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
895 if (!pte_chain->parent_ptes[i])
896 break;
897 if (pte_chain->parent_ptes[i] != parent_pte)
898 continue;
697fe2e2
AK		 899 while (i + 1 < NR_PTE_CHAIN_ENTRIES
900 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK		 901 pte_chain->parent_ptes[i]
902 = pte_chain->parent_ptes[i + 1];
903 ++i;
904 }
905 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK		 906 if (i == 0) {
907 hlist_del(&pte_chain->link);
90cb0529 908 mmu_free_pte_chain(pte_chain);
4db35314
AK		 909 if (hlist_empty(&sp->parent_ptes)) {
910 sp->multimapped = 0;
911 sp->parent_pte = NULL;
697fe2e2
AK		 912 }
913 }
cea0f0e7
AK		 914 return;
915 }
916 BUG();
917}
918
ad8cfbe3
MT		 919
920static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
921 mmu_parent_walk_fn fn)
922{
923 struct kvm_pte_chain *pte_chain;
924 struct hlist_node *node;
925 struct kvm_mmu_page *parent_sp;
926 int i;
927
928 if (!sp->multimapped && sp->parent_pte) {
929 parent_sp = page_header(__pa(sp->parent_pte));
930 fn(vcpu, parent_sp);
931 mmu_parent_walk(vcpu, parent_sp, fn);
932 return;
933 }
934 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
935 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
936 if (!pte_chain->parent_ptes[i])
937 break;
938 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
939 fn(vcpu, parent_sp);
940 mmu_parent_walk(vcpu, parent_sp, fn);
941 }
942}
943
0074ff63
MT		 944static void kvm_mmu_update_unsync_bitmap(u64 *spte)
945{
946 unsigned int index;
947 struct kvm_mmu_page *sp = page_header(__pa(spte));
948
949 index = spte - sp->spt;
60c8aec6
MT		 950 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
951 sp->unsync_children++;
952 WARN_ON(!sp->unsync_children);
0074ff63
MT		 953}
954
955static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
956{
957 struct kvm_pte_chain *pte_chain;
958 struct hlist_node *node;
959 int i;
960
961 if (!sp->parent_pte)
962 return;
963
964 if (!sp->multimapped) {
965 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
966 return;
967 }
968
969 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
970 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
971 if (!pte_chain->parent_ptes[i])
972 break;
973 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
974 }
975}
976
977static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
978{
0074ff63
MT		 979 kvm_mmu_update_parents_unsync(sp);
980 return 1;
981}
982
983static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
984 struct kvm_mmu_page *sp)
985{
986 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
987 kvm_mmu_update_parents_unsync(sp);
988}
989
d761a501
AK		 990static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
991 struct kvm_mmu_page *sp)
992{
993 int i;
994
995 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
996 sp->spt[i] = shadow_trap_nonpresent_pte;
997}
998
e8bc217a
MT		 999static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1000 struct kvm_mmu_page *sp)
1001{
1002 return 1;
1003}
1004
a7052897
MT		 1005static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1006{
1007}
1008
60c8aec6
MT		 1009#define KVM_PAGE_ARRAY_NR 16
1010
1011struct kvm_mmu_pages {
1012 struct mmu_page_and_offset {
1013 struct kvm_mmu_page *sp;
1014 unsigned int idx;
1015 } page[KVM_PAGE_ARRAY_NR];
1016 unsigned int nr;
1017};
1018
0074ff63
MT		 1019#define for_each_unsync_children(bitmap, idx) \
1020 for (idx = find_first_bit(bitmap, 512); \
1021 idx < 512; \
1022 idx = find_next_bit(bitmap, 512, idx+1))
1023
cded19f3
HE		 1024static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1025 int idx)
4731d4c7 1026{
60c8aec6 1027 int i;
4731d4c7 1028
60c8aec6
MT		 1029 if (sp->unsync)
1030 for (i=0; i < pvec->nr; i++)
1031 if (pvec->page[i].sp == sp)
1032 return 0;
1033
1034 pvec->page[pvec->nr].sp = sp;
1035 pvec->page[pvec->nr].idx = idx;
1036 pvec->nr++;
1037 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1038}
1039
1040static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1041 struct kvm_mmu_pages *pvec)
1042{
1043 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1044
0074ff63 1045 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT		 1046 u64 ent = sp->spt[i];
1047
87917239 1048 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT		 1049 struct kvm_mmu_page *child;
1050 child = page_header(ent & PT64_BASE_ADDR_MASK);
1051
1052 if (child->unsync_children) {
60c8aec6
MT		 1053 if (mmu_pages_add(pvec, child, i))
1054 return -ENOSPC;
1055
1056 ret = __mmu_unsync_walk(child, pvec);
1057 if (!ret)
1058 __clear_bit(i, sp->unsync_child_bitmap);
1059 else if (ret > 0)
1060 nr_unsync_leaf += ret;
1061 else
4731d4c7
MT		 1062 return ret;
1063 }
1064
1065 if (child->unsync) {
60c8aec6
MT		 1066 nr_unsync_leaf++;
1067 if (mmu_pages_add(pvec, child, i))
1068 return -ENOSPC;
4731d4c7
MT		 1069 }
1070 }
1071 }
1072
0074ff63 1073 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT		 1074 sp->unsync_children = 0;
1075
60c8aec6
MT		 1076 return nr_unsync_leaf;
1077}
1078
1079static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1080 struct kvm_mmu_pages *pvec)
1081{
1082 if (!sp->unsync_children)
1083 return 0;
1084
1085 mmu_pages_add(pvec, sp, 0);
1086 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT		 1087}
1088
4db35314 1089static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK		 1090{
1091 unsigned index;
1092 struct hlist_head *bucket;
4db35314 1093 struct kvm_mmu_page *sp;
cea0f0e7
AK		 1094 struct hlist_node *node;
1095
b8688d51 1096 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1097 index = kvm_page_table_hashfn(gfn);
f05e70ac 1098 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1099 hlist_for_each_entry(sp, node, bucket, hash_link)
f6e2c02b 1100 if (sp->gfn == gfn && !sp->role.direct
2e53d63a 1101 && !sp->role.invalid) {
cea0f0e7 1102 pgprintk("%s: found role %x\n",
b8688d51 1103 __func__, sp->role.word);
4db35314 1104 return sp;
cea0f0e7
AK		 1105 }
1106 return NULL;
1107}
1108
4731d4c7
MT		 1109static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1110{
1111 WARN_ON(!sp->unsync);
1112 sp->unsync = 0;
1113 --kvm->stat.mmu_unsync;
1114}
1115
1116static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1117
1118static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1119{
1120 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1121 kvm_mmu_zap_page(vcpu->kvm, sp);
1122 return 1;
1123 }
1124
b1a36821
MT		 1125 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1126 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1127 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT		 1128 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1129 kvm_mmu_zap_page(vcpu->kvm, sp);
1130 return 1;
1131 }
1132
1133 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT		 1134 return 0;
1135}
1136
60c8aec6
MT		 1137struct mmu_page_path {
1138 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1139 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT		 1140};
1141
60c8aec6
MT		 1142#define for_each_sp(pvec, sp, parents, i) \
1143 for (i = mmu_pages_next(&pvec, &parents, -1), \
1144 sp = pvec.page[i].sp; \
1145 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1146 i = mmu_pages_next(&pvec, &parents, i))
1147
cded19f3
HE		 1148static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1149 struct mmu_page_path *parents,
1150 int i)
60c8aec6
MT		 1151{
1152 int n;
1153
1154 for (n = i+1; n < pvec->nr; n++) {
1155 struct kvm_mmu_page *sp = pvec->page[n].sp;
1156
1157 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1158 parents->idx[0] = pvec->page[n].idx;
1159 return n;
1160 }
1161
1162 parents->parent[sp->role.level-2] = sp;
1163 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1164 }
1165
1166 return n;
1167}
1168
cded19f3 1169static void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1170{
60c8aec6
MT		 1171 struct kvm_mmu_page *sp;
1172 unsigned int level = 0;
1173
1174 do {
1175 unsigned int idx = parents->idx[level];
4731d4c7 1176
60c8aec6
MT		 1177 sp = parents->parent[level];
1178 if (!sp)
1179 return;
1180
1181 --sp->unsync_children;
1182 WARN_ON((int)sp->unsync_children < 0);
1183 __clear_bit(idx, sp->unsync_child_bitmap);
1184 level++;
1185 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT		 1186}
1187
60c8aec6
MT		 1188static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1189 struct mmu_page_path *parents,
1190 struct kvm_mmu_pages *pvec)
4731d4c7 1191{
60c8aec6
MT		 1192 parents->parent[parent->role.level-1] = NULL;
1193 pvec->nr = 0;
1194}
4731d4c7 1195
60c8aec6
MT		 1196static void mmu_sync_children(struct kvm_vcpu *vcpu,
1197 struct kvm_mmu_page *parent)
1198{
1199 int i;
1200 struct kvm_mmu_page *sp;
1201 struct mmu_page_path parents;
1202 struct kvm_mmu_pages pages;
1203
1204 kvm_mmu_pages_init(parent, &parents, &pages);
1205 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT		 1206 int protected = 0;
1207
1208 for_each_sp(pages, sp, parents, i)
1209 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1210
1211 if (protected)
1212 kvm_flush_remote_tlbs(vcpu->kvm);
1213
60c8aec6
MT		 1214 for_each_sp(pages, sp, parents, i) {
1215 kvm_sync_page(vcpu, sp);
1216 mmu_pages_clear_parents(&parents);
1217 }
4731d4c7 1218 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT		 1219 kvm_mmu_pages_init(parent, &parents, &pages);
1220 }
4731d4c7
MT		 1221}
1222
cea0f0e7
AK		 1223static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1224 gfn_t gfn,
1225 gva_t gaddr,
1226 unsigned level,
f6e2c02b 1227 int direct,
41074d07 1228 unsigned access,
f7d9c7b7 1229 u64 *parent_pte)
cea0f0e7
AK		 1230{
1231 union kvm_mmu_page_role role;
1232 unsigned index;
1233 unsigned quadrant;
1234 struct hlist_head *bucket;
4db35314 1235 struct kvm_mmu_page *sp;
4731d4c7 1236 struct hlist_node *node, *tmp;
cea0f0e7 1237
a770f6f2 1238 role = vcpu->arch.mmu.base_role;
cea0f0e7 1239 role.level = level;
f6e2c02b 1240 role.direct = direct;
41074d07 1241 role.access = access;
ad312c7c 1242 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK		 1243 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1244 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1245 role.quadrant = quadrant;
1246 }
b8688d51 1247 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1248 gfn, role.word);
1ae0a13d 1249 index = kvm_page_table_hashfn(gfn);
f05e70ac 1250 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT		 1251 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1252 if (sp->gfn == gfn) {
1253 if (sp->unsync)
1254 if (kvm_sync_page(vcpu, sp))
1255 continue;
1256
1257 if (sp->role.word != role.word)
1258 continue;
1259
4db35314 1260 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT		 1261 if (sp->unsync_children) {
1262 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1263 kvm_mmu_mark_parents_unsync(vcpu, sp);
1264 }
b8688d51 1265 pgprintk("%s: found\n", __func__);
4db35314 1266 return sp;
cea0f0e7 1267 }
dfc5aa00 1268 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK		 1269 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1270 if (!sp)
1271 return sp;
b8688d51 1272 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK		 1273 sp->gfn = gfn;
1274 sp->role = role;
1275 hlist_add_head(&sp->hash_link, bucket);
f6e2c02b 1276 if (!direct) {
b1a36821
MT		 1277 if (rmap_write_protect(vcpu->kvm, gfn))
1278 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT		 1279 account_shadowed(vcpu->kvm, gfn);
1280 }
131d8279
AK		 1281 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1282 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1283 else
1284 nonpaging_prefetch_page(vcpu, sp);
4db35314 1285 return sp;
cea0f0e7
AK		 1286}
1287
2d11123a
AK		 1288static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1289 struct kvm_vcpu *vcpu, u64 addr)
1290{
1291 iterator->addr = addr;
1292 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1293 iterator->level = vcpu->arch.mmu.shadow_root_level;
1294 if (iterator->level == PT32E_ROOT_LEVEL) {
1295 iterator->shadow_addr
1296 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1297 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1298 --iterator->level;
1299 if (!iterator->shadow_addr)
1300 iterator->level = 0;
1301 }
1302}
1303
1304static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1305{
1306 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1307 return false;
4d88954d
MT		 1308
1309 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1310 if (is_large_pte(*iterator->sptep))
1311 return false;
1312
2d11123a
AK		 1313 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1314 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1315 return true;
1316}
1317
1318static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1319{
1320 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1321 --iterator->level;
1322}
1323
90cb0529 1324static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1325 struct kvm_mmu_page *sp)
a436036b 1326{
697fe2e2
AK		 1327 unsigned i;
1328 u64 *pt;
1329 u64 ent;
1330
4db35314 1331 pt = sp->spt;
697fe2e2 1332
697fe2e2
AK		 1333 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1334 ent = pt[i];
1335
05da4558 1336 if (is_shadow_present_pte(ent)) {
776e6633 1337 if (!is_last_spte(ent, sp->role.level)) {
05da4558
MT		 1338 ent &= PT64_BASE_ADDR_MASK;
1339 mmu_page_remove_parent_pte(page_header(ent),
1340 &pt[i]);
1341 } else {
776e6633
MT		 1342 if (is_large_pte(ent))
1343 --kvm->stat.lpages;
05da4558
MT		 1344 rmap_remove(kvm, &pt[i]);
1345 }
1346 }
c7addb90 1347 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1348 }
a436036b
AK		 1349}
1350
4db35314 1351static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1352{
4db35314 1353 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK		 1354}
1355
12b7d28f
AK		 1356static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1357{
1358 int i;
988a2cae 1359 struct kvm_vcpu *vcpu;
12b7d28f 1360
988a2cae
GN		 1361 kvm_for_each_vcpu(i, vcpu, kvm)
1362 vcpu->arch.last_pte_updated = NULL;
12b7d28f
AK		 1363}
1364
31aa2b44 1365static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK		 1366{
1367 u64 *parent_pte;
1368
4db35314
AK		 1369 while (sp->multimapped || sp->parent_pte) {
1370 if (!sp->multimapped)
1371 parent_pte = sp->parent_pte;
a436036b
AK		 1372 else {
1373 struct kvm_pte_chain *chain;
1374
4db35314 1375 chain = container_of(sp->parent_ptes.first,
a436036b
AK		 1376 struct kvm_pte_chain, link);
1377 parent_pte = chain->parent_ptes[0];
1378 }
697fe2e2 1379 BUG_ON(!parent_pte);
4db35314 1380 kvm_mmu_put_page(sp, parent_pte);
d555c333 1381 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1382 }
31aa2b44
AK		 1383}
1384
60c8aec6
MT		 1385static int mmu_zap_unsync_children(struct kvm *kvm,
1386 struct kvm_mmu_page *parent)
4731d4c7 1387{
60c8aec6
MT		 1388 int i, zapped = 0;
1389 struct mmu_page_path parents;
1390 struct kvm_mmu_pages pages;
4731d4c7 1391
60c8aec6 1392 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1393 return 0;
60c8aec6
MT		 1394
1395 kvm_mmu_pages_init(parent, &parents, &pages);
1396 while (mmu_unsync_walk(parent, &pages)) {
1397 struct kvm_mmu_page *sp;
1398
1399 for_each_sp(pages, sp, parents, i) {
1400 kvm_mmu_zap_page(kvm, sp);
1401 mmu_pages_clear_parents(&parents);
1402 }
1403 zapped += pages.nr;
1404 kvm_mmu_pages_init(parent, &parents, &pages);
1405 }
1406
1407 return zapped;
4731d4c7
MT		 1408}
1409
07385413 1410static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1411{
4731d4c7 1412 int ret;
31aa2b44 1413 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1414 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1415 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1416 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a 1417 kvm_flush_remote_tlbs(kvm);
f6e2c02b 1418 if (!sp->role.invalid && !sp->role.direct)
5b5c6a5a 1419 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT		 1420 if (sp->unsync)
1421 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK		 1422 if (!sp->root_count) {
1423 hlist_del(&sp->hash_link);
1424 kvm_mmu_free_page(kvm, sp);
2e53d63a 1425 } else {
2e53d63a 1426 sp->role.invalid = 1;
5b5c6a5a 1427 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT		 1428 kvm_reload_remote_mmus(kvm);
1429 }
12b7d28f 1430 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1431 return ret;
a436036b
AK		 1432}
1433
82ce2c96
IE		 1434/*
1435 * Changing the number of mmu pages allocated to the vm
1436 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1437 */
1438void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1439{
025dbbf3
MT		 1440 int used_pages;
1441
1442 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1443 used_pages = max(0, used_pages);
1444
82ce2c96
IE		 1445 /*
1446 * If we set the number of mmu pages to be smaller be than the
1447 * number of actived pages , we must to free some mmu pages before we
1448 * change the value
1449 */
1450
025dbbf3
MT		 1451 if (used_pages > kvm_nr_mmu_pages) {
1452 while (used_pages > kvm_nr_mmu_pages) {
82ce2c96
IE		 1453 struct kvm_mmu_page *page;
1454
f05e70ac 1455 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE		 1456 struct kvm_mmu_page, link);
1457 kvm_mmu_zap_page(kvm, page);
025dbbf3 1458 used_pages--;
82ce2c96 1459 }
f05e70ac 1460 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE		 1461 }
1462 else
f05e70ac
ZX		 1463 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1464 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1465
f05e70ac 1466 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE		 1467}
1468
f67a46f4 1469static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK		 1470{
1471 unsigned index;
1472 struct hlist_head *bucket;
4db35314 1473 struct kvm_mmu_page *sp;
a436036b
AK		 1474 struct hlist_node *node, *n;
1475 int r;
1476
b8688d51 1477 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1478 r = 0;
1ae0a13d 1479 index = kvm_page_table_hashfn(gfn);
f05e70ac 1480 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1481 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
f6e2c02b 1482 if (sp->gfn == gfn && !sp->role.direct) {
b8688d51 1483 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1484 sp->role.word);
a436036b 1485 r = 1;
07385413
MT		 1486 if (kvm_mmu_zap_page(kvm, sp))
1487 n = bucket->first;
a436036b
AK		 1488 }
1489 return r;
cea0f0e7
AK		 1490}
1491
f67a46f4 1492static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1493{
4677a3b6
AK		 1494 unsigned index;
1495 struct hlist_head *bucket;
4db35314 1496 struct kvm_mmu_page *sp;
4677a3b6 1497 struct hlist_node *node, *nn;
97a0a01e 1498
4677a3b6
AK		 1499 index = kvm_page_table_hashfn(gfn);
1500 bucket = &kvm->arch.mmu_page_hash[index];
1501 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
f6e2c02b 1502 if (sp->gfn == gfn && !sp->role.direct
4677a3b6
AK		 1503 && !sp->role.invalid) {
1504 pgprintk("%s: zap %lx %x\n",
1505 __func__, gfn, sp->role.word);
1506 kvm_mmu_zap_page(kvm, sp);
1507 }
97a0a01e
AK		 1508 }
1509}
1510
38c335f1 1511static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1512{
38c335f1 1513 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1514 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1515
291f26bc 1516 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK		 1517}
1518
6844dec6
MT		 1519static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1520{
1521 int i;
1522 u64 *pt = sp->spt;
1523
1524 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1525 return;
1526
1527 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1528 if (pt[i] == shadow_notrap_nonpresent_pte)
d555c333 1529 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
6844dec6
MT		 1530 }
1531}
1532
039576c0
AK		 1533struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1534{
72dc67a6
IE		 1535 struct page *page;
1536
ad312c7c 1537 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK		 1538
1539 if (gpa == UNMAPPED_GVA)
1540 return NULL;
72dc67a6 1541
72dc67a6 1542 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 1543
1544 return page;
039576c0
AK		 1545}
1546
74be52e3
SY		 1547/*
1548 * The function is based on mtrr_type_lookup() in
1549 * arch/x86/kernel/cpu/mtrr/generic.c
1550 */
1551static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1552 u64 start, u64 end)
1553{
1554 int i;
1555 u64 base, mask;
1556 u8 prev_match, curr_match;
1557 int num_var_ranges = KVM_NR_VAR_MTRR;
1558
1559 if (!mtrr_state->enabled)
1560 return 0xFF;
1561
1562 /* Make end inclusive end, instead of exclusive */
1563 end--;
1564
1565 /* Look in fixed ranges. Just return the type as per start */
1566 if (mtrr_state->have_fixed && (start < 0x100000)) {
1567 int idx;
1568
1569 if (start < 0x80000) {
1570 idx = 0;
1571 idx += (start >> 16);
1572 return mtrr_state->fixed_ranges[idx];
1573 } else if (start < 0xC0000) {
1574 idx = 1 * 8;
1575 idx += ((start - 0x80000) >> 14);
1576 return mtrr_state->fixed_ranges[idx];
1577 } else if (start < 0x1000000) {
1578 idx = 3 * 8;
1579 idx += ((start - 0xC0000) >> 12);
1580 return mtrr_state->fixed_ranges[idx];
1581 }
1582 }
1583
1584 /*
1585 * Look in variable ranges
1586 * Look of multiple ranges matching this address and pick type
1587 * as per MTRR precedence
1588 */
1589 if (!(mtrr_state->enabled & 2))
1590 return mtrr_state->def_type;
1591
1592 prev_match = 0xFF;
1593 for (i = 0; i < num_var_ranges; ++i) {
1594 unsigned short start_state, end_state;
1595
1596 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1597 continue;
1598
1599 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1600 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1601 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1602 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1603
1604 start_state = ((start & mask) == (base & mask));
1605 end_state = ((end & mask) == (base & mask));
1606 if (start_state != end_state)
1607 return 0xFE;
1608
1609 if ((start & mask) != (base & mask))
1610 continue;
1611
1612 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1613 if (prev_match == 0xFF) {
1614 prev_match = curr_match;
1615 continue;
1616 }
1617
1618 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1619 curr_match == MTRR_TYPE_UNCACHABLE)
1620 return MTRR_TYPE_UNCACHABLE;
1621
1622 if ((prev_match == MTRR_TYPE_WRBACK &&
1623 curr_match == MTRR_TYPE_WRTHROUGH) ||
1624 (prev_match == MTRR_TYPE_WRTHROUGH &&
1625 curr_match == MTRR_TYPE_WRBACK)) {
1626 prev_match = MTRR_TYPE_WRTHROUGH;
1627 curr_match = MTRR_TYPE_WRTHROUGH;
1628 }
1629
1630 if (prev_match != curr_match)
1631 return MTRR_TYPE_UNCACHABLE;
1632 }
1633
1634 if (prev_match != 0xFF)
1635 return prev_match;
1636
1637 return mtrr_state->def_type;
1638}
1639
4b12f0de 1640u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
74be52e3
SY		 1641{
1642 u8 mtrr;
1643
1644 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1645 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1646 if (mtrr == 0xfe || mtrr == 0xff)
1647 mtrr = MTRR_TYPE_WRBACK;
1648 return mtrr;
1649}
4b12f0de 1650EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
74be52e3 1651
4731d4c7
MT		 1652static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1653{
1654 unsigned index;
1655 struct hlist_head *bucket;
1656 struct kvm_mmu_page *s;
1657 struct hlist_node *node, *n;
1658
1659 index = kvm_page_table_hashfn(sp->gfn);
1660 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1661 /* don't unsync if pagetable is shadowed with multiple roles */
1662 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
f6e2c02b 1663 if (s->gfn != sp->gfn || s->role.direct)
4731d4c7
MT		 1664 continue;
1665 if (s->role.word != sp->role.word)
1666 return 1;
1667 }
4731d4c7
MT		 1668 ++vcpu->kvm->stat.mmu_unsync;
1669 sp->unsync = 1;
6cffe8ca 1670
c2d0ee46 1671 kvm_mmu_mark_parents_unsync(vcpu, sp);
6cffe8ca 1672
4731d4c7
MT		 1673 mmu_convert_notrap(sp);
1674 return 0;
1675}
1676
1677static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1678 bool can_unsync)
1679{
1680 struct kvm_mmu_page *shadow;
1681
1682 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1683 if (shadow) {
1684 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1685 return 1;
1686 if (shadow->unsync)
1687 return 0;
582801a9 1688 if (can_unsync && oos_shadow)
4731d4c7
MT		 1689 return kvm_unsync_page(vcpu, shadow);
1690 return 1;
1691 }
1692 return 0;
1693}
1694
d555c333 1695static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd
MT		 1696 unsigned pte_access, int user_fault,
1697 int write_fault, int dirty, int largepage,
c2d0ee46 1698 gfn_t gfn, pfn_t pfn, bool speculative,
4731d4c7 1699 bool can_unsync)
1c4f1fd6
AK		 1700{
1701 u64 spte;
1e73f9dd 1702 int ret = 0;
64d4d521 1703
1c4f1fd6
AK		 1704 /*
1705 * We don't set the accessed bit, since we sometimes want to see
1706 * whether the guest actually used the pte (in order to detect
1707 * demand paging).
1708 */
7b52345e 1709 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1710 if (!speculative)
3201b5d9 1711 spte |= shadow_accessed_mask;
1c4f1fd6
AK		 1712 if (!dirty)
1713 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY		 1714 if (pte_access & ACC_EXEC_MASK)
1715 spte |= shadow_x_mask;
1716 else
1717 spte |= shadow_nx_mask;
1c4f1fd6 1718 if (pte_access & ACC_USER_MASK)
7b52345e 1719 spte |= shadow_user_mask;
05da4558
MT		 1720 if (largepage)
1721 spte |= PT_PAGE_SIZE_MASK;
4b12f0de
SY		 1722 if (tdp_enabled)
1723 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1724 kvm_is_mmio_pfn(pfn));
1c4f1fd6 1725
35149e21 1726 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK		 1727
1728 if ((pte_access & ACC_WRITE_MASK)
1729 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1730
38187c83
MT		 1731 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1732 ret = 1;
1733 spte = shadow_trap_nonpresent_pte;
1734 goto set_pte;
1735 }
1736
1c4f1fd6 1737 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1738
ecc5589f
MT		 1739 /*
1740 * Optimization: for pte sync, if spte was writable the hash
1741 * lookup is unnecessary (and expensive). Write protection
1742 * is responsibility of mmu_get_page / kvm_sync_page.
1743 * Same reasoning can be applied to dirty page accounting.
1744 */
d555c333 1745 if (!can_unsync && is_writeble_pte(*sptep))
ecc5589f
MT		 1746 goto set_pte;
1747
4731d4c7 1748 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1749 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1750 __func__, gfn);
1e73f9dd 1751 ret = 1;
1c4f1fd6 1752 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1753 if (is_writeble_pte(spte))
1c4f1fd6 1754 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK		 1755 }
1756 }
1757
1c4f1fd6
AK		 1758 if (pte_access & ACC_WRITE_MASK)
1759 mark_page_dirty(vcpu->kvm, gfn);
1760
38187c83 1761set_pte:
d555c333 1762 __set_spte(sptep, spte);
1e73f9dd
MT		 1763 return ret;
1764}
1765
d555c333 1766static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd
MT		 1767 unsigned pt_access, unsigned pte_access,
1768 int user_fault, int write_fault, int dirty,
c2d0ee46
MT		 1769 int *ptwrite, int largepage, gfn_t gfn,
1770 pfn_t pfn, bool speculative)
1e73f9dd
MT		 1771{
1772 int was_rmapped = 0;
d555c333 1773 int was_writeble = is_writeble_pte(*sptep);
53a27b39 1774 int rmap_count;
1e73f9dd
MT		 1775
1776 pgprintk("%s: spte %llx access %x write_fault %d"
1777 " user_fault %d gfn %lx\n",
d555c333 1778 __func__, *sptep, pt_access,
1e73f9dd
MT		 1779 write_fault, user_fault, gfn);
1780
d555c333 1781 if (is_rmap_spte(*sptep)) {
1e73f9dd
MT		 1782 /*
1783 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1784 * the parent of the now unreachable PTE.
1785 */
d555c333 1786 if (largepage && !is_large_pte(*sptep)) {
1e73f9dd 1787 struct kvm_mmu_page *child;
d555c333 1788 u64 pte = *sptep;
1e73f9dd
MT		 1789
1790 child = page_header(pte & PT64_BASE_ADDR_MASK);
d555c333
AK		 1791 mmu_page_remove_parent_pte(child, sptep);
1792 } else if (pfn != spte_to_pfn(*sptep)) {
1e73f9dd 1793 pgprintk("hfn old %lx new %lx\n",
d555c333
AK		 1794 spte_to_pfn(*sptep), pfn);
1795 rmap_remove(vcpu->kvm, sptep);
6bed6b9e
JR		 1796 } else
1797 was_rmapped = 1;
1e73f9dd 1798 }
d555c333 1799 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
c2d0ee46 1800 dirty, largepage, gfn, pfn, speculative, true)) {
1e73f9dd
MT		 1801 if (write_fault)
1802 *ptwrite = 1;
a378b4e6
MT		 1803 kvm_x86_ops->tlb_flush(vcpu);
1804 }
1e73f9dd 1805
d555c333 1806 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1e73f9dd 1807 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
d555c333
AK		 1808 is_large_pte(*sptep)? "2MB" : "4kB",
1809 is_present_pte(*sptep)?"RW":"R", gfn,
1810 *shadow_pte, sptep);
1811 if (!was_rmapped && is_large_pte(*sptep))
05da4558
MT		 1812 ++vcpu->kvm->stat.lpages;
1813
d555c333 1814 page_header_update_slot(vcpu->kvm, sptep, gfn);
1c4f1fd6 1815 if (!was_rmapped) {
d555c333
AK		 1816 rmap_count = rmap_add(vcpu, sptep, gfn, largepage);
1817 if (!is_rmap_spte(*sptep))
35149e21 1818 kvm_release_pfn_clean(pfn);
53a27b39
MT		 1819 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1820 rmap_recycle(vcpu, gfn, largepage);
75e68e60
IE		 1821 } else {
1822 if (was_writeble)
35149e21 1823 kvm_release_pfn_dirty(pfn);
75e68e60 1824 else
35149e21 1825 kvm_release_pfn_clean(pfn);
1c4f1fd6 1826 }
1b7fcd32 1827 if (speculative) {
d555c333 1828 vcpu->arch.last_pte_updated = sptep;
1b7fcd32
AK		 1829 vcpu->arch.last_pte_gfn = gfn;
1830 }
1c4f1fd6
AK		 1831}
1832
6aa8b732
AK		 1833static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1834{
1835}
1836
9f652d21
AK		 1837static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1838 int largepage, gfn_t gfn, pfn_t pfn)
140754bc 1839{
9f652d21 1840 struct kvm_shadow_walk_iterator iterator;
140754bc 1841 struct kvm_mmu_page *sp;
9f652d21 1842 int pt_write = 0;
140754bc 1843 gfn_t pseudo_gfn;
6aa8b732 1844
9f652d21
AK		 1845 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1846 if (iterator.level == PT_PAGE_TABLE_LEVEL
1847 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1848 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1849 0, write, 1, &pt_write,
c2d0ee46 1850 largepage, gfn, pfn, false);
9f652d21
AK		 1851 ++vcpu->stat.pf_fixed;
1852 break;
6aa8b732
AK		 1853 }
1854
9f652d21
AK		 1855 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1856 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1857 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1858 iterator.level - 1,
1859 1, ACC_ALL, iterator.sptep);
1860 if (!sp) {
1861 pgprintk("nonpaging_map: ENOMEM\n");
1862 kvm_release_pfn_clean(pfn);
1863 return -ENOMEM;
1864 }
140754bc 1865
d555c333
AK		 1866 __set_spte(iterator.sptep,
1867 __pa(sp->spt)
1868 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1869 | shadow_user_mask | shadow_x_mask);
9f652d21
AK		 1870 }
1871 }
1872 return pt_write;
6aa8b732
AK		 1873}
1874
10589a46
MT		 1875static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1876{
1877 int r;
05da4558 1878 int largepage = 0;
35149e21 1879 pfn_t pfn;
e930bffe 1880 unsigned long mmu_seq;
aaee2c94 1881
ec04b260
JR		 1882 if (is_largepage_backed(vcpu, gfn &
1883 ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1))) {
1884 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
05da4558
MT		 1885 largepage = 1;
1886 }
1887
e930bffe 1888 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1889 smp_rmb();
35149e21 1890 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1891
d196e343 1892 /* mmio */
35149e21
AL		 1893 if (is_error_pfn(pfn)) {
1894 kvm_release_pfn_clean(pfn);
d196e343
AK		 1895 return 1;
1896 }
1897
aaee2c94 1898 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 1899 if (mmu_notifier_retry(vcpu, mmu_seq))
1900 goto out_unlock;
eb787d10 1901 kvm_mmu_free_some_pages(vcpu);
6c41f428 1902 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT		 1903 spin_unlock(&vcpu->kvm->mmu_lock);
1904
aaee2c94 1905
10589a46 1906 return r;
e930bffe
AA		 1907
1908out_unlock:
1909 spin_unlock(&vcpu->kvm->mmu_lock);
1910 kvm_release_pfn_clean(pfn);
1911 return 0;
10589a46
MT		 1912}
1913
1914
17ac10ad
AK		 1915static void mmu_free_roots(struct kvm_vcpu *vcpu)
1916{
1917 int i;
4db35314 1918 struct kvm_mmu_page *sp;
17ac10ad 1919
ad312c7c 1920 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1921 return;
aaee2c94 1922 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX		 1923 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1924 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1925
4db35314
AK		 1926 sp = page_header(root);
1927 --sp->root_count;
2e53d63a
MT		 1928 if (!sp->root_count && sp->role.invalid)
1929 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1930 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1931 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK		 1932 return;
1933 }
17ac10ad 1934 for (i = 0; i < 4; ++i) {
ad312c7c 1935 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1936
417726a3 1937 if (root) {
417726a3 1938 root &= PT64_BASE_ADDR_MASK;
4db35314
AK		 1939 sp = page_header(root);
1940 --sp->root_count;
2e53d63a
MT		 1941 if (!sp->root_count && sp->role.invalid)
1942 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1943 }
ad312c7c 1944 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1945 }
aaee2c94 1946 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1947 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK		 1948}
1949
8986ecc0
MT		 1950static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
1951{
1952 int ret = 0;
1953
1954 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
1955 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1956 ret = 1;
1957 }
1958
1959 return ret;
1960}
1961
1962static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
17ac10ad
AK		 1963{
1964 int i;
cea0f0e7 1965 gfn_t root_gfn;
4db35314 1966 struct kvm_mmu_page *sp;
f6e2c02b 1967 int direct = 0;
6de4f3ad 1968 u64 pdptr;
3bb65a22 1969
ad312c7c 1970 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1971
ad312c7c
ZX		 1972 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1973 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK		 1974
1975 ASSERT(!VALID_PAGE(root));
fb72d167 1976 if (tdp_enabled)
f6e2c02b 1977 direct = 1;
8986ecc0
MT		 1978 if (mmu_check_root(vcpu, root_gfn))
1979 return 1;
4db35314 1980 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
f6e2c02b 1981 PT64_ROOT_LEVEL, direct,
fb72d167 1982 ACC_ALL, NULL);
4db35314
AK		 1983 root = __pa(sp->spt);
1984 ++sp->root_count;
ad312c7c 1985 vcpu->arch.mmu.root_hpa = root;
8986ecc0 1986 return 0;
17ac10ad 1987 }
f6e2c02b 1988 direct = !is_paging(vcpu);
fb72d167 1989 if (tdp_enabled)
f6e2c02b 1990 direct = 1;
17ac10ad 1991 for (i = 0; i < 4; ++i) {
ad312c7c 1992 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK		 1993
1994 ASSERT(!VALID_PAGE(root));
ad312c7c 1995 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
6de4f3ad 1996 pdptr = kvm_pdptr_read(vcpu, i);
43a3795a 1997 if (!is_present_gpte(pdptr)) {
ad312c7c 1998 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK		 1999 continue;
2000 }
6de4f3ad 2001 root_gfn = pdptr >> PAGE_SHIFT;
ad312c7c 2002 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 2003 root_gfn = 0;
8986ecc0
MT		 2004 if (mmu_check_root(vcpu, root_gfn))
2005 return 1;
4db35314 2006 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
f6e2c02b 2007 PT32_ROOT_LEVEL, direct,
f7d9c7b7 2008 ACC_ALL, NULL);
4db35314
AK		 2009 root = __pa(sp->spt);
2010 ++sp->root_count;
ad312c7c 2011 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 2012 }
ad312c7c 2013 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
8986ecc0 2014 return 0;
17ac10ad
AK		 2015}
2016
0ba73cda
MT		 2017static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2018{
2019 int i;
2020 struct kvm_mmu_page *sp;
2021
2022 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2023 return;
2024 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2025 hpa_t root = vcpu->arch.mmu.root_hpa;
2026 sp = page_header(root);
2027 mmu_sync_children(vcpu, sp);
2028 return;
2029 }
2030 for (i = 0; i < 4; ++i) {
2031 hpa_t root = vcpu->arch.mmu.pae_root[i];
2032
8986ecc0 2033 if (root && VALID_PAGE(root)) {
0ba73cda
MT		 2034 root &= PT64_BASE_ADDR_MASK;
2035 sp = page_header(root);
2036 mmu_sync_children(vcpu, sp);
2037 }
2038 }
2039}
2040
2041void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2042{
2043 spin_lock(&vcpu->kvm->mmu_lock);
2044 mmu_sync_roots(vcpu);
6cffe8ca 2045 spin_unlock(&vcpu->kvm->mmu_lock);
0ba73cda
MT		 2046}
2047
6aa8b732
AK		 2048static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2049{
2050 return vaddr;
2051}
2052
2053static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2054 u32 error_code)
6aa8b732 2055{
e833240f 2056 gfn_t gfn;
e2dec939 2057 int r;
6aa8b732 2058
b8688d51 2059 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK		 2060 r = mmu_topup_memory_caches(vcpu);
2061 if (r)
2062 return r;
714b93da 2063
6aa8b732 2064 ASSERT(vcpu);
ad312c7c 2065 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2066
e833240f 2067 gfn = gva >> PAGE_SHIFT;
6aa8b732 2068
e833240f
AK		 2069 return nonpaging_map(vcpu, gva & PAGE_MASK,
2070 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK		 2071}
2072
fb72d167
JR		 2073static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2074 u32 error_code)
2075{
35149e21 2076 pfn_t pfn;
fb72d167 2077 int r;
05da4558
MT		 2078 int largepage = 0;
2079 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2080 unsigned long mmu_seq;
fb72d167
JR		 2081
2082 ASSERT(vcpu);
2083 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2084
2085 r = mmu_topup_memory_caches(vcpu);
2086 if (r)
2087 return r;
2088
ec04b260
JR		 2089 if (is_largepage_backed(vcpu, gfn &
2090 ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1))) {
2091 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
05da4558
MT		 2092 largepage = 1;
2093 }
e930bffe 2094 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2095 smp_rmb();
35149e21 2096 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL		 2097 if (is_error_pfn(pfn)) {
2098 kvm_release_pfn_clean(pfn);
fb72d167
JR		 2099 return 1;
2100 }
2101 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 2102 if (mmu_notifier_retry(vcpu, mmu_seq))
2103 goto out_unlock;
fb72d167
JR		 2104 kvm_mmu_free_some_pages(vcpu);
2105 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2106 largepage, gfn, pfn);
fb72d167 2107 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR		 2108
2109 return r;
e930bffe
AA		 2110
2111out_unlock:
2112 spin_unlock(&vcpu->kvm->mmu_lock);
2113 kvm_release_pfn_clean(pfn);
2114 return 0;
fb72d167
JR		 2115}
2116
6aa8b732
AK		 2117static void nonpaging_free(struct kvm_vcpu *vcpu)
2118{
17ac10ad 2119 mmu_free_roots(vcpu);
6aa8b732
AK		 2120}
2121
2122static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2123{
ad312c7c 2124 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2125
2126 context->new_cr3 = nonpaging_new_cr3;
2127 context->page_fault = nonpaging_page_fault;
6aa8b732
AK		 2128 context->gva_to_gpa = nonpaging_gva_to_gpa;
2129 context->free = nonpaging_free;
c7addb90 2130 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2131 context->sync_page = nonpaging_sync_page;
a7052897 2132 context->invlpg = nonpaging_invlpg;
cea0f0e7 2133 context->root_level = 0;
6aa8b732 2134 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2135 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2136 return 0;
2137}
2138
d835dfec 2139void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2140{
1165f5fe 2141 ++vcpu->stat.tlb_flush;
cbdd1bea 2142 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK		 2143}
2144
2145static void paging_new_cr3(struct kvm_vcpu *vcpu)
2146{
b8688d51 2147 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2148 mmu_free_roots(vcpu);
6aa8b732
AK		 2149}
2150
6aa8b732
AK		 2151static void inject_page_fault(struct kvm_vcpu *vcpu,
2152 u64 addr,
2153 u32 err_code)
2154{
c3c91fee 2155 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK		 2156}
2157
6aa8b732
AK		 2158static void paging_free(struct kvm_vcpu *vcpu)
2159{
2160 nonpaging_free(vcpu);
2161}
2162
82725b20
DE		 2163static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2164{
2165 int bit7;
2166
2167 bit7 = (gpte >> 7) & 1;
2168 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2169}
2170
6aa8b732
AK		 2171#define PTTYPE 64
2172#include "paging_tmpl.h"
2173#undef PTTYPE
2174
2175#define PTTYPE 32
2176#include "paging_tmpl.h"
2177#undef PTTYPE
2178
82725b20
DE		 2179static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2180{
2181 struct kvm_mmu *context = &vcpu->arch.mmu;
2182 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2183 u64 exb_bit_rsvd = 0;
2184
2185 if (!is_nx(vcpu))
2186 exb_bit_rsvd = rsvd_bits(63, 63);
2187 switch (level) {
2188 case PT32_ROOT_LEVEL:
2189 /* no rsvd bits for 2 level 4K page table entries */
2190 context->rsvd_bits_mask[0][1] = 0;
2191 context->rsvd_bits_mask[0][0] = 0;
2192 if (is_cpuid_PSE36())
2193 /* 36bits PSE 4MB page */
2194 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2195 else
2196 /* 32 bits PSE 4MB page */
2197 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
29a4b933 2198 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2199 break;
2200 case PT32E_ROOT_LEVEL:
20c466b5
DE		 2201 context->rsvd_bits_mask[0][2] =
2202 rsvd_bits(maxphyaddr, 63) |
2203 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
82725b20 2204 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2205 rsvd_bits(maxphyaddr, 62); /* PDE */
82725b20
DE		 2206 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2207 rsvd_bits(maxphyaddr, 62); /* PTE */
2208 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2209 rsvd_bits(maxphyaddr, 62) |
2210 rsvd_bits(13, 20); /* large page */
29a4b933 2211 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2212 break;
2213 case PT64_ROOT_LEVEL:
2214 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2215 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2216 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2217 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2218 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2219 rsvd_bits(maxphyaddr, 51);
82725b20
DE		 2220 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2221 rsvd_bits(maxphyaddr, 51);
2222 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2223 context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
2224 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
4c26b4cd
SY		 2225 rsvd_bits(maxphyaddr, 51) |
2226 rsvd_bits(13, 20); /* large page */
29a4b933 2227 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
82725b20
DE		 2228 break;
2229 }
2230}
2231
17ac10ad 2232static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2233{
ad312c7c 2234 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2235
2236 ASSERT(is_pae(vcpu));
2237 context->new_cr3 = paging_new_cr3;
2238 context->page_fault = paging64_page_fault;
6aa8b732 2239 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2240 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2241 context->sync_page = paging64_sync_page;
a7052897 2242 context->invlpg = paging64_invlpg;
6aa8b732 2243 context->free = paging_free;
17ac10ad
AK		 2244 context->root_level = level;
2245 context->shadow_root_level = level;
17c3ba9d 2246 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2247 return 0;
2248}
2249
17ac10ad
AK		 2250static int paging64_init_context(struct kvm_vcpu *vcpu)
2251{
82725b20 2252 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
17ac10ad
AK		 2253 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2254}
2255
6aa8b732
AK		 2256static int paging32_init_context(struct kvm_vcpu *vcpu)
2257{
ad312c7c 2258 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732 2259
82725b20 2260 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
6aa8b732
AK		 2261 context->new_cr3 = paging_new_cr3;
2262 context->page_fault = paging32_page_fault;
6aa8b732
AK		 2263 context->gva_to_gpa = paging32_gva_to_gpa;
2264 context->free = paging_free;
c7addb90 2265 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2266 context->sync_page = paging32_sync_page;
a7052897 2267 context->invlpg = paging32_invlpg;
6aa8b732
AK		 2268 context->root_level = PT32_ROOT_LEVEL;
2269 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2270 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2271 return 0;
2272}
2273
2274static int paging32E_init_context(struct kvm_vcpu *vcpu)
2275{
82725b20 2276 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
17ac10ad 2277 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK		 2278}
2279
fb72d167
JR		 2280static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2281{
2282 struct kvm_mmu *context = &vcpu->arch.mmu;
2283
2284 context->new_cr3 = nonpaging_new_cr3;
2285 context->page_fault = tdp_page_fault;
2286 context->free = nonpaging_free;
2287 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2288 context->sync_page = nonpaging_sync_page;
a7052897 2289 context->invlpg = nonpaging_invlpg;
67253af5 2290 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR		 2291 context->root_hpa = INVALID_PAGE;
2292
2293 if (!is_paging(vcpu)) {
2294 context->gva_to_gpa = nonpaging_gva_to_gpa;
2295 context->root_level = 0;
2296 } else if (is_long_mode(vcpu)) {
82725b20 2297 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
fb72d167
JR		 2298 context->gva_to_gpa = paging64_gva_to_gpa;
2299 context->root_level = PT64_ROOT_LEVEL;
2300 } else if (is_pae(vcpu)) {
82725b20 2301 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
fb72d167
JR		 2302 context->gva_to_gpa = paging64_gva_to_gpa;
2303 context->root_level = PT32E_ROOT_LEVEL;
2304 } else {
82725b20 2305 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
fb72d167
JR		 2306 context->gva_to_gpa = paging32_gva_to_gpa;
2307 context->root_level = PT32_ROOT_LEVEL;
2308 }
2309
2310 return 0;
2311}
2312
2313static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2314{
a770f6f2
AK		 2315 int r;
2316
6aa8b732 2317 ASSERT(vcpu);
ad312c7c 2318 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK		 2319
2320 if (!is_paging(vcpu))
a770f6f2 2321 r = nonpaging_init_context(vcpu);
a9058ecd 2322 else if (is_long_mode(vcpu))
a770f6f2 2323 r = paging64_init_context(vcpu);
6aa8b732 2324 else if (is_pae(vcpu))
a770f6f2 2325 r = paging32E_init_context(vcpu);
6aa8b732 2326 else
a770f6f2
AK		 2327 r = paging32_init_context(vcpu);
2328
2329 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2330
2331 return r;
6aa8b732
AK		 2332}
2333
fb72d167
JR		 2334static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2335{
35149e21
AL		 2336 vcpu->arch.update_pte.pfn = bad_pfn;
2337
fb72d167
JR		 2338 if (tdp_enabled)
2339 return init_kvm_tdp_mmu(vcpu);
2340 else
2341 return init_kvm_softmmu(vcpu);
2342}
2343
6aa8b732
AK		 2344static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2345{
2346 ASSERT(vcpu);
ad312c7c
ZX		 2347 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2348 vcpu->arch.mmu.free(vcpu);
2349 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK		 2350 }
2351}
2352
2353int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK		 2354{
2355 destroy_kvm_mmu(vcpu);
2356 return init_kvm_mmu(vcpu);
2357}
8668a3c4 2358EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK		 2359
2360int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2361{
714b93da
AK		 2362 int r;
2363
e2dec939 2364 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK		 2365 if (r)
2366 goto out;
aaee2c94 2367 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2368 kvm_mmu_free_some_pages(vcpu);
8986ecc0 2369 r = mmu_alloc_roots(vcpu);
0ba73cda 2370 mmu_sync_roots(vcpu);
aaee2c94 2371 spin_unlock(&vcpu->kvm->mmu_lock);
8986ecc0
MT		 2372 if (r)
2373 goto out;
ad312c7c 2374 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2375 kvm_mmu_flush_tlb(vcpu);
714b93da
AK		 2376out:
2377 return r;
6aa8b732 2378}
17c3ba9d
AK		 2379EXPORT_SYMBOL_GPL(kvm_mmu_load);
2380
2381void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2382{
2383 mmu_free_roots(vcpu);
2384}
6aa8b732 2385
09072daf 2386static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2387 struct kvm_mmu_page *sp,
ac1b714e
AK		 2388 u64 *spte)
2389{
2390 u64 pte;
2391 struct kvm_mmu_page *child;
2392
2393 pte = *spte;
c7addb90 2394 if (is_shadow_present_pte(pte)) {
776e6633 2395 if (is_last_spte(pte, sp->role.level))
290fc38d 2396 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK		 2397 else {
2398 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2399 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK		 2400 }
2401 }
d555c333 2402 __set_spte(spte, shadow_trap_nonpresent_pte);
05da4558
MT		 2403 if (is_large_pte(pte))
2404 --vcpu->kvm->stat.lpages;
ac1b714e
AK		 2405}
2406
0028425f 2407static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2408 struct kvm_mmu_page *sp,
0028425f 2409 u64 *spte,
489f1d65 2410 const void *new)
0028425f 2411{
30945387
MT		 2412 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2413 if (!vcpu->arch.update_pte.largepage ||
2414 sp->role.glevels == PT32_ROOT_LEVEL) {
2415 ++vcpu->kvm->stat.mmu_pde_zapped;
2416 return;
2417 }
2418 }
0028425f 2419
4cee5764 2420 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2421 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2422 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2423 else
489f1d65 2424 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK		 2425}
2426
79539cec
AK		 2427static bool need_remote_flush(u64 old, u64 new)
2428{
2429 if (!is_shadow_present_pte(old))
2430 return false;
2431 if (!is_shadow_present_pte(new))
2432 return true;
2433 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2434 return true;
2435 old ^= PT64_NX_MASK;
2436 new ^= PT64_NX_MASK;
2437 return (old & ~new & PT64_PERM_MASK) != 0;
2438}
2439
2440static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2441{
2442 if (need_remote_flush(old, new))
2443 kvm_flush_remote_tlbs(vcpu->kvm);
2444 else
2445 kvm_mmu_flush_tlb(vcpu);
2446}
2447
12b7d28f
AK		 2448static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2449{
ad312c7c 2450 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2451
7b52345e 2452 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK		 2453}
2454
d7824fff
AK		 2455static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2456 const u8 *new, int bytes)
2457{
2458 gfn_t gfn;
2459 int r;
2460 u64 gpte = 0;
35149e21 2461 pfn_t pfn;
d7824fff 2462
05da4558
MT		 2463 vcpu->arch.update_pte.largepage = 0;
2464
d7824fff
AK		 2465 if (bytes != 4 && bytes != 8)
2466 return;
2467
2468 /*
2469 * Assume that the pte write on a page table of the same type
2470 * as the current vcpu paging mode. This is nearly always true
2471 * (might be false while changing modes). Note it is verified later
2472 * by update_pte().
2473 */
2474 if (is_pae(vcpu)) {
2475 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2476 if ((bytes == 4) && (gpa % 4 == 0)) {
2477 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2478 if (r)
2479 return;
2480 memcpy((void *)&gpte + (gpa % 8), new, 4);
2481 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2482 memcpy((void *)&gpte, new, 8);
2483 }
2484 } else {
2485 if ((bytes == 4) && (gpa % 4 == 0))
2486 memcpy((void *)&gpte, new, 4);
2487 }
43a3795a 2488 if (!is_present_gpte(gpte))
d7824fff
AK		 2489 return;
2490 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2491
05da4558 2492 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
ec04b260 2493 gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
05da4558
MT		 2494 vcpu->arch.update_pte.largepage = 1;
2495 }
e930bffe 2496 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2497 smp_rmb();
35149e21 2498 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2499
35149e21
AL		 2500 if (is_error_pfn(pfn)) {
2501 kvm_release_pfn_clean(pfn);
d196e343
AK		 2502 return;
2503 }
d7824fff 2504 vcpu->arch.update_pte.gfn = gfn;
35149e21 2505 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK		 2506}
2507
1b7fcd32
AK		 2508static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2509{
2510 u64 *spte = vcpu->arch.last_pte_updated;
2511
2512 if (spte
2513 && vcpu->arch.last_pte_gfn == gfn
2514 && shadow_accessed_mask
2515 && !(*spte & shadow_accessed_mask)
2516 && is_shadow_present_pte(*spte))
2517 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2518}
2519
09072daf 2520void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 2521 const u8 *new, int bytes,
2522 bool guest_initiated)
da4a00f0 2523{
9b7a0325 2524 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2525 struct kvm_mmu_page *sp;
0e7bc4b9 2526 struct hlist_node *node, *n;
9b7a0325
AK		 2527 struct hlist_head *bucket;
2528 unsigned index;
489f1d65 2529 u64 entry, gentry;
9b7a0325 2530 u64 *spte;
9b7a0325 2531 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2532 unsigned pte_size;
9b7a0325 2533 unsigned page_offset;
0e7bc4b9 2534 unsigned misaligned;
fce0657f 2535 unsigned quadrant;
9b7a0325 2536 int level;
86a5ba02 2537 int flooded = 0;
ac1b714e 2538 int npte;
489f1d65 2539 int r;
9b7a0325 2540
b8688d51 2541 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2542 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2543 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2544 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2545 kvm_mmu_free_some_pages(vcpu);
4cee5764 2546 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2547 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT		 2548 if (guest_initiated) {
2549 if (gfn == vcpu->arch.last_pt_write_gfn
2550 && !last_updated_pte_accessed(vcpu)) {
2551 ++vcpu->arch.last_pt_write_count;
2552 if (vcpu->arch.last_pt_write_count >= 3)
2553 flooded = 1;
2554 } else {
2555 vcpu->arch.last_pt_write_gfn = gfn;
2556 vcpu->arch.last_pt_write_count = 1;
2557 vcpu->arch.last_pte_updated = NULL;
2558 }
86a5ba02 2559 }
1ae0a13d 2560 index = kvm_page_table_hashfn(gfn);
f05e70ac 2561 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2562 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
f6e2c02b 2563 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
9b7a0325 2564 continue;
4db35314 2565 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2566 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2567 misaligned |= bytes < 4;
86a5ba02 2568 if (misaligned || flooded) {
0e7bc4b9
AK		 2569 /*
2570 * Misaligned accesses are too much trouble to fix
2571 * up; also, they usually indicate a page is not used
2572 * as a page table.
86a5ba02
AK		 2573 *
2574 * If we're seeing too many writes to a page,
2575 * it may no longer be a page table, or we may be
2576 * forking, in which case it is better to unmap the
2577 * page.
0e7bc4b9
AK		 2578 */
2579 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2580 gpa, bytes, sp->role.word);
07385413
MT		 2581 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2582 n = bucket->first;
4cee5764 2583 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK		 2584 continue;
2585 }
9b7a0325 2586 page_offset = offset;
4db35314 2587 level = sp->role.level;
ac1b714e 2588 npte = 1;
4db35314 2589 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK		 2590 page_offset <<= 1; /* 32->64 */
2591 /*
2592 * A 32-bit pde maps 4MB while the shadow pdes map
2593 * only 2MB. So we need to double the offset again
2594 * and zap two pdes instead of one.
2595 */
2596 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2597 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK		 2598 page_offset <<= 1;
2599 npte = 2;
2600 }
fce0657f 2601 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2602 page_offset &= ~PAGE_MASK;
4db35314 2603 if (quadrant != sp->role.quadrant)
fce0657f 2604 continue;
9b7a0325 2605 }
4db35314 2606 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE		 2607 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2608 gentry = 0;
2609 r = kvm_read_guest_atomic(vcpu->kvm,
2610 gpa & ~(u64)(pte_size - 1),
2611 &gentry, pte_size);
2612 new = (const void *)&gentry;
2613 if (r < 0)
2614 new = NULL;
2615 }
ac1b714e 2616 while (npte--) {
79539cec 2617 entry = *spte;
4db35314 2618 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE		 2619 if (new)
2620 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2621 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2622 ++spte;
9b7a0325 2623 }
9b7a0325 2624 }
c7addb90 2625 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2626 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL		 2627 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2628 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2629 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2630 }
da4a00f0
AK		 2631}
2632
a436036b
AK		 2633int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2634{
10589a46
MT		 2635 gpa_t gpa;
2636 int r;
a436036b 2637
10589a46 2638 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2639
aaee2c94 2640 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2641 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2642 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2643 return r;
a436036b 2644}
577bdc49 2645EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2646
22d95b12 2647void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2648{
f05e70ac 2649 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2650 struct kvm_mmu_page *sp;
ebeace86 2651
f05e70ac 2652 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK		 2653 struct kvm_mmu_page, link);
2654 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2655 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK		 2656 }
2657}
ebeace86 2658
3067714c
AK		 2659int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2660{
2661 int r;
2662 enum emulation_result er;
2663
ad312c7c 2664 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK		 2665 if (r < 0)
2666 goto out;
2667
2668 if (!r) {
2669 r = 1;
2670 goto out;
2671 }
2672
b733bfb5
AK		 2673 r = mmu_topup_memory_caches(vcpu);
2674 if (r)
2675 goto out;
2676
3067714c 2677 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK		 2678
2679 switch (er) {
2680 case EMULATE_DONE:
2681 return 1;
2682 case EMULATE_DO_MMIO:
2683 ++vcpu->stat.mmio_exits;
2684 return 0;
2685 case EMULATE_FAIL:
3f5d18a9
AK		 2686 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2687 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2688 return 0;
3067714c
AK		 2689 default:
2690 BUG();
2691 }
2692out:
3067714c
AK		 2693 return r;
2694}
2695EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2696
a7052897
MT		 2697void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2698{
a7052897 2699 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT		 2700 kvm_mmu_flush_tlb(vcpu);
2701 ++vcpu->stat.invlpg;
2702}
2703EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2704
18552672
JR		 2705void kvm_enable_tdp(void)
2706{
2707 tdp_enabled = true;
2708}
2709EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2710
5f4cb662
JR		 2711void kvm_disable_tdp(void)
2712{
2713 tdp_enabled = false;
2714}
2715EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2716
6aa8b732
AK		 2717static void free_mmu_pages(struct kvm_vcpu *vcpu)
2718{
ad312c7c 2719 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK		 2720}
2721
2722static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2723{
17ac10ad 2724 struct page *page;
6aa8b732
AK		 2725 int i;
2726
2727 ASSERT(vcpu);
2728
f05e70ac
ZX		 2729 if (vcpu->kvm->arch.n_requested_mmu_pages)
2730 vcpu->kvm->arch.n_free_mmu_pages =
2731 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2732 else
f05e70ac
ZX		 2733 vcpu->kvm->arch.n_free_mmu_pages =
2734 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK		 2735 /*
2736 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2737 * Therefore we need to allocate shadow page tables in the first
2738 * 4GB of memory, which happens to fit the DMA32 zone.
2739 */
2740 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2741 if (!page)
2742 goto error_1;
ad312c7c 2743 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2744 for (i = 0; i < 4; ++i)
ad312c7c 2745 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2746
6aa8b732
AK		 2747 return 0;
2748
2749error_1:
2750 free_mmu_pages(vcpu);
2751 return -ENOMEM;
2752}
2753
8018c27b 2754int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2755{
6aa8b732 2756 ASSERT(vcpu);
ad312c7c 2757 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2758
8018c27b
IM		 2759 return alloc_mmu_pages(vcpu);
2760}
6aa8b732 2761
8018c27b
IM		 2762int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2763{
2764 ASSERT(vcpu);
ad312c7c 2765 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2766
8018c27b 2767 return init_kvm_mmu(vcpu);
6aa8b732
AK		 2768}
2769
2770void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2771{
2772 ASSERT(vcpu);
2773
2774 destroy_kvm_mmu(vcpu);
2775 free_mmu_pages(vcpu);
714b93da 2776 mmu_free_memory_caches(vcpu);
6aa8b732
AK		 2777}
2778
90cb0529 2779void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2780{
4db35314 2781 struct kvm_mmu_page *sp;
6aa8b732 2782
f05e70ac 2783 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK		 2784 int i;
2785 u64 *pt;
2786
291f26bc 2787 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK		 2788 continue;
2789
4db35314 2790 pt = sp->spt;
6aa8b732
AK		 2791 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2792 /* avoid RMW */
9647c14c 2793 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2794 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2795 }
171d595d 2796 kvm_flush_remote_tlbs(kvm);
6aa8b732 2797}
37a7d8b0 2798
90cb0529 2799void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2800{
4db35314 2801 struct kvm_mmu_page *sp, *node;
e0fa826f 2802
aaee2c94 2803 spin_lock(&kvm->mmu_lock);
f05e70ac 2804 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT		 2805 if (kvm_mmu_zap_page(kvm, sp))
2806 node = container_of(kvm->arch.active_mmu_pages.next,
2807 struct kvm_mmu_page, link);
aaee2c94 2808 spin_unlock(&kvm->mmu_lock);
e0fa826f 2809
90cb0529 2810 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL		 2811}
2812
8b2cf73c 2813static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE		 2814{
2815 struct kvm_mmu_page *page;
2816
2817 page = container_of(kvm->arch.active_mmu_pages.prev,
2818 struct kvm_mmu_page, link);
2819 kvm_mmu_zap_page(kvm, page);
2820}
2821
2822static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2823{
2824 struct kvm *kvm;
2825 struct kvm *kvm_freed = NULL;
2826 int cache_count = 0;
2827
2828 spin_lock(&kvm_lock);
2829
2830 list_for_each_entry(kvm, &vm_list, vm_list) {
2831 int npages;
2832
5a4c9288
MT		 2833 if (!down_read_trylock(&kvm->slots_lock))
2834 continue;
3ee16c81
IE		 2835 spin_lock(&kvm->mmu_lock);
2836 npages = kvm->arch.n_alloc_mmu_pages -
2837 kvm->arch.n_free_mmu_pages;
2838 cache_count += npages;
2839 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2840 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2841 cache_count--;
2842 kvm_freed = kvm;
2843 }
2844 nr_to_scan--;
2845
2846 spin_unlock(&kvm->mmu_lock);
5a4c9288 2847 up_read(&kvm->slots_lock);
3ee16c81
IE		 2848 }
2849 if (kvm_freed)
2850 list_move_tail(&kvm_freed->vm_list, &vm_list);
2851
2852 spin_unlock(&kvm_lock);
2853
2854 return cache_count;
2855}
2856
2857static struct shrinker mmu_shrinker = {
2858 .shrink = mmu_shrink,
2859 .seeks = DEFAULT_SEEKS * 10,
2860};
2861
2ddfd20e 2862static void mmu_destroy_caches(void)
b5a33a75
AK		 2863{
2864 if (pte_chain_cache)
2865 kmem_cache_destroy(pte_chain_cache);
2866 if (rmap_desc_cache)
2867 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK		 2868 if (mmu_page_header_cache)
2869 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK		 2870}
2871
3ee16c81
IE		 2872void kvm_mmu_module_exit(void)
2873{
2874 mmu_destroy_caches();
2875 unregister_shrinker(&mmu_shrinker);
2876}
2877
b5a33a75
AK		 2878int kvm_mmu_module_init(void)
2879{
2880 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2881 sizeof(struct kvm_pte_chain),
20c2df83 2882 0, 0, NULL);
b5a33a75
AK		 2883 if (!pte_chain_cache)
2884 goto nomem;
2885 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2886 sizeof(struct kvm_rmap_desc),
20c2df83 2887 0, 0, NULL);
b5a33a75
AK		 2888 if (!rmap_desc_cache)
2889 goto nomem;
2890
d3d25b04
AK		 2891 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2892 sizeof(struct kvm_mmu_page),
20c2df83 2893 0, 0, NULL);
d3d25b04
AK		 2894 if (!mmu_page_header_cache)
2895 goto nomem;
2896
3ee16c81
IE		 2897 register_shrinker(&mmu_shrinker);
2898
b5a33a75
AK		 2899 return 0;
2900
2901nomem:
3ee16c81 2902 mmu_destroy_caches();
b5a33a75
AK		 2903 return -ENOMEM;
2904}
2905
3ad82a7e
ZX		 2906/*
2907 * Caculate mmu pages needed for kvm.
2908 */
2909unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2910{
2911 int i;
2912 unsigned int nr_mmu_pages;
2913 unsigned int nr_pages = 0;
2914
2915 for (i = 0; i < kvm->nmemslots; i++)
2916 nr_pages += kvm->memslots[i].npages;
2917
2918 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2919 nr_mmu_pages = max(nr_mmu_pages,
2920 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2921
2922 return nr_mmu_pages;
2923}
2924
2f333bcb
MT		 2925static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2926 unsigned len)
2927{
2928 if (len > buffer->len)
2929 return NULL;
2930 return buffer->ptr;
2931}
2932
2933static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2934 unsigned len)
2935{
2936 void *ret;
2937
2938 ret = pv_mmu_peek_buffer(buffer, len);
2939 if (!ret)
2940 return ret;
2941 buffer->ptr += len;
2942 buffer->len -= len;
2943 buffer->processed += len;
2944 return ret;
2945}
2946
2947static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2948 gpa_t addr, gpa_t value)
2949{
2950 int bytes = 8;
2951 int r;
2952
2953 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2954 bytes = 4;
2955
2956 r = mmu_topup_memory_caches(vcpu);
2957 if (r)
2958 return r;
2959
3200f405 2960 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT		 2961 return -EFAULT;
2962
2963 return 1;
2964}
2965
2966static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2967{
a8cd0244 2968 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2f333bcb
MT		 2969 return 1;
2970}
2971
2972static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2973{
2974 spin_lock(&vcpu->kvm->mmu_lock);
2975 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2976 spin_unlock(&vcpu->kvm->mmu_lock);
2977 return 1;
2978}
2979
2980static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2981 struct kvm_pv_mmu_op_buffer *buffer)
2982{
2983 struct kvm_mmu_op_header *header;
2984
2985 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2986 if (!header)
2987 return 0;
2988 switch (header->op) {
2989 case KVM_MMU_OP_WRITE_PTE: {
2990 struct kvm_mmu_op_write_pte *wpte;
2991
2992 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2993 if (!wpte)
2994 return 0;
2995 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2996 wpte->pte_val);
2997 }
2998 case KVM_MMU_OP_FLUSH_TLB: {
2999 struct kvm_mmu_op_flush_tlb *ftlb;
3000
3001 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3002 if (!ftlb)
3003 return 0;
3004 return kvm_pv_mmu_flush_tlb(vcpu);
3005 }
3006 case KVM_MMU_OP_RELEASE_PT: {
3007 struct kvm_mmu_op_release_pt *rpt;
3008
3009 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3010 if (!rpt)
3011 return 0;
3012 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3013 }
3014 default: return 0;
3015 }
3016}
3017
3018int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3019 gpa_t addr, unsigned long *ret)
3020{
3021 int r;
6ad18fba 3022 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 3023
6ad18fba
DH		 3024 buffer->ptr = buffer->buf;
3025 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3026 buffer->processed = 0;
2f333bcb 3027
6ad18fba 3028 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT		 3029 if (r)
3030 goto out;
3031
6ad18fba
DH		 3032 while (buffer->len) {
3033 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT		 3034 if (r < 0)
3035 goto out;
3036 if (r == 0)
3037 break;
3038 }
3039
3040 r = 1;
3041out:
6ad18fba 3042 *ret = buffer->processed;
2f333bcb
MT		 3043 return r;
3044}
3045
94d8b056
MT		 3046int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3047{
3048 struct kvm_shadow_walk_iterator iterator;
3049 int nr_sptes = 0;
3050
3051 spin_lock(&vcpu->kvm->mmu_lock);
3052 for_each_shadow_entry(vcpu, addr, iterator) {
3053 sptes[iterator.level-1] = *iterator.sptep;
3054 nr_sptes++;
3055 if (!is_shadow_present_pte(*iterator.sptep))
3056 break;
3057 }
3058 spin_unlock(&vcpu->kvm->mmu_lock);
3059
3060 return nr_sptes;
3061}
3062EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3063
37a7d8b0
AK		 3064#ifdef AUDIT
3065
3066static const char *audit_msg;
3067
3068static gva_t canonicalize(gva_t gva)
3069{
3070#ifdef CONFIG_X86_64
3071 gva = (long long)(gva << 16) >> 16;
3072#endif
3073 return gva;
3074}
3075
08a3732b
MT		 3076
3077typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3078 u64 *sptep);
3079
3080static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3081 inspect_spte_fn fn)
3082{
3083 int i;
3084
3085 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3086 u64 ent = sp->spt[i];
3087
3088 if (is_shadow_present_pte(ent)) {
2920d728 3089 if (!is_last_spte(ent, sp->role.level)) {
08a3732b
MT		 3090 struct kvm_mmu_page *child;
3091 child = page_header(ent & PT64_BASE_ADDR_MASK);
3092 __mmu_spte_walk(kvm, child, fn);
2920d728 3093 } else
08a3732b
MT		 3094 fn(kvm, sp, &sp->spt[i]);
3095 }
3096 }
3097}
3098
3099static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3100{
3101 int i;
3102 struct kvm_mmu_page *sp;
3103
3104 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3105 return;
3106 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3107 hpa_t root = vcpu->arch.mmu.root_hpa;
3108 sp = page_header(root);
3109 __mmu_spte_walk(vcpu->kvm, sp, fn);
3110 return;
3111 }
3112 for (i = 0; i < 4; ++i) {
3113 hpa_t root = vcpu->arch.mmu.pae_root[i];
3114
3115 if (root && VALID_PAGE(root)) {
3116 root &= PT64_BASE_ADDR_MASK;
3117 sp = page_header(root);
3118 __mmu_spte_walk(vcpu->kvm, sp, fn);
3119 }
3120 }
3121 return;
3122}
3123
37a7d8b0
AK		 3124static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3125 gva_t va, int level)
3126{
3127 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3128 int i;
3129 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3130
3131 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3132 u64 ent = pt[i];
3133
c7addb90 3134 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK		 3135 continue;
3136
3137 va = canonicalize(va);
2920d728
MT		 3138 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3139 audit_mappings_page(vcpu, ent, va, level - 1);
3140 else {
ad312c7c 3141 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
34382539
JK		 3142 gfn_t gfn = gpa >> PAGE_SHIFT;
3143 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3144 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
37a7d8b0 3145
2aaf65e8
MT		 3146 if (is_error_pfn(pfn)) {
3147 kvm_release_pfn_clean(pfn);
3148 continue;
3149 }
3150
c7addb90 3151 if (is_shadow_present_pte(ent)
37a7d8b0 3152 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK		 3153 printk(KERN_ERR "xx audit error: (%s) levels %d"
3154 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3155 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD		 3156 va, gpa, hpa, ent,
3157 is_shadow_present_pte(ent));
c7addb90
AK		 3158 else if (ent == shadow_notrap_nonpresent_pte
3159 && !is_error_hpa(hpa))
3160 printk(KERN_ERR "audit: (%s) notrap shadow,"
3161 " valid guest gva %lx\n", audit_msg, va);
35149e21 3162 kvm_release_pfn_clean(pfn);
c7addb90 3163
37a7d8b0
AK		 3164 }
3165 }
3166}
3167
3168static void audit_mappings(struct kvm_vcpu *vcpu)
3169{
1ea252af 3170 unsigned i;
37a7d8b0 3171
ad312c7c
ZX		 3172 if (vcpu->arch.mmu.root_level == 4)
3173 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK		 3174 else
3175 for (i = 0; i < 4; ++i)
ad312c7c 3176 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3177 audit_mappings_page(vcpu,
ad312c7c 3178 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK		 3179 i << 30,
3180 2);
3181}
3182
3183static int count_rmaps(struct kvm_vcpu *vcpu)
3184{
3185 int nmaps = 0;
3186 int i, j, k;
3187
3188 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3189 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3190 struct kvm_rmap_desc *d;
3191
3192 for (j = 0; j < m->npages; ++j) {
290fc38d 3193 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3194
290fc38d 3195 if (!*rmapp)
37a7d8b0 3196 continue;
290fc38d 3197 if (!(*rmapp & 1)) {
37a7d8b0
AK		 3198 ++nmaps;
3199 continue;
3200 }
290fc38d 3201 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK		 3202 while (d) {
3203 for (k = 0; k < RMAP_EXT; ++k)
d555c333 3204 if (d->sptes[k])
37a7d8b0
AK		 3205 ++nmaps;
3206 else
3207 break;
3208 d = d->more;
3209 }
3210 }
3211 }
3212 return nmaps;
3213}
3214
08a3732b
MT		 3215void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3216{
3217 unsigned long *rmapp;
3218 struct kvm_mmu_page *rev_sp;
3219 gfn_t gfn;
3220
3221 if (*sptep & PT_WRITABLE_MASK) {
3222 rev_sp = page_header(__pa(sptep));
3223 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3224
3225 if (!gfn_to_memslot(kvm, gfn)) {
3226 if (!printk_ratelimit())
3227 return;
3228 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3229 audit_msg, gfn);
3230 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3231 audit_msg, sptep - rev_sp->spt,
3232 rev_sp->gfn);
3233 dump_stack();
3234 return;
3235 }
3236
2920d728
MT		 3237 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3238 is_large_pte(*sptep));
08a3732b
MT		 3239 if (!*rmapp) {
3240 if (!printk_ratelimit())
3241 return;
3242 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3243 audit_msg, *sptep);
3244 dump_stack();
3245 }
3246 }
3247
3248}
3249
3250void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3251{
3252 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3253}
3254
3255static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
37a7d8b0 3256{
4db35314 3257 struct kvm_mmu_page *sp;
37a7d8b0
AK		 3258 int i;
3259
f05e70ac 3260 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3261 u64 *pt = sp->spt;
37a7d8b0 3262
4db35314 3263 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK		 3264 continue;
3265
3266 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3267 u64 ent = pt[i];
3268
3269 if (!(ent & PT_PRESENT_MASK))
3270 continue;
3271 if (!(ent & PT_WRITABLE_MASK))
3272 continue;
08a3732b 3273 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
37a7d8b0
AK		 3274 }
3275 }
08a3732b 3276 return;
37a7d8b0
AK		 3277}
3278
3279static void audit_rmap(struct kvm_vcpu *vcpu)
3280{
08a3732b
MT		 3281 check_writable_mappings_rmap(vcpu);
3282 count_rmaps(vcpu);
37a7d8b0
AK		 3283}
3284
3285static void audit_write_protection(struct kvm_vcpu *vcpu)
3286{
4db35314 3287 struct kvm_mmu_page *sp;
290fc38d
IE		 3288 struct kvm_memory_slot *slot;
3289 unsigned long *rmapp;
e58b0f9e 3290 u64 *spte;
290fc38d 3291 gfn_t gfn;
37a7d8b0 3292
f05e70ac 3293 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
f6e2c02b 3294 if (sp->role.direct)
37a7d8b0 3295 continue;
e58b0f9e
MT		 3296 if (sp->unsync)
3297 continue;
37a7d8b0 3298
4db35314 3299 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3300 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d 3301 rmapp = &slot->rmap[gfn - slot->base_gfn];
e58b0f9e
MT		 3302
3303 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3304 while (spte) {
3305 if (*spte & PT_WRITABLE_MASK)
3306 printk(KERN_ERR "%s: (%s) shadow page has "
3307 "writable mappings: gfn %lx role %x\n",
b8688d51 3308 __func__, audit_msg, sp->gfn,
4db35314 3309 sp->role.word);
e58b0f9e
MT		 3310 spte = rmap_next(vcpu->kvm, rmapp, spte);
3311 }
37a7d8b0
AK		 3312 }
3313}
3314
3315static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3316{
3317 int olddbg = dbg;
3318
3319 dbg = 0;
3320 audit_msg = msg;
3321 audit_rmap(vcpu);
3322 audit_write_protection(vcpu);
2aaf65e8
MT		 3323 if (strcmp("pre pte write", audit_msg) != 0)
3324 audit_mappings(vcpu);
08a3732b 3325 audit_writable_sptes_have_rmaps(vcpu);
37a7d8b0
AK		 3326 dbg = olddbg;
3327}
3328
3329#endif
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