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KVM: Advertise guest debug capability per-arch
[net-next-2.6.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
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23#include <linux/types.h>
24#include <linux/string.h>
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25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
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32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
d6c69ee9
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76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
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79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
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86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
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89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
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123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
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125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
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131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
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134#define RMAP_EXT 4
135
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136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
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141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
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143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
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148struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 150 u64 addr, u64 *spte, int level);
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151};
152
4731d4c7
MT
153struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155};
156
ad8cfbe3
MT
157typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
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159static struct kmem_cache *pte_chain_cache;
160static struct kmem_cache *rmap_desc_cache;
d3d25b04 161static struct kmem_cache *mmu_page_header_cache;
b5a33a75 162
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163static u64 __read_mostly shadow_trap_nonpresent_pte;
164static u64 __read_mostly shadow_notrap_nonpresent_pte;
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SY
165static u64 __read_mostly shadow_base_present_pte;
166static u64 __read_mostly shadow_nx_mask;
167static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
168static u64 __read_mostly shadow_user_mask;
169static u64 __read_mostly shadow_accessed_mask;
170static u64 __read_mostly shadow_dirty_mask;
64d4d521 171static u64 __read_mostly shadow_mt_mask;
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172
173void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
174{
175 shadow_trap_nonpresent_pte = trap_pte;
176 shadow_notrap_nonpresent_pte = notrap_pte;
177}
178EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
179
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SY
180void kvm_mmu_set_base_ptes(u64 base_pte)
181{
182 shadow_base_present_pte = base_pte;
183}
184EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
185
186void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 187 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
7b52345e
SY
188{
189 shadow_user_mask = user_mask;
190 shadow_accessed_mask = accessed_mask;
191 shadow_dirty_mask = dirty_mask;
192 shadow_nx_mask = nx_mask;
193 shadow_x_mask = x_mask;
64d4d521 194 shadow_mt_mask = mt_mask;
7b52345e
SY
195}
196EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
197
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198static int is_write_protection(struct kvm_vcpu *vcpu)
199{
ad312c7c 200 return vcpu->arch.cr0 & X86_CR0_WP;
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201}
202
203static int is_cpuid_PSE36(void)
204{
205 return 1;
206}
207
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208static int is_nx(struct kvm_vcpu *vcpu)
209{
ad312c7c 210 return vcpu->arch.shadow_efer & EFER_NX;
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211}
212
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213static int is_present_pte(unsigned long pte)
214{
215 return pte & PT_PRESENT_MASK;
216}
217
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218static int is_shadow_present_pte(u64 pte)
219{
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220 return pte != shadow_trap_nonpresent_pte
221 && pte != shadow_notrap_nonpresent_pte;
222}
223
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MT
224static int is_large_pte(u64 pte)
225{
226 return pte & PT_PAGE_SIZE_MASK;
227}
228
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229static int is_writeble_pte(unsigned long pte)
230{
231 return pte & PT_WRITABLE_MASK;
232}
233
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234static int is_dirty_pte(unsigned long pte)
235{
7b52345e 236 return pte & shadow_dirty_mask;
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237}
238
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239static int is_rmap_pte(u64 pte)
240{
4b1a80fa 241 return is_shadow_present_pte(pte);
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242}
243
35149e21 244static pfn_t spte_to_pfn(u64 pte)
0b49ea86 245{
35149e21 246 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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247}
248
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249static gfn_t pse36_gfn_delta(u32 gpte)
250{
251 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
252
253 return (gpte & PT32_DIR_PSE36_MASK) << shift;
254}
255
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256static void set_shadow_pte(u64 *sptep, u64 spte)
257{
258#ifdef CONFIG_X86_64
259 set_64bit((unsigned long *)sptep, spte);
260#else
261 set_64bit((unsigned long long *)sptep, spte);
262#endif
263}
264
e2dec939 265static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 266 struct kmem_cache *base_cache, int min)
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267{
268 void *obj;
269
270 if (cache->nobjs >= min)
e2dec939 271 return 0;
714b93da 272 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 273 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 274 if (!obj)
e2dec939 275 return -ENOMEM;
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276 cache->objects[cache->nobjs++] = obj;
277 }
e2dec939 278 return 0;
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279}
280
281static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
282{
283 while (mc->nobjs)
284 kfree(mc->objects[--mc->nobjs]);
285}
286
c1158e63 287static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 288 int min)
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289{
290 struct page *page;
291
292 if (cache->nobjs >= min)
293 return 0;
294 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 295 page = alloc_page(GFP_KERNEL);
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296 if (!page)
297 return -ENOMEM;
298 set_page_private(page, 0);
299 cache->objects[cache->nobjs++] = page_address(page);
300 }
301 return 0;
302}
303
304static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
305{
306 while (mc->nobjs)
c4d198d5 307 free_page((unsigned long)mc->objects[--mc->nobjs]);
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308}
309
2e3e5882 310static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 311{
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312 int r;
313
ad312c7c 314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 315 pte_chain_cache, 4);
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316 if (r)
317 goto out;
ad312c7c 318 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 319 rmap_desc_cache, 4);
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320 if (r)
321 goto out;
ad312c7c 322 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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323 if (r)
324 goto out;
ad312c7c 325 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 326 mmu_page_header_cache, 4);
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327out:
328 return r;
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329}
330
331static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
332{
ad312c7c
ZX
333 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
334 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
335 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
336 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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337}
338
339static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
340 size_t size)
341{
342 void *p;
343
344 BUG_ON(!mc->nobjs);
345 p = mc->objects[--mc->nobjs];
346 memset(p, 0, size);
347 return p;
348}
349
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350static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
351{
ad312c7c 352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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353 sizeof(struct kvm_pte_chain));
354}
355
90cb0529 356static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 357{
90cb0529 358 kfree(pc);
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359}
360
361static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
362{
ad312c7c 363 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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364 sizeof(struct kvm_rmap_desc));
365}
366
90cb0529 367static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 368{
90cb0529 369 kfree(rd);
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370}
371
05da4558
MT
372/*
373 * Return the pointer to the largepage write count for a given
374 * gfn, handling slots that are not large page aligned.
375 */
376static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
377{
378 unsigned long idx;
379
380 idx = (gfn / KVM_PAGES_PER_HPAGE) -
381 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
382 return &slot->lpage_info[idx].write_count;
383}
384
385static void account_shadowed(struct kvm *kvm, gfn_t gfn)
386{
387 int *write_count;
388
2843099f
IE
389 gfn = unalias_gfn(kvm, gfn);
390 write_count = slot_largepage_idx(gfn,
391 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 392 *write_count += 1;
05da4558
MT
393}
394
395static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
396{
397 int *write_count;
398
2843099f
IE
399 gfn = unalias_gfn(kvm, gfn);
400 write_count = slot_largepage_idx(gfn,
401 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT
402 *write_count -= 1;
403 WARN_ON(*write_count < 0);
404}
405
406static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
407{
2843099f 408 struct kvm_memory_slot *slot;
05da4558
MT
409 int *largepage_idx;
410
2843099f
IE
411 gfn = unalias_gfn(kvm, gfn);
412 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT
413 if (slot) {
414 largepage_idx = slot_largepage_idx(gfn, slot);
415 return *largepage_idx;
416 }
417
418 return 1;
419}
420
421static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
422{
423 struct vm_area_struct *vma;
424 unsigned long addr;
4c2155ce 425 int ret = 0;
05da4558
MT
426
427 addr = gfn_to_hva(kvm, gfn);
428 if (kvm_is_error_hva(addr))
4c2155ce 429 return ret;
05da4558 430
4c2155ce 431 down_read(&current->mm->mmap_sem);
05da4558
MT
432 vma = find_vma(current->mm, addr);
433 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
434 ret = 1;
435 up_read(&current->mm->mmap_sem);
05da4558 436
4c2155ce 437 return ret;
05da4558
MT
438}
439
440static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
441{
442 struct kvm_memory_slot *slot;
443
444 if (has_wrprotected_page(vcpu->kvm, large_gfn))
445 return 0;
446
447 if (!host_largepage_backed(vcpu->kvm, large_gfn))
448 return 0;
449
450 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
451 if (slot && slot->dirty_bitmap)
452 return 0;
453
454 return 1;
455}
456
290fc38d
IE
457/*
458 * Take gfn and return the reverse mapping to it.
459 * Note: gfn must be unaliased before this function get called
460 */
461
05da4558 462static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
463{
464 struct kvm_memory_slot *slot;
05da4558 465 unsigned long idx;
290fc38d
IE
466
467 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
468 if (!lpage)
469 return &slot->rmap[gfn - slot->base_gfn];
470
471 idx = (gfn / KVM_PAGES_PER_HPAGE) -
472 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
473
474 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
475}
476
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477/*
478 * Reverse mapping data structures:
479 *
290fc38d
IE
480 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
481 * that points to page_address(page).
cd4a4e53 482 *
290fc38d
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483 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
484 * containing more mappings.
cd4a4e53 485 */
05da4558 486static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 487{
4db35314 488 struct kvm_mmu_page *sp;
cd4a4e53 489 struct kvm_rmap_desc *desc;
290fc38d 490 unsigned long *rmapp;
cd4a4e53
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491 int i;
492
493 if (!is_rmap_pte(*spte))
494 return;
290fc38d 495 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK
496 sp = page_header(__pa(spte));
497 sp->gfns[spte - sp->spt] = gfn;
05da4558 498 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 499 if (!*rmapp) {
cd4a4e53 500 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
501 *rmapp = (unsigned long)spte;
502 } else if (!(*rmapp & 1)) {
cd4a4e53 503 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 504 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 505 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 506 desc->shadow_ptes[1] = spte;
290fc38d 507 *rmapp = (unsigned long)desc | 1;
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508 } else {
509 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 510 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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511 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
512 desc = desc->more;
513 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 514 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
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515 desc = desc->more;
516 }
517 for (i = 0; desc->shadow_ptes[i]; ++i)
518 ;
519 desc->shadow_ptes[i] = spte;
520 }
521}
522
290fc38d 523static void rmap_desc_remove_entry(unsigned long *rmapp,
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524 struct kvm_rmap_desc *desc,
525 int i,
526 struct kvm_rmap_desc *prev_desc)
527{
528 int j;
529
530 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
531 ;
532 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 533 desc->shadow_ptes[j] = NULL;
cd4a4e53
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534 if (j != 0)
535 return;
536 if (!prev_desc && !desc->more)
290fc38d 537 *rmapp = (unsigned long)desc->shadow_ptes[0];
cd4a4e53
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538 else
539 if (prev_desc)
540 prev_desc->more = desc->more;
541 else
290fc38d 542 *rmapp = (unsigned long)desc->more | 1;
90cb0529 543 mmu_free_rmap_desc(desc);
cd4a4e53
AK
544}
545
290fc38d 546static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 547{
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548 struct kvm_rmap_desc *desc;
549 struct kvm_rmap_desc *prev_desc;
4db35314 550 struct kvm_mmu_page *sp;
35149e21 551 pfn_t pfn;
290fc38d 552 unsigned long *rmapp;
cd4a4e53
AK
553 int i;
554
555 if (!is_rmap_pte(*spte))
556 return;
4db35314 557 sp = page_header(__pa(spte));
35149e21 558 pfn = spte_to_pfn(*spte);
7b52345e 559 if (*spte & shadow_accessed_mask)
35149e21 560 kvm_set_pfn_accessed(pfn);
b4231d61 561 if (is_writeble_pte(*spte))
35149e21 562 kvm_release_pfn_dirty(pfn);
b4231d61 563 else
35149e21 564 kvm_release_pfn_clean(pfn);
05da4558 565 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 566 if (!*rmapp) {
cd4a4e53
AK
567 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
568 BUG();
290fc38d 569 } else if (!(*rmapp & 1)) {
cd4a4e53 570 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 571 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
572 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
573 spte, *spte);
574 BUG();
575 }
290fc38d 576 *rmapp = 0;
cd4a4e53
AK
577 } else {
578 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
580 prev_desc = NULL;
581 while (desc) {
582 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
583 if (desc->shadow_ptes[i] == spte) {
290fc38d 584 rmap_desc_remove_entry(rmapp,
714b93da 585 desc, i,
cd4a4e53
AK
586 prev_desc);
587 return;
588 }
589 prev_desc = desc;
590 desc = desc->more;
591 }
592 BUG();
593 }
594}
595
98348e95 596static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 597{
374cbac0 598 struct kvm_rmap_desc *desc;
98348e95
IE
599 struct kvm_rmap_desc *prev_desc;
600 u64 *prev_spte;
601 int i;
602
603 if (!*rmapp)
604 return NULL;
605 else if (!(*rmapp & 1)) {
606 if (!spte)
607 return (u64 *)*rmapp;
608 return NULL;
609 }
610 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
611 prev_desc = NULL;
612 prev_spte = NULL;
613 while (desc) {
614 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
615 if (prev_spte == spte)
616 return desc->shadow_ptes[i];
617 prev_spte = desc->shadow_ptes[i];
618 }
619 desc = desc->more;
620 }
621 return NULL;
622}
623
b1a36821 624static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 625{
290fc38d 626 unsigned long *rmapp;
374cbac0 627 u64 *spte;
caa5b8a5 628 int write_protected = 0;
374cbac0 629
4a4c9924 630 gfn = unalias_gfn(kvm, gfn);
05da4558 631 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 632
98348e95
IE
633 spte = rmap_next(kvm, rmapp, NULL);
634 while (spte) {
374cbac0 635 BUG_ON(!spte);
374cbac0 636 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 637 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 638 if (is_writeble_pte(*spte)) {
9647c14c 639 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
640 write_protected = 1;
641 }
9647c14c 642 spte = rmap_next(kvm, rmapp, spte);
374cbac0 643 }
855149aa 644 if (write_protected) {
35149e21 645 pfn_t pfn;
855149aa
IE
646
647 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
648 pfn = spte_to_pfn(*spte);
649 kvm_set_pfn_dirty(pfn);
855149aa
IE
650 }
651
05da4558
MT
652 /* check for huge page mappings */
653 rmapp = gfn_to_rmap(kvm, gfn, 1);
654 spte = rmap_next(kvm, rmapp, NULL);
655 while (spte) {
656 BUG_ON(!spte);
657 BUG_ON(!(*spte & PT_PRESENT_MASK));
658 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
659 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
660 if (is_writeble_pte(*spte)) {
661 rmap_remove(kvm, spte);
662 --kvm->stat.lpages;
663 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 664 spte = NULL;
05da4558
MT
665 write_protected = 1;
666 }
667 spte = rmap_next(kvm, rmapp, spte);
668 }
669
b1a36821 670 return write_protected;
374cbac0
AK
671}
672
e930bffe
AA
673static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
674{
675 u64 *spte;
676 int need_tlb_flush = 0;
677
678 while ((spte = rmap_next(kvm, rmapp, NULL))) {
679 BUG_ON(!(*spte & PT_PRESENT_MASK));
680 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
681 rmap_remove(kvm, spte);
682 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
683 need_tlb_flush = 1;
684 }
685 return need_tlb_flush;
686}
687
688static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
689 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
690{
691 int i;
692 int retval = 0;
693
694 /*
695 * If mmap_sem isn't taken, we can look the memslots with only
696 * the mmu_lock by skipping over the slots with userspace_addr == 0.
697 */
698 for (i = 0; i < kvm->nmemslots; i++) {
699 struct kvm_memory_slot *memslot = &kvm->memslots[i];
700 unsigned long start = memslot->userspace_addr;
701 unsigned long end;
702
703 /* mmu_lock protects userspace_addr */
704 if (!start)
705 continue;
706
707 end = start + (memslot->npages << PAGE_SHIFT);
708 if (hva >= start && hva < end) {
709 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
710 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
711 retval |= handler(kvm,
712 &memslot->lpage_info[
713 gfn_offset /
714 KVM_PAGES_PER_HPAGE].rmap_pde);
715 }
716 }
717
718 return retval;
719}
720
721int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
722{
723 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
724}
725
726static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
727{
728 u64 *spte;
729 int young = 0;
730
534e38b4
SY
731 /* always return old for EPT */
732 if (!shadow_accessed_mask)
733 return 0;
734
e930bffe
AA
735 spte = rmap_next(kvm, rmapp, NULL);
736 while (spte) {
737 int _young;
738 u64 _spte = *spte;
739 BUG_ON(!(_spte & PT_PRESENT_MASK));
740 _young = _spte & PT_ACCESSED_MASK;
741 if (_young) {
742 young = 1;
743 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
744 }
745 spte = rmap_next(kvm, rmapp, spte);
746 }
747 return young;
748}
749
750int kvm_age_hva(struct kvm *kvm, unsigned long hva)
751{
752 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
753}
754
d6c69ee9 755#ifdef MMU_DEBUG
47ad8e68 756static int is_empty_shadow_page(u64 *spt)
6aa8b732 757{
139bdb2d
AK
758 u64 *pos;
759 u64 *end;
760
47ad8e68 761 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 762 if (is_shadow_present_pte(*pos)) {
b8688d51 763 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 764 pos, *pos);
6aa8b732 765 return 0;
139bdb2d 766 }
6aa8b732
AK
767 return 1;
768}
d6c69ee9 769#endif
6aa8b732 770
4db35314 771static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 772{
4db35314
AK
773 ASSERT(is_empty_shadow_page(sp->spt));
774 list_del(&sp->link);
775 __free_page(virt_to_page(sp->spt));
776 __free_page(virt_to_page(sp->gfns));
777 kfree(sp);
f05e70ac 778 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
779}
780
cea0f0e7
AK
781static unsigned kvm_page_table_hashfn(gfn_t gfn)
782{
1ae0a13d 783 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
784}
785
25c0de2c
AK
786static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
787 u64 *parent_pte)
6aa8b732 788{
4db35314 789 struct kvm_mmu_page *sp;
6aa8b732 790
ad312c7c
ZX
791 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
792 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
793 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 794 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 795 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 796 INIT_LIST_HEAD(&sp->oos_link);
4db35314 797 ASSERT(is_empty_shadow_page(sp->spt));
291f26bc 798 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK
799 sp->multimapped = 0;
800 sp->parent_pte = parent_pte;
f05e70ac 801 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 802 return sp;
6aa8b732
AK
803}
804
714b93da 805static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 806 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
807{
808 struct kvm_pte_chain *pte_chain;
809 struct hlist_node *node;
810 int i;
811
812 if (!parent_pte)
813 return;
4db35314
AK
814 if (!sp->multimapped) {
815 u64 *old = sp->parent_pte;
cea0f0e7
AK
816
817 if (!old) {
4db35314 818 sp->parent_pte = parent_pte;
cea0f0e7
AK
819 return;
820 }
4db35314 821 sp->multimapped = 1;
714b93da 822 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
823 INIT_HLIST_HEAD(&sp->parent_ptes);
824 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
825 pte_chain->parent_ptes[0] = old;
826 }
4db35314 827 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
828 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
829 continue;
830 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
831 if (!pte_chain->parent_ptes[i]) {
832 pte_chain->parent_ptes[i] = parent_pte;
833 return;
834 }
835 }
714b93da 836 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 837 BUG_ON(!pte_chain);
4db35314 838 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
839 pte_chain->parent_ptes[0] = parent_pte;
840}
841
4db35314 842static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
843 u64 *parent_pte)
844{
845 struct kvm_pte_chain *pte_chain;
846 struct hlist_node *node;
847 int i;
848
4db35314
AK
849 if (!sp->multimapped) {
850 BUG_ON(sp->parent_pte != parent_pte);
851 sp->parent_pte = NULL;
cea0f0e7
AK
852 return;
853 }
4db35314 854 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
855 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
856 if (!pte_chain->parent_ptes[i])
857 break;
858 if (pte_chain->parent_ptes[i] != parent_pte)
859 continue;
697fe2e2
AK
860 while (i + 1 < NR_PTE_CHAIN_ENTRIES
861 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
862 pte_chain->parent_ptes[i]
863 = pte_chain->parent_ptes[i + 1];
864 ++i;
865 }
866 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
867 if (i == 0) {
868 hlist_del(&pte_chain->link);
90cb0529 869 mmu_free_pte_chain(pte_chain);
4db35314
AK
870 if (hlist_empty(&sp->parent_ptes)) {
871 sp->multimapped = 0;
872 sp->parent_pte = NULL;
697fe2e2
AK
873 }
874 }
cea0f0e7
AK
875 return;
876 }
877 BUG();
878}
879
ad8cfbe3
MT
880
881static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
882 mmu_parent_walk_fn fn)
883{
884 struct kvm_pte_chain *pte_chain;
885 struct hlist_node *node;
886 struct kvm_mmu_page *parent_sp;
887 int i;
888
889 if (!sp->multimapped && sp->parent_pte) {
890 parent_sp = page_header(__pa(sp->parent_pte));
891 fn(vcpu, parent_sp);
892 mmu_parent_walk(vcpu, parent_sp, fn);
893 return;
894 }
895 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
896 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
897 if (!pte_chain->parent_ptes[i])
898 break;
899 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
900 fn(vcpu, parent_sp);
901 mmu_parent_walk(vcpu, parent_sp, fn);
902 }
903}
904
0074ff63
MT
905static void kvm_mmu_update_unsync_bitmap(u64 *spte)
906{
907 unsigned int index;
908 struct kvm_mmu_page *sp = page_header(__pa(spte));
909
910 index = spte - sp->spt;
60c8aec6
MT
911 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
912 sp->unsync_children++;
913 WARN_ON(!sp->unsync_children);
0074ff63
MT
914}
915
916static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
917{
918 struct kvm_pte_chain *pte_chain;
919 struct hlist_node *node;
920 int i;
921
922 if (!sp->parent_pte)
923 return;
924
925 if (!sp->multimapped) {
926 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
927 return;
928 }
929
930 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
931 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
932 if (!pte_chain->parent_ptes[i])
933 break;
934 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
935 }
936}
937
938static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
939{
0074ff63
MT
940 kvm_mmu_update_parents_unsync(sp);
941 return 1;
942}
943
944static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
945 struct kvm_mmu_page *sp)
946{
947 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
948 kvm_mmu_update_parents_unsync(sp);
949}
950
d761a501
AK
951static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
952 struct kvm_mmu_page *sp)
953{
954 int i;
955
956 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
957 sp->spt[i] = shadow_trap_nonpresent_pte;
958}
959
e8bc217a
MT
960static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
961 struct kvm_mmu_page *sp)
962{
963 return 1;
964}
965
a7052897
MT
966static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
967{
968}
969
60c8aec6
MT
970#define KVM_PAGE_ARRAY_NR 16
971
972struct kvm_mmu_pages {
973 struct mmu_page_and_offset {
974 struct kvm_mmu_page *sp;
975 unsigned int idx;
976 } page[KVM_PAGE_ARRAY_NR];
977 unsigned int nr;
978};
979
0074ff63
MT
980#define for_each_unsync_children(bitmap, idx) \
981 for (idx = find_first_bit(bitmap, 512); \
982 idx < 512; \
983 idx = find_next_bit(bitmap, 512, idx+1))
984
60c8aec6
MT
985int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
986 int idx)
4731d4c7 987{
60c8aec6 988 int i;
4731d4c7 989
60c8aec6
MT
990 if (sp->unsync)
991 for (i=0; i < pvec->nr; i++)
992 if (pvec->page[i].sp == sp)
993 return 0;
994
995 pvec->page[pvec->nr].sp = sp;
996 pvec->page[pvec->nr].idx = idx;
997 pvec->nr++;
998 return (pvec->nr == KVM_PAGE_ARRAY_NR);
999}
1000
1001static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1002 struct kvm_mmu_pages *pvec)
1003{
1004 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1005
0074ff63 1006 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
1007 u64 ent = sp->spt[i];
1008
87917239 1009 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT
1010 struct kvm_mmu_page *child;
1011 child = page_header(ent & PT64_BASE_ADDR_MASK);
1012
1013 if (child->unsync_children) {
60c8aec6
MT
1014 if (mmu_pages_add(pvec, child, i))
1015 return -ENOSPC;
1016
1017 ret = __mmu_unsync_walk(child, pvec);
1018 if (!ret)
1019 __clear_bit(i, sp->unsync_child_bitmap);
1020 else if (ret > 0)
1021 nr_unsync_leaf += ret;
1022 else
4731d4c7
MT
1023 return ret;
1024 }
1025
1026 if (child->unsync) {
60c8aec6
MT
1027 nr_unsync_leaf++;
1028 if (mmu_pages_add(pvec, child, i))
1029 return -ENOSPC;
4731d4c7
MT
1030 }
1031 }
1032 }
1033
0074ff63 1034 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1035 sp->unsync_children = 0;
1036
60c8aec6
MT
1037 return nr_unsync_leaf;
1038}
1039
1040static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1041 struct kvm_mmu_pages *pvec)
1042{
1043 if (!sp->unsync_children)
1044 return 0;
1045
1046 mmu_pages_add(pvec, sp, 0);
1047 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT
1048}
1049
4db35314 1050static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1051{
1052 unsigned index;
1053 struct hlist_head *bucket;
4db35314 1054 struct kvm_mmu_page *sp;
cea0f0e7
AK
1055 struct hlist_node *node;
1056
b8688d51 1057 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1058 index = kvm_page_table_hashfn(gfn);
f05e70ac 1059 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1060 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
1061 if (sp->gfn == gfn && !sp->role.metaphysical
1062 && !sp->role.invalid) {
cea0f0e7 1063 pgprintk("%s: found role %x\n",
b8688d51 1064 __func__, sp->role.word);
4db35314 1065 return sp;
cea0f0e7
AK
1066 }
1067 return NULL;
1068}
1069
6cffe8ca
MT
1070static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
1071{
1072 list_del(&sp->oos_link);
1073 --kvm->stat.mmu_unsync_global;
1074}
1075
4731d4c7
MT
1076static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1077{
1078 WARN_ON(!sp->unsync);
1079 sp->unsync = 0;
6cffe8ca
MT
1080 if (sp->global)
1081 kvm_unlink_unsync_global(kvm, sp);
4731d4c7
MT
1082 --kvm->stat.mmu_unsync;
1083}
1084
1085static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1086
1087static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1088{
1089 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1090 kvm_mmu_zap_page(vcpu->kvm, sp);
1091 return 1;
1092 }
1093
b1a36821
MT
1094 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1095 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1096 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1097 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1098 kvm_mmu_zap_page(vcpu->kvm, sp);
1099 return 1;
1100 }
1101
1102 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1103 return 0;
1104}
1105
60c8aec6
MT
1106struct mmu_page_path {
1107 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1108 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT
1109};
1110
60c8aec6
MT
1111#define for_each_sp(pvec, sp, parents, i) \
1112 for (i = mmu_pages_next(&pvec, &parents, -1), \
1113 sp = pvec.page[i].sp; \
1114 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1115 i = mmu_pages_next(&pvec, &parents, i))
1116
1117int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
1118 int i)
1119{
1120 int n;
1121
1122 for (n = i+1; n < pvec->nr; n++) {
1123 struct kvm_mmu_page *sp = pvec->page[n].sp;
1124
1125 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1126 parents->idx[0] = pvec->page[n].idx;
1127 return n;
1128 }
1129
1130 parents->parent[sp->role.level-2] = sp;
1131 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1132 }
1133
1134 return n;
1135}
1136
1137void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1138{
60c8aec6
MT
1139 struct kvm_mmu_page *sp;
1140 unsigned int level = 0;
1141
1142 do {
1143 unsigned int idx = parents->idx[level];
4731d4c7 1144
60c8aec6
MT
1145 sp = parents->parent[level];
1146 if (!sp)
1147 return;
1148
1149 --sp->unsync_children;
1150 WARN_ON((int)sp->unsync_children < 0);
1151 __clear_bit(idx, sp->unsync_child_bitmap);
1152 level++;
1153 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT
1154}
1155
60c8aec6
MT
1156static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1157 struct mmu_page_path *parents,
1158 struct kvm_mmu_pages *pvec)
4731d4c7 1159{
60c8aec6
MT
1160 parents->parent[parent->role.level-1] = NULL;
1161 pvec->nr = 0;
1162}
4731d4c7 1163
60c8aec6
MT
1164static void mmu_sync_children(struct kvm_vcpu *vcpu,
1165 struct kvm_mmu_page *parent)
1166{
1167 int i;
1168 struct kvm_mmu_page *sp;
1169 struct mmu_page_path parents;
1170 struct kvm_mmu_pages pages;
1171
1172 kvm_mmu_pages_init(parent, &parents, &pages);
1173 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT
1174 int protected = 0;
1175
1176 for_each_sp(pages, sp, parents, i)
1177 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1178
1179 if (protected)
1180 kvm_flush_remote_tlbs(vcpu->kvm);
1181
60c8aec6
MT
1182 for_each_sp(pages, sp, parents, i) {
1183 kvm_sync_page(vcpu, sp);
1184 mmu_pages_clear_parents(&parents);
1185 }
4731d4c7 1186 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT
1187 kvm_mmu_pages_init(parent, &parents, &pages);
1188 }
4731d4c7
MT
1189}
1190
cea0f0e7
AK
1191static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1192 gfn_t gfn,
1193 gva_t gaddr,
1194 unsigned level,
1195 int metaphysical,
41074d07 1196 unsigned access,
f7d9c7b7 1197 u64 *parent_pte)
cea0f0e7
AK
1198{
1199 union kvm_mmu_page_role role;
1200 unsigned index;
1201 unsigned quadrant;
1202 struct hlist_head *bucket;
4db35314 1203 struct kvm_mmu_page *sp;
4731d4c7 1204 struct hlist_node *node, *tmp;
cea0f0e7 1205
a770f6f2 1206 role = vcpu->arch.mmu.base_role;
cea0f0e7
AK
1207 role.level = level;
1208 role.metaphysical = metaphysical;
41074d07 1209 role.access = access;
ad312c7c 1210 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1211 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1212 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1213 role.quadrant = quadrant;
1214 }
b8688d51 1215 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1216 gfn, role.word);
1ae0a13d 1217 index = kvm_page_table_hashfn(gfn);
f05e70ac 1218 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1219 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1220 if (sp->gfn == gfn) {
1221 if (sp->unsync)
1222 if (kvm_sync_page(vcpu, sp))
1223 continue;
1224
1225 if (sp->role.word != role.word)
1226 continue;
1227
4db35314 1228 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1229 if (sp->unsync_children) {
1230 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1231 kvm_mmu_mark_parents_unsync(vcpu, sp);
1232 }
b8688d51 1233 pgprintk("%s: found\n", __func__);
4db35314 1234 return sp;
cea0f0e7 1235 }
dfc5aa00 1236 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1237 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1238 if (!sp)
1239 return sp;
b8688d51 1240 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1241 sp->gfn = gfn;
1242 sp->role = role;
e2078318 1243 sp->global = role.cr4_pge;
4db35314 1244 hlist_add_head(&sp->hash_link, bucket);
4731d4c7 1245 if (!metaphysical) {
b1a36821
MT
1246 if (rmap_write_protect(vcpu->kvm, gfn))
1247 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT
1248 account_shadowed(vcpu->kvm, gfn);
1249 }
131d8279
AK
1250 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1251 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1252 else
1253 nonpaging_prefetch_page(vcpu, sp);
4db35314 1254 return sp;
cea0f0e7
AK
1255}
1256
3d000db5 1257static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 1258 struct kvm_vcpu *vcpu, u64 addr)
3d000db5
AK
1259{
1260 hpa_t shadow_addr;
1261 int level;
1262 int r;
1263 u64 *sptep;
1264 unsigned index;
1265
1266 shadow_addr = vcpu->arch.mmu.root_hpa;
1267 level = vcpu->arch.mmu.shadow_root_level;
1268 if (level == PT32E_ROOT_LEVEL) {
1269 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1270 shadow_addr &= PT64_BASE_ADDR_MASK;
eb64f1e8
MT
1271 if (!shadow_addr)
1272 return 1;
3d000db5
AK
1273 --level;
1274 }
1275
1276 while (level >= PT_PAGE_TABLE_LEVEL) {
1277 index = SHADOW_PT_INDEX(addr, level);
1278 sptep = ((u64 *)__va(shadow_addr)) + index;
1279 r = walker->entry(walker, vcpu, addr, sptep, level);
1280 if (r)
1281 return r;
1282 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1283 --level;
1284 }
1285 return 0;
1286}
1287
90cb0529 1288static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1289 struct kvm_mmu_page *sp)
a436036b 1290{
697fe2e2
AK
1291 unsigned i;
1292 u64 *pt;
1293 u64 ent;
1294
4db35314 1295 pt = sp->spt;
697fe2e2 1296
4db35314 1297 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1298 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1299 if (is_shadow_present_pte(pt[i]))
290fc38d 1300 rmap_remove(kvm, &pt[i]);
c7addb90 1301 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1302 }
1303 return;
1304 }
1305
1306 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1307 ent = pt[i];
1308
05da4558
MT
1309 if (is_shadow_present_pte(ent)) {
1310 if (!is_large_pte(ent)) {
1311 ent &= PT64_BASE_ADDR_MASK;
1312 mmu_page_remove_parent_pte(page_header(ent),
1313 &pt[i]);
1314 } else {
1315 --kvm->stat.lpages;
1316 rmap_remove(kvm, &pt[i]);
1317 }
1318 }
c7addb90 1319 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1320 }
a436036b
AK
1321}
1322
4db35314 1323static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1324{
4db35314 1325 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1326}
1327
12b7d28f
AK
1328static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1329{
1330 int i;
1331
1332 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1333 if (kvm->vcpus[i])
ad312c7c 1334 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1335}
1336
31aa2b44 1337static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1338{
1339 u64 *parent_pte;
1340
4db35314
AK
1341 while (sp->multimapped || sp->parent_pte) {
1342 if (!sp->multimapped)
1343 parent_pte = sp->parent_pte;
a436036b
AK
1344 else {
1345 struct kvm_pte_chain *chain;
1346
4db35314 1347 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1348 struct kvm_pte_chain, link);
1349 parent_pte = chain->parent_ptes[0];
1350 }
697fe2e2 1351 BUG_ON(!parent_pte);
4db35314 1352 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1353 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1354 }
31aa2b44
AK
1355}
1356
60c8aec6
MT
1357static int mmu_zap_unsync_children(struct kvm *kvm,
1358 struct kvm_mmu_page *parent)
4731d4c7 1359{
60c8aec6
MT
1360 int i, zapped = 0;
1361 struct mmu_page_path parents;
1362 struct kvm_mmu_pages pages;
4731d4c7 1363
60c8aec6 1364 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1365 return 0;
60c8aec6
MT
1366
1367 kvm_mmu_pages_init(parent, &parents, &pages);
1368 while (mmu_unsync_walk(parent, &pages)) {
1369 struct kvm_mmu_page *sp;
1370
1371 for_each_sp(pages, sp, parents, i) {
1372 kvm_mmu_zap_page(kvm, sp);
1373 mmu_pages_clear_parents(&parents);
1374 }
1375 zapped += pages.nr;
1376 kvm_mmu_pages_init(parent, &parents, &pages);
1377 }
1378
1379 return zapped;
4731d4c7
MT
1380}
1381
07385413 1382static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1383{
4731d4c7 1384 int ret;
31aa2b44 1385 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1386 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1387 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1388 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1389 kvm_flush_remote_tlbs(kvm);
1390 if (!sp->role.invalid && !sp->role.metaphysical)
1391 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1392 if (sp->unsync)
1393 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1394 if (!sp->root_count) {
1395 hlist_del(&sp->hash_link);
1396 kvm_mmu_free_page(kvm, sp);
2e53d63a 1397 } else {
2e53d63a 1398 sp->role.invalid = 1;
5b5c6a5a 1399 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1400 kvm_reload_remote_mmus(kvm);
1401 }
12b7d28f 1402 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1403 return ret;
a436036b
AK
1404}
1405
82ce2c96
IE
1406/*
1407 * Changing the number of mmu pages allocated to the vm
1408 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1409 */
1410void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1411{
1412 /*
1413 * If we set the number of mmu pages to be smaller be than the
1414 * number of actived pages , we must to free some mmu pages before we
1415 * change the value
1416 */
1417
f05e70ac 1418 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1419 kvm_nr_mmu_pages) {
f05e70ac
ZX
1420 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1421 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1422
1423 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1424 struct kvm_mmu_page *page;
1425
f05e70ac 1426 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1427 struct kvm_mmu_page, link);
1428 kvm_mmu_zap_page(kvm, page);
1429 n_used_mmu_pages--;
1430 }
f05e70ac 1431 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1432 }
1433 else
f05e70ac
ZX
1434 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1435 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1436
f05e70ac 1437 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1438}
1439
f67a46f4 1440static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1441{
1442 unsigned index;
1443 struct hlist_head *bucket;
4db35314 1444 struct kvm_mmu_page *sp;
a436036b
AK
1445 struct hlist_node *node, *n;
1446 int r;
1447
b8688d51 1448 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1449 r = 0;
1ae0a13d 1450 index = kvm_page_table_hashfn(gfn);
f05e70ac 1451 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1452 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1453 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1454 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1455 sp->role.word);
a436036b 1456 r = 1;
07385413
MT
1457 if (kvm_mmu_zap_page(kvm, sp))
1458 n = bucket->first;
a436036b
AK
1459 }
1460 return r;
cea0f0e7
AK
1461}
1462
f67a46f4 1463static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1464{
4db35314 1465 struct kvm_mmu_page *sp;
97a0a01e 1466
4db35314 1467 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1468 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1469 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1470 }
1471}
1472
38c335f1 1473static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1474{
38c335f1 1475 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1476 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1477
291f26bc 1478 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK
1479}
1480
6844dec6
MT
1481static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1482{
1483 int i;
1484 u64 *pt = sp->spt;
1485
1486 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1487 return;
1488
1489 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1490 if (pt[i] == shadow_notrap_nonpresent_pte)
1491 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1492 }
1493}
1494
039576c0
AK
1495struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1496{
72dc67a6
IE
1497 struct page *page;
1498
ad312c7c 1499 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1500
1501 if (gpa == UNMAPPED_GVA)
1502 return NULL;
72dc67a6 1503
72dc67a6 1504 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1505
1506 return page;
039576c0
AK
1507}
1508
74be52e3
SY
1509/*
1510 * The function is based on mtrr_type_lookup() in
1511 * arch/x86/kernel/cpu/mtrr/generic.c
1512 */
1513static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1514 u64 start, u64 end)
1515{
1516 int i;
1517 u64 base, mask;
1518 u8 prev_match, curr_match;
1519 int num_var_ranges = KVM_NR_VAR_MTRR;
1520
1521 if (!mtrr_state->enabled)
1522 return 0xFF;
1523
1524 /* Make end inclusive end, instead of exclusive */
1525 end--;
1526
1527 /* Look in fixed ranges. Just return the type as per start */
1528 if (mtrr_state->have_fixed && (start < 0x100000)) {
1529 int idx;
1530
1531 if (start < 0x80000) {
1532 idx = 0;
1533 idx += (start >> 16);
1534 return mtrr_state->fixed_ranges[idx];
1535 } else if (start < 0xC0000) {
1536 idx = 1 * 8;
1537 idx += ((start - 0x80000) >> 14);
1538 return mtrr_state->fixed_ranges[idx];
1539 } else if (start < 0x1000000) {
1540 idx = 3 * 8;
1541 idx += ((start - 0xC0000) >> 12);
1542 return mtrr_state->fixed_ranges[idx];
1543 }
1544 }
1545
1546 /*
1547 * Look in variable ranges
1548 * Look of multiple ranges matching this address and pick type
1549 * as per MTRR precedence
1550 */
1551 if (!(mtrr_state->enabled & 2))
1552 return mtrr_state->def_type;
1553
1554 prev_match = 0xFF;
1555 for (i = 0; i < num_var_ranges; ++i) {
1556 unsigned short start_state, end_state;
1557
1558 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1559 continue;
1560
1561 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1562 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1563 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1564 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1565
1566 start_state = ((start & mask) == (base & mask));
1567 end_state = ((end & mask) == (base & mask));
1568 if (start_state != end_state)
1569 return 0xFE;
1570
1571 if ((start & mask) != (base & mask))
1572 continue;
1573
1574 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1575 if (prev_match == 0xFF) {
1576 prev_match = curr_match;
1577 continue;
1578 }
1579
1580 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1581 curr_match == MTRR_TYPE_UNCACHABLE)
1582 return MTRR_TYPE_UNCACHABLE;
1583
1584 if ((prev_match == MTRR_TYPE_WRBACK &&
1585 curr_match == MTRR_TYPE_WRTHROUGH) ||
1586 (prev_match == MTRR_TYPE_WRTHROUGH &&
1587 curr_match == MTRR_TYPE_WRBACK)) {
1588 prev_match = MTRR_TYPE_WRTHROUGH;
1589 curr_match = MTRR_TYPE_WRTHROUGH;
1590 }
1591
1592 if (prev_match != curr_match)
1593 return MTRR_TYPE_UNCACHABLE;
1594 }
1595
1596 if (prev_match != 0xFF)
1597 return prev_match;
1598
1599 return mtrr_state->def_type;
1600}
1601
1602static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1603{
1604 u8 mtrr;
1605
1606 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1607 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1608 if (mtrr == 0xfe || mtrr == 0xff)
1609 mtrr = MTRR_TYPE_WRBACK;
1610 return mtrr;
1611}
1612
4731d4c7
MT
1613static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1614{
1615 unsigned index;
1616 struct hlist_head *bucket;
1617 struct kvm_mmu_page *s;
1618 struct hlist_node *node, *n;
1619
1620 index = kvm_page_table_hashfn(sp->gfn);
1621 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1622 /* don't unsync if pagetable is shadowed with multiple roles */
1623 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1624 if (s->gfn != sp->gfn || s->role.metaphysical)
1625 continue;
1626 if (s->role.word != sp->role.word)
1627 return 1;
1628 }
4731d4c7
MT
1629 ++vcpu->kvm->stat.mmu_unsync;
1630 sp->unsync = 1;
6cffe8ca
MT
1631
1632 if (sp->global) {
1633 list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
1634 ++vcpu->kvm->stat.mmu_unsync_global;
1635 } else
1636 kvm_mmu_mark_parents_unsync(vcpu, sp);
1637
4731d4c7
MT
1638 mmu_convert_notrap(sp);
1639 return 0;
1640}
1641
1642static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1643 bool can_unsync)
1644{
1645 struct kvm_mmu_page *shadow;
1646
1647 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1648 if (shadow) {
1649 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1650 return 1;
1651 if (shadow->unsync)
1652 return 0;
582801a9 1653 if (can_unsync && oos_shadow)
4731d4c7
MT
1654 return kvm_unsync_page(vcpu, shadow);
1655 return 1;
1656 }
1657 return 0;
1658}
1659
1e73f9dd
MT
1660static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1661 unsigned pte_access, int user_fault,
1662 int write_fault, int dirty, int largepage,
6cffe8ca 1663 int global, gfn_t gfn, pfn_t pfn, bool speculative,
4731d4c7 1664 bool can_unsync)
1c4f1fd6
AK
1665{
1666 u64 spte;
1e73f9dd 1667 int ret = 0;
64d4d521 1668 u64 mt_mask = shadow_mt_mask;
6cffe8ca
MT
1669 struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
1670
1671 if (!global && sp->global) {
1672 sp->global = 0;
1673 if (sp->unsync) {
1674 kvm_unlink_unsync_global(vcpu->kvm, sp);
1675 kvm_mmu_mark_parents_unsync(vcpu, sp);
1676 }
1677 }
64d4d521 1678
1c4f1fd6
AK
1679 /*
1680 * We don't set the accessed bit, since we sometimes want to see
1681 * whether the guest actually used the pte (in order to detect
1682 * demand paging).
1683 */
7b52345e 1684 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1685 if (!speculative)
3201b5d9 1686 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1687 if (!dirty)
1688 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1689 if (pte_access & ACC_EXEC_MASK)
1690 spte |= shadow_x_mask;
1691 else
1692 spte |= shadow_nx_mask;
1c4f1fd6 1693 if (pte_access & ACC_USER_MASK)
7b52345e 1694 spte |= shadow_user_mask;
05da4558
MT
1695 if (largepage)
1696 spte |= PT_PAGE_SIZE_MASK;
64d4d521 1697 if (mt_mask) {
2aaf69dc
SY
1698 if (!kvm_is_mmio_pfn(pfn)) {
1699 mt_mask = get_memory_type(vcpu, gfn) <<
1700 kvm_x86_ops->get_mt_mask_shift();
1701 mt_mask |= VMX_EPT_IGMT_BIT;
1702 } else
1703 mt_mask = MTRR_TYPE_UNCACHABLE <<
1704 kvm_x86_ops->get_mt_mask_shift();
64d4d521
SY
1705 spte |= mt_mask;
1706 }
1c4f1fd6 1707
35149e21 1708 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1709
1710 if ((pte_access & ACC_WRITE_MASK)
1711 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1712
38187c83
MT
1713 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1714 ret = 1;
1715 spte = shadow_trap_nonpresent_pte;
1716 goto set_pte;
1717 }
1718
1c4f1fd6 1719 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1720
ecc5589f
MT
1721 /*
1722 * Optimization: for pte sync, if spte was writable the hash
1723 * lookup is unnecessary (and expensive). Write protection
1724 * is responsibility of mmu_get_page / kvm_sync_page.
1725 * Same reasoning can be applied to dirty page accounting.
1726 */
1727 if (!can_unsync && is_writeble_pte(*shadow_pte))
1728 goto set_pte;
1729
4731d4c7 1730 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1731 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1732 __func__, gfn);
1e73f9dd 1733 ret = 1;
1c4f1fd6 1734 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1735 if (is_writeble_pte(spte))
1c4f1fd6 1736 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1737 }
1738 }
1739
1c4f1fd6
AK
1740 if (pte_access & ACC_WRITE_MASK)
1741 mark_page_dirty(vcpu->kvm, gfn);
1742
38187c83 1743set_pte:
1c4f1fd6 1744 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1745 return ret;
1746}
1747
1e73f9dd
MT
1748static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1749 unsigned pt_access, unsigned pte_access,
1750 int user_fault, int write_fault, int dirty,
6cffe8ca
MT
1751 int *ptwrite, int largepage, int global,
1752 gfn_t gfn, pfn_t pfn, bool speculative)
1e73f9dd
MT
1753{
1754 int was_rmapped = 0;
1755 int was_writeble = is_writeble_pte(*shadow_pte);
1756
1757 pgprintk("%s: spte %llx access %x write_fault %d"
1758 " user_fault %d gfn %lx\n",
1759 __func__, *shadow_pte, pt_access,
1760 write_fault, user_fault, gfn);
1761
1762 if (is_rmap_pte(*shadow_pte)) {
1763 /*
1764 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1765 * the parent of the now unreachable PTE.
1766 */
1767 if (largepage && !is_large_pte(*shadow_pte)) {
1768 struct kvm_mmu_page *child;
1769 u64 pte = *shadow_pte;
1770
1771 child = page_header(pte & PT64_BASE_ADDR_MASK);
1772 mmu_page_remove_parent_pte(child, shadow_pte);
1773 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1774 pgprintk("hfn old %lx new %lx\n",
1775 spte_to_pfn(*shadow_pte), pfn);
1776 rmap_remove(vcpu->kvm, shadow_pte);
1777 } else {
1778 if (largepage)
1779 was_rmapped = is_large_pte(*shadow_pte);
1780 else
1781 was_rmapped = 1;
1782 }
1783 }
1784 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
6cffe8ca 1785 dirty, largepage, global, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1786 if (write_fault)
1787 *ptwrite = 1;
a378b4e6
MT
1788 kvm_x86_ops->tlb_flush(vcpu);
1789 }
1e73f9dd
MT
1790
1791 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1792 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1793 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1794 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1795 *shadow_pte, shadow_pte);
1796 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1797 ++vcpu->kvm->stat.lpages;
1798
1c4f1fd6
AK
1799 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1800 if (!was_rmapped) {
05da4558 1801 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1802 if (!is_rmap_pte(*shadow_pte))
35149e21 1803 kvm_release_pfn_clean(pfn);
75e68e60
IE
1804 } else {
1805 if (was_writeble)
35149e21 1806 kvm_release_pfn_dirty(pfn);
75e68e60 1807 else
35149e21 1808 kvm_release_pfn_clean(pfn);
1c4f1fd6 1809 }
1b7fcd32 1810 if (speculative) {
ad312c7c 1811 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1812 vcpu->arch.last_pte_gfn = gfn;
1813 }
1c4f1fd6
AK
1814}
1815
6aa8b732
AK
1816static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1817{
1818}
1819
140754bc
AK
1820struct direct_shadow_walk {
1821 struct kvm_shadow_walk walker;
1822 pfn_t pfn;
1823 int write;
1824 int largepage;
1825 int pt_write;
1826};
6aa8b732 1827
140754bc
AK
1828static int direct_map_entry(struct kvm_shadow_walk *_walk,
1829 struct kvm_vcpu *vcpu,
d40a1ee4 1830 u64 addr, u64 *sptep, int level)
140754bc
AK
1831{
1832 struct direct_shadow_walk *walk =
1833 container_of(_walk, struct direct_shadow_walk, walker);
1834 struct kvm_mmu_page *sp;
1835 gfn_t pseudo_gfn;
1836 gfn_t gfn = addr >> PAGE_SHIFT;
1837
1838 if (level == PT_PAGE_TABLE_LEVEL
1839 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1840 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1841 0, walk->write, 1, &walk->pt_write,
6cffe8ca 1842 walk->largepage, 0, gfn, walk->pfn, false);
bc2d4299 1843 ++vcpu->stat.pf_fixed;
140754bc
AK
1844 return 1;
1845 }
6aa8b732 1846
140754bc
AK
1847 if (*sptep == shadow_trap_nonpresent_pte) {
1848 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1849 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK
1850 1, ACC_ALL, sptep);
1851 if (!sp) {
1852 pgprintk("nonpaging_map: ENOMEM\n");
1853 kvm_release_pfn_clean(walk->pfn);
1854 return -ENOMEM;
6aa8b732
AK
1855 }
1856
140754bc
AK
1857 set_shadow_pte(sptep,
1858 __pa(sp->spt)
1859 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1860 | shadow_user_mask | shadow_x_mask);
6aa8b732 1861 }
140754bc
AK
1862 return 0;
1863}
1864
1865static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1866 int largepage, gfn_t gfn, pfn_t pfn)
1867{
1868 int r;
1869 struct direct_shadow_walk walker = {
1870 .walker = { .entry = direct_map_entry, },
1871 .pfn = pfn,
1872 .largepage = largepage,
1873 .write = write,
1874 .pt_write = 0,
1875 };
1876
d40a1ee4 1877 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK
1878 if (r < 0)
1879 return r;
1880 return walker.pt_write;
6aa8b732
AK
1881}
1882
10589a46
MT
1883static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1884{
1885 int r;
05da4558 1886 int largepage = 0;
35149e21 1887 pfn_t pfn;
e930bffe 1888 unsigned long mmu_seq;
aaee2c94 1889
05da4558
MT
1890 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1891 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1892 largepage = 1;
1893 }
1894
e930bffe 1895 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1896 smp_rmb();
35149e21 1897 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1898
d196e343 1899 /* mmio */
35149e21
AL
1900 if (is_error_pfn(pfn)) {
1901 kvm_release_pfn_clean(pfn);
d196e343
AK
1902 return 1;
1903 }
1904
aaee2c94 1905 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1906 if (mmu_notifier_retry(vcpu, mmu_seq))
1907 goto out_unlock;
eb787d10 1908 kvm_mmu_free_some_pages(vcpu);
6c41f428 1909 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1910 spin_unlock(&vcpu->kvm->mmu_lock);
1911
aaee2c94 1912
10589a46 1913 return r;
e930bffe
AA
1914
1915out_unlock:
1916 spin_unlock(&vcpu->kvm->mmu_lock);
1917 kvm_release_pfn_clean(pfn);
1918 return 0;
10589a46
MT
1919}
1920
1921
17ac10ad
AK
1922static void mmu_free_roots(struct kvm_vcpu *vcpu)
1923{
1924 int i;
4db35314 1925 struct kvm_mmu_page *sp;
17ac10ad 1926
ad312c7c 1927 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1928 return;
aaee2c94 1929 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1930 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1931 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1932
4db35314
AK
1933 sp = page_header(root);
1934 --sp->root_count;
2e53d63a
MT
1935 if (!sp->root_count && sp->role.invalid)
1936 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1937 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1938 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1939 return;
1940 }
17ac10ad 1941 for (i = 0; i < 4; ++i) {
ad312c7c 1942 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1943
417726a3 1944 if (root) {
417726a3 1945 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1946 sp = page_header(root);
1947 --sp->root_count;
2e53d63a
MT
1948 if (!sp->root_count && sp->role.invalid)
1949 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1950 }
ad312c7c 1951 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1952 }
aaee2c94 1953 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1954 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1955}
1956
1957static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1958{
1959 int i;
cea0f0e7 1960 gfn_t root_gfn;
4db35314 1961 struct kvm_mmu_page *sp;
fb72d167 1962 int metaphysical = 0;
3bb65a22 1963
ad312c7c 1964 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1965
ad312c7c
ZX
1966 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1967 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1968
1969 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1970 if (tdp_enabled)
1971 metaphysical = 1;
4db35314 1972 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1973 PT64_ROOT_LEVEL, metaphysical,
1974 ACC_ALL, NULL);
4db35314
AK
1975 root = __pa(sp->spt);
1976 ++sp->root_count;
ad312c7c 1977 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1978 return;
1979 }
fb72d167
JR
1980 metaphysical = !is_paging(vcpu);
1981 if (tdp_enabled)
1982 metaphysical = 1;
17ac10ad 1983 for (i = 0; i < 4; ++i) {
ad312c7c 1984 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1985
1986 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1987 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1988 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1989 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1990 continue;
1991 }
ad312c7c
ZX
1992 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1993 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1994 root_gfn = 0;
4db35314 1995 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1996 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1997 ACC_ALL, NULL);
4db35314
AK
1998 root = __pa(sp->spt);
1999 ++sp->root_count;
ad312c7c 2000 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 2001 }
ad312c7c 2002 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
2003}
2004
0ba73cda
MT
2005static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2006{
2007 int i;
2008 struct kvm_mmu_page *sp;
2009
2010 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2011 return;
2012 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2013 hpa_t root = vcpu->arch.mmu.root_hpa;
2014 sp = page_header(root);
2015 mmu_sync_children(vcpu, sp);
2016 return;
2017 }
2018 for (i = 0; i < 4; ++i) {
2019 hpa_t root = vcpu->arch.mmu.pae_root[i];
2020
2021 if (root) {
2022 root &= PT64_BASE_ADDR_MASK;
2023 sp = page_header(root);
2024 mmu_sync_children(vcpu, sp);
2025 }
2026 }
2027}
2028
6cffe8ca
MT
2029static void mmu_sync_global(struct kvm_vcpu *vcpu)
2030{
2031 struct kvm *kvm = vcpu->kvm;
2032 struct kvm_mmu_page *sp, *n;
2033
2034 list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
2035 kvm_sync_page(vcpu, sp);
2036}
2037
0ba73cda
MT
2038void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2039{
2040 spin_lock(&vcpu->kvm->mmu_lock);
2041 mmu_sync_roots(vcpu);
6cffe8ca
MT
2042 spin_unlock(&vcpu->kvm->mmu_lock);
2043}
2044
2045void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
2046{
2047 spin_lock(&vcpu->kvm->mmu_lock);
2048 mmu_sync_global(vcpu);
0ba73cda
MT
2049 spin_unlock(&vcpu->kvm->mmu_lock);
2050}
2051
6aa8b732
AK
2052static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2053{
2054 return vaddr;
2055}
2056
2057static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2058 u32 error_code)
6aa8b732 2059{
e833240f 2060 gfn_t gfn;
e2dec939 2061 int r;
6aa8b732 2062
b8688d51 2063 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
2064 r = mmu_topup_memory_caches(vcpu);
2065 if (r)
2066 return r;
714b93da 2067
6aa8b732 2068 ASSERT(vcpu);
ad312c7c 2069 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2070
e833240f 2071 gfn = gva >> PAGE_SHIFT;
6aa8b732 2072
e833240f
AK
2073 return nonpaging_map(vcpu, gva & PAGE_MASK,
2074 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
2075}
2076
fb72d167
JR
2077static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2078 u32 error_code)
2079{
35149e21 2080 pfn_t pfn;
fb72d167 2081 int r;
05da4558
MT
2082 int largepage = 0;
2083 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2084 unsigned long mmu_seq;
fb72d167
JR
2085
2086 ASSERT(vcpu);
2087 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2088
2089 r = mmu_topup_memory_caches(vcpu);
2090 if (r)
2091 return r;
2092
05da4558
MT
2093 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2094 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2095 largepage = 1;
2096 }
e930bffe 2097 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2098 smp_rmb();
35149e21 2099 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
2100 if (is_error_pfn(pfn)) {
2101 kvm_release_pfn_clean(pfn);
fb72d167
JR
2102 return 1;
2103 }
2104 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
2105 if (mmu_notifier_retry(vcpu, mmu_seq))
2106 goto out_unlock;
fb72d167
JR
2107 kvm_mmu_free_some_pages(vcpu);
2108 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2109 largepage, gfn, pfn);
fb72d167 2110 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
2111
2112 return r;
e930bffe
AA
2113
2114out_unlock:
2115 spin_unlock(&vcpu->kvm->mmu_lock);
2116 kvm_release_pfn_clean(pfn);
2117 return 0;
fb72d167
JR
2118}
2119
6aa8b732
AK
2120static void nonpaging_free(struct kvm_vcpu *vcpu)
2121{
17ac10ad 2122 mmu_free_roots(vcpu);
6aa8b732
AK
2123}
2124
2125static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2126{
ad312c7c 2127 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2128
2129 context->new_cr3 = nonpaging_new_cr3;
2130 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
2131 context->gva_to_gpa = nonpaging_gva_to_gpa;
2132 context->free = nonpaging_free;
c7addb90 2133 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2134 context->sync_page = nonpaging_sync_page;
a7052897 2135 context->invlpg = nonpaging_invlpg;
cea0f0e7 2136 context->root_level = 0;
6aa8b732 2137 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2138 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2139 return 0;
2140}
2141
d835dfec 2142void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2143{
1165f5fe 2144 ++vcpu->stat.tlb_flush;
cbdd1bea 2145 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
2146}
2147
2148static void paging_new_cr3(struct kvm_vcpu *vcpu)
2149{
b8688d51 2150 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2151 mmu_free_roots(vcpu);
6aa8b732
AK
2152}
2153
6aa8b732
AK
2154static void inject_page_fault(struct kvm_vcpu *vcpu,
2155 u64 addr,
2156 u32 err_code)
2157{
c3c91fee 2158 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2159}
2160
6aa8b732
AK
2161static void paging_free(struct kvm_vcpu *vcpu)
2162{
2163 nonpaging_free(vcpu);
2164}
2165
2166#define PTTYPE 64
2167#include "paging_tmpl.h"
2168#undef PTTYPE
2169
2170#define PTTYPE 32
2171#include "paging_tmpl.h"
2172#undef PTTYPE
2173
17ac10ad 2174static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2175{
ad312c7c 2176 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2177
2178 ASSERT(is_pae(vcpu));
2179 context->new_cr3 = paging_new_cr3;
2180 context->page_fault = paging64_page_fault;
6aa8b732 2181 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2182 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2183 context->sync_page = paging64_sync_page;
a7052897 2184 context->invlpg = paging64_invlpg;
6aa8b732 2185 context->free = paging_free;
17ac10ad
AK
2186 context->root_level = level;
2187 context->shadow_root_level = level;
17c3ba9d 2188 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2189 return 0;
2190}
2191
17ac10ad
AK
2192static int paging64_init_context(struct kvm_vcpu *vcpu)
2193{
2194 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2195}
2196
6aa8b732
AK
2197static int paging32_init_context(struct kvm_vcpu *vcpu)
2198{
ad312c7c 2199 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2200
2201 context->new_cr3 = paging_new_cr3;
2202 context->page_fault = paging32_page_fault;
6aa8b732
AK
2203 context->gva_to_gpa = paging32_gva_to_gpa;
2204 context->free = paging_free;
c7addb90 2205 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2206 context->sync_page = paging32_sync_page;
a7052897 2207 context->invlpg = paging32_invlpg;
6aa8b732
AK
2208 context->root_level = PT32_ROOT_LEVEL;
2209 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2210 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2211 return 0;
2212}
2213
2214static int paging32E_init_context(struct kvm_vcpu *vcpu)
2215{
17ac10ad 2216 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2217}
2218
fb72d167
JR
2219static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2220{
2221 struct kvm_mmu *context = &vcpu->arch.mmu;
2222
2223 context->new_cr3 = nonpaging_new_cr3;
2224 context->page_fault = tdp_page_fault;
2225 context->free = nonpaging_free;
2226 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2227 context->sync_page = nonpaging_sync_page;
a7052897 2228 context->invlpg = nonpaging_invlpg;
67253af5 2229 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2230 context->root_hpa = INVALID_PAGE;
2231
2232 if (!is_paging(vcpu)) {
2233 context->gva_to_gpa = nonpaging_gva_to_gpa;
2234 context->root_level = 0;
2235 } else if (is_long_mode(vcpu)) {
2236 context->gva_to_gpa = paging64_gva_to_gpa;
2237 context->root_level = PT64_ROOT_LEVEL;
2238 } else if (is_pae(vcpu)) {
2239 context->gva_to_gpa = paging64_gva_to_gpa;
2240 context->root_level = PT32E_ROOT_LEVEL;
2241 } else {
2242 context->gva_to_gpa = paging32_gva_to_gpa;
2243 context->root_level = PT32_ROOT_LEVEL;
2244 }
2245
2246 return 0;
2247}
2248
2249static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2250{
a770f6f2
AK
2251 int r;
2252
6aa8b732 2253 ASSERT(vcpu);
ad312c7c 2254 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2255
2256 if (!is_paging(vcpu))
a770f6f2 2257 r = nonpaging_init_context(vcpu);
a9058ecd 2258 else if (is_long_mode(vcpu))
a770f6f2 2259 r = paging64_init_context(vcpu);
6aa8b732 2260 else if (is_pae(vcpu))
a770f6f2 2261 r = paging32E_init_context(vcpu);
6aa8b732 2262 else
a770f6f2
AK
2263 r = paging32_init_context(vcpu);
2264
2265 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2266
2267 return r;
6aa8b732
AK
2268}
2269
fb72d167
JR
2270static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2271{
35149e21
AL
2272 vcpu->arch.update_pte.pfn = bad_pfn;
2273
fb72d167
JR
2274 if (tdp_enabled)
2275 return init_kvm_tdp_mmu(vcpu);
2276 else
2277 return init_kvm_softmmu(vcpu);
2278}
2279
6aa8b732
AK
2280static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2281{
2282 ASSERT(vcpu);
ad312c7c
ZX
2283 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2284 vcpu->arch.mmu.free(vcpu);
2285 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2286 }
2287}
2288
2289int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2290{
2291 destroy_kvm_mmu(vcpu);
2292 return init_kvm_mmu(vcpu);
2293}
8668a3c4 2294EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2295
2296int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2297{
714b93da
AK
2298 int r;
2299
e2dec939 2300 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2301 if (r)
2302 goto out;
aaee2c94 2303 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2304 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2305 mmu_alloc_roots(vcpu);
0ba73cda 2306 mmu_sync_roots(vcpu);
aaee2c94 2307 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2308 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2309 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2310out:
2311 return r;
6aa8b732 2312}
17c3ba9d
AK
2313EXPORT_SYMBOL_GPL(kvm_mmu_load);
2314
2315void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2316{
2317 mmu_free_roots(vcpu);
2318}
6aa8b732 2319
09072daf 2320static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2321 struct kvm_mmu_page *sp,
ac1b714e
AK
2322 u64 *spte)
2323{
2324 u64 pte;
2325 struct kvm_mmu_page *child;
2326
2327 pte = *spte;
c7addb90 2328 if (is_shadow_present_pte(pte)) {
05da4558
MT
2329 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2330 is_large_pte(pte))
290fc38d 2331 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2332 else {
2333 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2334 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2335 }
2336 }
c7addb90 2337 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2338 if (is_large_pte(pte))
2339 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2340}
2341
0028425f 2342static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2343 struct kvm_mmu_page *sp,
0028425f 2344 u64 *spte,
489f1d65 2345 const void *new)
0028425f 2346{
30945387
MT
2347 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2348 if (!vcpu->arch.update_pte.largepage ||
2349 sp->role.glevels == PT32_ROOT_LEVEL) {
2350 ++vcpu->kvm->stat.mmu_pde_zapped;
2351 return;
2352 }
2353 }
0028425f 2354
4cee5764 2355 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2356 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2357 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2358 else
489f1d65 2359 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2360}
2361
79539cec
AK
2362static bool need_remote_flush(u64 old, u64 new)
2363{
2364 if (!is_shadow_present_pte(old))
2365 return false;
2366 if (!is_shadow_present_pte(new))
2367 return true;
2368 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2369 return true;
2370 old ^= PT64_NX_MASK;
2371 new ^= PT64_NX_MASK;
2372 return (old & ~new & PT64_PERM_MASK) != 0;
2373}
2374
2375static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2376{
2377 if (need_remote_flush(old, new))
2378 kvm_flush_remote_tlbs(vcpu->kvm);
2379 else
2380 kvm_mmu_flush_tlb(vcpu);
2381}
2382
12b7d28f
AK
2383static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2384{
ad312c7c 2385 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2386
7b52345e 2387 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2388}
2389
d7824fff
AK
2390static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2391 const u8 *new, int bytes)
2392{
2393 gfn_t gfn;
2394 int r;
2395 u64 gpte = 0;
35149e21 2396 pfn_t pfn;
d7824fff 2397
05da4558
MT
2398 vcpu->arch.update_pte.largepage = 0;
2399
d7824fff
AK
2400 if (bytes != 4 && bytes != 8)
2401 return;
2402
2403 /*
2404 * Assume that the pte write on a page table of the same type
2405 * as the current vcpu paging mode. This is nearly always true
2406 * (might be false while changing modes). Note it is verified later
2407 * by update_pte().
2408 */
2409 if (is_pae(vcpu)) {
2410 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2411 if ((bytes == 4) && (gpa % 4 == 0)) {
2412 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2413 if (r)
2414 return;
2415 memcpy((void *)&gpte + (gpa % 8), new, 4);
2416 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2417 memcpy((void *)&gpte, new, 8);
2418 }
2419 } else {
2420 if ((bytes == 4) && (gpa % 4 == 0))
2421 memcpy((void *)&gpte, new, 4);
2422 }
2423 if (!is_present_pte(gpte))
2424 return;
2425 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2426
05da4558
MT
2427 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2428 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2429 vcpu->arch.update_pte.largepage = 1;
2430 }
e930bffe 2431 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2432 smp_rmb();
35149e21 2433 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2434
35149e21
AL
2435 if (is_error_pfn(pfn)) {
2436 kvm_release_pfn_clean(pfn);
d196e343
AK
2437 return;
2438 }
d7824fff 2439 vcpu->arch.update_pte.gfn = gfn;
35149e21 2440 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2441}
2442
1b7fcd32
AK
2443static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2444{
2445 u64 *spte = vcpu->arch.last_pte_updated;
2446
2447 if (spte
2448 && vcpu->arch.last_pte_gfn == gfn
2449 && shadow_accessed_mask
2450 && !(*spte & shadow_accessed_mask)
2451 && is_shadow_present_pte(*spte))
2452 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2453}
2454
09072daf 2455void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
2456 const u8 *new, int bytes,
2457 bool guest_initiated)
da4a00f0 2458{
9b7a0325 2459 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2460 struct kvm_mmu_page *sp;
0e7bc4b9 2461 struct hlist_node *node, *n;
9b7a0325
AK
2462 struct hlist_head *bucket;
2463 unsigned index;
489f1d65 2464 u64 entry, gentry;
9b7a0325 2465 u64 *spte;
9b7a0325 2466 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2467 unsigned pte_size;
9b7a0325 2468 unsigned page_offset;
0e7bc4b9 2469 unsigned misaligned;
fce0657f 2470 unsigned quadrant;
9b7a0325 2471 int level;
86a5ba02 2472 int flooded = 0;
ac1b714e 2473 int npte;
489f1d65 2474 int r;
9b7a0325 2475
b8688d51 2476 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2477 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2478 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2479 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2480 kvm_mmu_free_some_pages(vcpu);
4cee5764 2481 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2482 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT
2483 if (guest_initiated) {
2484 if (gfn == vcpu->arch.last_pt_write_gfn
2485 && !last_updated_pte_accessed(vcpu)) {
2486 ++vcpu->arch.last_pt_write_count;
2487 if (vcpu->arch.last_pt_write_count >= 3)
2488 flooded = 1;
2489 } else {
2490 vcpu->arch.last_pt_write_gfn = gfn;
2491 vcpu->arch.last_pt_write_count = 1;
2492 vcpu->arch.last_pte_updated = NULL;
2493 }
86a5ba02 2494 }
1ae0a13d 2495 index = kvm_page_table_hashfn(gfn);
f05e70ac 2496 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2497 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 2498 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 2499 continue;
4db35314 2500 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2501 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2502 misaligned |= bytes < 4;
86a5ba02 2503 if (misaligned || flooded) {
0e7bc4b9
AK
2504 /*
2505 * Misaligned accesses are too much trouble to fix
2506 * up; also, they usually indicate a page is not used
2507 * as a page table.
86a5ba02
AK
2508 *
2509 * If we're seeing too many writes to a page,
2510 * it may no longer be a page table, or we may be
2511 * forking, in which case it is better to unmap the
2512 * page.
0e7bc4b9
AK
2513 */
2514 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2515 gpa, bytes, sp->role.word);
07385413
MT
2516 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2517 n = bucket->first;
4cee5764 2518 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2519 continue;
2520 }
9b7a0325 2521 page_offset = offset;
4db35314 2522 level = sp->role.level;
ac1b714e 2523 npte = 1;
4db35314 2524 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2525 page_offset <<= 1; /* 32->64 */
2526 /*
2527 * A 32-bit pde maps 4MB while the shadow pdes map
2528 * only 2MB. So we need to double the offset again
2529 * and zap two pdes instead of one.
2530 */
2531 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2532 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2533 page_offset <<= 1;
2534 npte = 2;
2535 }
fce0657f 2536 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2537 page_offset &= ~PAGE_MASK;
4db35314 2538 if (quadrant != sp->role.quadrant)
fce0657f 2539 continue;
9b7a0325 2540 }
4db35314 2541 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2542 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2543 gentry = 0;
2544 r = kvm_read_guest_atomic(vcpu->kvm,
2545 gpa & ~(u64)(pte_size - 1),
2546 &gentry, pte_size);
2547 new = (const void *)&gentry;
2548 if (r < 0)
2549 new = NULL;
2550 }
ac1b714e 2551 while (npte--) {
79539cec 2552 entry = *spte;
4db35314 2553 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2554 if (new)
2555 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2556 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2557 ++spte;
9b7a0325 2558 }
9b7a0325 2559 }
c7addb90 2560 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2561 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2562 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2563 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2564 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2565 }
da4a00f0
AK
2566}
2567
a436036b
AK
2568int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2569{
10589a46
MT
2570 gpa_t gpa;
2571 int r;
a436036b 2572
10589a46 2573 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2574
aaee2c94 2575 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2576 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2577 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2578 return r;
a436036b 2579}
577bdc49 2580EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2581
22d95b12 2582void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2583{
f05e70ac 2584 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2585 struct kvm_mmu_page *sp;
ebeace86 2586
f05e70ac 2587 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2588 struct kvm_mmu_page, link);
2589 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2590 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2591 }
2592}
ebeace86 2593
3067714c
AK
2594int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2595{
2596 int r;
2597 enum emulation_result er;
2598
ad312c7c 2599 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2600 if (r < 0)
2601 goto out;
2602
2603 if (!r) {
2604 r = 1;
2605 goto out;
2606 }
2607
b733bfb5
AK
2608 r = mmu_topup_memory_caches(vcpu);
2609 if (r)
2610 goto out;
2611
3067714c 2612 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2613
2614 switch (er) {
2615 case EMULATE_DONE:
2616 return 1;
2617 case EMULATE_DO_MMIO:
2618 ++vcpu->stat.mmio_exits;
2619 return 0;
2620 case EMULATE_FAIL:
2621 kvm_report_emulation_failure(vcpu, "pagetable");
2622 return 1;
2623 default:
2624 BUG();
2625 }
2626out:
3067714c
AK
2627 return r;
2628}
2629EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2630
a7052897
MT
2631void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2632{
a7052897 2633 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT
2634 kvm_mmu_flush_tlb(vcpu);
2635 ++vcpu->stat.invlpg;
2636}
2637EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2638
18552672
JR
2639void kvm_enable_tdp(void)
2640{
2641 tdp_enabled = true;
2642}
2643EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2644
5f4cb662
JR
2645void kvm_disable_tdp(void)
2646{
2647 tdp_enabled = false;
2648}
2649EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2650
6aa8b732
AK
2651static void free_mmu_pages(struct kvm_vcpu *vcpu)
2652{
4db35314 2653 struct kvm_mmu_page *sp;
6aa8b732 2654
f05e70ac
ZX
2655 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2656 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2657 struct kvm_mmu_page, link);
2658 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2659 cond_resched();
f51234c2 2660 }
ad312c7c 2661 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2662}
2663
2664static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2665{
17ac10ad 2666 struct page *page;
6aa8b732
AK
2667 int i;
2668
2669 ASSERT(vcpu);
2670
f05e70ac
ZX
2671 if (vcpu->kvm->arch.n_requested_mmu_pages)
2672 vcpu->kvm->arch.n_free_mmu_pages =
2673 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2674 else
f05e70ac
ZX
2675 vcpu->kvm->arch.n_free_mmu_pages =
2676 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2677 /*
2678 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2679 * Therefore we need to allocate shadow page tables in the first
2680 * 4GB of memory, which happens to fit the DMA32 zone.
2681 */
2682 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2683 if (!page)
2684 goto error_1;
ad312c7c 2685 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2686 for (i = 0; i < 4; ++i)
ad312c7c 2687 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2688
6aa8b732
AK
2689 return 0;
2690
2691error_1:
2692 free_mmu_pages(vcpu);
2693 return -ENOMEM;
2694}
2695
8018c27b 2696int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2697{
6aa8b732 2698 ASSERT(vcpu);
ad312c7c 2699 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2700
8018c27b
IM
2701 return alloc_mmu_pages(vcpu);
2702}
6aa8b732 2703
8018c27b
IM
2704int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2705{
2706 ASSERT(vcpu);
ad312c7c 2707 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2708
8018c27b 2709 return init_kvm_mmu(vcpu);
6aa8b732
AK
2710}
2711
2712void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2713{
2714 ASSERT(vcpu);
2715
2716 destroy_kvm_mmu(vcpu);
2717 free_mmu_pages(vcpu);
714b93da 2718 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2719}
2720
90cb0529 2721void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2722{
4db35314 2723 struct kvm_mmu_page *sp;
6aa8b732 2724
2245a28f 2725 spin_lock(&kvm->mmu_lock);
f05e70ac 2726 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2727 int i;
2728 u64 *pt;
2729
291f26bc 2730 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK
2731 continue;
2732
4db35314 2733 pt = sp->spt;
6aa8b732
AK
2734 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2735 /* avoid RMW */
9647c14c 2736 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2737 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2738 }
171d595d 2739 kvm_flush_remote_tlbs(kvm);
2245a28f 2740 spin_unlock(&kvm->mmu_lock);
6aa8b732 2741}
37a7d8b0 2742
90cb0529 2743void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2744{
4db35314 2745 struct kvm_mmu_page *sp, *node;
e0fa826f 2746
aaee2c94 2747 spin_lock(&kvm->mmu_lock);
f05e70ac 2748 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2749 if (kvm_mmu_zap_page(kvm, sp))
2750 node = container_of(kvm->arch.active_mmu_pages.next,
2751 struct kvm_mmu_page, link);
aaee2c94 2752 spin_unlock(&kvm->mmu_lock);
e0fa826f 2753
90cb0529 2754 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2755}
2756
8b2cf73c 2757static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2758{
2759 struct kvm_mmu_page *page;
2760
2761 page = container_of(kvm->arch.active_mmu_pages.prev,
2762 struct kvm_mmu_page, link);
2763 kvm_mmu_zap_page(kvm, page);
2764}
2765
2766static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2767{
2768 struct kvm *kvm;
2769 struct kvm *kvm_freed = NULL;
2770 int cache_count = 0;
2771
2772 spin_lock(&kvm_lock);
2773
2774 list_for_each_entry(kvm, &vm_list, vm_list) {
2775 int npages;
2776
5a4c9288
MT
2777 if (!down_read_trylock(&kvm->slots_lock))
2778 continue;
3ee16c81
IE
2779 spin_lock(&kvm->mmu_lock);
2780 npages = kvm->arch.n_alloc_mmu_pages -
2781 kvm->arch.n_free_mmu_pages;
2782 cache_count += npages;
2783 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2784 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2785 cache_count--;
2786 kvm_freed = kvm;
2787 }
2788 nr_to_scan--;
2789
2790 spin_unlock(&kvm->mmu_lock);
5a4c9288 2791 up_read(&kvm->slots_lock);
3ee16c81
IE
2792 }
2793 if (kvm_freed)
2794 list_move_tail(&kvm_freed->vm_list, &vm_list);
2795
2796 spin_unlock(&kvm_lock);
2797
2798 return cache_count;
2799}
2800
2801static struct shrinker mmu_shrinker = {
2802 .shrink = mmu_shrink,
2803 .seeks = DEFAULT_SEEKS * 10,
2804};
2805
2ddfd20e 2806static void mmu_destroy_caches(void)
b5a33a75
AK
2807{
2808 if (pte_chain_cache)
2809 kmem_cache_destroy(pte_chain_cache);
2810 if (rmap_desc_cache)
2811 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2812 if (mmu_page_header_cache)
2813 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2814}
2815
3ee16c81
IE
2816void kvm_mmu_module_exit(void)
2817{
2818 mmu_destroy_caches();
2819 unregister_shrinker(&mmu_shrinker);
2820}
2821
b5a33a75
AK
2822int kvm_mmu_module_init(void)
2823{
2824 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2825 sizeof(struct kvm_pte_chain),
20c2df83 2826 0, 0, NULL);
b5a33a75
AK
2827 if (!pte_chain_cache)
2828 goto nomem;
2829 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2830 sizeof(struct kvm_rmap_desc),
20c2df83 2831 0, 0, NULL);
b5a33a75
AK
2832 if (!rmap_desc_cache)
2833 goto nomem;
2834
d3d25b04
AK
2835 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2836 sizeof(struct kvm_mmu_page),
20c2df83 2837 0, 0, NULL);
d3d25b04
AK
2838 if (!mmu_page_header_cache)
2839 goto nomem;
2840
3ee16c81
IE
2841 register_shrinker(&mmu_shrinker);
2842
b5a33a75
AK
2843 return 0;
2844
2845nomem:
3ee16c81 2846 mmu_destroy_caches();
b5a33a75
AK
2847 return -ENOMEM;
2848}
2849
3ad82a7e
ZX
2850/*
2851 * Caculate mmu pages needed for kvm.
2852 */
2853unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2854{
2855 int i;
2856 unsigned int nr_mmu_pages;
2857 unsigned int nr_pages = 0;
2858
2859 for (i = 0; i < kvm->nmemslots; i++)
2860 nr_pages += kvm->memslots[i].npages;
2861
2862 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2863 nr_mmu_pages = max(nr_mmu_pages,
2864 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2865
2866 return nr_mmu_pages;
2867}
2868
2f333bcb
MT
2869static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2870 unsigned len)
2871{
2872 if (len > buffer->len)
2873 return NULL;
2874 return buffer->ptr;
2875}
2876
2877static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2878 unsigned len)
2879{
2880 void *ret;
2881
2882 ret = pv_mmu_peek_buffer(buffer, len);
2883 if (!ret)
2884 return ret;
2885 buffer->ptr += len;
2886 buffer->len -= len;
2887 buffer->processed += len;
2888 return ret;
2889}
2890
2891static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2892 gpa_t addr, gpa_t value)
2893{
2894 int bytes = 8;
2895 int r;
2896
2897 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2898 bytes = 4;
2899
2900 r = mmu_topup_memory_caches(vcpu);
2901 if (r)
2902 return r;
2903
3200f405 2904 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2905 return -EFAULT;
2906
2907 return 1;
2908}
2909
2910static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2911{
2912 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2913 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT
2914 return 1;
2915}
2916
2917static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2918{
2919 spin_lock(&vcpu->kvm->mmu_lock);
2920 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2921 spin_unlock(&vcpu->kvm->mmu_lock);
2922 return 1;
2923}
2924
2925static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2926 struct kvm_pv_mmu_op_buffer *buffer)
2927{
2928 struct kvm_mmu_op_header *header;
2929
2930 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2931 if (!header)
2932 return 0;
2933 switch (header->op) {
2934 case KVM_MMU_OP_WRITE_PTE: {
2935 struct kvm_mmu_op_write_pte *wpte;
2936
2937 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2938 if (!wpte)
2939 return 0;
2940 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2941 wpte->pte_val);
2942 }
2943 case KVM_MMU_OP_FLUSH_TLB: {
2944 struct kvm_mmu_op_flush_tlb *ftlb;
2945
2946 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2947 if (!ftlb)
2948 return 0;
2949 return kvm_pv_mmu_flush_tlb(vcpu);
2950 }
2951 case KVM_MMU_OP_RELEASE_PT: {
2952 struct kvm_mmu_op_release_pt *rpt;
2953
2954 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2955 if (!rpt)
2956 return 0;
2957 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2958 }
2959 default: return 0;
2960 }
2961}
2962
2963int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2964 gpa_t addr, unsigned long *ret)
2965{
2966 int r;
6ad18fba 2967 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2968
6ad18fba
DH
2969 buffer->ptr = buffer->buf;
2970 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2971 buffer->processed = 0;
2f333bcb 2972
6ad18fba 2973 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2974 if (r)
2975 goto out;
2976
6ad18fba
DH
2977 while (buffer->len) {
2978 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2979 if (r < 0)
2980 goto out;
2981 if (r == 0)
2982 break;
2983 }
2984
2985 r = 1;
2986out:
6ad18fba 2987 *ret = buffer->processed;
2f333bcb
MT
2988 return r;
2989}
2990
37a7d8b0
AK
2991#ifdef AUDIT
2992
2993static const char *audit_msg;
2994
2995static gva_t canonicalize(gva_t gva)
2996{
2997#ifdef CONFIG_X86_64
2998 gva = (long long)(gva << 16) >> 16;
2999#endif
3000 return gva;
3001}
3002
3003static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3004 gva_t va, int level)
3005{
3006 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3007 int i;
3008 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3009
3010 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3011 u64 ent = pt[i];
3012
c7addb90 3013 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
3014 continue;
3015
3016 va = canonicalize(va);
c7addb90
AK
3017 if (level > 1) {
3018 if (ent == shadow_notrap_nonpresent_pte)
3019 printk(KERN_ERR "audit: (%s) nontrapping pte"
3020 " in nonleaf level: levels %d gva %lx"
3021 " level %d pte %llx\n", audit_msg,
ad312c7c 3022 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 3023
37a7d8b0 3024 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 3025 } else {
ad312c7c 3026 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 3027 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 3028
c7addb90 3029 if (is_shadow_present_pte(ent)
37a7d8b0 3030 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
3031 printk(KERN_ERR "xx audit error: (%s) levels %d"
3032 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3033 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
3034 va, gpa, hpa, ent,
3035 is_shadow_present_pte(ent));
c7addb90
AK
3036 else if (ent == shadow_notrap_nonpresent_pte
3037 && !is_error_hpa(hpa))
3038 printk(KERN_ERR "audit: (%s) notrap shadow,"
3039 " valid guest gva %lx\n", audit_msg, va);
35149e21 3040 kvm_release_pfn_clean(pfn);
c7addb90 3041
37a7d8b0
AK
3042 }
3043 }
3044}
3045
3046static void audit_mappings(struct kvm_vcpu *vcpu)
3047{
1ea252af 3048 unsigned i;
37a7d8b0 3049
ad312c7c
ZX
3050 if (vcpu->arch.mmu.root_level == 4)
3051 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
3052 else
3053 for (i = 0; i < 4; ++i)
ad312c7c 3054 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3055 audit_mappings_page(vcpu,
ad312c7c 3056 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
3057 i << 30,
3058 2);
3059}
3060
3061static int count_rmaps(struct kvm_vcpu *vcpu)
3062{
3063 int nmaps = 0;
3064 int i, j, k;
3065
3066 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3067 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3068 struct kvm_rmap_desc *d;
3069
3070 for (j = 0; j < m->npages; ++j) {
290fc38d 3071 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3072
290fc38d 3073 if (!*rmapp)
37a7d8b0 3074 continue;
290fc38d 3075 if (!(*rmapp & 1)) {
37a7d8b0
AK
3076 ++nmaps;
3077 continue;
3078 }
290fc38d 3079 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
3080 while (d) {
3081 for (k = 0; k < RMAP_EXT; ++k)
3082 if (d->shadow_ptes[k])
3083 ++nmaps;
3084 else
3085 break;
3086 d = d->more;
3087 }
3088 }
3089 }
3090 return nmaps;
3091}
3092
3093static int count_writable_mappings(struct kvm_vcpu *vcpu)
3094{
3095 int nmaps = 0;
4db35314 3096 struct kvm_mmu_page *sp;
37a7d8b0
AK
3097 int i;
3098
f05e70ac 3099 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3100 u64 *pt = sp->spt;
37a7d8b0 3101
4db35314 3102 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
3103 continue;
3104
3105 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3106 u64 ent = pt[i];
3107
3108 if (!(ent & PT_PRESENT_MASK))
3109 continue;
3110 if (!(ent & PT_WRITABLE_MASK))
3111 continue;
3112 ++nmaps;
3113 }
3114 }
3115 return nmaps;
3116}
3117
3118static void audit_rmap(struct kvm_vcpu *vcpu)
3119{
3120 int n_rmap = count_rmaps(vcpu);
3121 int n_actual = count_writable_mappings(vcpu);
3122
3123 if (n_rmap != n_actual)
3124 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 3125 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
3126}
3127
3128static void audit_write_protection(struct kvm_vcpu *vcpu)
3129{
4db35314 3130 struct kvm_mmu_page *sp;
290fc38d
IE
3131 struct kvm_memory_slot *slot;
3132 unsigned long *rmapp;
3133 gfn_t gfn;
37a7d8b0 3134
f05e70ac 3135 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3136 if (sp->role.metaphysical)
37a7d8b0
AK
3137 continue;
3138
4db35314 3139 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3140 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE
3141 rmapp = &slot->rmap[gfn - slot->base_gfn];
3142 if (*rmapp)
37a7d8b0
AK
3143 printk(KERN_ERR "%s: (%s) shadow page has writable"
3144 " mappings: gfn %lx role %x\n",
b8688d51 3145 __func__, audit_msg, sp->gfn,
4db35314 3146 sp->role.word);
37a7d8b0
AK
3147 }
3148}
3149
3150static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3151{
3152 int olddbg = dbg;
3153
3154 dbg = 0;
3155 audit_msg = msg;
3156 audit_rmap(vcpu);
3157 audit_write_protection(vcpu);
3158 audit_mappings(vcpu);
3159 dbg = olddbg;
3160}
3161
3162#endif