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Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
1d737c8a | 21 | #include "mmu.h" |
e495606d | 22 | |
edf88417 | 23 | #include <linux/kvm_host.h> |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
05da4558 | 30 | #include <linux/hugetlb.h> |
2f333bcb | 31 | #include <linux/compiler.h> |
6aa8b732 | 32 | |
e495606d AK |
33 | #include <asm/page.h> |
34 | #include <asm/cmpxchg.h> | |
4e542370 | 35 | #include <asm/io.h> |
6aa8b732 | 36 | |
18552672 JR |
37 | /* |
38 | * When setting this variable to true it enables Two-Dimensional-Paging | |
39 | * where the hardware walks 2 page tables: | |
40 | * 1. the guest-virtual to guest-physical | |
41 | * 2. while doing 1. it walks guest-physical to host-physical | |
42 | * If the hardware supports that we don't need to do shadow paging. | |
43 | */ | |
2f333bcb | 44 | bool tdp_enabled = false; |
18552672 | 45 | |
37a7d8b0 AK |
46 | #undef MMU_DEBUG |
47 | ||
48 | #undef AUDIT | |
49 | ||
50 | #ifdef AUDIT | |
51 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
52 | #else | |
53 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
54 | #endif | |
55 | ||
56 | #ifdef MMU_DEBUG | |
57 | ||
58 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
59 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
60 | ||
61 | #else | |
62 | ||
63 | #define pgprintk(x...) do { } while (0) | |
64 | #define rmap_printk(x...) do { } while (0) | |
65 | ||
66 | #endif | |
67 | ||
68 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
6ada8cca AK |
69 | static int dbg = 0; |
70 | module_param(dbg, bool, 0644); | |
37a7d8b0 | 71 | #endif |
6aa8b732 | 72 | |
d6c69ee9 YD |
73 | #ifndef MMU_DEBUG |
74 | #define ASSERT(x) do { } while (0) | |
75 | #else | |
6aa8b732 AK |
76 | #define ASSERT(x) \ |
77 | if (!(x)) { \ | |
78 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
79 | __FILE__, __LINE__, #x); \ | |
80 | } | |
d6c69ee9 | 81 | #endif |
6aa8b732 | 82 | |
6aa8b732 AK |
83 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
84 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
85 | ||
6aa8b732 AK |
86 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
87 | ||
88 | #define PT64_LEVEL_BITS 9 | |
89 | ||
90 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 91 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
92 | |
93 | #define PT64_LEVEL_MASK(level) \ | |
94 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
95 | ||
96 | #define PT64_INDEX(address, level)\ | |
97 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
98 | ||
99 | ||
100 | #define PT32_LEVEL_BITS 10 | |
101 | ||
102 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 103 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
104 | |
105 | #define PT32_LEVEL_MASK(level) \ | |
106 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
107 | ||
108 | #define PT32_INDEX(address, level)\ | |
109 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
110 | ||
111 | ||
27aba766 | 112 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
113 | #define PT64_DIR_BASE_ADDR_MASK \ |
114 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
115 | ||
116 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
117 | #define PT32_DIR_BASE_ADDR_MASK \ | |
118 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
119 | ||
79539cec AK |
120 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
121 | | PT64_NX_MASK) | |
6aa8b732 AK |
122 | |
123 | #define PFERR_PRESENT_MASK (1U << 0) | |
124 | #define PFERR_WRITE_MASK (1U << 1) | |
125 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 126 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 | 127 | |
6aa8b732 AK |
128 | #define PT_DIRECTORY_LEVEL 2 |
129 | #define PT_PAGE_TABLE_LEVEL 1 | |
130 | ||
cd4a4e53 AK |
131 | #define RMAP_EXT 4 |
132 | ||
fe135d2c AK |
133 | #define ACC_EXEC_MASK 1 |
134 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
135 | #define ACC_USER_MASK PT_USER_MASK | |
136 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
137 | ||
135f8c2b AK |
138 | #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level) |
139 | ||
cd4a4e53 AK |
140 | struct kvm_rmap_desc { |
141 | u64 *shadow_ptes[RMAP_EXT]; | |
142 | struct kvm_rmap_desc *more; | |
143 | }; | |
144 | ||
3d000db5 AK |
145 | struct kvm_shadow_walk { |
146 | int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu, | |
d40a1ee4 | 147 | u64 addr, u64 *spte, int level); |
3d000db5 AK |
148 | }; |
149 | ||
b5a33a75 AK |
150 | static struct kmem_cache *pte_chain_cache; |
151 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 152 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 153 | |
c7addb90 AK |
154 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
155 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
7b52345e SY |
156 | static u64 __read_mostly shadow_base_present_pte; |
157 | static u64 __read_mostly shadow_nx_mask; | |
158 | static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ | |
159 | static u64 __read_mostly shadow_user_mask; | |
160 | static u64 __read_mostly shadow_accessed_mask; | |
161 | static u64 __read_mostly shadow_dirty_mask; | |
c7addb90 AK |
162 | |
163 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
164 | { | |
165 | shadow_trap_nonpresent_pte = trap_pte; | |
166 | shadow_notrap_nonpresent_pte = notrap_pte; | |
167 | } | |
168 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
169 | ||
7b52345e SY |
170 | void kvm_mmu_set_base_ptes(u64 base_pte) |
171 | { | |
172 | shadow_base_present_pte = base_pte; | |
173 | } | |
174 | EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes); | |
175 | ||
176 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
177 | u64 dirty_mask, u64 nx_mask, u64 x_mask) | |
178 | { | |
179 | shadow_user_mask = user_mask; | |
180 | shadow_accessed_mask = accessed_mask; | |
181 | shadow_dirty_mask = dirty_mask; | |
182 | shadow_nx_mask = nx_mask; | |
183 | shadow_x_mask = x_mask; | |
184 | } | |
185 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); | |
186 | ||
6aa8b732 AK |
187 | static int is_write_protection(struct kvm_vcpu *vcpu) |
188 | { | |
ad312c7c | 189 | return vcpu->arch.cr0 & X86_CR0_WP; |
6aa8b732 AK |
190 | } |
191 | ||
192 | static int is_cpuid_PSE36(void) | |
193 | { | |
194 | return 1; | |
195 | } | |
196 | ||
73b1087e AK |
197 | static int is_nx(struct kvm_vcpu *vcpu) |
198 | { | |
ad312c7c | 199 | return vcpu->arch.shadow_efer & EFER_NX; |
73b1087e AK |
200 | } |
201 | ||
6aa8b732 AK |
202 | static int is_present_pte(unsigned long pte) |
203 | { | |
204 | return pte & PT_PRESENT_MASK; | |
205 | } | |
206 | ||
c7addb90 AK |
207 | static int is_shadow_present_pte(u64 pte) |
208 | { | |
c7addb90 AK |
209 | return pte != shadow_trap_nonpresent_pte |
210 | && pte != shadow_notrap_nonpresent_pte; | |
211 | } | |
212 | ||
05da4558 MT |
213 | static int is_large_pte(u64 pte) |
214 | { | |
215 | return pte & PT_PAGE_SIZE_MASK; | |
216 | } | |
217 | ||
6aa8b732 AK |
218 | static int is_writeble_pte(unsigned long pte) |
219 | { | |
220 | return pte & PT_WRITABLE_MASK; | |
221 | } | |
222 | ||
e3c5e7ec AK |
223 | static int is_dirty_pte(unsigned long pte) |
224 | { | |
7b52345e | 225 | return pte & shadow_dirty_mask; |
e3c5e7ec AK |
226 | } |
227 | ||
cd4a4e53 AK |
228 | static int is_rmap_pte(u64 pte) |
229 | { | |
4b1a80fa | 230 | return is_shadow_present_pte(pte); |
cd4a4e53 AK |
231 | } |
232 | ||
35149e21 | 233 | static pfn_t spte_to_pfn(u64 pte) |
0b49ea86 | 234 | { |
35149e21 | 235 | return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; |
0b49ea86 AK |
236 | } |
237 | ||
da928521 AK |
238 | static gfn_t pse36_gfn_delta(u32 gpte) |
239 | { | |
240 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
241 | ||
242 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
243 | } | |
244 | ||
e663ee64 AK |
245 | static void set_shadow_pte(u64 *sptep, u64 spte) |
246 | { | |
247 | #ifdef CONFIG_X86_64 | |
248 | set_64bit((unsigned long *)sptep, spte); | |
249 | #else | |
250 | set_64bit((unsigned long long *)sptep, spte); | |
251 | #endif | |
252 | } | |
253 | ||
e2dec939 | 254 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 255 | struct kmem_cache *base_cache, int min) |
714b93da AK |
256 | { |
257 | void *obj; | |
258 | ||
259 | if (cache->nobjs >= min) | |
e2dec939 | 260 | return 0; |
714b93da | 261 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 262 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 263 | if (!obj) |
e2dec939 | 264 | return -ENOMEM; |
714b93da AK |
265 | cache->objects[cache->nobjs++] = obj; |
266 | } | |
e2dec939 | 267 | return 0; |
714b93da AK |
268 | } |
269 | ||
270 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
271 | { | |
272 | while (mc->nobjs) | |
273 | kfree(mc->objects[--mc->nobjs]); | |
274 | } | |
275 | ||
c1158e63 | 276 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 277 | int min) |
c1158e63 AK |
278 | { |
279 | struct page *page; | |
280 | ||
281 | if (cache->nobjs >= min) | |
282 | return 0; | |
283 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 284 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
285 | if (!page) |
286 | return -ENOMEM; | |
287 | set_page_private(page, 0); | |
288 | cache->objects[cache->nobjs++] = page_address(page); | |
289 | } | |
290 | return 0; | |
291 | } | |
292 | ||
293 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
294 | { | |
295 | while (mc->nobjs) | |
c4d198d5 | 296 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
297 | } |
298 | ||
2e3e5882 | 299 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 300 | { |
e2dec939 AK |
301 | int r; |
302 | ||
ad312c7c | 303 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache, |
2e3e5882 | 304 | pte_chain_cache, 4); |
e2dec939 AK |
305 | if (r) |
306 | goto out; | |
ad312c7c | 307 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, |
2e3e5882 | 308 | rmap_desc_cache, 1); |
d3d25b04 AK |
309 | if (r) |
310 | goto out; | |
ad312c7c | 311 | r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); |
d3d25b04 AK |
312 | if (r) |
313 | goto out; | |
ad312c7c | 314 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, |
2e3e5882 | 315 | mmu_page_header_cache, 4); |
e2dec939 AK |
316 | out: |
317 | return r; | |
714b93da AK |
318 | } |
319 | ||
320 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
321 | { | |
ad312c7c ZX |
322 | mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache); |
323 | mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache); | |
324 | mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); | |
325 | mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); | |
714b93da AK |
326 | } |
327 | ||
328 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
329 | size_t size) | |
330 | { | |
331 | void *p; | |
332 | ||
333 | BUG_ON(!mc->nobjs); | |
334 | p = mc->objects[--mc->nobjs]; | |
335 | memset(p, 0, size); | |
336 | return p; | |
337 | } | |
338 | ||
714b93da AK |
339 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
340 | { | |
ad312c7c | 341 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache, |
714b93da AK |
342 | sizeof(struct kvm_pte_chain)); |
343 | } | |
344 | ||
90cb0529 | 345 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 346 | { |
90cb0529 | 347 | kfree(pc); |
714b93da AK |
348 | } |
349 | ||
350 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
351 | { | |
ad312c7c | 352 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache, |
714b93da AK |
353 | sizeof(struct kvm_rmap_desc)); |
354 | } | |
355 | ||
90cb0529 | 356 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 357 | { |
90cb0529 | 358 | kfree(rd); |
714b93da AK |
359 | } |
360 | ||
05da4558 MT |
361 | /* |
362 | * Return the pointer to the largepage write count for a given | |
363 | * gfn, handling slots that are not large page aligned. | |
364 | */ | |
365 | static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot) | |
366 | { | |
367 | unsigned long idx; | |
368 | ||
369 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
370 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
371 | return &slot->lpage_info[idx].write_count; | |
372 | } | |
373 | ||
374 | static void account_shadowed(struct kvm *kvm, gfn_t gfn) | |
375 | { | |
376 | int *write_count; | |
377 | ||
378 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
379 | *write_count += 1; | |
05da4558 MT |
380 | } |
381 | ||
382 | static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn) | |
383 | { | |
384 | int *write_count; | |
385 | ||
386 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
387 | *write_count -= 1; | |
388 | WARN_ON(*write_count < 0); | |
389 | } | |
390 | ||
391 | static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn) | |
392 | { | |
393 | struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn); | |
394 | int *largepage_idx; | |
395 | ||
396 | if (slot) { | |
397 | largepage_idx = slot_largepage_idx(gfn, slot); | |
398 | return *largepage_idx; | |
399 | } | |
400 | ||
401 | return 1; | |
402 | } | |
403 | ||
404 | static int host_largepage_backed(struct kvm *kvm, gfn_t gfn) | |
405 | { | |
406 | struct vm_area_struct *vma; | |
407 | unsigned long addr; | |
4c2155ce | 408 | int ret = 0; |
05da4558 MT |
409 | |
410 | addr = gfn_to_hva(kvm, gfn); | |
411 | if (kvm_is_error_hva(addr)) | |
4c2155ce | 412 | return ret; |
05da4558 | 413 | |
4c2155ce | 414 | down_read(¤t->mm->mmap_sem); |
05da4558 MT |
415 | vma = find_vma(current->mm, addr); |
416 | if (vma && is_vm_hugetlb_page(vma)) | |
4c2155ce MT |
417 | ret = 1; |
418 | up_read(¤t->mm->mmap_sem); | |
05da4558 | 419 | |
4c2155ce | 420 | return ret; |
05da4558 MT |
421 | } |
422 | ||
423 | static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn) | |
424 | { | |
425 | struct kvm_memory_slot *slot; | |
426 | ||
427 | if (has_wrprotected_page(vcpu->kvm, large_gfn)) | |
428 | return 0; | |
429 | ||
430 | if (!host_largepage_backed(vcpu->kvm, large_gfn)) | |
431 | return 0; | |
432 | ||
433 | slot = gfn_to_memslot(vcpu->kvm, large_gfn); | |
434 | if (slot && slot->dirty_bitmap) | |
435 | return 0; | |
436 | ||
437 | return 1; | |
438 | } | |
439 | ||
290fc38d IE |
440 | /* |
441 | * Take gfn and return the reverse mapping to it. | |
442 | * Note: gfn must be unaliased before this function get called | |
443 | */ | |
444 | ||
05da4558 | 445 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage) |
290fc38d IE |
446 | { |
447 | struct kvm_memory_slot *slot; | |
05da4558 | 448 | unsigned long idx; |
290fc38d IE |
449 | |
450 | slot = gfn_to_memslot(kvm, gfn); | |
05da4558 MT |
451 | if (!lpage) |
452 | return &slot->rmap[gfn - slot->base_gfn]; | |
453 | ||
454 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
455 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
456 | ||
457 | return &slot->lpage_info[idx].rmap_pde; | |
290fc38d IE |
458 | } |
459 | ||
cd4a4e53 AK |
460 | /* |
461 | * Reverse mapping data structures: | |
462 | * | |
290fc38d IE |
463 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
464 | * that points to page_address(page). | |
cd4a4e53 | 465 | * |
290fc38d IE |
466 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
467 | * containing more mappings. | |
cd4a4e53 | 468 | */ |
05da4558 | 469 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage) |
cd4a4e53 | 470 | { |
4db35314 | 471 | struct kvm_mmu_page *sp; |
cd4a4e53 | 472 | struct kvm_rmap_desc *desc; |
290fc38d | 473 | unsigned long *rmapp; |
cd4a4e53 AK |
474 | int i; |
475 | ||
476 | if (!is_rmap_pte(*spte)) | |
477 | return; | |
290fc38d | 478 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
479 | sp = page_header(__pa(spte)); |
480 | sp->gfns[spte - sp->spt] = gfn; | |
05da4558 | 481 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage); |
290fc38d | 482 | if (!*rmapp) { |
cd4a4e53 | 483 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
484 | *rmapp = (unsigned long)spte; |
485 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 486 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 487 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 488 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 489 | desc->shadow_ptes[1] = spte; |
290fc38d | 490 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
491 | } else { |
492 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 493 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
494 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
495 | desc = desc->more; | |
496 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 497 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
498 | desc = desc->more; |
499 | } | |
500 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
501 | ; | |
502 | desc->shadow_ptes[i] = spte; | |
503 | } | |
504 | } | |
505 | ||
290fc38d | 506 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
507 | struct kvm_rmap_desc *desc, |
508 | int i, | |
509 | struct kvm_rmap_desc *prev_desc) | |
510 | { | |
511 | int j; | |
512 | ||
513 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
514 | ; | |
515 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 516 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
517 | if (j != 0) |
518 | return; | |
519 | if (!prev_desc && !desc->more) | |
290fc38d | 520 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
521 | else |
522 | if (prev_desc) | |
523 | prev_desc->more = desc->more; | |
524 | else | |
290fc38d | 525 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 526 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
527 | } |
528 | ||
290fc38d | 529 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 530 | { |
cd4a4e53 AK |
531 | struct kvm_rmap_desc *desc; |
532 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 533 | struct kvm_mmu_page *sp; |
35149e21 | 534 | pfn_t pfn; |
290fc38d | 535 | unsigned long *rmapp; |
cd4a4e53 AK |
536 | int i; |
537 | ||
538 | if (!is_rmap_pte(*spte)) | |
539 | return; | |
4db35314 | 540 | sp = page_header(__pa(spte)); |
35149e21 | 541 | pfn = spte_to_pfn(*spte); |
7b52345e | 542 | if (*spte & shadow_accessed_mask) |
35149e21 | 543 | kvm_set_pfn_accessed(pfn); |
b4231d61 | 544 | if (is_writeble_pte(*spte)) |
35149e21 | 545 | kvm_release_pfn_dirty(pfn); |
b4231d61 | 546 | else |
35149e21 | 547 | kvm_release_pfn_clean(pfn); |
05da4558 | 548 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte)); |
290fc38d | 549 | if (!*rmapp) { |
cd4a4e53 AK |
550 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
551 | BUG(); | |
290fc38d | 552 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 553 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 554 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
555 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
556 | spte, *spte); | |
557 | BUG(); | |
558 | } | |
290fc38d | 559 | *rmapp = 0; |
cd4a4e53 AK |
560 | } else { |
561 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 562 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
563 | prev_desc = NULL; |
564 | while (desc) { | |
565 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
566 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 567 | rmap_desc_remove_entry(rmapp, |
714b93da | 568 | desc, i, |
cd4a4e53 AK |
569 | prev_desc); |
570 | return; | |
571 | } | |
572 | prev_desc = desc; | |
573 | desc = desc->more; | |
574 | } | |
575 | BUG(); | |
576 | } | |
577 | } | |
578 | ||
98348e95 | 579 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 580 | { |
374cbac0 | 581 | struct kvm_rmap_desc *desc; |
98348e95 IE |
582 | struct kvm_rmap_desc *prev_desc; |
583 | u64 *prev_spte; | |
584 | int i; | |
585 | ||
586 | if (!*rmapp) | |
587 | return NULL; | |
588 | else if (!(*rmapp & 1)) { | |
589 | if (!spte) | |
590 | return (u64 *)*rmapp; | |
591 | return NULL; | |
592 | } | |
593 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
594 | prev_desc = NULL; | |
595 | prev_spte = NULL; | |
596 | while (desc) { | |
597 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) { | |
598 | if (prev_spte == spte) | |
599 | return desc->shadow_ptes[i]; | |
600 | prev_spte = desc->shadow_ptes[i]; | |
601 | } | |
602 | desc = desc->more; | |
603 | } | |
604 | return NULL; | |
605 | } | |
606 | ||
607 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) | |
608 | { | |
290fc38d | 609 | unsigned long *rmapp; |
374cbac0 | 610 | u64 *spte; |
caa5b8a5 | 611 | int write_protected = 0; |
374cbac0 | 612 | |
4a4c9924 | 613 | gfn = unalias_gfn(kvm, gfn); |
05da4558 | 614 | rmapp = gfn_to_rmap(kvm, gfn, 0); |
374cbac0 | 615 | |
98348e95 IE |
616 | spte = rmap_next(kvm, rmapp, NULL); |
617 | while (spte) { | |
374cbac0 | 618 | BUG_ON(!spte); |
374cbac0 | 619 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 620 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
caa5b8a5 | 621 | if (is_writeble_pte(*spte)) { |
9647c14c | 622 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); |
caa5b8a5 ED |
623 | write_protected = 1; |
624 | } | |
9647c14c | 625 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 | 626 | } |
855149aa | 627 | if (write_protected) { |
35149e21 | 628 | pfn_t pfn; |
855149aa IE |
629 | |
630 | spte = rmap_next(kvm, rmapp, NULL); | |
35149e21 AL |
631 | pfn = spte_to_pfn(*spte); |
632 | kvm_set_pfn_dirty(pfn); | |
855149aa IE |
633 | } |
634 | ||
05da4558 MT |
635 | /* check for huge page mappings */ |
636 | rmapp = gfn_to_rmap(kvm, gfn, 1); | |
637 | spte = rmap_next(kvm, rmapp, NULL); | |
638 | while (spte) { | |
639 | BUG_ON(!spte); | |
640 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
641 | BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)); | |
642 | pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn); | |
643 | if (is_writeble_pte(*spte)) { | |
644 | rmap_remove(kvm, spte); | |
645 | --kvm->stat.lpages; | |
646 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
6597ca09 | 647 | spte = NULL; |
05da4558 MT |
648 | write_protected = 1; |
649 | } | |
650 | spte = rmap_next(kvm, rmapp, spte); | |
651 | } | |
652 | ||
caa5b8a5 ED |
653 | if (write_protected) |
654 | kvm_flush_remote_tlbs(kvm); | |
05da4558 MT |
655 | |
656 | account_shadowed(kvm, gfn); | |
374cbac0 AK |
657 | } |
658 | ||
e930bffe AA |
659 | static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp) |
660 | { | |
661 | u64 *spte; | |
662 | int need_tlb_flush = 0; | |
663 | ||
664 | while ((spte = rmap_next(kvm, rmapp, NULL))) { | |
665 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
666 | rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte); | |
667 | rmap_remove(kvm, spte); | |
668 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
669 | need_tlb_flush = 1; | |
670 | } | |
671 | return need_tlb_flush; | |
672 | } | |
673 | ||
674 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, | |
675 | int (*handler)(struct kvm *kvm, unsigned long *rmapp)) | |
676 | { | |
677 | int i; | |
678 | int retval = 0; | |
679 | ||
680 | /* | |
681 | * If mmap_sem isn't taken, we can look the memslots with only | |
682 | * the mmu_lock by skipping over the slots with userspace_addr == 0. | |
683 | */ | |
684 | for (i = 0; i < kvm->nmemslots; i++) { | |
685 | struct kvm_memory_slot *memslot = &kvm->memslots[i]; | |
686 | unsigned long start = memslot->userspace_addr; | |
687 | unsigned long end; | |
688 | ||
689 | /* mmu_lock protects userspace_addr */ | |
690 | if (!start) | |
691 | continue; | |
692 | ||
693 | end = start + (memslot->npages << PAGE_SHIFT); | |
694 | if (hva >= start && hva < end) { | |
695 | gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT; | |
696 | retval |= handler(kvm, &memslot->rmap[gfn_offset]); | |
697 | retval |= handler(kvm, | |
698 | &memslot->lpage_info[ | |
699 | gfn_offset / | |
700 | KVM_PAGES_PER_HPAGE].rmap_pde); | |
701 | } | |
702 | } | |
703 | ||
704 | return retval; | |
705 | } | |
706 | ||
707 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
708 | { | |
709 | return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); | |
710 | } | |
711 | ||
712 | static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp) | |
713 | { | |
714 | u64 *spte; | |
715 | int young = 0; | |
716 | ||
534e38b4 SY |
717 | /* always return old for EPT */ |
718 | if (!shadow_accessed_mask) | |
719 | return 0; | |
720 | ||
e930bffe AA |
721 | spte = rmap_next(kvm, rmapp, NULL); |
722 | while (spte) { | |
723 | int _young; | |
724 | u64 _spte = *spte; | |
725 | BUG_ON(!(_spte & PT_PRESENT_MASK)); | |
726 | _young = _spte & PT_ACCESSED_MASK; | |
727 | if (_young) { | |
728 | young = 1; | |
729 | clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
730 | } | |
731 | spte = rmap_next(kvm, rmapp, spte); | |
732 | } | |
733 | return young; | |
734 | } | |
735 | ||
736 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
737 | { | |
738 | return kvm_handle_hva(kvm, hva, kvm_age_rmapp); | |
739 | } | |
740 | ||
d6c69ee9 | 741 | #ifdef MMU_DEBUG |
47ad8e68 | 742 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 743 | { |
139bdb2d AK |
744 | u64 *pos; |
745 | u64 *end; | |
746 | ||
47ad8e68 | 747 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
3c915510 | 748 | if (is_shadow_present_pte(*pos)) { |
b8688d51 | 749 | printk(KERN_ERR "%s: %p %llx\n", __func__, |
139bdb2d | 750 | pos, *pos); |
6aa8b732 | 751 | return 0; |
139bdb2d | 752 | } |
6aa8b732 AK |
753 | return 1; |
754 | } | |
d6c69ee9 | 755 | #endif |
6aa8b732 | 756 | |
4db35314 | 757 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 758 | { |
4db35314 AK |
759 | ASSERT(is_empty_shadow_page(sp->spt)); |
760 | list_del(&sp->link); | |
761 | __free_page(virt_to_page(sp->spt)); | |
762 | __free_page(virt_to_page(sp->gfns)); | |
763 | kfree(sp); | |
f05e70ac | 764 | ++kvm->arch.n_free_mmu_pages; |
260746c0 AK |
765 | } |
766 | ||
cea0f0e7 AK |
767 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
768 | { | |
1ae0a13d | 769 | return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1); |
cea0f0e7 AK |
770 | } |
771 | ||
25c0de2c AK |
772 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
773 | u64 *parent_pte) | |
6aa8b732 | 774 | { |
4db35314 | 775 | struct kvm_mmu_page *sp; |
6aa8b732 | 776 | |
ad312c7c ZX |
777 | sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp); |
778 | sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
779 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
4db35314 | 780 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
f05e70ac | 781 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
4db35314 AK |
782 | ASSERT(is_empty_shadow_page(sp->spt)); |
783 | sp->slot_bitmap = 0; | |
784 | sp->multimapped = 0; | |
785 | sp->parent_pte = parent_pte; | |
f05e70ac | 786 | --vcpu->kvm->arch.n_free_mmu_pages; |
4db35314 | 787 | return sp; |
6aa8b732 AK |
788 | } |
789 | ||
714b93da | 790 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 791 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
792 | { |
793 | struct kvm_pte_chain *pte_chain; | |
794 | struct hlist_node *node; | |
795 | int i; | |
796 | ||
797 | if (!parent_pte) | |
798 | return; | |
4db35314 AK |
799 | if (!sp->multimapped) { |
800 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
801 | |
802 | if (!old) { | |
4db35314 | 803 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
804 | return; |
805 | } | |
4db35314 | 806 | sp->multimapped = 1; |
714b93da | 807 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
808 | INIT_HLIST_HEAD(&sp->parent_ptes); |
809 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
810 | pte_chain->parent_ptes[0] = old; |
811 | } | |
4db35314 | 812 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
813 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
814 | continue; | |
815 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
816 | if (!pte_chain->parent_ptes[i]) { | |
817 | pte_chain->parent_ptes[i] = parent_pte; | |
818 | return; | |
819 | } | |
820 | } | |
714b93da | 821 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 822 | BUG_ON(!pte_chain); |
4db35314 | 823 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
824 | pte_chain->parent_ptes[0] = parent_pte; |
825 | } | |
826 | ||
4db35314 | 827 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
828 | u64 *parent_pte) |
829 | { | |
830 | struct kvm_pte_chain *pte_chain; | |
831 | struct hlist_node *node; | |
832 | int i; | |
833 | ||
4db35314 AK |
834 | if (!sp->multimapped) { |
835 | BUG_ON(sp->parent_pte != parent_pte); | |
836 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
837 | return; |
838 | } | |
4db35314 | 839 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
840 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
841 | if (!pte_chain->parent_ptes[i]) | |
842 | break; | |
843 | if (pte_chain->parent_ptes[i] != parent_pte) | |
844 | continue; | |
697fe2e2 AK |
845 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
846 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
847 | pte_chain->parent_ptes[i] |
848 | = pte_chain->parent_ptes[i + 1]; | |
849 | ++i; | |
850 | } | |
851 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
852 | if (i == 0) { |
853 | hlist_del(&pte_chain->link); | |
90cb0529 | 854 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
855 | if (hlist_empty(&sp->parent_ptes)) { |
856 | sp->multimapped = 0; | |
857 | sp->parent_pte = NULL; | |
697fe2e2 AK |
858 | } |
859 | } | |
cea0f0e7 AK |
860 | return; |
861 | } | |
862 | BUG(); | |
863 | } | |
864 | ||
d761a501 AK |
865 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
866 | struct kvm_mmu_page *sp) | |
867 | { | |
868 | int i; | |
869 | ||
870 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
871 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
872 | } | |
873 | ||
e8bc217a MT |
874 | static int nonpaging_sync_page(struct kvm_vcpu *vcpu, |
875 | struct kvm_mmu_page *sp) | |
876 | { | |
877 | return 1; | |
878 | } | |
879 | ||
4db35314 | 880 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
881 | { |
882 | unsigned index; | |
883 | struct hlist_head *bucket; | |
4db35314 | 884 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
885 | struct hlist_node *node; |
886 | ||
b8688d51 | 887 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
1ae0a13d | 888 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 889 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 890 | hlist_for_each_entry(sp, node, bucket, hash_link) |
2e53d63a MT |
891 | if (sp->gfn == gfn && !sp->role.metaphysical |
892 | && !sp->role.invalid) { | |
cea0f0e7 | 893 | pgprintk("%s: found role %x\n", |
b8688d51 | 894 | __func__, sp->role.word); |
4db35314 | 895 | return sp; |
cea0f0e7 AK |
896 | } |
897 | return NULL; | |
898 | } | |
899 | ||
900 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
901 | gfn_t gfn, | |
902 | gva_t gaddr, | |
903 | unsigned level, | |
904 | int metaphysical, | |
41074d07 | 905 | unsigned access, |
f7d9c7b7 | 906 | u64 *parent_pte) |
cea0f0e7 AK |
907 | { |
908 | union kvm_mmu_page_role role; | |
909 | unsigned index; | |
910 | unsigned quadrant; | |
911 | struct hlist_head *bucket; | |
4db35314 | 912 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
913 | struct hlist_node *node; |
914 | ||
915 | role.word = 0; | |
ad312c7c | 916 | role.glevels = vcpu->arch.mmu.root_level; |
cea0f0e7 AK |
917 | role.level = level; |
918 | role.metaphysical = metaphysical; | |
41074d07 | 919 | role.access = access; |
ad312c7c | 920 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
cea0f0e7 AK |
921 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
922 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
923 | role.quadrant = quadrant; | |
924 | } | |
b8688d51 | 925 | pgprintk("%s: looking gfn %lx role %x\n", __func__, |
cea0f0e7 | 926 | gfn, role.word); |
1ae0a13d | 927 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 928 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
929 | hlist_for_each_entry(sp, node, bucket, hash_link) |
930 | if (sp->gfn == gfn && sp->role.word == role.word) { | |
931 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | |
b8688d51 | 932 | pgprintk("%s: found\n", __func__); |
4db35314 | 933 | return sp; |
cea0f0e7 | 934 | } |
dfc5aa00 | 935 | ++vcpu->kvm->stat.mmu_cache_miss; |
4db35314 AK |
936 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
937 | if (!sp) | |
938 | return sp; | |
b8688d51 | 939 | pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word); |
4db35314 AK |
940 | sp->gfn = gfn; |
941 | sp->role = role; | |
942 | hlist_add_head(&sp->hash_link, bucket); | |
374cbac0 | 943 | if (!metaphysical) |
4a4c9924 | 944 | rmap_write_protect(vcpu->kvm, gfn); |
131d8279 AK |
945 | if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte) |
946 | vcpu->arch.mmu.prefetch_page(vcpu, sp); | |
947 | else | |
948 | nonpaging_prefetch_page(vcpu, sp); | |
4db35314 | 949 | return sp; |
cea0f0e7 AK |
950 | } |
951 | ||
3d000db5 | 952 | static int walk_shadow(struct kvm_shadow_walk *walker, |
d40a1ee4 | 953 | struct kvm_vcpu *vcpu, u64 addr) |
3d000db5 AK |
954 | { |
955 | hpa_t shadow_addr; | |
956 | int level; | |
957 | int r; | |
958 | u64 *sptep; | |
959 | unsigned index; | |
960 | ||
961 | shadow_addr = vcpu->arch.mmu.root_hpa; | |
962 | level = vcpu->arch.mmu.shadow_root_level; | |
963 | if (level == PT32E_ROOT_LEVEL) { | |
964 | shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3]; | |
965 | shadow_addr &= PT64_BASE_ADDR_MASK; | |
966 | --level; | |
967 | } | |
968 | ||
969 | while (level >= PT_PAGE_TABLE_LEVEL) { | |
970 | index = SHADOW_PT_INDEX(addr, level); | |
971 | sptep = ((u64 *)__va(shadow_addr)) + index; | |
972 | r = walker->entry(walker, vcpu, addr, sptep, level); | |
973 | if (r) | |
974 | return r; | |
975 | shadow_addr = *sptep & PT64_BASE_ADDR_MASK; | |
976 | --level; | |
977 | } | |
978 | return 0; | |
979 | } | |
980 | ||
90cb0529 | 981 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 982 | struct kvm_mmu_page *sp) |
a436036b | 983 | { |
697fe2e2 AK |
984 | unsigned i; |
985 | u64 *pt; | |
986 | u64 ent; | |
987 | ||
4db35314 | 988 | pt = sp->spt; |
697fe2e2 | 989 | |
4db35314 | 990 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { |
697fe2e2 | 991 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
c7addb90 | 992 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 993 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 994 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 AK |
995 | } |
996 | return; | |
997 | } | |
998 | ||
999 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1000 | ent = pt[i]; | |
1001 | ||
05da4558 MT |
1002 | if (is_shadow_present_pte(ent)) { |
1003 | if (!is_large_pte(ent)) { | |
1004 | ent &= PT64_BASE_ADDR_MASK; | |
1005 | mmu_page_remove_parent_pte(page_header(ent), | |
1006 | &pt[i]); | |
1007 | } else { | |
1008 | --kvm->stat.lpages; | |
1009 | rmap_remove(kvm, &pt[i]); | |
1010 | } | |
1011 | } | |
c7addb90 | 1012 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 1013 | } |
a436036b AK |
1014 | } |
1015 | ||
4db35314 | 1016 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 1017 | { |
4db35314 | 1018 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
1019 | } |
1020 | ||
12b7d28f AK |
1021 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
1022 | { | |
1023 | int i; | |
1024 | ||
1025 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
1026 | if (kvm->vcpus[i]) | |
ad312c7c | 1027 | kvm->vcpus[i]->arch.last_pte_updated = NULL; |
12b7d28f AK |
1028 | } |
1029 | ||
31aa2b44 | 1030 | static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
1031 | { |
1032 | u64 *parent_pte; | |
1033 | ||
4db35314 AK |
1034 | while (sp->multimapped || sp->parent_pte) { |
1035 | if (!sp->multimapped) | |
1036 | parent_pte = sp->parent_pte; | |
a436036b AK |
1037 | else { |
1038 | struct kvm_pte_chain *chain; | |
1039 | ||
4db35314 | 1040 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
1041 | struct kvm_pte_chain, link); |
1042 | parent_pte = chain->parent_ptes[0]; | |
1043 | } | |
697fe2e2 | 1044 | BUG_ON(!parent_pte); |
4db35314 | 1045 | kvm_mmu_put_page(sp, parent_pte); |
c7addb90 | 1046 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 1047 | } |
31aa2b44 AK |
1048 | } |
1049 | ||
1050 | static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) | |
1051 | { | |
1052 | ++kvm->stat.mmu_shadow_zapped; | |
4db35314 | 1053 | kvm_mmu_page_unlink_children(kvm, sp); |
31aa2b44 | 1054 | kvm_mmu_unlink_parents(kvm, sp); |
5b5c6a5a AK |
1055 | kvm_flush_remote_tlbs(kvm); |
1056 | if (!sp->role.invalid && !sp->role.metaphysical) | |
1057 | unaccount_shadowed(kvm, sp->gfn); | |
4db35314 AK |
1058 | if (!sp->root_count) { |
1059 | hlist_del(&sp->hash_link); | |
1060 | kvm_mmu_free_page(kvm, sp); | |
2e53d63a | 1061 | } else { |
2e53d63a | 1062 | sp->role.invalid = 1; |
5b5c6a5a | 1063 | list_move(&sp->link, &kvm->arch.active_mmu_pages); |
2e53d63a MT |
1064 | kvm_reload_remote_mmus(kvm); |
1065 | } | |
12b7d28f | 1066 | kvm_mmu_reset_last_pte_updated(kvm); |
a436036b AK |
1067 | } |
1068 | ||
82ce2c96 IE |
1069 | /* |
1070 | * Changing the number of mmu pages allocated to the vm | |
1071 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
1072 | */ | |
1073 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
1074 | { | |
1075 | /* | |
1076 | * If we set the number of mmu pages to be smaller be than the | |
1077 | * number of actived pages , we must to free some mmu pages before we | |
1078 | * change the value | |
1079 | */ | |
1080 | ||
f05e70ac | 1081 | if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) > |
82ce2c96 | 1082 | kvm_nr_mmu_pages) { |
f05e70ac ZX |
1083 | int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages |
1084 | - kvm->arch.n_free_mmu_pages; | |
82ce2c96 IE |
1085 | |
1086 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
1087 | struct kvm_mmu_page *page; | |
1088 | ||
f05e70ac | 1089 | page = container_of(kvm->arch.active_mmu_pages.prev, |
82ce2c96 IE |
1090 | struct kvm_mmu_page, link); |
1091 | kvm_mmu_zap_page(kvm, page); | |
1092 | n_used_mmu_pages--; | |
1093 | } | |
f05e70ac | 1094 | kvm->arch.n_free_mmu_pages = 0; |
82ce2c96 IE |
1095 | } |
1096 | else | |
f05e70ac ZX |
1097 | kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages |
1098 | - kvm->arch.n_alloc_mmu_pages; | |
82ce2c96 | 1099 | |
f05e70ac | 1100 | kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages; |
82ce2c96 IE |
1101 | } |
1102 | ||
f67a46f4 | 1103 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
1104 | { |
1105 | unsigned index; | |
1106 | struct hlist_head *bucket; | |
4db35314 | 1107 | struct kvm_mmu_page *sp; |
a436036b AK |
1108 | struct hlist_node *node, *n; |
1109 | int r; | |
1110 | ||
b8688d51 | 1111 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
a436036b | 1112 | r = 0; |
1ae0a13d | 1113 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1114 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
1115 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
1116 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
b8688d51 | 1117 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, |
4db35314 AK |
1118 | sp->role.word); |
1119 | kvm_mmu_zap_page(kvm, sp); | |
a436036b AK |
1120 | r = 1; |
1121 | } | |
1122 | return r; | |
cea0f0e7 AK |
1123 | } |
1124 | ||
f67a46f4 | 1125 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 1126 | { |
4db35314 | 1127 | struct kvm_mmu_page *sp; |
97a0a01e | 1128 | |
4db35314 | 1129 | while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
b8688d51 | 1130 | pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word); |
4db35314 | 1131 | kvm_mmu_zap_page(kvm, sp); |
97a0a01e AK |
1132 | } |
1133 | } | |
1134 | ||
38c335f1 | 1135 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 1136 | { |
38c335f1 | 1137 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 1138 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 1139 | |
4db35314 | 1140 | __set_bit(slot, &sp->slot_bitmap); |
6aa8b732 AK |
1141 | } |
1142 | ||
039576c0 AK |
1143 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
1144 | { | |
72dc67a6 IE |
1145 | struct page *page; |
1146 | ||
ad312c7c | 1147 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
039576c0 AK |
1148 | |
1149 | if (gpa == UNMAPPED_GVA) | |
1150 | return NULL; | |
72dc67a6 | 1151 | |
72dc67a6 | 1152 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
72dc67a6 IE |
1153 | |
1154 | return page; | |
039576c0 AK |
1155 | } |
1156 | ||
1e73f9dd MT |
1157 | static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, |
1158 | unsigned pte_access, int user_fault, | |
1159 | int write_fault, int dirty, int largepage, | |
1160 | gfn_t gfn, pfn_t pfn, bool speculative) | |
1c4f1fd6 AK |
1161 | { |
1162 | u64 spte; | |
1e73f9dd | 1163 | int ret = 0; |
1c4f1fd6 AK |
1164 | /* |
1165 | * We don't set the accessed bit, since we sometimes want to see | |
1166 | * whether the guest actually used the pte (in order to detect | |
1167 | * demand paging). | |
1168 | */ | |
7b52345e | 1169 | spte = shadow_base_present_pte | shadow_dirty_mask; |
947da538 | 1170 | if (!speculative) |
3201b5d9 | 1171 | spte |= shadow_accessed_mask; |
1c4f1fd6 AK |
1172 | if (!dirty) |
1173 | pte_access &= ~ACC_WRITE_MASK; | |
7b52345e SY |
1174 | if (pte_access & ACC_EXEC_MASK) |
1175 | spte |= shadow_x_mask; | |
1176 | else | |
1177 | spte |= shadow_nx_mask; | |
1c4f1fd6 | 1178 | if (pte_access & ACC_USER_MASK) |
7b52345e | 1179 | spte |= shadow_user_mask; |
05da4558 MT |
1180 | if (largepage) |
1181 | spte |= PT_PAGE_SIZE_MASK; | |
1c4f1fd6 | 1182 | |
35149e21 | 1183 | spte |= (u64)pfn << PAGE_SHIFT; |
1c4f1fd6 AK |
1184 | |
1185 | if ((pte_access & ACC_WRITE_MASK) | |
1186 | || (write_fault && !is_write_protection(vcpu) && !user_fault)) { | |
1187 | struct kvm_mmu_page *shadow; | |
1188 | ||
38187c83 MT |
1189 | if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) { |
1190 | ret = 1; | |
1191 | spte = shadow_trap_nonpresent_pte; | |
1192 | goto set_pte; | |
1193 | } | |
1194 | ||
1c4f1fd6 | 1195 | spte |= PT_WRITABLE_MASK; |
1c4f1fd6 AK |
1196 | |
1197 | shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); | |
38187c83 | 1198 | if (shadow) { |
1c4f1fd6 | 1199 | pgprintk("%s: found shadow page for %lx, marking ro\n", |
b8688d51 | 1200 | __func__, gfn); |
1e73f9dd | 1201 | ret = 1; |
1c4f1fd6 | 1202 | pte_access &= ~ACC_WRITE_MASK; |
a378b4e6 | 1203 | if (is_writeble_pte(spte)) |
1c4f1fd6 | 1204 | spte &= ~PT_WRITABLE_MASK; |
1c4f1fd6 AK |
1205 | } |
1206 | } | |
1207 | ||
1c4f1fd6 AK |
1208 | if (pte_access & ACC_WRITE_MASK) |
1209 | mark_page_dirty(vcpu->kvm, gfn); | |
1210 | ||
38187c83 | 1211 | set_pte: |
1c4f1fd6 | 1212 | set_shadow_pte(shadow_pte, spte); |
1e73f9dd MT |
1213 | return ret; |
1214 | } | |
1215 | ||
1216 | ||
1217 | static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, | |
1218 | unsigned pt_access, unsigned pte_access, | |
1219 | int user_fault, int write_fault, int dirty, | |
1220 | int *ptwrite, int largepage, gfn_t gfn, | |
1221 | pfn_t pfn, bool speculative) | |
1222 | { | |
1223 | int was_rmapped = 0; | |
1224 | int was_writeble = is_writeble_pte(*shadow_pte); | |
1225 | ||
1226 | pgprintk("%s: spte %llx access %x write_fault %d" | |
1227 | " user_fault %d gfn %lx\n", | |
1228 | __func__, *shadow_pte, pt_access, | |
1229 | write_fault, user_fault, gfn); | |
1230 | ||
1231 | if (is_rmap_pte(*shadow_pte)) { | |
1232 | /* | |
1233 | * If we overwrite a PTE page pointer with a 2MB PMD, unlink | |
1234 | * the parent of the now unreachable PTE. | |
1235 | */ | |
1236 | if (largepage && !is_large_pte(*shadow_pte)) { | |
1237 | struct kvm_mmu_page *child; | |
1238 | u64 pte = *shadow_pte; | |
1239 | ||
1240 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1241 | mmu_page_remove_parent_pte(child, shadow_pte); | |
1242 | } else if (pfn != spte_to_pfn(*shadow_pte)) { | |
1243 | pgprintk("hfn old %lx new %lx\n", | |
1244 | spte_to_pfn(*shadow_pte), pfn); | |
1245 | rmap_remove(vcpu->kvm, shadow_pte); | |
1246 | } else { | |
1247 | if (largepage) | |
1248 | was_rmapped = is_large_pte(*shadow_pte); | |
1249 | else | |
1250 | was_rmapped = 1; | |
1251 | } | |
1252 | } | |
1253 | if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault, | |
a378b4e6 | 1254 | dirty, largepage, gfn, pfn, speculative)) { |
1e73f9dd MT |
1255 | if (write_fault) |
1256 | *ptwrite = 1; | |
a378b4e6 MT |
1257 | kvm_x86_ops->tlb_flush(vcpu); |
1258 | } | |
1e73f9dd MT |
1259 | |
1260 | pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte); | |
1261 | pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n", | |
1262 | is_large_pte(*shadow_pte)? "2MB" : "4kB", | |
1263 | is_present_pte(*shadow_pte)?"RW":"R", gfn, | |
1264 | *shadow_pte, shadow_pte); | |
1265 | if (!was_rmapped && is_large_pte(*shadow_pte)) | |
05da4558 MT |
1266 | ++vcpu->kvm->stat.lpages; |
1267 | ||
1c4f1fd6 AK |
1268 | page_header_update_slot(vcpu->kvm, shadow_pte, gfn); |
1269 | if (!was_rmapped) { | |
05da4558 | 1270 | rmap_add(vcpu, shadow_pte, gfn, largepage); |
1c4f1fd6 | 1271 | if (!is_rmap_pte(*shadow_pte)) |
35149e21 | 1272 | kvm_release_pfn_clean(pfn); |
75e68e60 IE |
1273 | } else { |
1274 | if (was_writeble) | |
35149e21 | 1275 | kvm_release_pfn_dirty(pfn); |
75e68e60 | 1276 | else |
35149e21 | 1277 | kvm_release_pfn_clean(pfn); |
1c4f1fd6 | 1278 | } |
1b7fcd32 | 1279 | if (speculative) { |
ad312c7c | 1280 | vcpu->arch.last_pte_updated = shadow_pte; |
1b7fcd32 AK |
1281 | vcpu->arch.last_pte_gfn = gfn; |
1282 | } | |
1c4f1fd6 AK |
1283 | } |
1284 | ||
6aa8b732 AK |
1285 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
1286 | { | |
1287 | } | |
1288 | ||
140754bc AK |
1289 | struct direct_shadow_walk { |
1290 | struct kvm_shadow_walk walker; | |
1291 | pfn_t pfn; | |
1292 | int write; | |
1293 | int largepage; | |
1294 | int pt_write; | |
1295 | }; | |
6aa8b732 | 1296 | |
140754bc AK |
1297 | static int direct_map_entry(struct kvm_shadow_walk *_walk, |
1298 | struct kvm_vcpu *vcpu, | |
d40a1ee4 | 1299 | u64 addr, u64 *sptep, int level) |
140754bc AK |
1300 | { |
1301 | struct direct_shadow_walk *walk = | |
1302 | container_of(_walk, struct direct_shadow_walk, walker); | |
1303 | struct kvm_mmu_page *sp; | |
1304 | gfn_t pseudo_gfn; | |
1305 | gfn_t gfn = addr >> PAGE_SHIFT; | |
1306 | ||
1307 | if (level == PT_PAGE_TABLE_LEVEL | |
1308 | || (walk->largepage && level == PT_DIRECTORY_LEVEL)) { | |
1309 | mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL, | |
1310 | 0, walk->write, 1, &walk->pt_write, | |
1311 | walk->largepage, gfn, walk->pfn, false); | |
bc2d4299 | 1312 | ++vcpu->stat.pf_fixed; |
140754bc AK |
1313 | return 1; |
1314 | } | |
6aa8b732 | 1315 | |
140754bc AK |
1316 | if (*sptep == shadow_trap_nonpresent_pte) { |
1317 | pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
d40a1ee4 | 1318 | sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1, |
140754bc AK |
1319 | 1, ACC_ALL, sptep); |
1320 | if (!sp) { | |
1321 | pgprintk("nonpaging_map: ENOMEM\n"); | |
1322 | kvm_release_pfn_clean(walk->pfn); | |
1323 | return -ENOMEM; | |
6aa8b732 AK |
1324 | } |
1325 | ||
140754bc AK |
1326 | set_shadow_pte(sptep, |
1327 | __pa(sp->spt) | |
1328 | | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
1329 | | shadow_user_mask | shadow_x_mask); | |
6aa8b732 | 1330 | } |
140754bc AK |
1331 | return 0; |
1332 | } | |
1333 | ||
1334 | static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, | |
1335 | int largepage, gfn_t gfn, pfn_t pfn) | |
1336 | { | |
1337 | int r; | |
1338 | struct direct_shadow_walk walker = { | |
1339 | .walker = { .entry = direct_map_entry, }, | |
1340 | .pfn = pfn, | |
1341 | .largepage = largepage, | |
1342 | .write = write, | |
1343 | .pt_write = 0, | |
1344 | }; | |
1345 | ||
d40a1ee4 | 1346 | r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT); |
140754bc AK |
1347 | if (r < 0) |
1348 | return r; | |
1349 | return walker.pt_write; | |
6aa8b732 AK |
1350 | } |
1351 | ||
10589a46 MT |
1352 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) |
1353 | { | |
1354 | int r; | |
05da4558 | 1355 | int largepage = 0; |
35149e21 | 1356 | pfn_t pfn; |
e930bffe | 1357 | unsigned long mmu_seq; |
aaee2c94 | 1358 | |
05da4558 MT |
1359 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1360 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1361 | largepage = 1; | |
1362 | } | |
1363 | ||
e930bffe | 1364 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 1365 | smp_rmb(); |
35149e21 | 1366 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
aaee2c94 | 1367 | |
d196e343 | 1368 | /* mmio */ |
35149e21 AL |
1369 | if (is_error_pfn(pfn)) { |
1370 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1371 | return 1; |
1372 | } | |
1373 | ||
aaee2c94 | 1374 | spin_lock(&vcpu->kvm->mmu_lock); |
e930bffe AA |
1375 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1376 | goto out_unlock; | |
eb787d10 | 1377 | kvm_mmu_free_some_pages(vcpu); |
6c41f428 | 1378 | r = __direct_map(vcpu, v, write, largepage, gfn, pfn); |
aaee2c94 MT |
1379 | spin_unlock(&vcpu->kvm->mmu_lock); |
1380 | ||
aaee2c94 | 1381 | |
10589a46 | 1382 | return r; |
e930bffe AA |
1383 | |
1384 | out_unlock: | |
1385 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1386 | kvm_release_pfn_clean(pfn); | |
1387 | return 0; | |
10589a46 MT |
1388 | } |
1389 | ||
1390 | ||
17ac10ad AK |
1391 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
1392 | { | |
1393 | int i; | |
4db35314 | 1394 | struct kvm_mmu_page *sp; |
17ac10ad | 1395 | |
ad312c7c | 1396 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
7b53aa56 | 1397 | return; |
aaee2c94 | 1398 | spin_lock(&vcpu->kvm->mmu_lock); |
ad312c7c ZX |
1399 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1400 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad | 1401 | |
4db35314 AK |
1402 | sp = page_header(root); |
1403 | --sp->root_count; | |
2e53d63a MT |
1404 | if (!sp->root_count && sp->role.invalid) |
1405 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
ad312c7c | 1406 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
aaee2c94 | 1407 | spin_unlock(&vcpu->kvm->mmu_lock); |
17ac10ad AK |
1408 | return; |
1409 | } | |
17ac10ad | 1410 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1411 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad | 1412 | |
417726a3 | 1413 | if (root) { |
417726a3 | 1414 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
1415 | sp = page_header(root); |
1416 | --sp->root_count; | |
2e53d63a MT |
1417 | if (!sp->root_count && sp->role.invalid) |
1418 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
417726a3 | 1419 | } |
ad312c7c | 1420 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 1421 | } |
aaee2c94 | 1422 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1423 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
17ac10ad AK |
1424 | } |
1425 | ||
1426 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
1427 | { | |
1428 | int i; | |
cea0f0e7 | 1429 | gfn_t root_gfn; |
4db35314 | 1430 | struct kvm_mmu_page *sp; |
fb72d167 | 1431 | int metaphysical = 0; |
3bb65a22 | 1432 | |
ad312c7c | 1433 | root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT; |
17ac10ad | 1434 | |
ad312c7c ZX |
1435 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1436 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad AK |
1437 | |
1438 | ASSERT(!VALID_PAGE(root)); | |
fb72d167 JR |
1439 | if (tdp_enabled) |
1440 | metaphysical = 1; | |
4db35314 | 1441 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
fb72d167 JR |
1442 | PT64_ROOT_LEVEL, metaphysical, |
1443 | ACC_ALL, NULL); | |
4db35314 AK |
1444 | root = __pa(sp->spt); |
1445 | ++sp->root_count; | |
ad312c7c | 1446 | vcpu->arch.mmu.root_hpa = root; |
17ac10ad AK |
1447 | return; |
1448 | } | |
fb72d167 JR |
1449 | metaphysical = !is_paging(vcpu); |
1450 | if (tdp_enabled) | |
1451 | metaphysical = 1; | |
17ac10ad | 1452 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1453 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad AK |
1454 | |
1455 | ASSERT(!VALID_PAGE(root)); | |
ad312c7c ZX |
1456 | if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) { |
1457 | if (!is_present_pte(vcpu->arch.pdptrs[i])) { | |
1458 | vcpu->arch.mmu.pae_root[i] = 0; | |
417726a3 AK |
1459 | continue; |
1460 | } | |
ad312c7c ZX |
1461 | root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT; |
1462 | } else if (vcpu->arch.mmu.root_level == 0) | |
cea0f0e7 | 1463 | root_gfn = 0; |
4db35314 | 1464 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
fb72d167 | 1465 | PT32_ROOT_LEVEL, metaphysical, |
f7d9c7b7 | 1466 | ACC_ALL, NULL); |
4db35314 AK |
1467 | root = __pa(sp->spt); |
1468 | ++sp->root_count; | |
ad312c7c | 1469 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
17ac10ad | 1470 | } |
ad312c7c | 1471 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
17ac10ad AK |
1472 | } |
1473 | ||
0ba73cda MT |
1474 | static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) |
1475 | { | |
1476 | } | |
1477 | ||
1478 | static void mmu_sync_roots(struct kvm_vcpu *vcpu) | |
1479 | { | |
1480 | int i; | |
1481 | struct kvm_mmu_page *sp; | |
1482 | ||
1483 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) | |
1484 | return; | |
1485 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
1486 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
1487 | sp = page_header(root); | |
1488 | mmu_sync_children(vcpu, sp); | |
1489 | return; | |
1490 | } | |
1491 | for (i = 0; i < 4; ++i) { | |
1492 | hpa_t root = vcpu->arch.mmu.pae_root[i]; | |
1493 | ||
1494 | if (root) { | |
1495 | root &= PT64_BASE_ADDR_MASK; | |
1496 | sp = page_header(root); | |
1497 | mmu_sync_children(vcpu, sp); | |
1498 | } | |
1499 | } | |
1500 | } | |
1501 | ||
1502 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) | |
1503 | { | |
1504 | spin_lock(&vcpu->kvm->mmu_lock); | |
1505 | mmu_sync_roots(vcpu); | |
1506 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1507 | } | |
1508 | ||
6aa8b732 AK |
1509 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1510 | { | |
1511 | return vaddr; | |
1512 | } | |
1513 | ||
1514 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 1515 | u32 error_code) |
6aa8b732 | 1516 | { |
e833240f | 1517 | gfn_t gfn; |
e2dec939 | 1518 | int r; |
6aa8b732 | 1519 | |
b8688d51 | 1520 | pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code); |
e2dec939 AK |
1521 | r = mmu_topup_memory_caches(vcpu); |
1522 | if (r) | |
1523 | return r; | |
714b93da | 1524 | |
6aa8b732 | 1525 | ASSERT(vcpu); |
ad312c7c | 1526 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 1527 | |
e833240f | 1528 | gfn = gva >> PAGE_SHIFT; |
6aa8b732 | 1529 | |
e833240f AK |
1530 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
1531 | error_code & PFERR_WRITE_MASK, gfn); | |
6aa8b732 AK |
1532 | } |
1533 | ||
fb72d167 JR |
1534 | static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, |
1535 | u32 error_code) | |
1536 | { | |
35149e21 | 1537 | pfn_t pfn; |
fb72d167 | 1538 | int r; |
05da4558 MT |
1539 | int largepage = 0; |
1540 | gfn_t gfn = gpa >> PAGE_SHIFT; | |
e930bffe | 1541 | unsigned long mmu_seq; |
fb72d167 JR |
1542 | |
1543 | ASSERT(vcpu); | |
1544 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); | |
1545 | ||
1546 | r = mmu_topup_memory_caches(vcpu); | |
1547 | if (r) | |
1548 | return r; | |
1549 | ||
05da4558 MT |
1550 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1551 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1552 | largepage = 1; | |
1553 | } | |
e930bffe | 1554 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 1555 | smp_rmb(); |
35149e21 | 1556 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
35149e21 AL |
1557 | if (is_error_pfn(pfn)) { |
1558 | kvm_release_pfn_clean(pfn); | |
fb72d167 JR |
1559 | return 1; |
1560 | } | |
1561 | spin_lock(&vcpu->kvm->mmu_lock); | |
e930bffe AA |
1562 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1563 | goto out_unlock; | |
fb72d167 JR |
1564 | kvm_mmu_free_some_pages(vcpu); |
1565 | r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK, | |
6c41f428 | 1566 | largepage, gfn, pfn); |
fb72d167 | 1567 | spin_unlock(&vcpu->kvm->mmu_lock); |
fb72d167 JR |
1568 | |
1569 | return r; | |
e930bffe AA |
1570 | |
1571 | out_unlock: | |
1572 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1573 | kvm_release_pfn_clean(pfn); | |
1574 | return 0; | |
fb72d167 JR |
1575 | } |
1576 | ||
6aa8b732 AK |
1577 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1578 | { | |
17ac10ad | 1579 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1580 | } |
1581 | ||
1582 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1583 | { | |
ad312c7c | 1584 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1585 | |
1586 | context->new_cr3 = nonpaging_new_cr3; | |
1587 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1588 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1589 | context->free = nonpaging_free; | |
c7addb90 | 1590 | context->prefetch_page = nonpaging_prefetch_page; |
e8bc217a | 1591 | context->sync_page = nonpaging_sync_page; |
cea0f0e7 | 1592 | context->root_level = 0; |
6aa8b732 | 1593 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1594 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1595 | return 0; |
1596 | } | |
1597 | ||
d835dfec | 1598 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 1599 | { |
1165f5fe | 1600 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1601 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1602 | } |
1603 | ||
1604 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1605 | { | |
b8688d51 | 1606 | pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3); |
cea0f0e7 | 1607 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1608 | } |
1609 | ||
6aa8b732 AK |
1610 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1611 | u64 addr, | |
1612 | u32 err_code) | |
1613 | { | |
c3c91fee | 1614 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1615 | } |
1616 | ||
6aa8b732 AK |
1617 | static void paging_free(struct kvm_vcpu *vcpu) |
1618 | { | |
1619 | nonpaging_free(vcpu); | |
1620 | } | |
1621 | ||
1622 | #define PTTYPE 64 | |
1623 | #include "paging_tmpl.h" | |
1624 | #undef PTTYPE | |
1625 | ||
1626 | #define PTTYPE 32 | |
1627 | #include "paging_tmpl.h" | |
1628 | #undef PTTYPE | |
1629 | ||
17ac10ad | 1630 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 | 1631 | { |
ad312c7c | 1632 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1633 | |
1634 | ASSERT(is_pae(vcpu)); | |
1635 | context->new_cr3 = paging_new_cr3; | |
1636 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1637 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1638 | context->prefetch_page = paging64_prefetch_page; |
e8bc217a | 1639 | context->sync_page = paging64_sync_page; |
6aa8b732 | 1640 | context->free = paging_free; |
17ac10ad AK |
1641 | context->root_level = level; |
1642 | context->shadow_root_level = level; | |
17c3ba9d | 1643 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1644 | return 0; |
1645 | } | |
1646 | ||
17ac10ad AK |
1647 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1648 | { | |
1649 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1650 | } | |
1651 | ||
6aa8b732 AK |
1652 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1653 | { | |
ad312c7c | 1654 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1655 | |
1656 | context->new_cr3 = paging_new_cr3; | |
1657 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1658 | context->gva_to_gpa = paging32_gva_to_gpa; |
1659 | context->free = paging_free; | |
c7addb90 | 1660 | context->prefetch_page = paging32_prefetch_page; |
e8bc217a | 1661 | context->sync_page = paging32_sync_page; |
6aa8b732 AK |
1662 | context->root_level = PT32_ROOT_LEVEL; |
1663 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1664 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1665 | return 0; |
1666 | } | |
1667 | ||
1668 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1669 | { | |
17ac10ad | 1670 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1671 | } |
1672 | ||
fb72d167 JR |
1673 | static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) |
1674 | { | |
1675 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
1676 | ||
1677 | context->new_cr3 = nonpaging_new_cr3; | |
1678 | context->page_fault = tdp_page_fault; | |
1679 | context->free = nonpaging_free; | |
1680 | context->prefetch_page = nonpaging_prefetch_page; | |
e8bc217a | 1681 | context->sync_page = nonpaging_sync_page; |
67253af5 | 1682 | context->shadow_root_level = kvm_x86_ops->get_tdp_level(); |
fb72d167 JR |
1683 | context->root_hpa = INVALID_PAGE; |
1684 | ||
1685 | if (!is_paging(vcpu)) { | |
1686 | context->gva_to_gpa = nonpaging_gva_to_gpa; | |
1687 | context->root_level = 0; | |
1688 | } else if (is_long_mode(vcpu)) { | |
1689 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1690 | context->root_level = PT64_ROOT_LEVEL; | |
1691 | } else if (is_pae(vcpu)) { | |
1692 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1693 | context->root_level = PT32E_ROOT_LEVEL; | |
1694 | } else { | |
1695 | context->gva_to_gpa = paging32_gva_to_gpa; | |
1696 | context->root_level = PT32_ROOT_LEVEL; | |
1697 | } | |
1698 | ||
1699 | return 0; | |
1700 | } | |
1701 | ||
1702 | static int init_kvm_softmmu(struct kvm_vcpu *vcpu) | |
6aa8b732 AK |
1703 | { |
1704 | ASSERT(vcpu); | |
ad312c7c | 1705 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 AK |
1706 | |
1707 | if (!is_paging(vcpu)) | |
1708 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1709 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1710 | return paging64_init_context(vcpu); |
1711 | else if (is_pae(vcpu)) | |
1712 | return paging32E_init_context(vcpu); | |
1713 | else | |
1714 | return paging32_init_context(vcpu); | |
1715 | } | |
1716 | ||
fb72d167 JR |
1717 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) |
1718 | { | |
35149e21 AL |
1719 | vcpu->arch.update_pte.pfn = bad_pfn; |
1720 | ||
fb72d167 JR |
1721 | if (tdp_enabled) |
1722 | return init_kvm_tdp_mmu(vcpu); | |
1723 | else | |
1724 | return init_kvm_softmmu(vcpu); | |
1725 | } | |
1726 | ||
6aa8b732 AK |
1727 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) |
1728 | { | |
1729 | ASSERT(vcpu); | |
ad312c7c ZX |
1730 | if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) { |
1731 | vcpu->arch.mmu.free(vcpu); | |
1732 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; | |
6aa8b732 AK |
1733 | } |
1734 | } | |
1735 | ||
1736 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1737 | { |
1738 | destroy_kvm_mmu(vcpu); | |
1739 | return init_kvm_mmu(vcpu); | |
1740 | } | |
8668a3c4 | 1741 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1742 | |
1743 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1744 | { |
714b93da AK |
1745 | int r; |
1746 | ||
e2dec939 | 1747 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1748 | if (r) |
1749 | goto out; | |
aaee2c94 | 1750 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 1751 | kvm_mmu_free_some_pages(vcpu); |
17c3ba9d | 1752 | mmu_alloc_roots(vcpu); |
0ba73cda | 1753 | mmu_sync_roots(vcpu); |
aaee2c94 | 1754 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1755 | kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); |
17c3ba9d | 1756 | kvm_mmu_flush_tlb(vcpu); |
714b93da AK |
1757 | out: |
1758 | return r; | |
6aa8b732 | 1759 | } |
17c3ba9d AK |
1760 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1761 | ||
1762 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1763 | { | |
1764 | mmu_free_roots(vcpu); | |
1765 | } | |
6aa8b732 | 1766 | |
09072daf | 1767 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1768 | struct kvm_mmu_page *sp, |
ac1b714e AK |
1769 | u64 *spte) |
1770 | { | |
1771 | u64 pte; | |
1772 | struct kvm_mmu_page *child; | |
1773 | ||
1774 | pte = *spte; | |
c7addb90 | 1775 | if (is_shadow_present_pte(pte)) { |
05da4558 MT |
1776 | if (sp->role.level == PT_PAGE_TABLE_LEVEL || |
1777 | is_large_pte(pte)) | |
290fc38d | 1778 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1779 | else { |
1780 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1781 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1782 | } |
1783 | } | |
c7addb90 | 1784 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
05da4558 MT |
1785 | if (is_large_pte(pte)) |
1786 | --vcpu->kvm->stat.lpages; | |
ac1b714e AK |
1787 | } |
1788 | ||
0028425f | 1789 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1790 | struct kvm_mmu_page *sp, |
0028425f | 1791 | u64 *spte, |
489f1d65 | 1792 | const void *new) |
0028425f | 1793 | { |
30945387 MT |
1794 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
1795 | if (!vcpu->arch.update_pte.largepage || | |
1796 | sp->role.glevels == PT32_ROOT_LEVEL) { | |
1797 | ++vcpu->kvm->stat.mmu_pde_zapped; | |
1798 | return; | |
1799 | } | |
1800 | } | |
0028425f | 1801 | |
4cee5764 | 1802 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 | 1803 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
489f1d65 | 1804 | paging32_update_pte(vcpu, sp, spte, new); |
0028425f | 1805 | else |
489f1d65 | 1806 | paging64_update_pte(vcpu, sp, spte, new); |
0028425f AK |
1807 | } |
1808 | ||
79539cec AK |
1809 | static bool need_remote_flush(u64 old, u64 new) |
1810 | { | |
1811 | if (!is_shadow_present_pte(old)) | |
1812 | return false; | |
1813 | if (!is_shadow_present_pte(new)) | |
1814 | return true; | |
1815 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
1816 | return true; | |
1817 | old ^= PT64_NX_MASK; | |
1818 | new ^= PT64_NX_MASK; | |
1819 | return (old & ~new & PT64_PERM_MASK) != 0; | |
1820 | } | |
1821 | ||
1822 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
1823 | { | |
1824 | if (need_remote_flush(old, new)) | |
1825 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1826 | else | |
1827 | kvm_mmu_flush_tlb(vcpu); | |
1828 | } | |
1829 | ||
12b7d28f AK |
1830 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1831 | { | |
ad312c7c | 1832 | u64 *spte = vcpu->arch.last_pte_updated; |
12b7d28f | 1833 | |
7b52345e | 1834 | return !!(spte && (*spte & shadow_accessed_mask)); |
12b7d28f AK |
1835 | } |
1836 | ||
d7824fff AK |
1837 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
1838 | const u8 *new, int bytes) | |
1839 | { | |
1840 | gfn_t gfn; | |
1841 | int r; | |
1842 | u64 gpte = 0; | |
35149e21 | 1843 | pfn_t pfn; |
d7824fff | 1844 | |
05da4558 MT |
1845 | vcpu->arch.update_pte.largepage = 0; |
1846 | ||
d7824fff AK |
1847 | if (bytes != 4 && bytes != 8) |
1848 | return; | |
1849 | ||
1850 | /* | |
1851 | * Assume that the pte write on a page table of the same type | |
1852 | * as the current vcpu paging mode. This is nearly always true | |
1853 | * (might be false while changing modes). Note it is verified later | |
1854 | * by update_pte(). | |
1855 | */ | |
1856 | if (is_pae(vcpu)) { | |
1857 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | |
1858 | if ((bytes == 4) && (gpa % 4 == 0)) { | |
1859 | r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8); | |
1860 | if (r) | |
1861 | return; | |
1862 | memcpy((void *)&gpte + (gpa % 8), new, 4); | |
1863 | } else if ((bytes == 8) && (gpa % 8 == 0)) { | |
1864 | memcpy((void *)&gpte, new, 8); | |
1865 | } | |
1866 | } else { | |
1867 | if ((bytes == 4) && (gpa % 4 == 0)) | |
1868 | memcpy((void *)&gpte, new, 4); | |
1869 | } | |
1870 | if (!is_present_pte(gpte)) | |
1871 | return; | |
1872 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
72dc67a6 | 1873 | |
05da4558 MT |
1874 | if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) { |
1875 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1876 | vcpu->arch.update_pte.largepage = 1; | |
1877 | } | |
e930bffe | 1878 | vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 1879 | smp_rmb(); |
35149e21 | 1880 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
72dc67a6 | 1881 | |
35149e21 AL |
1882 | if (is_error_pfn(pfn)) { |
1883 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1884 | return; |
1885 | } | |
d7824fff | 1886 | vcpu->arch.update_pte.gfn = gfn; |
35149e21 | 1887 | vcpu->arch.update_pte.pfn = pfn; |
d7824fff AK |
1888 | } |
1889 | ||
1b7fcd32 AK |
1890 | static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn) |
1891 | { | |
1892 | u64 *spte = vcpu->arch.last_pte_updated; | |
1893 | ||
1894 | if (spte | |
1895 | && vcpu->arch.last_pte_gfn == gfn | |
1896 | && shadow_accessed_mask | |
1897 | && !(*spte & shadow_accessed_mask) | |
1898 | && is_shadow_present_pte(*spte)) | |
1899 | set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
1900 | } | |
1901 | ||
09072daf | 1902 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1903 | const u8 *new, int bytes) |
da4a00f0 | 1904 | { |
9b7a0325 | 1905 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 1906 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 1907 | struct hlist_node *node, *n; |
9b7a0325 AK |
1908 | struct hlist_head *bucket; |
1909 | unsigned index; | |
489f1d65 | 1910 | u64 entry, gentry; |
9b7a0325 | 1911 | u64 *spte; |
9b7a0325 | 1912 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1913 | unsigned pte_size; |
9b7a0325 | 1914 | unsigned page_offset; |
0e7bc4b9 | 1915 | unsigned misaligned; |
fce0657f | 1916 | unsigned quadrant; |
9b7a0325 | 1917 | int level; |
86a5ba02 | 1918 | int flooded = 0; |
ac1b714e | 1919 | int npte; |
489f1d65 | 1920 | int r; |
9b7a0325 | 1921 | |
b8688d51 | 1922 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
d7824fff | 1923 | mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes); |
aaee2c94 | 1924 | spin_lock(&vcpu->kvm->mmu_lock); |
1b7fcd32 | 1925 | kvm_mmu_access_page(vcpu, gfn); |
eb787d10 | 1926 | kvm_mmu_free_some_pages(vcpu); |
4cee5764 | 1927 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 1928 | kvm_mmu_audit(vcpu, "pre pte write"); |
ad312c7c | 1929 | if (gfn == vcpu->arch.last_pt_write_gfn |
12b7d28f | 1930 | && !last_updated_pte_accessed(vcpu)) { |
ad312c7c ZX |
1931 | ++vcpu->arch.last_pt_write_count; |
1932 | if (vcpu->arch.last_pt_write_count >= 3) | |
86a5ba02 AK |
1933 | flooded = 1; |
1934 | } else { | |
ad312c7c ZX |
1935 | vcpu->arch.last_pt_write_gfn = gfn; |
1936 | vcpu->arch.last_pt_write_count = 1; | |
1937 | vcpu->arch.last_pte_updated = NULL; | |
86a5ba02 | 1938 | } |
1ae0a13d | 1939 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1940 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 | 1941 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
5b5c6a5a | 1942 | if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid) |
9b7a0325 | 1943 | continue; |
4db35314 | 1944 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 1945 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 1946 | misaligned |= bytes < 4; |
86a5ba02 | 1947 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1948 | /* |
1949 | * Misaligned accesses are too much trouble to fix | |
1950 | * up; also, they usually indicate a page is not used | |
1951 | * as a page table. | |
86a5ba02 AK |
1952 | * |
1953 | * If we're seeing too many writes to a page, | |
1954 | * it may no longer be a page table, or we may be | |
1955 | * forking, in which case it is better to unmap the | |
1956 | * page. | |
0e7bc4b9 AK |
1957 | */ |
1958 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 AK |
1959 | gpa, bytes, sp->role.word); |
1960 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1961 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
1962 | continue; |
1963 | } | |
9b7a0325 | 1964 | page_offset = offset; |
4db35314 | 1965 | level = sp->role.level; |
ac1b714e | 1966 | npte = 1; |
4db35314 | 1967 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1968 | page_offset <<= 1; /* 32->64 */ |
1969 | /* | |
1970 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1971 | * only 2MB. So we need to double the offset again | |
1972 | * and zap two pdes instead of one. | |
1973 | */ | |
1974 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1975 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1976 | page_offset <<= 1; |
1977 | npte = 2; | |
1978 | } | |
fce0657f | 1979 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1980 | page_offset &= ~PAGE_MASK; |
4db35314 | 1981 | if (quadrant != sp->role.quadrant) |
fce0657f | 1982 | continue; |
9b7a0325 | 1983 | } |
4db35314 | 1984 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
489f1d65 DE |
1985 | if ((gpa & (pte_size - 1)) || (bytes < pte_size)) { |
1986 | gentry = 0; | |
1987 | r = kvm_read_guest_atomic(vcpu->kvm, | |
1988 | gpa & ~(u64)(pte_size - 1), | |
1989 | &gentry, pte_size); | |
1990 | new = (const void *)&gentry; | |
1991 | if (r < 0) | |
1992 | new = NULL; | |
1993 | } | |
ac1b714e | 1994 | while (npte--) { |
79539cec | 1995 | entry = *spte; |
4db35314 | 1996 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
489f1d65 DE |
1997 | if (new) |
1998 | mmu_pte_write_new_pte(vcpu, sp, spte, new); | |
79539cec | 1999 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 2000 | ++spte; |
9b7a0325 | 2001 | } |
9b7a0325 | 2002 | } |
c7addb90 | 2003 | kvm_mmu_audit(vcpu, "post pte write"); |
aaee2c94 | 2004 | spin_unlock(&vcpu->kvm->mmu_lock); |
35149e21 AL |
2005 | if (!is_error_pfn(vcpu->arch.update_pte.pfn)) { |
2006 | kvm_release_pfn_clean(vcpu->arch.update_pte.pfn); | |
2007 | vcpu->arch.update_pte.pfn = bad_pfn; | |
d7824fff | 2008 | } |
da4a00f0 AK |
2009 | } |
2010 | ||
a436036b AK |
2011 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
2012 | { | |
10589a46 MT |
2013 | gpa_t gpa; |
2014 | int r; | |
a436036b | 2015 | |
10589a46 | 2016 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
10589a46 | 2017 | |
aaee2c94 | 2018 | spin_lock(&vcpu->kvm->mmu_lock); |
10589a46 | 2019 | r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
aaee2c94 | 2020 | spin_unlock(&vcpu->kvm->mmu_lock); |
10589a46 | 2021 | return r; |
a436036b | 2022 | } |
577bdc49 | 2023 | EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); |
a436036b | 2024 | |
22d95b12 | 2025 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 | 2026 | { |
f05e70ac | 2027 | while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) { |
4db35314 | 2028 | struct kvm_mmu_page *sp; |
ebeace86 | 2029 | |
f05e70ac | 2030 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev, |
4db35314 AK |
2031 | struct kvm_mmu_page, link); |
2032 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 2033 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
2034 | } |
2035 | } | |
ebeace86 | 2036 | |
3067714c AK |
2037 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
2038 | { | |
2039 | int r; | |
2040 | enum emulation_result er; | |
2041 | ||
ad312c7c | 2042 | r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code); |
3067714c AK |
2043 | if (r < 0) |
2044 | goto out; | |
2045 | ||
2046 | if (!r) { | |
2047 | r = 1; | |
2048 | goto out; | |
2049 | } | |
2050 | ||
b733bfb5 AK |
2051 | r = mmu_topup_memory_caches(vcpu); |
2052 | if (r) | |
2053 | goto out; | |
2054 | ||
3067714c | 2055 | er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0); |
3067714c AK |
2056 | |
2057 | switch (er) { | |
2058 | case EMULATE_DONE: | |
2059 | return 1; | |
2060 | case EMULATE_DO_MMIO: | |
2061 | ++vcpu->stat.mmio_exits; | |
2062 | return 0; | |
2063 | case EMULATE_FAIL: | |
2064 | kvm_report_emulation_failure(vcpu, "pagetable"); | |
2065 | return 1; | |
2066 | default: | |
2067 | BUG(); | |
2068 | } | |
2069 | out: | |
3067714c AK |
2070 | return r; |
2071 | } | |
2072 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
2073 | ||
18552672 JR |
2074 | void kvm_enable_tdp(void) |
2075 | { | |
2076 | tdp_enabled = true; | |
2077 | } | |
2078 | EXPORT_SYMBOL_GPL(kvm_enable_tdp); | |
2079 | ||
5f4cb662 JR |
2080 | void kvm_disable_tdp(void) |
2081 | { | |
2082 | tdp_enabled = false; | |
2083 | } | |
2084 | EXPORT_SYMBOL_GPL(kvm_disable_tdp); | |
2085 | ||
6aa8b732 AK |
2086 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
2087 | { | |
4db35314 | 2088 | struct kvm_mmu_page *sp; |
6aa8b732 | 2089 | |
f05e70ac ZX |
2090 | while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) { |
2091 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.next, | |
4db35314 AK |
2092 | struct kvm_mmu_page, link); |
2093 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
8d2d73b9 | 2094 | cond_resched(); |
f51234c2 | 2095 | } |
ad312c7c | 2096 | free_page((unsigned long)vcpu->arch.mmu.pae_root); |
6aa8b732 AK |
2097 | } |
2098 | ||
2099 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
2100 | { | |
17ac10ad | 2101 | struct page *page; |
6aa8b732 AK |
2102 | int i; |
2103 | ||
2104 | ASSERT(vcpu); | |
2105 | ||
f05e70ac ZX |
2106 | if (vcpu->kvm->arch.n_requested_mmu_pages) |
2107 | vcpu->kvm->arch.n_free_mmu_pages = | |
2108 | vcpu->kvm->arch.n_requested_mmu_pages; | |
82ce2c96 | 2109 | else |
f05e70ac ZX |
2110 | vcpu->kvm->arch.n_free_mmu_pages = |
2111 | vcpu->kvm->arch.n_alloc_mmu_pages; | |
17ac10ad AK |
2112 | /* |
2113 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
2114 | * Therefore we need to allocate shadow page tables in the first | |
2115 | * 4GB of memory, which happens to fit the DMA32 zone. | |
2116 | */ | |
2117 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
2118 | if (!page) | |
2119 | goto error_1; | |
ad312c7c | 2120 | vcpu->arch.mmu.pae_root = page_address(page); |
17ac10ad | 2121 | for (i = 0; i < 4; ++i) |
ad312c7c | 2122 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 2123 | |
6aa8b732 AK |
2124 | return 0; |
2125 | ||
2126 | error_1: | |
2127 | free_mmu_pages(vcpu); | |
2128 | return -ENOMEM; | |
2129 | } | |
2130 | ||
8018c27b | 2131 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 2132 | { |
6aa8b732 | 2133 | ASSERT(vcpu); |
ad312c7c | 2134 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 2135 | |
8018c27b IM |
2136 | return alloc_mmu_pages(vcpu); |
2137 | } | |
6aa8b732 | 2138 | |
8018c27b IM |
2139 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
2140 | { | |
2141 | ASSERT(vcpu); | |
ad312c7c | 2142 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
2c264957 | 2143 | |
8018c27b | 2144 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
2145 | } |
2146 | ||
2147 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
2148 | { | |
2149 | ASSERT(vcpu); | |
2150 | ||
2151 | destroy_kvm_mmu(vcpu); | |
2152 | free_mmu_pages(vcpu); | |
714b93da | 2153 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
2154 | } |
2155 | ||
90cb0529 | 2156 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 2157 | { |
4db35314 | 2158 | struct kvm_mmu_page *sp; |
6aa8b732 | 2159 | |
2245a28f | 2160 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 2161 | list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) { |
6aa8b732 AK |
2162 | int i; |
2163 | u64 *pt; | |
2164 | ||
4db35314 | 2165 | if (!test_bit(slot, &sp->slot_bitmap)) |
6aa8b732 AK |
2166 | continue; |
2167 | ||
4db35314 | 2168 | pt = sp->spt; |
6aa8b732 AK |
2169 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
2170 | /* avoid RMW */ | |
9647c14c | 2171 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 2172 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 | 2173 | } |
171d595d | 2174 | kvm_flush_remote_tlbs(kvm); |
2245a28f | 2175 | spin_unlock(&kvm->mmu_lock); |
6aa8b732 | 2176 | } |
37a7d8b0 | 2177 | |
90cb0529 | 2178 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 2179 | { |
4db35314 | 2180 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 2181 | |
aaee2c94 | 2182 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 2183 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) |
4db35314 | 2184 | kvm_mmu_zap_page(kvm, sp); |
aaee2c94 | 2185 | spin_unlock(&kvm->mmu_lock); |
e0fa826f | 2186 | |
90cb0529 | 2187 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
2188 | } |
2189 | ||
8b2cf73c | 2190 | static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm) |
3ee16c81 IE |
2191 | { |
2192 | struct kvm_mmu_page *page; | |
2193 | ||
2194 | page = container_of(kvm->arch.active_mmu_pages.prev, | |
2195 | struct kvm_mmu_page, link); | |
2196 | kvm_mmu_zap_page(kvm, page); | |
2197 | } | |
2198 | ||
2199 | static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | |
2200 | { | |
2201 | struct kvm *kvm; | |
2202 | struct kvm *kvm_freed = NULL; | |
2203 | int cache_count = 0; | |
2204 | ||
2205 | spin_lock(&kvm_lock); | |
2206 | ||
2207 | list_for_each_entry(kvm, &vm_list, vm_list) { | |
2208 | int npages; | |
2209 | ||
5a4c9288 MT |
2210 | if (!down_read_trylock(&kvm->slots_lock)) |
2211 | continue; | |
3ee16c81 IE |
2212 | spin_lock(&kvm->mmu_lock); |
2213 | npages = kvm->arch.n_alloc_mmu_pages - | |
2214 | kvm->arch.n_free_mmu_pages; | |
2215 | cache_count += npages; | |
2216 | if (!kvm_freed && nr_to_scan > 0 && npages > 0) { | |
2217 | kvm_mmu_remove_one_alloc_mmu_page(kvm); | |
2218 | cache_count--; | |
2219 | kvm_freed = kvm; | |
2220 | } | |
2221 | nr_to_scan--; | |
2222 | ||
2223 | spin_unlock(&kvm->mmu_lock); | |
5a4c9288 | 2224 | up_read(&kvm->slots_lock); |
3ee16c81 IE |
2225 | } |
2226 | if (kvm_freed) | |
2227 | list_move_tail(&kvm_freed->vm_list, &vm_list); | |
2228 | ||
2229 | spin_unlock(&kvm_lock); | |
2230 | ||
2231 | return cache_count; | |
2232 | } | |
2233 | ||
2234 | static struct shrinker mmu_shrinker = { | |
2235 | .shrink = mmu_shrink, | |
2236 | .seeks = DEFAULT_SEEKS * 10, | |
2237 | }; | |
2238 | ||
2ddfd20e | 2239 | static void mmu_destroy_caches(void) |
b5a33a75 AK |
2240 | { |
2241 | if (pte_chain_cache) | |
2242 | kmem_cache_destroy(pte_chain_cache); | |
2243 | if (rmap_desc_cache) | |
2244 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
2245 | if (mmu_page_header_cache) |
2246 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
2247 | } |
2248 | ||
3ee16c81 IE |
2249 | void kvm_mmu_module_exit(void) |
2250 | { | |
2251 | mmu_destroy_caches(); | |
2252 | unregister_shrinker(&mmu_shrinker); | |
2253 | } | |
2254 | ||
b5a33a75 AK |
2255 | int kvm_mmu_module_init(void) |
2256 | { | |
2257 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
2258 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 2259 | 0, 0, NULL); |
b5a33a75 AK |
2260 | if (!pte_chain_cache) |
2261 | goto nomem; | |
2262 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
2263 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 2264 | 0, 0, NULL); |
b5a33a75 AK |
2265 | if (!rmap_desc_cache) |
2266 | goto nomem; | |
2267 | ||
d3d25b04 AK |
2268 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
2269 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 2270 | 0, 0, NULL); |
d3d25b04 AK |
2271 | if (!mmu_page_header_cache) |
2272 | goto nomem; | |
2273 | ||
3ee16c81 IE |
2274 | register_shrinker(&mmu_shrinker); |
2275 | ||
b5a33a75 AK |
2276 | return 0; |
2277 | ||
2278 | nomem: | |
3ee16c81 | 2279 | mmu_destroy_caches(); |
b5a33a75 AK |
2280 | return -ENOMEM; |
2281 | } | |
2282 | ||
3ad82a7e ZX |
2283 | /* |
2284 | * Caculate mmu pages needed for kvm. | |
2285 | */ | |
2286 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
2287 | { | |
2288 | int i; | |
2289 | unsigned int nr_mmu_pages; | |
2290 | unsigned int nr_pages = 0; | |
2291 | ||
2292 | for (i = 0; i < kvm->nmemslots; i++) | |
2293 | nr_pages += kvm->memslots[i].npages; | |
2294 | ||
2295 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
2296 | nr_mmu_pages = max(nr_mmu_pages, | |
2297 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
2298 | ||
2299 | return nr_mmu_pages; | |
2300 | } | |
2301 | ||
2f333bcb MT |
2302 | static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer, |
2303 | unsigned len) | |
2304 | { | |
2305 | if (len > buffer->len) | |
2306 | return NULL; | |
2307 | return buffer->ptr; | |
2308 | } | |
2309 | ||
2310 | static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer, | |
2311 | unsigned len) | |
2312 | { | |
2313 | void *ret; | |
2314 | ||
2315 | ret = pv_mmu_peek_buffer(buffer, len); | |
2316 | if (!ret) | |
2317 | return ret; | |
2318 | buffer->ptr += len; | |
2319 | buffer->len -= len; | |
2320 | buffer->processed += len; | |
2321 | return ret; | |
2322 | } | |
2323 | ||
2324 | static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu, | |
2325 | gpa_t addr, gpa_t value) | |
2326 | { | |
2327 | int bytes = 8; | |
2328 | int r; | |
2329 | ||
2330 | if (!is_long_mode(vcpu) && !is_pae(vcpu)) | |
2331 | bytes = 4; | |
2332 | ||
2333 | r = mmu_topup_memory_caches(vcpu); | |
2334 | if (r) | |
2335 | return r; | |
2336 | ||
3200f405 | 2337 | if (!emulator_write_phys(vcpu, addr, &value, bytes)) |
2f333bcb MT |
2338 | return -EFAULT; |
2339 | ||
2340 | return 1; | |
2341 | } | |
2342 | ||
2343 | static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu) | |
2344 | { | |
2345 | kvm_x86_ops->tlb_flush(vcpu); | |
2346 | return 1; | |
2347 | } | |
2348 | ||
2349 | static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr) | |
2350 | { | |
2351 | spin_lock(&vcpu->kvm->mmu_lock); | |
2352 | mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT); | |
2353 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2354 | return 1; | |
2355 | } | |
2356 | ||
2357 | static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu, | |
2358 | struct kvm_pv_mmu_op_buffer *buffer) | |
2359 | { | |
2360 | struct kvm_mmu_op_header *header; | |
2361 | ||
2362 | header = pv_mmu_peek_buffer(buffer, sizeof *header); | |
2363 | if (!header) | |
2364 | return 0; | |
2365 | switch (header->op) { | |
2366 | case KVM_MMU_OP_WRITE_PTE: { | |
2367 | struct kvm_mmu_op_write_pte *wpte; | |
2368 | ||
2369 | wpte = pv_mmu_read_buffer(buffer, sizeof *wpte); | |
2370 | if (!wpte) | |
2371 | return 0; | |
2372 | return kvm_pv_mmu_write(vcpu, wpte->pte_phys, | |
2373 | wpte->pte_val); | |
2374 | } | |
2375 | case KVM_MMU_OP_FLUSH_TLB: { | |
2376 | struct kvm_mmu_op_flush_tlb *ftlb; | |
2377 | ||
2378 | ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb); | |
2379 | if (!ftlb) | |
2380 | return 0; | |
2381 | return kvm_pv_mmu_flush_tlb(vcpu); | |
2382 | } | |
2383 | case KVM_MMU_OP_RELEASE_PT: { | |
2384 | struct kvm_mmu_op_release_pt *rpt; | |
2385 | ||
2386 | rpt = pv_mmu_read_buffer(buffer, sizeof *rpt); | |
2387 | if (!rpt) | |
2388 | return 0; | |
2389 | return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys); | |
2390 | } | |
2391 | default: return 0; | |
2392 | } | |
2393 | } | |
2394 | ||
2395 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, | |
2396 | gpa_t addr, unsigned long *ret) | |
2397 | { | |
2398 | int r; | |
6ad18fba | 2399 | struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer; |
2f333bcb | 2400 | |
6ad18fba DH |
2401 | buffer->ptr = buffer->buf; |
2402 | buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf); | |
2403 | buffer->processed = 0; | |
2f333bcb | 2404 | |
6ad18fba | 2405 | r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len); |
2f333bcb MT |
2406 | if (r) |
2407 | goto out; | |
2408 | ||
6ad18fba DH |
2409 | while (buffer->len) { |
2410 | r = kvm_pv_mmu_op_one(vcpu, buffer); | |
2f333bcb MT |
2411 | if (r < 0) |
2412 | goto out; | |
2413 | if (r == 0) | |
2414 | break; | |
2415 | } | |
2416 | ||
2417 | r = 1; | |
2418 | out: | |
6ad18fba | 2419 | *ret = buffer->processed; |
2f333bcb MT |
2420 | return r; |
2421 | } | |
2422 | ||
37a7d8b0 AK |
2423 | #ifdef AUDIT |
2424 | ||
2425 | static const char *audit_msg; | |
2426 | ||
2427 | static gva_t canonicalize(gva_t gva) | |
2428 | { | |
2429 | #ifdef CONFIG_X86_64 | |
2430 | gva = (long long)(gva << 16) >> 16; | |
2431 | #endif | |
2432 | return gva; | |
2433 | } | |
2434 | ||
2435 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
2436 | gva_t va, int level) | |
2437 | { | |
2438 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
2439 | int i; | |
2440 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
2441 | ||
2442 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
2443 | u64 ent = pt[i]; | |
2444 | ||
c7addb90 | 2445 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
2446 | continue; |
2447 | ||
2448 | va = canonicalize(va); | |
c7addb90 AK |
2449 | if (level > 1) { |
2450 | if (ent == shadow_notrap_nonpresent_pte) | |
2451 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
2452 | " in nonleaf level: levels %d gva %lx" | |
2453 | " level %d pte %llx\n", audit_msg, | |
ad312c7c | 2454 | vcpu->arch.mmu.root_level, va, level, ent); |
c7addb90 | 2455 | |
37a7d8b0 | 2456 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 2457 | } else { |
ad312c7c | 2458 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va); |
35149e21 | 2459 | hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT; |
37a7d8b0 | 2460 | |
c7addb90 | 2461 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 2462 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
2463 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
2464 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
ad312c7c | 2465 | audit_msg, vcpu->arch.mmu.root_level, |
d77c26fc MD |
2466 | va, gpa, hpa, ent, |
2467 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
2468 | else if (ent == shadow_notrap_nonpresent_pte |
2469 | && !is_error_hpa(hpa)) | |
2470 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
2471 | " valid guest gva %lx\n", audit_msg, va); | |
35149e21 | 2472 | kvm_release_pfn_clean(pfn); |
c7addb90 | 2473 | |
37a7d8b0 AK |
2474 | } |
2475 | } | |
2476 | } | |
2477 | ||
2478 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
2479 | { | |
1ea252af | 2480 | unsigned i; |
37a7d8b0 | 2481 | |
ad312c7c ZX |
2482 | if (vcpu->arch.mmu.root_level == 4) |
2483 | audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4); | |
37a7d8b0 AK |
2484 | else |
2485 | for (i = 0; i < 4; ++i) | |
ad312c7c | 2486 | if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK) |
37a7d8b0 | 2487 | audit_mappings_page(vcpu, |
ad312c7c | 2488 | vcpu->arch.mmu.pae_root[i], |
37a7d8b0 AK |
2489 | i << 30, |
2490 | 2); | |
2491 | } | |
2492 | ||
2493 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
2494 | { | |
2495 | int nmaps = 0; | |
2496 | int i, j, k; | |
2497 | ||
2498 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
2499 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
2500 | struct kvm_rmap_desc *d; | |
2501 | ||
2502 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 2503 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 2504 | |
290fc38d | 2505 | if (!*rmapp) |
37a7d8b0 | 2506 | continue; |
290fc38d | 2507 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
2508 | ++nmaps; |
2509 | continue; | |
2510 | } | |
290fc38d | 2511 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
2512 | while (d) { |
2513 | for (k = 0; k < RMAP_EXT; ++k) | |
2514 | if (d->shadow_ptes[k]) | |
2515 | ++nmaps; | |
2516 | else | |
2517 | break; | |
2518 | d = d->more; | |
2519 | } | |
2520 | } | |
2521 | } | |
2522 | return nmaps; | |
2523 | } | |
2524 | ||
2525 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
2526 | { | |
2527 | int nmaps = 0; | |
4db35314 | 2528 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
2529 | int i; |
2530 | ||
f05e70ac | 2531 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2532 | u64 *pt = sp->spt; |
37a7d8b0 | 2533 | |
4db35314 | 2534 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
2535 | continue; |
2536 | ||
2537 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
2538 | u64 ent = pt[i]; | |
2539 | ||
2540 | if (!(ent & PT_PRESENT_MASK)) | |
2541 | continue; | |
2542 | if (!(ent & PT_WRITABLE_MASK)) | |
2543 | continue; | |
2544 | ++nmaps; | |
2545 | } | |
2546 | } | |
2547 | return nmaps; | |
2548 | } | |
2549 | ||
2550 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
2551 | { | |
2552 | int n_rmap = count_rmaps(vcpu); | |
2553 | int n_actual = count_writable_mappings(vcpu); | |
2554 | ||
2555 | if (n_rmap != n_actual) | |
2556 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
b8688d51 | 2557 | __func__, audit_msg, n_rmap, n_actual); |
37a7d8b0 AK |
2558 | } |
2559 | ||
2560 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
2561 | { | |
4db35314 | 2562 | struct kvm_mmu_page *sp; |
290fc38d IE |
2563 | struct kvm_memory_slot *slot; |
2564 | unsigned long *rmapp; | |
2565 | gfn_t gfn; | |
37a7d8b0 | 2566 | |
f05e70ac | 2567 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2568 | if (sp->role.metaphysical) |
37a7d8b0 AK |
2569 | continue; |
2570 | ||
4db35314 AK |
2571 | slot = gfn_to_memslot(vcpu->kvm, sp->gfn); |
2572 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); | |
290fc38d IE |
2573 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
2574 | if (*rmapp) | |
37a7d8b0 AK |
2575 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
2576 | " mappings: gfn %lx role %x\n", | |
b8688d51 | 2577 | __func__, audit_msg, sp->gfn, |
4db35314 | 2578 | sp->role.word); |
37a7d8b0 AK |
2579 | } |
2580 | } | |
2581 | ||
2582 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
2583 | { | |
2584 | int olddbg = dbg; | |
2585 | ||
2586 | dbg = 0; | |
2587 | audit_msg = msg; | |
2588 | audit_rmap(vcpu); | |
2589 | audit_write_protection(vcpu); | |
2590 | audit_mappings(vcpu); | |
2591 | dbg = olddbg; | |
2592 | } | |
2593 | ||
2594 | #endif |