[net-next-2.6.git] / arch / x86 / kernel / vmiclock_32.c

/*
 * VMI paravirtual timer support routines.
 *
 * Copyright (C) 2007, VMware, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 * NON INFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 */

#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/cpumask.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>

#include <asm/vmi.h>
#include <asm/vmi_time.h>
#include <asm/apicdef.h>
#include <asm/apic.h>
#include <asm/timer.h>
#include <asm/i8253.h>
#include <asm/irq_vectors.h>

#define VMI_ONESHOT  (VMI_ALARM_IS_ONESHOT  | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
#define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC | VMI_CYCLES_REAL | vmi_get_alarm_wiring())

static DEFINE_PER_CPU(struct clock_event_device, local_events);

static inline u32 vmi_counter(u32 flags)
{
	/* Given VMI_ONESHOT or VMI_PERIODIC, return the corresponding
	 * cycle counter. */
	return flags & VMI_ALARM_COUNTER_MASK;
}

/* paravirt_ops.get_wallclock = vmi_get_wallclock */
unsigned long vmi_get_wallclock(void)
{
	unsigned long long wallclock;
	wallclock = vmi_timer_ops.get_wallclock(); // nsec
	(void)do_div(wallclock, 1000000000);       // sec

	return wallclock;
}

/* paravirt_ops.set_wallclock = vmi_set_wallclock */
int vmi_set_wallclock(unsigned long now)
{
	return 0;
}

/* paravirt_ops.sched_clock = vmi_sched_clock */
unsigned long long vmi_sched_clock(void)
{
	return cycles_2_ns(vmi_timer_ops.get_cycle_counter(VMI_CYCLES_AVAILABLE));
}

/* x86_platform.calibrate_tsc = vmi_tsc_khz */
unsigned long vmi_tsc_khz(void)
{
	unsigned long long khz;
	khz = vmi_timer_ops.get_cycle_frequency();
	(void)do_div(khz, 1000);
	return khz;
}

static inline unsigned int vmi_get_timer_vector(void)
{
	return IRQ0_VECTOR;
}

/** vmi clockchip */
#ifdef CONFIG_X86_LOCAL_APIC
static unsigned int startup_timer_irq(unsigned int irq)
{
	unsigned long val = apic_read(APIC_LVTT);
	apic_write(APIC_LVTT, vmi_get_timer_vector());

	return (val & APIC_SEND_PENDING);
}

static void mask_timer_irq(unsigned int irq)
{
	unsigned long val = apic_read(APIC_LVTT);
	apic_write(APIC_LVTT, val | APIC_LVT_MASKED);
}

static void unmask_timer_irq(unsigned int irq)
{
	unsigned long val = apic_read(APIC_LVTT);
	apic_write(APIC_LVTT, val & ~APIC_LVT_MASKED);
}

static void ack_timer_irq(unsigned int irq)
{
	ack_APIC_irq();
}

static struct irq_chip vmi_chip __read_mostly = {
	.name 		= "VMI-LOCAL",
	.startup 	= startup_timer_irq,
	.mask	 	= mask_timer_irq,
	.unmask	 	= unmask_timer_irq,
	.ack 		= ack_timer_irq
};
#endif

/** vmi clockevent */
#define VMI_ALARM_WIRED_IRQ0    0x00000000
#define VMI_ALARM_WIRED_LVTT    0x00010000
static int vmi_wiring = VMI_ALARM_WIRED_IRQ0;

static inline int vmi_get_alarm_wiring(void)
{
	return vmi_wiring;
}

static void vmi_timer_set_mode(enum clock_event_mode mode,
			       struct clock_event_device *evt)
{
	cycle_t now, cycles_per_hz;
	BUG_ON(!irqs_disabled());

	switch (mode) {
	case CLOCK_EVT_MODE_ONESHOT:
	case CLOCK_EVT_MODE_RESUME:
		break;
	case CLOCK_EVT_MODE_PERIODIC:
		cycles_per_hz = vmi_timer_ops.get_cycle_frequency();
		(void)do_div(cycles_per_hz, HZ);
		now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_PERIODIC));
		vmi_timer_ops.set_alarm(VMI_PERIODIC, now, cycles_per_hz);
		break;
	case CLOCK_EVT_MODE_UNUSED:
	case CLOCK_EVT_MODE_SHUTDOWN:
		switch (evt->mode) {
		case CLOCK_EVT_MODE_ONESHOT:
			vmi_timer_ops.cancel_alarm(VMI_ONESHOT);
			break;
		case CLOCK_EVT_MODE_PERIODIC:
			vmi_timer_ops.cancel_alarm(VMI_PERIODIC);
			break;
		default:
			break;
		}
		break;
	default:
		break;
	}
}

static int vmi_timer_next_event(unsigned long delta,
				struct clock_event_device *evt)
{
	/* Unfortunately, set_next_event interface only passes relative
	 * expiry, but we want absolute expiry.  It'd be better if were
	 * were passed an aboslute expiry, since a bunch of time may
	 * have been stolen between the time the delta is computed and
	 * when we set the alarm below. */
	cycle_t now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_ONESHOT));

	BUG_ON(evt->mode != CLOCK_EVT_MODE_ONESHOT);
	vmi_timer_ops.set_alarm(VMI_ONESHOT, now + delta, 0);
	return 0;
}

static struct clock_event_device vmi_clockevent = {
	.name		= "vmi-timer",
	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
	.shift		= 22,
	.set_mode	= vmi_timer_set_mode,
	.set_next_event = vmi_timer_next_event,
	.rating         = 1000,
	.irq		= 0,
};

static irqreturn_t vmi_timer_interrupt(int irq, void *dev_id)
{
	struct clock_event_device *evt = &__get_cpu_var(local_events);
	evt->event_handler(evt);
	return IRQ_HANDLED;
}

static struct irqaction vmi_clock_action  = {
	.name 		= "vmi-timer",
	.handler 	= vmi_timer_interrupt,
	.flags 		= IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
};

static void __devinit vmi_time_init_clockevent(void)
{
	cycle_t cycles_per_msec;
	struct clock_event_device *evt;

	int cpu = smp_processor_id();
	evt = &__get_cpu_var(local_events);

	/* Use cycles_per_msec since div_sc params are 32-bits. */
	cycles_per_msec = vmi_timer_ops.get_cycle_frequency();
	(void)do_div(cycles_per_msec, 1000);

	memcpy(evt, &vmi_clockevent, sizeof(*evt));
	/* Must pick .shift such that .mult fits in 32-bits.  Choosing
	 * .shift to be 22 allows 2^(32-22) cycles per nano-seconds
	 * before overflow. */
	evt->mult = div_sc(cycles_per_msec, NSEC_PER_MSEC, evt->shift);
	/* Upper bound is clockevent's use of ulong for cycle deltas. */
	evt->max_delta_ns = clockevent_delta2ns(ULONG_MAX, evt);
	evt->min_delta_ns = clockevent_delta2ns(1, evt);
	evt->cpumask = cpumask_of(cpu);

	printk(KERN_WARNING "vmi: registering clock event %s. mult=%u shift=%u\n",
	       evt->name, evt->mult, evt->shift);
	clockevents_register_device(evt);
}

void __init vmi_time_init(void)
{
	unsigned int cpu;
	/* Disable PIT: BIOSes start PIT CH0 with 18.2hz peridic. */
	outb_pit(0x3a, PIT_MODE); /* binary, mode 5, LSB/MSB, ch 0 */

	vmi_time_init_clockevent();
	setup_irq(0, &vmi_clock_action);
	for_each_possible_cpu(cpu)
		per_cpu(vector_irq, cpu)[vmi_get_timer_vector()] = 0;
}

#ifdef CONFIG_X86_LOCAL_APIC
void __devinit vmi_time_bsp_init(void)
{
	/*
	 * On APIC systems, we want local timers to fire on each cpu.  We do
	 * this by programming LVTT to deliver timer events to the IRQ handler
	 * for IRQ-0, since we can't re-use the APIC local timer handler
	 * without interfering with that code.
	 */
	clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL);
	local_irq_disable();
#ifdef CONFIG_SMP
	/*
	 * XXX handle_percpu_irq only defined for SMP; we need to switch over
	 * to using it, since this is a local interrupt, which each CPU must
	 * handle individually without locking out or dropping simultaneous
	 * local timers on other CPUs.  We also don't want to trigger the
	 * quirk workaround code for interrupts which gets invoked from
	 * handle_percpu_irq via eoi, so we use our own IRQ chip.
	 */
	set_irq_chip_and_handler_name(0, &vmi_chip, handle_percpu_irq, "lvtt");
#else
	set_irq_chip_and_handler_name(0, &vmi_chip, handle_edge_irq, "lvtt");
#endif
	vmi_wiring = VMI_ALARM_WIRED_LVTT;
	apic_write(APIC_LVTT, vmi_get_timer_vector());
	local_irq_enable();
	clockevents_notify(CLOCK_EVT_NOTIFY_RESUME, NULL);
}

void __devinit vmi_time_ap_init(void)
{
	vmi_time_init_clockevent();
	apic_write(APIC_LVTT, vmi_get_timer_vector());
}
#endif

/** vmi clocksource */
static struct clocksource clocksource_vmi;

static cycle_t read_real_cycles(struct clocksource *cs)
{
	cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
	return max(ret, clocksource_vmi.cycle_last);
}

static struct clocksource clocksource_vmi = {
	.name			= "vmi-timer",
	.rating			= 450,
	.read			= read_real_cycles,
	.mask			= CLOCKSOURCE_MASK(64),
	.mult			= 0, /* to be set */
	.shift			= 22,
	.flags			= CLOCK_SOURCE_IS_CONTINUOUS,
};

static int __init init_vmi_clocksource(void)
{
	cycle_t cycles_per_msec;

	if (!vmi_timer_ops.get_cycle_frequency)
		return 0;
	/* Use khz2mult rather than hz2mult since hz arg is only 32-bits. */
	cycles_per_msec = vmi_timer_ops.get_cycle_frequency();
	(void)do_div(cycles_per_msec, 1000);

	/* Note that clocksource.{mult, shift} converts in the opposite direction
	 * as clockevents.  */
	clocksource_vmi.mult = clocksource_khz2mult(cycles_per_msec,
						    clocksource_vmi.shift);

	printk(KERN_WARNING "vmi: registering clock source khz=%lld\n", cycles_per_msec);
	return clocksource_register(&clocksource_vmi);

}
module_init(init_vmi_clocksource);
Commit	Line	Data
e0bb8643 ZA	1	/*
	2	* VMI paravirtual timer support routines.
	3	*
	4	* Copyright (C) 2007, VMware, Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful, but
	12	* WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
	14	* NON INFRINGEMENT. See the GNU General Public License for more
	15	* details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*
	21	*/
	22
	23	#include <linux/smp.h>
	24	#include <linux/interrupt.h>
	25	#include <linux/cpumask.h>
	26	#include <linux/clocksource.h>
	27	#include <linux/clockchips.h>
	28
	29	#include <asm/vmi.h>
	30	#include <asm/vmi_time.h>
e0bb8643 ZA	31	#include <asm/apicdef.h>
	32	#include <asm/apic.h>
	33	#include <asm/timer.h>
a2900975	34	#include <asm/i8253.h>
9b7dc567	35	#include <asm/irq_vectors.h>
e0bb8643 ZA	36
	37	#define VMI_ONESHOT (VMI_ALARM_IS_ONESHOT \| VMI_CYCLES_REAL \| vmi_get_alarm_wiring())
	38	#define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC \| VMI_CYCLES_REAL \| vmi_get_alarm_wiring())
	39
	40	static DEFINE_PER_CPU(struct clock_event_device, local_events);
	41
	42	static inline u32 vmi_counter(u32 flags)
	43	{
	44	/* Given VMI_ONESHOT or VMI_PERIODIC, return the corresponding
	45	* cycle counter. */
	46	return flags & VMI_ALARM_COUNTER_MASK;
	47	}
	48
	49	/* paravirt_ops.get_wallclock = vmi_get_wallclock */
	50	unsigned long vmi_get_wallclock(void)
	51	{
	52	unsigned long long wallclock;
	53	wallclock = vmi_timer_ops.get_wallclock(); // nsec
	54	(void)do_div(wallclock, 1000000000); // sec
	55
	56	return wallclock;
	57	}
	58
	59	/* paravirt_ops.set_wallclock = vmi_set_wallclock */
	60	int vmi_set_wallclock(unsigned long now)
	61	{
	62	return 0;
	63	}
	64
688340ea JF	65	/* paravirt_ops.sched_clock = vmi_sched_clock */
688340ea JF	66	unsigned long long vmi_sched_clock(void)
e0bb8643	67	{
688340ea	68	return cycles_2_ns(vmi_timer_ops.get_cycle_counter(VMI_CYCLES_AVAILABLE));
e0bb8643 ZA	69	}
e0bb8643 ZA	70
2d826404	71	/* x86_platform.calibrate_tsc = vmi_tsc_khz */
e93ef949	72	unsigned long vmi_tsc_khz(void)
e0bb8643 ZA	73	{
	74	unsigned long long khz;
	75	khz = vmi_timer_ops.get_cycle_frequency();
	76	(void)do_div(khz, 1000);
	77	return khz;
	78	}
	79
	80	static inline unsigned int vmi_get_timer_vector(void)
	81	{
722b3654	82	return IRQ0_VECTOR;
e0bb8643 ZA	83	}
	84
	85	/** vmi clockchip */
	86	#ifdef CONFIG_X86_LOCAL_APIC
	87	static unsigned int startup_timer_irq(unsigned int irq)
	88	{
	89	unsigned long val = apic_read(APIC_LVTT);
	90	apic_write(APIC_LVTT, vmi_get_timer_vector());
	91
	92	return (val & APIC_SEND_PENDING);
	93	}
	94
	95	static void mask_timer_irq(unsigned int irq)
	96	{
	97	unsigned long val = apic_read(APIC_LVTT);
	98	apic_write(APIC_LVTT, val \| APIC_LVT_MASKED);
	99	}
	100
	101	static void unmask_timer_irq(unsigned int irq)
	102	{
	103	unsigned long val = apic_read(APIC_LVTT);
	104	apic_write(APIC_LVTT, val & ~APIC_LVT_MASKED);
	105	}
	106
	107	static void ack_timer_irq(unsigned int irq)
	108	{
	109	ack_APIC_irq();
	110	}
	111
	112	static struct irq_chip vmi_chip __read_mostly = {
	113	.name = "VMI-LOCAL",
	114	.startup = startup_timer_irq,
	115	.mask = mask_timer_irq,
	116	.unmask = unmask_timer_irq,
	117	.ack = ack_timer_irq
	118	};
	119	#endif
	120
	121	/** vmi clockevent */
	122	#define VMI_ALARM_WIRED_IRQ0 0x00000000
	123	#define VMI_ALARM_WIRED_LVTT 0x00010000
	124	static int vmi_wiring = VMI_ALARM_WIRED_IRQ0;
	125
	126	static inline int vmi_get_alarm_wiring(void)
	127	{
	128	return vmi_wiring;
	129	}
	130
	131	static void vmi_timer_set_mode(enum clock_event_mode mode,
	132	struct clock_event_device *evt)
	133	{
	134	cycle_t now, cycles_per_hz;
	135	BUG_ON(!irqs_disabled());
	136
	137	switch (mode) {
	138	case CLOCK_EVT_MODE_ONESHOT:
18de5bc4	139	case CLOCK_EVT_MODE_RESUME:
e0bb8643 ZA	140	break;
	141	case CLOCK_EVT_MODE_PERIODIC:
	142	cycles_per_hz = vmi_timer_ops.get_cycle_frequency();
	143	(void)do_div(cycles_per_hz, HZ);
	144	now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_PERIODIC));
	145	vmi_timer_ops.set_alarm(VMI_PERIODIC, now, cycles_per_hz);
	146	break;
	147	case CLOCK_EVT_MODE_UNUSED:
	148	case CLOCK_EVT_MODE_SHUTDOWN:
	149	switch (evt->mode) {
	150	case CLOCK_EVT_MODE_ONESHOT:
	151	vmi_timer_ops.cancel_alarm(VMI_ONESHOT);
	152	break;
	153	case CLOCK_EVT_MODE_PERIODIC:
	154	vmi_timer_ops.cancel_alarm(VMI_PERIODIC);
	155	break;
	156	default:
	157	break;
	158	}
	159	break;
	160	default:
	161	break;
	162	}
	163	}
	164
	165	static int vmi_timer_next_event(unsigned long delta,
	166	struct clock_event_device *evt)
	167	{
	168	/* Unfortunately, set_next_event interface only passes relative
	169	* expiry, but we want absolute expiry. It'd be better if were
	170	* were passed an aboslute expiry, since a bunch of time may
	171	* have been stolen between the time the delta is computed and
	172	* when we set the alarm below. */
	173	cycle_t now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_ONESHOT));
	174
	175	BUG_ON(evt->mode != CLOCK_EVT_MODE_ONESHOT);
	176	vmi_timer_ops.set_alarm(VMI_ONESHOT, now + delta, 0);
	177	return 0;
	178	}
	179
	180	static struct clock_event_device vmi_clockevent = {
	181	.name = "vmi-timer",
	182	.features = CLOCK_EVT_FEAT_PERIODIC \| CLOCK_EVT_FEAT_ONESHOT,
	183	.shift = 22,
	184	.set_mode = vmi_timer_set_mode,
	185	.set_next_event = vmi_timer_next_event,
	186	.rating = 1000,
	187	.irq = 0,
	188	};
	189
	190	static irqreturn_t vmi_timer_interrupt(int irq, void *dev_id)
	191	{
	192	struct clock_event_device *evt = &__get_cpu_var(local_events);
	193	evt->event_handler(evt);
	194	return IRQ_HANDLED;
	195	}
	196
	197	static struct irqaction vmi_clock_action = {
	198	.name = "vmi-timer",
	199	.handler = vmi_timer_interrupt,
936577c6	200	.flags = IRQF_DISABLED \| IRQF_NOBALANCING \| IRQF_TIMER,
e0bb8643 ZA	201	};
	202
	203	static void __devinit vmi_time_init_clockevent(void)
	204	{
	205	cycle_t cycles_per_msec;
	206	struct clock_event_device *evt;
	207
	208	int cpu = smp_processor_id();
	209	evt = &__get_cpu_var(local_events);
	210
	211	/* Use cycles_per_msec since div_sc params are 32-bits. */
	212	cycles_per_msec = vmi_timer_ops.get_cycle_frequency();
	213	(void)do_div(cycles_per_msec, 1000);
	214
	215	memcpy(evt, &vmi_clockevent, sizeof(*evt));
	216	/* Must pick .shift such that .mult fits in 32-bits. Choosing
	217	* .shift to be 22 allows 2^(32-22) cycles per nano-seconds
	218	* before overflow. */
	219	evt->mult = div_sc(cycles_per_msec, NSEC_PER_MSEC, evt->shift);
	220	/* Upper bound is clockevent's use of ulong for cycle deltas. */
	221	evt->max_delta_ns = clockevent_delta2ns(ULONG_MAX, evt);
	222	evt->min_delta_ns = clockevent_delta2ns(1, evt);
320ab2b0	223	evt->cpumask = cpumask_of(cpu);
e0bb8643	224
070e5c3f	225	printk(KERN_WARNING "vmi: registering clock event %s. mult=%u shift=%u\n",
e0bb8643 ZA	226	evt->name, evt->mult, evt->shift);
	227	clockevents_register_device(evt);
	228	}
	229
	230	void __init vmi_time_init(void)
	231	{
2699574b	232	unsigned int cpu;
e0bb8643	233	/* Disable PIT: BIOSes start PIT CH0 with 18.2hz peridic. */
466eed22	234	outb_pit(0x3a, PIT_MODE); /* binary, mode 5, LSB/MSB, ch 0 */
e0bb8643 ZA	235
	236	vmi_time_init_clockevent();
	237	setup_irq(0, &vmi_clock_action);
97943390 SS	238	for_each_possible_cpu(cpu)
97943390 SS	239	per_cpu(vector_irq, cpu)[vmi_get_timer_vector()] = 0;
e0bb8643 ZA	240	}
	241
	242	#ifdef CONFIG_X86_LOCAL_APIC
	243	void __devinit vmi_time_bsp_init(void)
	244	{
	245	/*
	246	* On APIC systems, we want local timers to fire on each cpu. We do
	247	* this by programming LVTT to deliver timer events to the IRQ handler
	248	* for IRQ-0, since we can't re-use the APIC local timer handler
	249	* without interfering with that code.
	250	*/
	251	clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL);
	252	local_irq_disable();
3e5095d1	253	#ifdef CONFIG_SMP
e0bb8643 ZA	254	/*
	255	* XXX handle_percpu_irq only defined for SMP; we need to switch over
	256	* to using it, since this is a local interrupt, which each CPU must
	257	* handle individually without locking out or dropping simultaneous
	258	* local timers on other CPUs. We also don't want to trigger the
	259	* quirk workaround code for interrupts which gets invoked from
	260	* handle_percpu_irq via eoi, so we use our own IRQ chip.
	261	*/
	262	set_irq_chip_and_handler_name(0, &vmi_chip, handle_percpu_irq, "lvtt");
	263	#else
	264	set_irq_chip_and_handler_name(0, &vmi_chip, handle_edge_irq, "lvtt");
	265	#endif
	266	vmi_wiring = VMI_ALARM_WIRED_LVTT;
	267	apic_write(APIC_LVTT, vmi_get_timer_vector());
	268	local_irq_enable();
	269	clockevents_notify(CLOCK_EVT_NOTIFY_RESUME, NULL);
	270	}
	271
	272	void __devinit vmi_time_ap_init(void)
	273	{
	274	vmi_time_init_clockevent();
	275	apic_write(APIC_LVTT, vmi_get_timer_vector());
	276	}
	277	#endif
	278
	279	/** vmi clocksource */
48ffc70b	280	static struct clocksource clocksource_vmi;
e0bb8643	281
8e19608e	282	static cycle_t read_real_cycles(struct clocksource *cs)
e0bb8643	283	{
48ffc70b	284	cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
fdb17aeb	285	return max(ret, clocksource_vmi.cycle_last);
e0bb8643 ZA	286	}
	287
	288	static struct clocksource clocksource_vmi = {
	289	.name = "vmi-timer",
	290	.rating = 450,
	291	.read = read_real_cycles,
	292	.mask = CLOCKSOURCE_MASK(64),
	293	.mult = 0, /* to be set */
	294	.shift = 22,
	295	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
	296	};
	297
	298	static int __init init_vmi_clocksource(void)
	299	{
	300	cycle_t cycles_per_msec;
	301
	302	if (!vmi_timer_ops.get_cycle_frequency)
	303	return 0;
	304	/* Use khz2mult rather than hz2mult since hz arg is only 32-bits. */
	305	cycles_per_msec = vmi_timer_ops.get_cycle_frequency();
	306	(void)do_div(cycles_per_msec, 1000);
	307
	308	/* Note that clocksource.{mult, shift} converts in the opposite direction
	309	* as clockevents. */
	310	clocksource_vmi.mult = clocksource_khz2mult(cycles_per_msec,
	311	clocksource_vmi.shift);
	312
	313	printk(KERN_WARNING "vmi: registering clock source khz=%lld\n", cycles_per_msec);
	314	return clocksource_register(&clocksource_vmi);
	315
	316	}
	317	module_init(init_vmi_clocksource);