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Merge branch 'x86-mem-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[net-next-2.6.git] / arch / x86 / kernel / traps.c
CommitLineData
1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
b5964405
IM
12#include <linux/interrupt.h>
13#include <linux/kallsyms.h>
14#include <linux/spinlock.h>
b5964405
IM
15#include <linux/kprobes.h>
16#include <linux/uaccess.h>
b5964405 17#include <linux/kdebug.h>
f503b5ae 18#include <linux/kgdb.h>
1da177e4 19#include <linux/kernel.h>
b5964405
IM
20#include <linux/module.h>
21#include <linux/ptrace.h>
1da177e4 22#include <linux/string.h>
b5964405 23#include <linux/delay.h>
1da177e4 24#include <linux/errno.h>
b5964405
IM
25#include <linux/kexec.h>
26#include <linux/sched.h>
1da177e4 27#include <linux/timer.h>
1da177e4 28#include <linux/init.h>
91768d6c 29#include <linux/bug.h>
b5964405
IM
30#include <linux/nmi.h>
31#include <linux/mm.h>
c1d518c8
AH
32#include <linux/smp.h>
33#include <linux/io.h>
1da177e4
LT
34
35#ifdef CONFIG_EISA
36#include <linux/ioport.h>
37#include <linux/eisa.h>
38#endif
39
40#ifdef CONFIG_MCA
41#include <linux/mca.h>
42#endif
43
c0d12172
DJ
44#if defined(CONFIG_EDAC)
45#include <linux/edac.h>
46#endif
47
f8561296 48#include <asm/kmemcheck.h>
b5964405 49#include <asm/stacktrace.h>
1da177e4 50#include <asm/processor.h>
1da177e4 51#include <asm/debugreg.h>
b5964405
IM
52#include <asm/atomic.h>
53#include <asm/system.h>
c1d518c8 54#include <asm/traps.h>
1da177e4
LT
55#include <asm/desc.h>
56#include <asm/i387.h>
9e55e44e 57#include <asm/mce.h>
c1d518c8 58
1164dd00 59#include <asm/mach_traps.h>
c1d518c8 60
081f75bb 61#ifdef CONFIG_X86_64
428cf902 62#include <asm/x86_init.h>
081f75bb
AH
63#include <asm/pgalloc.h>
64#include <asm/proto.h>
081f75bb 65#else
c1d518c8 66#include <asm/processor-flags.h>
8e6dafd6 67#include <asm/setup.h>
1da177e4 68
1da177e4
LT
69asmlinkage int system_call(void);
70
1da177e4 71/* Do we ignore FPU interrupts ? */
b5964405 72char ignore_fpu_irq;
1da177e4
LT
73
74/*
75 * The IDT has to be page-aligned to simplify the Pentium
07e81d61 76 * F0 0F bug workaround.
1da177e4 77 */
07e81d61 78gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
081f75bb 79#endif
1da177e4 80
b77b881f
YL
81DECLARE_BITMAP(used_vectors, NR_VECTORS);
82EXPORT_SYMBOL_GPL(used_vectors);
83
badc7652 84static int ignore_nmis;
e041c683 85
762db434
AH
86static inline void conditional_sti(struct pt_regs *regs)
87{
88 if (regs->flags & X86_EFLAGS_IF)
89 local_irq_enable();
90}
91
3d2a71a5
AH
92static inline void preempt_conditional_sti(struct pt_regs *regs)
93{
94 inc_preempt_count();
95 if (regs->flags & X86_EFLAGS_IF)
96 local_irq_enable();
97}
98
be716615
TG
99static inline void conditional_cli(struct pt_regs *regs)
100{
101 if (regs->flags & X86_EFLAGS_IF)
102 local_irq_disable();
103}
104
3d2a71a5
AH
105static inline void preempt_conditional_cli(struct pt_regs *regs)
106{
107 if (regs->flags & X86_EFLAGS_IF)
108 local_irq_disable();
109 dec_preempt_count();
110}
111
b5964405 112static void __kprobes
3c1326f8 113do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
b5964405 114 long error_code, siginfo_t *info)
1da177e4 115{
4f339ecb 116 struct task_struct *tsk = current;
4f339ecb 117
081f75bb 118#ifdef CONFIG_X86_32
6b6891f9 119 if (regs->flags & X86_VM_MASK) {
3c1326f8
AH
120 /*
121 * traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
122 * On nmi (interrupt 2), do_trap should not be called.
123 */
124 if (trapnr < 6)
1da177e4
LT
125 goto vm86_trap;
126 goto trap_signal;
127 }
081f75bb 128#endif
1da177e4 129
717b594a 130 if (!user_mode(regs))
1da177e4
LT
131 goto kernel_trap;
132
081f75bb 133#ifdef CONFIG_X86_32
b5964405 134trap_signal:
081f75bb 135#endif
b5964405
IM
136 /*
137 * We want error_code and trap_no set for userspace faults and
138 * kernelspace faults which result in die(), but not
139 * kernelspace faults which are fixed up. die() gives the
140 * process no chance to handle the signal and notice the
141 * kernel fault information, so that won't result in polluting
142 * the information about previously queued, but not yet
143 * delivered, faults. See also do_general_protection below.
144 */
145 tsk->thread.error_code = error_code;
146 tsk->thread.trap_no = trapnr;
d1895183 147
081f75bb
AH
148#ifdef CONFIG_X86_64
149 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
150 printk_ratelimit()) {
151 printk(KERN_INFO
152 "%s[%d] trap %s ip:%lx sp:%lx error:%lx",
153 tsk->comm, tsk->pid, str,
154 regs->ip, regs->sp, error_code);
155 print_vma_addr(" in ", regs->ip);
156 printk("\n");
157 }
158#endif
159
b5964405
IM
160 if (info)
161 force_sig_info(signr, info, tsk);
162 else
163 force_sig(signr, tsk);
164 return;
1da177e4 165
b5964405
IM
166kernel_trap:
167 if (!fixup_exception(regs)) {
168 tsk->thread.error_code = error_code;
169 tsk->thread.trap_no = trapnr;
170 die(str, regs, error_code);
1da177e4 171 }
b5964405 172 return;
1da177e4 173
081f75bb 174#ifdef CONFIG_X86_32
b5964405
IM
175vm86_trap:
176 if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
177 error_code, trapnr))
178 goto trap_signal;
179 return;
081f75bb 180#endif
1da177e4
LT
181}
182
b5964405 183#define DO_ERROR(trapnr, signr, str, name) \
e407d620 184dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
185{ \
186 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
a8c1be9d 187 == NOTIFY_STOP) \
b5964405 188 return; \
61aef7d2 189 conditional_sti(regs); \
3c1326f8 190 do_trap(trapnr, signr, str, regs, error_code, NULL); \
1da177e4
LT
191}
192
3c1326f8 193#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
e407d620 194dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
195{ \
196 siginfo_t info; \
197 info.si_signo = signr; \
198 info.si_errno = 0; \
199 info.si_code = sicode; \
200 info.si_addr = (void __user *)siaddr; \
b5964405 201 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
a8c1be9d 202 == NOTIFY_STOP) \
b5964405 203 return; \
61aef7d2 204 conditional_sti(regs); \
3c1326f8 205 do_trap(trapnr, signr, str, regs, error_code, &info); \
1da177e4
LT
206}
207
3c1326f8
AH
208DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
209DO_ERROR(4, SIGSEGV, "overflow", overflow)
210DO_ERROR(5, SIGSEGV, "bounds", bounds)
211DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
51bc1ed6 212DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
6bf77bf9 213DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
36d936c7 214DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
081f75bb 215#ifdef CONFIG_X86_32
f5ca8187 216DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
081f75bb 217#endif
3c1326f8 218DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
1da177e4 219
081f75bb
AH
220#ifdef CONFIG_X86_64
221/* Runs on IST stack */
222dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
223{
224 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
225 12, SIGBUS) == NOTIFY_STOP)
226 return;
227 preempt_conditional_sti(regs);
228 do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
229 preempt_conditional_cli(regs);
230}
231
232dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
233{
234 static const char str[] = "double fault";
235 struct task_struct *tsk = current;
236
237 /* Return not checked because double check cannot be ignored */
238 notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV);
239
240 tsk->thread.error_code = error_code;
241 tsk->thread.trap_no = 8;
242
bd8b96df
IM
243 /*
244 * This is always a kernel trap and never fixable (and thus must
245 * never return).
246 */
081f75bb
AH
247 for (;;)
248 die(str, regs, error_code);
249}
250#endif
251
e407d620 252dotraplinkage void __kprobes
13485ab5 253do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 254{
13485ab5 255 struct task_struct *tsk;
b5964405 256
c6df0d71
AH
257 conditional_sti(regs);
258
081f75bb 259#ifdef CONFIG_X86_32
6b6891f9 260 if (regs->flags & X86_VM_MASK)
1da177e4 261 goto gp_in_vm86;
081f75bb 262#endif
1da177e4 263
13485ab5 264 tsk = current;
717b594a 265 if (!user_mode(regs))
1da177e4
LT
266 goto gp_in_kernel;
267
13485ab5
AH
268 tsk->thread.error_code = error_code;
269 tsk->thread.trap_no = 13;
b5964405 270
13485ab5
AH
271 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
272 printk_ratelimit()) {
abd4f750 273 printk(KERN_INFO
13485ab5
AH
274 "%s[%d] general protection ip:%lx sp:%lx error:%lx",
275 tsk->comm, task_pid_nr(tsk),
276 regs->ip, regs->sp, error_code);
03252919
AK
277 print_vma_addr(" in ", regs->ip);
278 printk("\n");
279 }
abd4f750 280
13485ab5 281 force_sig(SIGSEGV, tsk);
1da177e4
LT
282 return;
283
081f75bb 284#ifdef CONFIG_X86_32
1da177e4
LT
285gp_in_vm86:
286 local_irq_enable();
287 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
288 return;
081f75bb 289#endif
1da177e4
LT
290
291gp_in_kernel:
13485ab5
AH
292 if (fixup_exception(regs))
293 return;
294
295 tsk->thread.error_code = error_code;
296 tsk->thread.trap_no = 13;
297 if (notify_die(DIE_GPF, "general protection fault", regs,
1da177e4 298 error_code, 13, SIGSEGV) == NOTIFY_STOP)
13485ab5
AH
299 return;
300 die("general protection fault", regs, error_code);
1da177e4
LT
301}
302
5deb45e3 303static notrace __kprobes void
b5964405 304mem_parity_error(unsigned char reason, struct pt_regs *regs)
1da177e4 305{
b5964405
IM
306 printk(KERN_EMERG
307 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
308 reason, smp_processor_id());
309
310 printk(KERN_EMERG
311 "You have some hardware problem, likely on the PCI bus.\n");
c0d12172
DJ
312
313#if defined(CONFIG_EDAC)
b5964405 314 if (edac_handler_set()) {
c0d12172
DJ
315 edac_atomic_assert_error();
316 return;
317 }
318#endif
319
8da5adda 320 if (panic_on_unrecovered_nmi)
b5964405 321 panic("NMI: Not continuing");
1da177e4 322
c41c5cd3 323 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
1da177e4
LT
324
325 /* Clear and disable the memory parity error line. */
7970479c
AH
326 reason = (reason & 0xf) | 4;
327 outb(reason, 0x61);
1da177e4
LT
328}
329
5deb45e3 330static notrace __kprobes void
b5964405 331io_check_error(unsigned char reason, struct pt_regs *regs)
1da177e4
LT
332{
333 unsigned long i;
334
9c107805 335 printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
1da177e4
LT
336 show_registers(regs);
337
5211a242
KG
338 if (panic_on_io_nmi)
339 panic("NMI IOCK error: Not continuing");
340
1da177e4
LT
341 /* Re-enable the IOCK line, wait for a few seconds */
342 reason = (reason & 0xf) | 8;
343 outb(reason, 0x61);
b5964405 344
1da177e4 345 i = 2000;
b5964405
IM
346 while (--i)
347 udelay(1000);
348
1da177e4
LT
349 reason &= ~8;
350 outb(reason, 0x61);
351}
352
5deb45e3 353static notrace __kprobes void
b5964405 354unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
1da177e4 355{
c1d518c8
AH
356 if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) ==
357 NOTIFY_STOP)
d3597524 358 return;
1da177e4 359#ifdef CONFIG_MCA
b5964405
IM
360 /*
361 * Might actually be able to figure out what the guilty party
362 * is:
363 */
364 if (MCA_bus) {
1da177e4
LT
365 mca_handle_nmi();
366 return;
367 }
368#endif
b5964405
IM
369 printk(KERN_EMERG
370 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
371 reason, smp_processor_id());
372
c41c5cd3 373 printk(KERN_EMERG "Do you have a strange power saving mode enabled?\n");
8da5adda 374 if (panic_on_unrecovered_nmi)
b5964405 375 panic("NMI: Not continuing");
8da5adda 376
c41c5cd3 377 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
1da177e4
LT
378}
379
5deb45e3 380static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
1da177e4
LT
381{
382 unsigned char reason = 0;
abd34807
AH
383 int cpu;
384
385 cpu = smp_processor_id();
1da177e4 386
abd34807
AH
387 /* Only the BSP gets external NMIs from the system. */
388 if (!cpu)
1da177e4 389 reason = get_nmi_reason();
b5964405 390
1da177e4 391 if (!(reason & 0xc0)) {
20c0d2d4 392 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT)
a8c1be9d 393 == NOTIFY_STOP)
1da177e4 394 return;
e40b1720 395
1da177e4 396#ifdef CONFIG_X86_LOCAL_APIC
47195d57
DZ
397 if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
398 == NOTIFY_STOP)
399 return;
e40b1720 400
58687acb 401#ifndef CONFIG_LOCKUP_DETECTOR
1da177e4
LT
402 /*
403 * Ok, so this is none of the documented NMI sources,
404 * so it must be the NMI watchdog.
405 */
3adbbcce 406 if (nmi_watchdog_tick(regs, reason))
1da177e4 407 return;
abd34807 408 if (!do_nmi_callback(regs, cpu))
58687acb 409#endif /* !CONFIG_LOCKUP_DETECTOR */
3adbbcce 410 unknown_nmi_error(reason, regs);
b5964405
IM
411#else
412 unknown_nmi_error(reason, regs);
413#endif
2fbe7b25 414
1da177e4
LT
415 return;
416 }
20c0d2d4 417 if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP)
1da177e4 418 return;
a8c1be9d
AH
419
420 /* AK: following checks seem to be broken on modern chipsets. FIXME */
1da177e4
LT
421 if (reason & 0x80)
422 mem_parity_error(reason, regs);
423 if (reason & 0x40)
424 io_check_error(reason, regs);
081f75bb 425#ifdef CONFIG_X86_32
1da177e4
LT
426 /*
427 * Reassert NMI in case it became active meanwhile
b5964405 428 * as it's edge-triggered:
1da177e4
LT
429 */
430 reassert_nmi();
081f75bb 431#endif
1da177e4
LT
432}
433
e407d620
AH
434dotraplinkage notrace __kprobes void
435do_nmi(struct pt_regs *regs, long error_code)
1da177e4 436{
1da177e4
LT
437 nmi_enter();
438
915b0d01 439 inc_irq_stat(__nmi_count);
1da177e4 440
8f4e956b
AK
441 if (!ignore_nmis)
442 default_do_nmi(regs);
1da177e4
LT
443
444 nmi_exit();
445}
446
8f4e956b
AK
447void stop_nmi(void)
448{
449 acpi_nmi_disable();
450 ignore_nmis++;
451}
452
453void restart_nmi(void)
454{
455 ignore_nmis--;
456 acpi_nmi_enable();
457}
458
c1d518c8 459/* May run on IST stack. */
e407d620 460dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
1da177e4 461{
f503b5ae
JW
462#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
463 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
464 == NOTIFY_STOP)
465 return;
466#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
b94da1e4 467#ifdef CONFIG_KPROBES
1da177e4
LT
468 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
469 == NOTIFY_STOP)
48c88211 470 return;
b94da1e4
AH
471#else
472 if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
473 == NOTIFY_STOP)
474 return;
475#endif
b5964405 476
4915a35e 477 preempt_conditional_sti(regs);
3c1326f8 478 do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
4915a35e 479 preempt_conditional_cli(regs);
1da177e4 480}
1da177e4 481
081f75bb 482#ifdef CONFIG_X86_64
bd8b96df
IM
483/*
484 * Help handler running on IST stack to switch back to user stack
485 * for scheduling or signal handling. The actual stack switch is done in
486 * entry.S
487 */
081f75bb
AH
488asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
489{
490 struct pt_regs *regs = eregs;
491 /* Did already sync */
492 if (eregs == (struct pt_regs *)eregs->sp)
493 ;
494 /* Exception from user space */
495 else if (user_mode(eregs))
496 regs = task_pt_regs(current);
bd8b96df
IM
497 /*
498 * Exception from kernel and interrupts are enabled. Move to
499 * kernel process stack.
500 */
081f75bb
AH
501 else if (eregs->flags & X86_EFLAGS_IF)
502 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
503 if (eregs != regs)
504 *regs = *eregs;
505 return regs;
506}
507#endif
508
1da177e4
LT
509/*
510 * Our handling of the processor debug registers is non-trivial.
511 * We do not clear them on entry and exit from the kernel. Therefore
512 * it is possible to get a watchpoint trap here from inside the kernel.
513 * However, the code in ./ptrace.c has ensured that the user can
514 * only set watchpoints on userspace addresses. Therefore the in-kernel
515 * watchpoint trap can only occur in code which is reading/writing
516 * from user space. Such code must not hold kernel locks (since it
517 * can equally take a page fault), therefore it is safe to call
518 * force_sig_info even though that claims and releases locks.
b5964405 519 *
1da177e4
LT
520 * Code in ./signal.c ensures that the debug control register
521 * is restored before we deliver any signal, and therefore that
522 * user code runs with the correct debug control register even though
523 * we clear it here.
524 *
525 * Being careful here means that we don't have to be as careful in a
526 * lot of more complicated places (task switching can be a bit lazy
527 * about restoring all the debug state, and ptrace doesn't have to
528 * find every occurrence of the TF bit that could be saved away even
529 * by user code)
c1d518c8
AH
530 *
531 * May run on IST stack.
1da177e4 532 */
e407d620 533dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
1da177e4 534{
1da177e4 535 struct task_struct *tsk = current;
a1e80faf 536 int user_icebp = 0;
08d68323 537 unsigned long dr6;
da654b74 538 int si_code;
1da177e4 539
08d68323 540 get_debugreg(dr6, 6);
1da177e4 541
40f9249a
P
542 /* Filter out all the reserved bits which are preset to 1 */
543 dr6 &= ~DR6_RESERVED;
544
a1e80faf
FW
545 /*
546 * If dr6 has no reason to give us about the origin of this trap,
547 * then it's very likely the result of an icebp/int01 trap.
548 * User wants a sigtrap for that.
549 */
550 if (!dr6 && user_mode(regs))
551 user_icebp = 1;
552
f8561296 553 /* Catch kmemcheck conditions first of all! */
eadb8a09 554 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
f8561296
VN
555 return;
556
08d68323
P
557 /* DR6 may or may not be cleared by the CPU */
558 set_debugreg(0, 6);
10faa81e 559
ea8e61b7
PZ
560 /*
561 * The processor cleared BTF, so don't mark that we need it set.
562 */
563 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
564
08d68323
P
565 /* Store the virtualized DR6 value */
566 tsk->thread.debugreg6 = dr6;
567
62edab90
P
568 if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code,
569 SIGTRAP) == NOTIFY_STOP)
1da177e4 570 return;
3d2a71a5 571
1da177e4 572 /* It's safe to allow irq's after DR6 has been saved */
3d2a71a5 573 preempt_conditional_sti(regs);
1da177e4 574
08d68323
P
575 if (regs->flags & X86_VM_MASK) {
576 handle_vm86_trap((struct kernel_vm86_regs *) regs,
577 error_code, 1);
578 return;
1da177e4
LT
579 }
580
1da177e4 581 /*
08d68323
P
582 * Single-stepping through system calls: ignore any exceptions in
583 * kernel space, but re-enable TF when returning to user mode.
584 *
585 * We already checked v86 mode above, so we can check for kernel mode
586 * by just checking the CPL of CS.
1da177e4 587 */
08d68323
P
588 if ((dr6 & DR_STEP) && !user_mode(regs)) {
589 tsk->thread.debugreg6 &= ~DR_STEP;
590 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
591 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 592 }
08d68323 593 si_code = get_si_code(tsk->thread.debugreg6);
a1e80faf 594 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
08d68323 595 send_sigtrap(tsk, regs, error_code, si_code);
3d2a71a5 596 preempt_conditional_cli(regs);
1da177e4 597
1da177e4
LT
598 return;
599}
600
601/*
602 * Note that we play around with the 'TS' bit in an attempt to get
603 * the correct behaviour even in the presence of the asynchronous
604 * IRQ13 behaviour
605 */
9b6dba9e 606void math_error(struct pt_regs *regs, int error_code, int trapnr)
1da177e4 607{
e2e75c91 608 struct task_struct *task = current;
1da177e4 609 siginfo_t info;
9b6dba9e 610 unsigned short err;
e2e75c91
BG
611 char *str = (trapnr == 16) ? "fpu exception" : "simd exception";
612
613 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
614 return;
615 conditional_sti(regs);
616
617 if (!user_mode_vm(regs))
618 {
619 if (!fixup_exception(regs)) {
620 task->thread.error_code = error_code;
621 task->thread.trap_no = trapnr;
622 die(str, regs, error_code);
623 }
624 return;
625 }
1da177e4
LT
626
627 /*
628 * Save the info for the exception handler and clear the error.
629 */
1da177e4 630 save_init_fpu(task);
9b6dba9e
BG
631 task->thread.trap_no = trapnr;
632 task->thread.error_code = error_code;
1da177e4
LT
633 info.si_signo = SIGFPE;
634 info.si_errno = 0;
9b6dba9e
BG
635 info.si_addr = (void __user *)regs->ip;
636 if (trapnr == 16) {
637 unsigned short cwd, swd;
638 /*
639 * (~cwd & swd) will mask out exceptions that are not set to unmasked
640 * status. 0x3f is the exception bits in these regs, 0x200 is the
641 * C1 reg you need in case of a stack fault, 0x040 is the stack
642 * fault bit. We should only be taking one exception at a time,
643 * so if this combination doesn't produce any single exception,
644 * then we have a bad program that isn't synchronizing its FPU usage
645 * and it will suffer the consequences since we won't be able to
646 * fully reproduce the context of the exception
647 */
648 cwd = get_fpu_cwd(task);
649 swd = get_fpu_swd(task);
adf77bac 650
9b6dba9e
BG
651 err = swd & ~cwd;
652 } else {
653 /*
654 * The SIMD FPU exceptions are handled a little differently, as there
655 * is only a single status/control register. Thus, to determine which
656 * unmasked exception was caught we must mask the exception mask bits
657 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
658 */
659 unsigned short mxcsr = get_fpu_mxcsr(task);
660 err = ~(mxcsr >> 7) & mxcsr;
661 }
adf77bac
PA
662
663 if (err & 0x001) { /* Invalid op */
b5964405
IM
664 /*
665 * swd & 0x240 == 0x040: Stack Underflow
666 * swd & 0x240 == 0x240: Stack Overflow
667 * User must clear the SF bit (0x40) if set
668 */
669 info.si_code = FPE_FLTINV;
adf77bac 670 } else if (err & 0x004) { /* Divide by Zero */
b5964405 671 info.si_code = FPE_FLTDIV;
adf77bac 672 } else if (err & 0x008) { /* Overflow */
b5964405 673 info.si_code = FPE_FLTOVF;
adf77bac
PA
674 } else if (err & 0x012) { /* Denormal, Underflow */
675 info.si_code = FPE_FLTUND;
676 } else if (err & 0x020) { /* Precision */
b5964405 677 info.si_code = FPE_FLTRES;
adf77bac 678 } else {
bd8b96df
IM
679 /*
680 * If we're using IRQ 13, or supposedly even some trap 16
681 * implementations, it's possible we get a spurious trap...
682 */
a73ad333 683 return; /* Spurious trap, no error */
1da177e4
LT
684 }
685 force_sig_info(SIGFPE, &info, task);
686}
687
e407d620 688dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 689{
081f75bb 690#ifdef CONFIG_X86_32
1da177e4 691 ignore_fpu_irq = 1;
081f75bb
AH
692#endif
693
9b6dba9e 694 math_error(regs, error_code, 16);
1da177e4
LT
695}
696
e407d620
AH
697dotraplinkage void
698do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 699{
9b6dba9e 700 math_error(regs, error_code, 19);
1da177e4
LT
701}
702
e407d620
AH
703dotraplinkage void
704do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 705{
cf81978d 706 conditional_sti(regs);
1da177e4
LT
707#if 0
708 /* No need to warn about this any longer. */
b5964405 709 printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
1da177e4
LT
710#endif
711}
712
081f75bb 713asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
1da177e4 714{
1da177e4 715}
4efc0670 716
7856f6cc 717asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
081f75bb
AH
718{
719}
720
e6e9cac8
JF
721/*
722 * __math_state_restore assumes that cr0.TS is already clear and the
723 * fpu state is all ready for use. Used during context switch.
724 */
725void __math_state_restore(void)
081f75bb 726{
e6e9cac8
JF
727 struct thread_info *thread = current_thread_info();
728 struct task_struct *tsk = thread->task;
729
730 /*
731 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
732 */
733 if (unlikely(restore_fpu_checking(tsk))) {
734 stts();
735 force_sig(SIGSEGV, tsk);
736 return;
737 }
738
739 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
740 tsk->fpu_counter++;
081f75bb 741}
1da177e4
LT
742
743/*
b5964405 744 * 'math_state_restore()' saves the current math information in the
1da177e4
LT
745 * old math state array, and gets the new ones from the current task
746 *
747 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
748 * Don't touch unless you *really* know how it works.
749 *
750 * Must be called with kernel preemption disabled (in this case,
751 * local interrupts are disabled at the call-site in entry.S).
752 */
acc20761 753asmlinkage void math_state_restore(void)
1da177e4
LT
754{
755 struct thread_info *thread = current_thread_info();
756 struct task_struct *tsk = thread->task;
757
aa283f49
SS
758 if (!tsk_used_math(tsk)) {
759 local_irq_enable();
760 /*
761 * does a slab alloc which can sleep
762 */
763 if (init_fpu(tsk)) {
764 /*
765 * ran out of memory!
766 */
767 do_group_exit(SIGKILL);
768 return;
769 }
770 local_irq_disable();
771 }
772
b5964405 773 clts(); /* Allow maths ops (or we recurse) */
fcb2ac5b 774
e6e9cac8 775 __math_state_restore();
1da177e4 776}
5992b6da 777EXPORT_SYMBOL_GPL(math_state_restore);
1da177e4 778
e407d620 779dotraplinkage void __kprobes
aa78bcfa 780do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 781{
a334fe43 782#ifdef CONFIG_MATH_EMULATION
7643e9b9 783 if (read_cr0() & X86_CR0_EM) {
d315760f
TH
784 struct math_emu_info info = { };
785
7643e9b9 786 conditional_sti(regs);
d315760f 787
aa78bcfa 788 info.regs = regs;
d315760f 789 math_emulate(&info);
a334fe43 790 return;
7643e9b9 791 }
a334fe43
BG
792#endif
793 math_state_restore(); /* interrupts still off */
794#ifdef CONFIG_X86_32
795 conditional_sti(regs);
081f75bb 796#endif
7643e9b9
AH
797}
798
081f75bb 799#ifdef CONFIG_X86_32
e407d620 800dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
801{
802 siginfo_t info;
803 local_irq_enable();
804
805 info.si_signo = SIGILL;
806 info.si_errno = 0;
807 info.si_code = ILL_BADSTK;
fc6fcdfb 808 info.si_addr = NULL;
f8e0870f
AH
809 if (notify_die(DIE_TRAP, "iret exception",
810 regs, error_code, 32, SIGILL) == NOTIFY_STOP)
811 return;
3c1326f8 812 do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
f8e0870f 813}
081f75bb 814#endif
f8e0870f 815
29c84391
JK
816/* Set of traps needed for early debugging. */
817void __init early_trap_init(void)
818{
819 set_intr_gate_ist(1, &debug, DEBUG_STACK);
820 /* int3 can be called from all */
821 set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
822 set_intr_gate(14, &page_fault);
823 load_idt(&idt_descr);
824}
825
1da177e4
LT
826void __init trap_init(void)
827{
dbeb2be2
RR
828 int i;
829
1da177e4 830#ifdef CONFIG_EISA
927222b1 831 void __iomem *p = early_ioremap(0x0FFFD9, 4);
b5964405
IM
832
833 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
1da177e4 834 EISA_bus = 1;
927222b1 835 early_iounmap(p, 4);
1da177e4
LT
836#endif
837
976382dc 838 set_intr_gate(0, &divide_error);
699d2937 839 set_intr_gate_ist(2, &nmi, NMI_STACK);
699d2937
AH
840 /* int4 can be called from all */
841 set_system_intr_gate(4, &overflow);
64f644c0 842 set_intr_gate(5, &bounds);
12394cf5 843 set_intr_gate(6, &invalid_op);
7643e9b9 844 set_intr_gate(7, &device_not_available);
081f75bb 845#ifdef CONFIG_X86_32
a8c1be9d 846 set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
081f75bb
AH
847#else
848 set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK);
849#endif
51bc1ed6 850 set_intr_gate(9, &coprocessor_segment_overrun);
6bf77bf9 851 set_intr_gate(10, &invalid_TSS);
36d936c7 852 set_intr_gate(11, &segment_not_present);
699d2937 853 set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
c6df0d71 854 set_intr_gate(13, &general_protection);
cf81978d 855 set_intr_gate(15, &spurious_interrupt_bug);
252d28fe 856 set_intr_gate(16, &coprocessor_error);
5feedfd4 857 set_intr_gate(17, &alignment_check);
1da177e4 858#ifdef CONFIG_X86_MCE
699d2937 859 set_intr_gate_ist(18, &machine_check, MCE_STACK);
1da177e4 860#endif
b939bde2 861 set_intr_gate(19, &simd_coprocessor_error);
1da177e4 862
bb3f0b59
YL
863 /* Reserve all the builtin and the syscall vector: */
864 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
865 set_bit(i, used_vectors);
866
081f75bb
AH
867#ifdef CONFIG_IA32_EMULATION
868 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
bb3f0b59 869 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
081f75bb
AH
870#endif
871
872#ifdef CONFIG_X86_32
699d2937 873 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
dbeb2be2 874 set_bit(SYSCALL_VECTOR, used_vectors);
081f75bb 875#endif
bb3f0b59 876
1da177e4 877 /*
b5964405 878 * Should be a barrier for any external CPU state:
1da177e4
LT
879 */
880 cpu_init();
881
428cf902 882 x86_init.irqs.trap_init();
1da177e4 883}