[net-next-2.6.git] / arch / x86 / kernel / setup64.c

/* 
 * X86-64 specific CPU setup.
 * Copyright (C) 1995  Linus Torvalds
 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
 * See setup.c for older changelog.
 */ 
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/bootmem.h>
#include <linux/bitops.h>
#include <linux/module.h>
#include <asm/pda.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/desc.h>
#include <asm/atomic.h>
#include <asm/mmu_context.h>
#include <asm/smp.h>
#include <asm/i387.h>
#include <asm/percpu.h>
#include <asm/proto.h>
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/genapic.h>

#ifndef CONFIG_DEBUG_BOOT_PARAMS
struct boot_params __initdata boot_params;
#else
struct boot_params boot_params;
#endif

cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;

struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
EXPORT_SYMBOL(_cpu_pda);
struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;

struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };

char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));

unsigned long __supported_pte_mask __read_mostly = ~0UL;
EXPORT_SYMBOL_GPL(__supported_pte_mask);

static int do_not_nx __cpuinitdata = 0;

/* noexec=on|off
Control non executable mappings for 64bit processes.

on	Enable(default)
off	Disable
*/ 
static int __init nonx_setup(char *str)
{
	if (!str)
		return -EINVAL;
	if (!strncmp(str, "on", 2)) {
                __supported_pte_mask |= _PAGE_NX; 
 		do_not_nx = 0; 
	} else if (!strncmp(str, "off", 3)) {
		do_not_nx = 1;
		__supported_pte_mask &= ~_PAGE_NX;
        }
	return 0;
} 
early_param("noexec", nonx_setup);

int force_personality32 = 0; 

/* noexec32=on|off
Control non executable heap for 32bit processes.
To control the stack too use noexec=off

on	PROT_READ does not imply PROT_EXEC for 32bit processes
off	PROT_READ implies PROT_EXEC (default)
*/
static int __init nonx32_setup(char *str)
{
	if (!strcmp(str, "on"))
		force_personality32 &= ~READ_IMPLIES_EXEC;
	else if (!strcmp(str, "off"))
		force_personality32 |= READ_IMPLIES_EXEC;
	return 1;
}
__setup("noexec32=", nonx32_setup);

void pda_init(int cpu)
{ 
	struct x8664_pda *pda = cpu_pda(cpu);

	/* Setup up data that may be needed in __get_free_pages early */
	asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0)); 
	/* Memory clobbers used to order PDA accessed */
	mb();
	wrmsrl(MSR_GS_BASE, pda);
	mb();

	pda->cpunumber = cpu; 
	pda->irqcount = -1;
	pda->kernelstack = 
		(unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE; 
	pda->active_mm = &init_mm;
	pda->mmu_state = 0;

	if (cpu == 0) {
		/* others are initialized in smpboot.c */
		pda->pcurrent = &init_task;
		pda->irqstackptr = boot_cpu_stack; 
	} else {
		pda->irqstackptr = (char *)
			__get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
		if (!pda->irqstackptr)
			panic("cannot allocate irqstack for cpu %d", cpu); 
	}


	pda->irqstackptr += IRQSTACKSIZE-64;
} 

char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
__attribute__((section(".bss.page_aligned")));

extern asmlinkage void ignore_sysret(void);

/* May not be marked __init: used by software suspend */
void syscall_init(void)
{
	/* 
	 * LSTAR and STAR live in a bit strange symbiosis.
	 * They both write to the same internal register. STAR allows to set CS/DS
	 * but only a 32bit target. LSTAR sets the 64bit rip. 	 
	 */ 
	wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32); 
	wrmsrl(MSR_LSTAR, system_call); 
	wrmsrl(MSR_CSTAR, ignore_sysret);

#ifdef CONFIG_IA32_EMULATION   		
	syscall32_cpu_init ();
#endif

	/* Flags to clear on syscall */
	wrmsrl(MSR_SYSCALL_MASK,
	       X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_IOPL);
}

void __cpuinit check_efer(void)
{
	unsigned long efer;

	rdmsrl(MSR_EFER, efer); 
        if (!(efer & EFER_NX) || do_not_nx) { 
                __supported_pte_mask &= ~_PAGE_NX; 
        }       
}

unsigned long kernel_eflags;

/*
 * Copies of the original ist values from the tss are only accessed during
 * debugging, no special alignment required.
 */
DEFINE_PER_CPU(struct orig_ist, orig_ist);

/*
 * cpu_init() initializes state that is per-CPU. Some data is already
 * initialized (naturally) in the bootstrap process, such as the GDT
 * and IDT. We reload them nevertheless, this function acts as a
 * 'CPU state barrier', nothing should get across.
 * A lot of state is already set up in PDA init.
 */
void __cpuinit cpu_init (void)
{
	int cpu = stack_smp_processor_id();
	struct tss_struct *t = &per_cpu(init_tss, cpu);
	struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
	unsigned long v; 
	char *estacks = NULL; 
	struct task_struct *me;
	int i;

	/* CPU 0 is initialised in head64.c */
	if (cpu != 0) {
		pda_init(cpu);
	} else 
		estacks = boot_exception_stacks; 

	me = current;

	if (cpu_test_and_set(cpu, cpu_initialized))
		panic("CPU#%d already initialized!\n", cpu);

	printk("Initializing CPU#%d\n", cpu);

	clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);

	/*
	 * Initialize the per-CPU GDT with the boot GDT,
	 * and set up the GDT descriptor:
	 */
	if (cpu)
		memcpy(get_cpu_gdt_table(cpu), cpu_gdt_table, GDT_SIZE);

	cpu_gdt_descr[cpu].size = GDT_SIZE;
	load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]);
	load_idt((const struct desc_ptr *)&idt_descr);

	memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
	syscall_init();

	wrmsrl(MSR_FS_BASE, 0);
	wrmsrl(MSR_KERNEL_GS_BASE, 0);
	barrier(); 

	check_efer();

	/*
	 * set up and load the per-CPU TSS
	 */
	for (v = 0; v < N_EXCEPTION_STACKS; v++) {
		static const unsigned int order[N_EXCEPTION_STACKS] = {
			[0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
			[DEBUG_STACK - 1] = DEBUG_STACK_ORDER
		};
		if (cpu) {
			estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
			if (!estacks)
				panic("Cannot allocate exception stack %ld %d\n",
				      v, cpu); 
		}
		estacks += PAGE_SIZE << order[v];
		orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
	}

	t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
	/*
	 * <= is required because the CPU will access up to
	 * 8 bits beyond the end of the IO permission bitmap.
	 */
	for (i = 0; i <= IO_BITMAP_LONGS; i++)
		t->io_bitmap[i] = ~0UL;

	atomic_inc(&init_mm.mm_count);
	me->active_mm = &init_mm;
	if (me->mm)
		BUG();
	enter_lazy_tlb(&init_mm, me);

	set_tss_desc(cpu, t);
	load_TR_desc();
	load_LDT(&init_mm.context);

	/*
	 * Clear all 6 debug registers:
	 */

	set_debugreg(0UL, 0);
	set_debugreg(0UL, 1);
	set_debugreg(0UL, 2);
	set_debugreg(0UL, 3);
	set_debugreg(0UL, 6);
	set_debugreg(0UL, 7);

	fpu_init(); 

	raw_local_save_flags(kernel_eflags);

	if (is_uv_system())
		uv_cpu_init();
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* X86-64 specific CPU setup.
	3	* Copyright (C) 1995 Linus Torvalds
	4	* Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
	5	* See setup.c for older changelog.
1da177e4	6	*/
1da177e4 LT	7	#include <linux/init.h>
	8	#include <linux/kernel.h>
	9	#include <linux/sched.h>
	10	#include <linux/string.h>
	11	#include <linux/bootmem.h>
	12	#include <linux/bitops.h>
a940199f	13	#include <linux/module.h>
1da177e4 LT	14	#include <asm/pda.h>
	15	#include <asm/pgtable.h>
	16	#include <asm/processor.h>
	17	#include <asm/desc.h>
	18	#include <asm/atomic.h>
	19	#include <asm/mmu_context.h>
	20	#include <asm/smp.h>
	21	#include <asm/i387.h>
	22	#include <asm/percpu.h>
1da177e4	23	#include <asm/proto.h>
a940199f	24	#include <asm/sections.h>
30c82645	25	#include <asm/setup.h>
ac23d4ee	26	#include <asm/genapic.h>
1da177e4	27
6d7d7433	28	#ifndef CONFIG_DEBUG_BOOT_PARAMS
30c82645	29	struct boot_params __initdata boot_params;
6d7d7433 HY	30	#else
	31	struct boot_params boot_params;
	32	#endif
1da177e4	33
e6982c67	34	cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
1da177e4	35
365ba917	36	struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
2ee60e17	37	EXPORT_SYMBOL(_cpu_pda);
365ba917	38	struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
1da177e4	39
e57113bc	40	struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
1da177e4 LT	41
	42	char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
	43
6c231b7b	44	unsigned long __supported_pte_mask __read_mostly = ~0UL;
e68decb5 GOC	45	EXPORT_SYMBOL_GPL(__supported_pte_mask);
e68decb5 GOC	46
142a64a6	47	static int do_not_nx __cpuinitdata = 0;
1da177e4 LT	48
	49	/* noexec=on\|off
	50	Control non executable mappings for 64bit processes.
	51
	52	on Enable(default)
	53	off Disable
	54	*/
2c8c0e6b	55	static int __init nonx_setup(char *str)
1da177e4	56	{
2c8c0e6b AK	57	if (!str)
2c8c0e6b AK	58	return -EINVAL;
1da177e4 LT	59	if (!strncmp(str, "on", 2)) {
	60	__supported_pte_mask \|= _PAGE_NX;
	61	do_not_nx = 0;
	62	} else if (!strncmp(str, "off", 3)) {
	63	do_not_nx = 1;
	64	__supported_pte_mask &= ~_PAGE_NX;
	65	}
2c8c0e6b	66	return 0;
1da177e4	67	}
2c8c0e6b	68	early_param("noexec", nonx_setup);
1da177e4	69
7682968b	70	int force_personality32 = 0;
1da177e4 LT	71
	72	/* noexec32=on\|off
	73	Control non executable heap for 32bit processes.
	74	To control the stack too use noexec=off
	75
	76	on PROT_READ does not imply PROT_EXEC for 32bit processes
	77	off PROT_READ implies PROT_EXEC (default)
	78	*/
	79	static int __init nonx32_setup(char *str)
	80	{
	81	if (!strcmp(str, "on"))
	82	force_personality32 &= ~READ_IMPLIES_EXEC;
	83	else if (!strcmp(str, "off"))
	84	force_personality32 \|= READ_IMPLIES_EXEC;
9b41046c	85	return 1;
1da177e4 LT	86	}
	87	__setup("noexec32=", nonx32_setup);
	88
1da177e4 LT	89	void pda_init(int cpu)
1da177e4 LT	90	{
df79efde	91	struct x8664_pda *pda = cpu_pda(cpu);
1da177e4 LT	92
	93	/* Setup up data that may be needed in __get_free_pages early */
	94	asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
53ee11ae AK	95	/* Memory clobbers used to order PDA accessed */
53ee11ae AK	96	mb();
df79efde	97	wrmsrl(MSR_GS_BASE, pda);
53ee11ae	98	mb();
1da177e4	99
1da177e4 LT	100	pda->cpunumber = cpu;
	101	pda->irqcount = -1;
	102	pda->kernelstack =
	103	(unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
	104	pda->active_mm = &init_mm;
	105	pda->mmu_state = 0;
	106
	107	if (cpu == 0) {
	108	/* others are initialized in smpboot.c */
	109	pda->pcurrent = &init_task;
	110	pda->irqstackptr = boot_cpu_stack;
	111	} else {
	112	pda->irqstackptr = (char *)
	113	__get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
	114	if (!pda->irqstackptr)
	115	panic("cannot allocate irqstack for cpu %d", cpu);
	116	}
	117
1da177e4 LT	118
	119	pda->irqstackptr += IRQSTACKSIZE-64;
	120	}
	121
ab26a20b	122	char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
1da177e4 LT	123	__attribute__((section(".bss.page_aligned")));
1da177e4 LT	124
75154f40 AK	125	extern asmlinkage void ignore_sysret(void);
75154f40 AK	126
1da177e4 LT	127	/* May not be marked __init: used by software suspend */
	128	void syscall_init(void)
	129	{
	130	/*
	131	* LSTAR and STAR live in a bit strange symbiosis.
	132	* They both write to the same internal register. STAR allows to set CS/DS
	133	* but only a 32bit target. LSTAR sets the 64bit rip.
	134	*/
	135	wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 \| ((u64)__KERNEL_CS)<<32);
	136	wrmsrl(MSR_LSTAR, system_call);
75154f40	137	wrmsrl(MSR_CSTAR, ignore_sysret);
1da177e4 LT	138
	139	#ifdef CONFIG_IA32_EMULATION
	140	syscall32_cpu_init ();
	141	#endif
	142
	143	/* Flags to clear on syscall */
a46ff73d RM	144	wrmsrl(MSR_SYSCALL_MASK,
a46ff73d RM	145	X86_EFLAGS_TF\|X86_EFLAGS_DF\|X86_EFLAGS_IF\|X86_EFLAGS_IOPL);
1da177e4 LT	146	}
1da177e4 LT	147
e6982c67	148	void __cpuinit check_efer(void)
1da177e4 LT	149	{
	150	unsigned long efer;
	151
	152	rdmsrl(MSR_EFER, efer);
	153	if (!(efer & EFER_NX) \|\| do_not_nx) {
	154	__supported_pte_mask &= ~_PAGE_NX;
	155	}
	156	}
	157
658fdbef AK	158	unsigned long kernel_eflags;
658fdbef AK	159
77788878 HS	160	/*
	161	* Copies of the original ist values from the tss are only accessed during
	162	* debugging, no special alignment required.
	163	*/
	164	DEFINE_PER_CPU(struct orig_ist, orig_ist);
	165
1da177e4 LT	166	/*
	167	* cpu_init() initializes state that is per-CPU. Some data is already
	168	* initialized (naturally) in the bootstrap process, such as the GDT
	169	* and IDT. We reload them nevertheless, this function acts as a
	170	* 'CPU state barrier', nothing should get across.
	171	* A lot of state is already set up in PDA init.
	172	*/
e6982c67	173	void __cpuinit cpu_init (void)
1da177e4	174	{
1da177e4	175	int cpu = stack_smp_processor_id();
1da177e4	176	struct tss_struct *t = &per_cpu(init_tss, cpu);
01ebb77b	177	struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
1da177e4 LT	178	unsigned long v;
	179	char *estacks = NULL;
	180	struct task_struct *me;
	181	int i;
	182
	183	/* CPU 0 is initialised in head64.c */
	184	if (cpu != 0) {
	185	pda_init(cpu);
	186	} else
	187	estacks = boot_exception_stacks;
	188
	189	me = current;
	190
	191	if (cpu_test_and_set(cpu, cpu_initialized))
	192	panic("CPU#%d already initialized!\n", cpu);
	193
	194	printk("Initializing CPU#%d\n", cpu);
	195
a940199f	196	clear_in_cr4(X86_CR4_VME\|X86_CR4_PVI\|X86_CR4_TSD\|X86_CR4_DE);
1da177e4 LT	197
	198	/*
	199	* Initialize the per-CPU GDT with the boot GDT,
	200	* and set up the GDT descriptor:
	201	*/
c11efdf9	202	if (cpu)
f6dc247c	203	memcpy(get_cpu_gdt_table(cpu), cpu_gdt_table, GDT_SIZE);
1da177e4 LT	204
1da177e4 LT	205	cpu_gdt_descr[cpu].size = GDT_SIZE;
9d1c6e7c GOC	206	load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]);
9d1c6e7c GOC	207	load_idt((const struct desc_ptr *)&idt_descr);
1da177e4	208
c11efdf9	209	memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
1da177e4 LT	210	syscall_init();
	211
	212	wrmsrl(MSR_FS_BASE, 0);
	213	wrmsrl(MSR_KERNEL_GS_BASE, 0);
	214	barrier();
	215
	216	check_efer();
	217
	218	/*
	219	* set up and load the per-CPU TSS
	220	*/
	221	for (v = 0; v < N_EXCEPTION_STACKS; v++) {
f5741644 KO	222	static const unsigned int order[N_EXCEPTION_STACKS] = {
	223	[0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
	224	[DEBUG_STACK - 1] = DEBUG_STACK_ORDER
	225	};
1da177e4	226	if (cpu) {
b556b35e	227	estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
1da177e4 LT	228	if (!estacks)
	229	panic("Cannot allocate exception stack %ld %d\n",
	230	v, cpu);
	231	}
f5741644	232	estacks += PAGE_SIZE << order[v];
ca241c75	233	orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
1da177e4 LT	234	}
1da177e4 LT	235
ca241c75	236	t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
1da177e4 LT	237	/*
	238	* <= is required because the CPU will access up to
	239	* 8 bits beyond the end of the IO permission bitmap.
	240	*/
	241	for (i = 0; i <= IO_BITMAP_LONGS; i++)
	242	t->io_bitmap[i] = ~0UL;
	243
	244	atomic_inc(&init_mm.mm_count);
	245	me->active_mm = &init_mm;
	246	if (me->mm)
	247	BUG();
	248	enter_lazy_tlb(&init_mm, me);
	249
	250	set_tss_desc(cpu, t);
	251	load_TR_desc();
	252	load_LDT(&init_mm.context);
	253
	254	/*
	255	* Clear all 6 debug registers:
	256	*/
	257
2b514e74 JB	258	set_debugreg(0UL, 0);
	259	set_debugreg(0UL, 1);
	260	set_debugreg(0UL, 2);
	261	set_debugreg(0UL, 3);
	262	set_debugreg(0UL, 6);
	263	set_debugreg(0UL, 7);
1da177e4 LT	264
1da177e4 LT	265	fpu_init();
658fdbef AK	266
658fdbef AK	267	raw_local_save_flags(kernel_eflags);
ac23d4ee JS	268
	269	if (is_uv_system())
	270	uv_cpu_init();
1da177e4	271	}