[net-next-2.6.git] / arch / x86 / kernel / msr.c

/* ----------------------------------------------------------------------- *
 *
 *   Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
 *   Copyright 2009 Intel Corporation; author: H. Peter Anvin
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
 *   USA; either version 2 of the License, or (at your option) any later
 *   version; incorporated herein by reference.
 *
 * ----------------------------------------------------------------------- */

/*
 * x86 MSR access device
 *
 * This device is accessed by lseek() to the appropriate register number
 * and then read/write in chunks of 8 bytes.  A larger size means multiple
 * reads or writes of the same register.
 *
 * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
 * an SMP box will direct the access to CPU %d.
 */

#include <linux/module.h>

#include <linux/types.h>
#include <linux/errno.h>
#include <linux/fcntl.h>
#include <linux/init.h>
#include <linux/poll.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/major.h>
#include <linux/fs.h>
#include <linux/device.h>
#include <linux/cpu.h>
#include <linux/notifier.h>
#include <linux/uaccess.h>
#include <linux/gfp.h>

#include <asm/processor.h>
#include <asm/msr.h>
#include <asm/system.h>

static struct class *msr_class;

static loff_t msr_seek(struct file *file, loff_t offset, int orig)
{
	loff_t ret;
	struct inode *inode = file->f_mapping->host;

	mutex_lock(&inode->i_mutex);
	switch (orig) {
	case 0:
		file->f_pos = offset;
		ret = file->f_pos;
		break;
	case 1:
		file->f_pos += offset;
		ret = file->f_pos;
		break;
	default:
		ret = -EINVAL;
	}
	mutex_unlock(&inode->i_mutex);
	return ret;
}

static ssize_t msr_read(struct file *file, char __user *buf,
			size_t count, loff_t *ppos)
{
	u32 __user *tmp = (u32 __user *) buf;
	u32 data[2];
	u32 reg = *ppos;
	int cpu = iminor(file->f_path.dentry->d_inode);
	int err = 0;
	ssize_t bytes = 0;

	if (count % 8)
		return -EINVAL;	/* Invalid chunk size */

	for (; count; count -= 8) {
		err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
		if (err)
			break;
		if (copy_to_user(tmp, &data, 8)) {
			err = -EFAULT;
			break;
		}
		tmp += 2;
		bytes += 8;
	}

	return bytes ? bytes : err;
}

static ssize_t msr_write(struct file *file, const char __user *buf,
			 size_t count, loff_t *ppos)
{
	const u32 __user *tmp = (const u32 __user *)buf;
	u32 data[2];
	u32 reg = *ppos;
	int cpu = iminor(file->f_path.dentry->d_inode);
	int err = 0;
	ssize_t bytes = 0;

	if (count % 8)
		return -EINVAL;	/* Invalid chunk size */

	for (; count; count -= 8) {
		if (copy_from_user(&data, tmp, 8)) {
			err = -EFAULT;
			break;
		}
		err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
		if (err)
			break;
		tmp += 2;
		bytes += 8;
	}

	return bytes ? bytes : err;
}

static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg)
{
	u32 __user *uregs = (u32 __user *)arg;
	u32 regs[8];
	int cpu = iminor(file->f_path.dentry->d_inode);
	int err;

	switch (ioc) {
	case X86_IOC_RDMSR_REGS:
		if (!(file->f_mode & FMODE_READ)) {
			err = -EBADF;
			break;
		}
		if (copy_from_user(&regs, uregs, sizeof regs)) {
			err = -EFAULT;
			break;
		}
		err = rdmsr_safe_regs_on_cpu(cpu, regs);
		if (err)
			break;
		if (copy_to_user(uregs, &regs, sizeof regs))
			err = -EFAULT;
		break;

	case X86_IOC_WRMSR_REGS:
		if (!(file->f_mode & FMODE_WRITE)) {
			err = -EBADF;
			break;
		}
		if (copy_from_user(&regs, uregs, sizeof regs)) {
			err = -EFAULT;
			break;
		}
		err = wrmsr_safe_regs_on_cpu(cpu, regs);
		if (err)
			break;
		if (copy_to_user(uregs, &regs, sizeof regs))
			err = -EFAULT;
		break;

	default:
		err = -ENOTTY;
		break;
	}

	return err;
}

static int msr_open(struct inode *inode, struct file *file)
{
	unsigned int cpu;
	struct cpuinfo_x86 *c;

	cpu = iminor(file->f_path.dentry->d_inode);
	if (cpu >= nr_cpu_ids || !cpu_online(cpu))
		return -ENXIO;	/* No such CPU */

	c = &cpu_data(cpu);
	if (!cpu_has(c, X86_FEATURE_MSR))
		return -EIO;	/* MSR not supported */

	return 0;
}

/*
 * File operations we support
 */
static const struct file_operations msr_fops = {
	.owner = THIS_MODULE,
	.llseek = msr_seek,
	.read = msr_read,
	.write = msr_write,
	.open = msr_open,
	.unlocked_ioctl = msr_ioctl,
	.compat_ioctl = msr_ioctl,
};

static int __cpuinit msr_device_create(int cpu)
{
	struct device *dev;

	dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL,
			    "msr%d", cpu);
	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
}

static void msr_device_destroy(int cpu)
{
	device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
}

static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb,
				unsigned long action, void *hcpu)
{
	unsigned int cpu = (unsigned long)hcpu;
	int err = 0;

	switch (action) {
	case CPU_UP_PREPARE:
		err = msr_device_create(cpu);
		break;
	case CPU_UP_CANCELED:
	case CPU_UP_CANCELED_FROZEN:
	case CPU_DEAD:
		msr_device_destroy(cpu);
		break;
	}
	return notifier_from_errno(err);
}

static struct notifier_block __refdata msr_class_cpu_notifier = {
	.notifier_call = msr_class_cpu_callback,
};

static char *msr_devnode(struct device *dev, mode_t *mode)
{
	return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
}

static int __init msr_init(void)
{
	int i, err = 0;
	i = 0;

	if (__register_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr", &msr_fops)) {
		printk(KERN_ERR "msr: unable to get major %d for msr\n",
		       MSR_MAJOR);
		err = -EBUSY;
		goto out;
	}
	msr_class = class_create(THIS_MODULE, "msr");
	if (IS_ERR(msr_class)) {
		err = PTR_ERR(msr_class);
		goto out_chrdev;
	}
	msr_class->devnode = msr_devnode;
	for_each_online_cpu(i) {
		err = msr_device_create(i);
		if (err != 0)
			goto out_class;
	}
	register_hotcpu_notifier(&msr_class_cpu_notifier);

	err = 0;
	goto out;

out_class:
	i = 0;
	for_each_online_cpu(i)
		msr_device_destroy(i);
	class_destroy(msr_class);
out_chrdev:
	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
out:
	return err;
}

static void __exit msr_exit(void)
{
	int cpu = 0;
	for_each_online_cpu(cpu)
		msr_device_destroy(cpu);
	class_destroy(msr_class);
	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
	unregister_hotcpu_notifier(&msr_class_cpu_notifier);
}

module_init(msr_init);
module_exit(msr_exit)

MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
MODULE_DESCRIPTION("x86 generic MSR driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/* ----------------------------------------------------------------------- *
2b06ac86 PA	2	*
2b06ac86 PA	3	* Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
ff55df53	4	* Copyright 2009 Intel Corporation; author: H. Peter Anvin
1da177e4 LT	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
	9	* USA; either version 2 of the License, or (at your option) any later
	10	* version; incorporated herein by reference.
	11	*
	12	* ----------------------------------------------------------------------- */
	13
	14	/*
1da177e4 LT	15	* x86 MSR access device
	16	*
	17	* This device is accessed by lseek() to the appropriate register number
	18	* and then read/write in chunks of 8 bytes. A larger size means multiple
	19	* reads or writes of the same register.
	20	*
	21	* This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
	22	* an SMP box will direct the access to CPU %d.
	23	*/
	24
	25	#include <linux/module.h>
1da177e4 LT	26
	27	#include <linux/types.h>
	28	#include <linux/errno.h>
	29	#include <linux/fcntl.h>
	30	#include <linux/init.h>
	31	#include <linux/poll.h>
	32	#include <linux/smp.h>
	33	#include <linux/smp_lock.h>
	34	#include <linux/major.h>
	35	#include <linux/fs.h>
	36	#include <linux/device.h>
	37	#include <linux/cpu.h>
	38	#include <linux/notifier.h>
448dd2fa	39	#include <linux/uaccess.h>
5a0e3ad6	40	#include <linux/gfp.h>
1da177e4 LT	41
	42	#include <asm/processor.h>
	43	#include <asm/msr.h>
1da177e4 LT	44	#include <asm/system.h>
1da177e4 LT	45
8874b414	46	static struct class *msr_class;
1da177e4	47
1da177e4 LT	48	static loff_t msr_seek(struct file *file, loff_t offset, int orig)
1da177e4 LT	49	{
2b06ac86 PA	50	loff_t ret;
2b06ac86 PA	51	struct inode *inode = file->f_mapping->host;
1da177e4	52
2b06ac86	53	mutex_lock(&inode->i_mutex);
1da177e4 LT	54	switch (orig) {
	55	case 0:
	56	file->f_pos = offset;
	57	ret = file->f_pos;
	58	break;
	59	case 1:
	60	file->f_pos += offset;
	61	ret = file->f_pos;
2b06ac86 PA	62	break;
	63	default:
	64	ret = -EINVAL;
1da177e4	65	}
2b06ac86	66	mutex_unlock(&inode->i_mutex);
1da177e4 LT	67	return ret;
	68	}
	69
94a9fa41 PC	70	static ssize_t msr_read(struct file file, char __user buf,
94a9fa41 PC	71	size_t count, loff_t *ppos)
1da177e4 LT	72	{
	73	u32 __user tmp = (u32 __user ) buf;
	74	u32 data[2];
1da177e4	75	u32 reg = *ppos;
aab4c5a5	76	int cpu = iminor(file->f_path.dentry->d_inode);
85f1cb60 PA	77	int err = 0;
85f1cb60 PA	78	ssize_t bytes = 0;
1da177e4 LT	79
	80	if (count % 8)
	81	return -EINVAL; /* Invalid chunk size */
	82
6926d570	83	for (; count; count -= 8) {
78a62d2c	84	err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
0cc0213e	85	if (err)
85f1cb60	86	break;
85f1cb60 PA	87	if (copy_to_user(tmp, &data, 8)) {
	88	err = -EFAULT;
	89	break;
c6f31932	90	}
1da177e4	91	tmp += 2;
85f1cb60	92	bytes += 8;
1da177e4 LT	93	}
1da177e4 LT	94
85f1cb60	95	return bytes ? bytes : err;
1da177e4 LT	96	}
	97
	98	static ssize_t msr_write(struct file file, const char __user buf,
	99	size_t count, loff_t *ppos)
	100	{
	101	const u32 __user tmp = (const u32 __user )buf;
	102	u32 data[2];
1da177e4	103	u32 reg = *ppos;
aab4c5a5	104	int cpu = iminor(file->f_path.dentry->d_inode);
85f1cb60 PA	105	int err = 0;
85f1cb60 PA	106	ssize_t bytes = 0;
1da177e4 LT	107
	108	if (count % 8)
	109	return -EINVAL; /* Invalid chunk size */
	110
f475ff35	111	for (; count; count -= 8) {
85f1cb60 PA	112	if (copy_from_user(&data, tmp, 8)) {
	113	err = -EFAULT;
	114	break;
	115	}
78a62d2c	116	err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
0cc0213e	117	if (err)
85f1cb60	118	break;
1da177e4	119	tmp += 2;
85f1cb60	120	bytes += 8;
1da177e4 LT	121	}
1da177e4 LT	122
85f1cb60	123	return bytes ? bytes : err;
1da177e4 LT	124	}
1da177e4 LT	125
ff55df53 PA	126	static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg)
	127	{
	128	u32 __user uregs = (u32 __user )arg;
	129	u32 regs[8];
	130	int cpu = iminor(file->f_path.dentry->d_inode);
	131	int err;
	132
	133	switch (ioc) {
	134	case X86_IOC_RDMSR_REGS:
	135	if (!(file->f_mode & FMODE_READ)) {
	136	err = -EBADF;
	137	break;
	138	}
	139	if (copy_from_user(&regs, uregs, sizeof regs)) {
	140	err = -EFAULT;
	141	break;
	142	}
	143	err = rdmsr_safe_regs_on_cpu(cpu, regs);
	144	if (err)
	145	break;
	146	if (copy_to_user(uregs, &regs, sizeof regs))
	147	err = -EFAULT;
	148	break;
	149
	150	case X86_IOC_WRMSR_REGS:
	151	if (!(file->f_mode & FMODE_WRITE)) {
	152	err = -EBADF;
	153	break;
	154	}
	155	if (copy_from_user(&regs, uregs, sizeof regs)) {
	156	err = -EFAULT;
	157	break;
	158	}
	159	err = wrmsr_safe_regs_on_cpu(cpu, regs);
	160	if (err)
	161	break;
	162	if (copy_to_user(uregs, &regs, sizeof regs))
	163	err = -EFAULT;
	164	break;
	165
	166	default:
	167	err = -ENOTTY;
	168	break;
	169	}
	170
	171	return err;
	172	}
	173
1da177e4 LT	174	static int msr_open(struct inode inode, struct file file)
1da177e4 LT	175	{
494c2ebf PA	176	unsigned int cpu;
494c2ebf PA	177	struct cpuinfo_x86 *c;
1da177e4	178
5119e92e	179	cpu = iminor(file->f_path.dentry->d_inode);
d6c30405 FW	180	if (cpu >= nr_cpu_ids \|\| !cpu_online(cpu))
	181	return -ENXIO; /* No such CPU */
	182
5119e92e JC	183	c = &cpu_data(cpu);
5119e92e JC	184	if (!cpu_has(c, X86_FEATURE_MSR))
d6c30405 FW	185	return -EIO; /* MSR not supported */
	186
	187	return 0;
1da177e4 LT	188	}
	189
	190	/*
	191	* File operations we support
	192	*/
5dfe4c96	193	static const struct file_operations msr_fops = {
1da177e4 LT	194	.owner = THIS_MODULE,
	195	.llseek = msr_seek,
	196	.read = msr_read,
	197	.write = msr_write,
	198	.open = msr_open,
ff55df53 PA	199	.unlocked_ioctl = msr_ioctl,
ff55df53 PA	200	.compat_ioctl = msr_ioctl,
1da177e4 LT	201	};
1da177e4 LT	202
38048983	203	static int __cpuinit msr_device_create(int cpu)
1da177e4	204	{
a271aaf1	205	struct device *dev;
1da177e4	206
a9b12619 GKH	207	dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL,
a9b12619 GKH	208	"msr%d", cpu);
881a841f AM	209	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
	210	}
	211
	212	static void msr_device_destroy(int cpu)
	213	{
	214	device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
1da177e4 LT	215	}
1da177e4 LT	216
761c4bf8	217	static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb,
e09793bb	218	unsigned long action, void *hcpu)
1da177e4 LT	219	{
1da177e4 LT	220	unsigned int cpu = (unsigned long)hcpu;
881a841f	221	int err = 0;
1da177e4 LT	222
1da177e4 LT	223	switch (action) {
881a841f	224	case CPU_UP_PREPARE:
881a841f	225	err = msr_device_create(cpu);
1da177e4	226	break;
881a841f	227	case CPU_UP_CANCELED:
b844eba2	228	case CPU_UP_CANCELED_FROZEN:
1da177e4	229	case CPU_DEAD:
881a841f	230	msr_device_destroy(cpu);
1da177e4 LT	231	break;
1da177e4 LT	232	}
a94247e7	233	return notifier_from_errno(err);
1da177e4 LT	234	}
1da177e4 LT	235
c72258c7	236	static struct notifier_block __refdata msr_class_cpu_notifier = {
1da177e4 LT	237	.notifier_call = msr_class_cpu_callback,
	238	};
	239
e454cea2	240	static char msr_devnode(struct device dev, mode_t *mode)
07e9bb8e KS	241	{
	242	return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
	243	}
	244
1da177e4 LT	245	static int __init msr_init(void)
	246	{
	247	int i, err = 0;
	248	i = 0;
	249
0b962d47	250	if (__register_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr", &msr_fops)) {
1da177e4 LT	251	printk(KERN_ERR "msr: unable to get major %d for msr\n",
	252	MSR_MAJOR);
	253	err = -EBUSY;
	254	goto out;
	255	}
8874b414	256	msr_class = class_create(THIS_MODULE, "msr");
1da177e4 LT	257	if (IS_ERR(msr_class)) {
	258	err = PTR_ERR(msr_class);
	259	goto out_chrdev;
	260	}
e454cea2	261	msr_class->devnode = msr_devnode;
1da177e4	262	for_each_online_cpu(i) {
a271aaf1	263	err = msr_device_create(i);
1da177e4 LT	264	if (err != 0)
	265	goto out_class;
	266	}
e09793bb	267	register_hotcpu_notifier(&msr_class_cpu_notifier);
1da177e4 LT	268
	269	err = 0;
	270	goto out;
	271
	272	out_class:
	273	i = 0;
	274	for_each_online_cpu(i)
881a841f	275	msr_device_destroy(i);
8874b414	276	class_destroy(msr_class);
1da177e4	277	out_chrdev:
0b962d47	278	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
1da177e4 LT	279	out:
	280	return err;
	281	}
	282
	283	static void __exit msr_exit(void)
	284	{
	285	int cpu = 0;
	286	for_each_online_cpu(cpu)
881a841f	287	msr_device_destroy(cpu);
8874b414	288	class_destroy(msr_class);
da482474	289	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
e09793bb	290	unregister_hotcpu_notifier(&msr_class_cpu_notifier);
1da177e4 LT	291	}
	292
	293	module_init(msr_init);
	294	module_exit(msr_exit)
	295
	296	MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
	297	MODULE_DESCRIPTION("x86 generic MSR driver");
	298	MODULE_LICENSE("GPL");