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[net-next-2.6.git] / arch / x86 / kernel / mpparse.c
CommitLineData
1da177e4 1/*
11113f84 2 * Intel Multiprocessor Specification 1.1 and 1.4
1da177e4
LT
3 * compliant MP-table parsing routines.
4 *
87c6fe26 5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
1da177e4 6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
85bdddec 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
1da177e4
LT
8 */
9
10#include <linux/mm.h>
1da177e4 11#include <linux/init.h>
1da177e4 12#include <linux/delay.h>
1da177e4 13#include <linux/bootmem.h>
1da177e4
LT
14#include <linux/kernel_stat.h>
15#include <linux/mc146818rtc.h>
16#include <linux/bitops.h>
85bdddec
AS
17#include <linux/acpi.h>
18#include <linux/module.h>
103ceffb 19#include <linux/smp.h>
1da177e4 20
1da177e4
LT
21#include <asm/mtrr.h>
22#include <asm/mpspec.h>
85bdddec 23#include <asm/pgalloc.h>
1da177e4 24#include <asm/io_apic.h>
85bdddec 25#include <asm/proto.h>
ce3fe6b2 26#include <asm/bios_ebda.h>
2944e16b
YL
27#include <asm/e820.h>
28#include <asm/trampoline.h>
3c9cb6de 29#include <asm/setup.h>
1da177e4
LT
30
31#include <mach_apic.h>
85bdddec 32#ifdef CONFIG_X86_32
874c4fe3 33#include <mach_apicdef.h>
1da177e4 34#include <mach_mpparse.h>
85bdddec 35#endif
1da177e4 36
1da177e4
LT
37/*
38 * Checksum an MP configuration block.
39 */
40
41static int __init mpf_checksum(unsigned char *mp, int len)
42{
43 int sum = 0;
44
45 while (len--)
46 sum += *mp++;
47
48 return sum & 0xFF;
49}
50
f4f21b71 51static void __init MP_processor_info(struct mpc_cpu *m)
c853c676
AS
52{
53 int apicid;
746f2244 54 char *bootup_cpu = "";
c853c676 55
c4563826 56 if (!(m->cpuflag & CPU_ENABLED)) {
7b1292e2 57 disabled_cpus++;
1da177e4 58 return;
7b1292e2 59 }
64898a8b
YL
60
61 if (x86_quirks->mpc_apic_id)
62 apicid = x86_quirks->mpc_apic_id(m);
ab530e1f 63 else
c4563826 64 apicid = m->apicid;
64898a8b 65
c4563826 66 if (m->cpuflag & CPU_BOOTPROCESSOR) {
746f2244 67 bootup_cpu = " (Bootup-CPU)";
c4563826 68 boot_cpu_physical_apicid = m->apicid;
1da177e4
LT
69 }
70
c4563826
JSR
71 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
72 generic_processor_info(apicid, m->apicver);
1da177e4
LT
73}
74
85cc35fa 75#ifdef CONFIG_X86_IO_APIC
00fb8606 76static void __init MP_bus_info(struct mpc_bus *m)
1da177e4
LT
77{
78 char str[7];
d4c715fa 79 memcpy(str, m->bustype, 6);
1da177e4
LT
80 str[6] = 0;
81
64898a8b
YL
82 if (x86_quirks->mpc_oem_bus_info)
83 x86_quirks->mpc_oem_bus_info(m, str);
84 else
d4c715fa 85 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
1da177e4 86
5e4edbb7 87#if MAX_MP_BUSSES < 256
d4c715fa 88 if (m->busid >= MAX_MP_BUSSES) {
c0ec31ad 89 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
4ef81297 90 " is too large, max. supported is %d\n",
d4c715fa 91 m->busid, str, MAX_MP_BUSSES - 1);
c0ec31ad
RD
92 return;
93 }
5e4edbb7 94#endif
c0ec31ad 95
f8924e77 96 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
d4c715fa 97 set_bit(m->busid, mp_bus_not_pci);
103ceffb 98#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
d4c715fa 99 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
f8924e77
AS
100#endif
101 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
64898a8b
YL
102 if (x86_quirks->mpc_oem_pci_bus)
103 x86_quirks->mpc_oem_pci_bus(m);
104
d4c715fa 105 clear_bit(m->busid, mp_bus_not_pci);
103ceffb 106#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
d4c715fa 107 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
4ef81297 108 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
d4c715fa 109 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
4ef81297 110 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
d4c715fa 111 mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
c0a282c2 112#endif
f8924e77
AS
113 } else
114 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
1da177e4 115}
85cc35fa 116#endif
1da177e4 117
61048c63
AS
118#ifdef CONFIG_X86_IO_APIC
119
857033a6
AS
120static int bad_ioapic(unsigned long address)
121{
122 if (nr_ioapics >= MAX_IO_APICS) {
123 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
124 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
125 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
126 }
127 if (!address) {
128 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
129 " found in table, skipping!\n");
130 return 1;
131 }
132 return 0;
133}
134
2b85b5fb 135static void __init MP_ioapic_info(struct mpc_ioapic *m)
1da177e4 136{
5df82c7d 137 if (!(m->flags & MPC_APIC_USABLE))
1da177e4
LT
138 return;
139
64883ab0 140 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
5df82c7d 141 m->apicid, m->apicver, m->apicaddr);
857033a6 142
5df82c7d 143 if (bad_ioapic(m->apicaddr))
1da177e4 144 return;
857033a6 145
5df82c7d
JSR
146 mp_ioapics[nr_ioapics].mp_apicaddr = m->apicaddr;
147 mp_ioapics[nr_ioapics].mp_apicid = m->apicid;
148 mp_ioapics[nr_ioapics].mp_type = m->type;
149 mp_ioapics[nr_ioapics].mp_apicver = m->apicver;
150 mp_ioapics[nr_ioapics].mp_flags = m->flags;
1da177e4
LT
151 nr_ioapics++;
152}
153
540d4e72 154static void print_MP_intsrc_info(struct mpc_intsrc *m)
1da177e4 155{
eeb0d7d1 156 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
1da177e4 157 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
e253b396
JSR
158 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
159 m->srcbusirq, m->dstapic, m->dstirq);
2944e16b
YL
160}
161
162static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq)
163{
eeb0d7d1 164 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
2944e16b
YL
165 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
166 mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3,
167 (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus,
168 mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq);
169}
170
540d4e72 171static void __init assign_to_mp_irq(struct mpc_intsrc *m,
2944e16b
YL
172 struct mp_config_intsrc *mp_irq)
173{
e253b396
JSR
174 mp_irq->mp_dstapic = m->dstapic;
175 mp_irq->mp_type = m->type;
176 mp_irq->mp_irqtype = m->irqtype;
177 mp_irq->mp_irqflag = m->irqflag;
178 mp_irq->mp_srcbus = m->srcbus;
179 mp_irq->mp_srcbusirq = m->srcbusirq;
180 mp_irq->mp_dstirq = m->dstirq;
2944e16b
YL
181}
182
183static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq,
540d4e72 184 struct mpc_intsrc *m)
2944e16b 185{
e253b396
JSR
186 m->dstapic = mp_irq->mp_dstapic;
187 m->type = mp_irq->mp_type;
188 m->irqtype = mp_irq->mp_irqtype;
189 m->irqflag = mp_irq->mp_irqflag;
190 m->srcbus = mp_irq->mp_srcbus;
191 m->srcbusirq = mp_irq->mp_srcbusirq;
192 m->dstirq = mp_irq->mp_dstirq;
2944e16b
YL
193}
194
fcfa146e 195static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq,
540d4e72 196 struct mpc_intsrc *m)
2944e16b 197{
e253b396 198 if (mp_irq->mp_dstapic != m->dstapic)
2944e16b 199 return 1;
e253b396 200 if (mp_irq->mp_type != m->type)
2944e16b 201 return 2;
e253b396 202 if (mp_irq->mp_irqtype != m->irqtype)
2944e16b 203 return 3;
e253b396 204 if (mp_irq->mp_irqflag != m->irqflag)
2944e16b 205 return 4;
e253b396 206 if (mp_irq->mp_srcbus != m->srcbus)
2944e16b 207 return 5;
e253b396 208 if (mp_irq->mp_srcbusirq != m->srcbusirq)
2944e16b 209 return 6;
e253b396 210 if (mp_irq->mp_dstirq != m->dstirq)
2944e16b
YL
211 return 7;
212
213 return 0;
214}
215
540d4e72 216static void __init MP_intsrc_info(struct mpc_intsrc *m)
2944e16b
YL
217{
218 int i;
219
220 print_MP_intsrc_info(m);
221
fcfa146e
YL
222 for (i = 0; i < mp_irq_entries; i++) {
223 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
224 return;
225 }
2944e16b
YL
226
227 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
1da177e4
LT
228 if (++mp_irq_entries == MAX_IRQ_SOURCES)
229 panic("Max # of irq sources exceeded!!\n");
230}
231
61048c63
AS
232#endif
233
8fb2952b 234static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
1da177e4 235{
eeb0d7d1 236 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
1da177e4 237 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
b5ced7cd
JSR
238 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
239 m->srcbusirq, m->destapic, m->destapiclint);
1da177e4
LT
240}
241
1da177e4
LT
242/*
243 * Read/parse the MPC
244 */
245
f29521e4 246static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
1da177e4 247{
1da177e4 248
6c65da50 249 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
e950bea8 250 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
6c65da50
JSR
251 mpc->signature[0], mpc->signature[1],
252 mpc->signature[2], mpc->signature[3]);
1da177e4
LT
253 return 0;
254 }
6c65da50 255 if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
e950bea8 256 printk(KERN_ERR "MPTABLE: checksum error!\n");
1da177e4
LT
257 return 0;
258 }
6c65da50 259 if (mpc->spec != 0x01 && mpc->spec != 0x04) {
e950bea8 260 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
6c65da50 261 mpc->spec);
1da177e4
LT
262 return 0;
263 }
6c65da50 264 if (!mpc->lapic) {
e950bea8 265 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
1da177e4
LT
266 return 0;
267 }
6c65da50 268 memcpy(oem, mpc->oem, 8);
4ef81297 269 oem[8] = 0;
11a62a05 270 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
1da177e4 271
6c65da50 272 memcpy(str, mpc->productid, 12);
4ef81297 273 str[12] = 0;
1da177e4 274
11a62a05 275 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
1da177e4 276
6c65da50 277 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
1da177e4 278
2944e16b
YL
279 return 1;
280}
281
f29521e4 282static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
2944e16b
YL
283{
284 char str[16];
285 char oem[10];
286
287 int count = sizeof(*mpc);
288 unsigned char *mpt = ((unsigned char *)mpc) + count;
289
290 if (!smp_check_mpc(mpc, oem, str))
291 return 0;
292
293#ifdef CONFIG_X86_32
d49c4288
YL
294 /*
295 * need to make sure summit and es7000's mps_oem_check is safe to be
296 * called early via genericarch 's mps_oem_check
297 */
298 if (early) {
299#ifdef CONFIG_X86_NUMAQ
300 numaq_mps_oem_check(mpc, oem, str);
301#endif
302 } else
303 mps_oem_check(mpc, oem, str);
2944e16b 304#endif
e950bea8 305 /* save the local APIC address, it might be non-default */
1da177e4 306 if (!acpi_lapic)
6c65da50 307 mp_lapic_addr = mpc->lapic;
1da177e4 308
888032cd
AS
309 if (early)
310 return 1;
311
6c65da50
JSR
312 if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
313 struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
314 x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
64898a8b
YL
315 }
316
1da177e4 317 /*
4ef81297 318 * Now process the configuration blocks.
1da177e4 319 */
64898a8b
YL
320 if (x86_quirks->mpc_record)
321 *x86_quirks->mpc_record = 0;
322
6c65da50 323 while (count < mpc->length) {
4ef81297
AS
324 switch (*mpt) {
325 case MP_PROCESSOR:
1da177e4 326 {
f4f21b71 327 struct mpc_cpu *m = (struct mpc_cpu *)mpt;
1da177e4
LT
328 /* ACPI may have already provided this data */
329 if (!acpi_lapic)
330 MP_processor_info(m);
331 mpt += sizeof(*m);
332 count += sizeof(*m);
333 break;
334 }
4ef81297 335 case MP_BUS:
1da177e4 336 {
00fb8606 337 struct mpc_bus *m = (struct mpc_bus *)mpt;
85cc35fa 338#ifdef CONFIG_X86_IO_APIC
1da177e4 339 MP_bus_info(m);
85cc35fa 340#endif
1da177e4
LT
341 mpt += sizeof(*m);
342 count += sizeof(*m);
343 break;
344 }
4ef81297 345 case MP_IOAPIC:
1da177e4 346 {
61048c63 347#ifdef CONFIG_X86_IO_APIC
2b85b5fb 348 struct mpc_ioapic *m = (struct mpc_ioapic *)mpt;
1da177e4 349 MP_ioapic_info(m);
61048c63 350#endif
2b85b5fb
JSR
351 mpt += sizeof(struct mpc_ioapic);
352 count += sizeof(struct mpc_ioapic);
1da177e4
LT
353 break;
354 }
4ef81297 355 case MP_INTSRC:
1da177e4 356 {
61048c63 357#ifdef CONFIG_X86_IO_APIC
540d4e72 358 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
1da177e4
LT
359
360 MP_intsrc_info(m);
61048c63 361#endif
540d4e72
JSR
362 mpt += sizeof(struct mpc_intsrc);
363 count += sizeof(struct mpc_intsrc);
1da177e4
LT
364 break;
365 }
4ef81297 366 case MP_LINTSRC:
1da177e4 367 {
8fb2952b
JSR
368 struct mpc_lintsrc *m =
369 (struct mpc_lintsrc *)mpt;
1da177e4 370 MP_lintsrc_info(m);
4ef81297
AS
371 mpt += sizeof(*m);
372 count += sizeof(*m);
1da177e4
LT
373 break;
374 }
4ef81297 375 default:
711554db
YL
376 /* wrong mptable */
377 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
378 printk(KERN_ERR "type %x\n", *mpt);
379 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
6c65da50
JSR
380 1, mpc, mpc->length, 1);
381 count = mpc->length;
711554db 382 break;
1da177e4 383 }
64898a8b
YL
384 if (x86_quirks->mpc_record)
385 (*x86_quirks->mpc_record)++;
1da177e4 386 }
e0da3364
YL
387
388#ifdef CONFIG_X86_GENERICARCH
389 generic_bigsmp_probe();
390#endif
391
6e1cb38a 392#ifdef CONFIG_X86_32
3c43f039 393 setup_apic_routing();
6e1cb38a 394#endif
1da177e4 395 if (!num_processors)
e950bea8 396 printk(KERN_ERR "MPTABLE: no processors registered!\n");
1da177e4
LT
397 return num_processors;
398}
399
61048c63
AS
400#ifdef CONFIG_X86_IO_APIC
401
1da177e4
LT
402static int __init ELCR_trigger(unsigned int irq)
403{
404 unsigned int port;
405
406 port = 0x4d0 + (irq >> 3);
407 return (inb(port) >> (irq & 7)) & 1;
408}
409
410static void __init construct_default_ioirq_mptable(int mpc_default_type)
411{
540d4e72 412 struct mpc_intsrc intsrc;
1da177e4
LT
413 int i;
414 int ELCR_fallback = 0;
415
e253b396
JSR
416 intsrc.type = MP_INTSRC;
417 intsrc.irqflag = 0; /* conforming */
418 intsrc.srcbus = 0;
419 intsrc.dstapic = mp_ioapics[0].mp_apicid;
1da177e4 420
e253b396 421 intsrc.irqtype = mp_INT;
1da177e4
LT
422
423 /*
424 * If true, we have an ISA/PCI system with no IRQ entries
425 * in the MP table. To prevent the PCI interrupts from being set up
426 * incorrectly, we try to use the ELCR. The sanity check to see if
427 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
428 * never be level sensitive, so we simply see if the ELCR agrees.
429 * If it does, we assume it's valid.
430 */
431 if (mpc_default_type == 5) {
62441bf1
AS
432 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
433 "falling back to ELCR\n");
1da177e4 434
62441bf1
AS
435 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
436 ELCR_trigger(13))
437 printk(KERN_ERR "ELCR contains invalid data... "
438 "not using ELCR\n");
1da177e4 439 else {
4ef81297
AS
440 printk(KERN_INFO
441 "Using ELCR to identify PCI interrupts\n");
1da177e4
LT
442 ELCR_fallback = 1;
443 }
444 }
445
446 for (i = 0; i < 16; i++) {
447 switch (mpc_default_type) {
448 case 2:
449 if (i == 0 || i == 13)
450 continue; /* IRQ0 & IRQ13 not connected */
451 /* fall through */
452 default:
453 if (i == 2)
454 continue; /* IRQ2 is never connected */
455 }
456
457 if (ELCR_fallback) {
458 /*
459 * If the ELCR indicates a level-sensitive interrupt, we
460 * copy that information over to the MP table in the
461 * irqflag field (level sensitive, active high polarity).
462 */
463 if (ELCR_trigger(i))
e253b396 464 intsrc.irqflag = 13;
1da177e4 465 else
e253b396 466 intsrc.irqflag = 0;
1da177e4
LT
467 }
468
e253b396
JSR
469 intsrc.srcbusirq = i;
470 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
1da177e4
LT
471 MP_intsrc_info(&intsrc);
472 }
473
e253b396
JSR
474 intsrc.irqtype = mp_ExtINT;
475 intsrc.srcbusirq = 0;
476 intsrc.dstirq = 0; /* 8259A to INTIN0 */
1da177e4
LT
477 MP_intsrc_info(&intsrc);
478}
479
61048c63 480
39e00fe2 481static void __init construct_ioapic_table(int mpc_default_type)
1da177e4 482{
2b85b5fb 483 struct mpc_ioapic ioapic;
00fb8606 484 struct mpc_bus bus;
1da177e4 485
d4c715fa
JSR
486 bus.type = MP_BUS;
487 bus.busid = 0;
1da177e4 488 switch (mpc_default_type) {
4ef81297 489 default:
62441bf1 490 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
4ef81297
AS
491 mpc_default_type);
492 /* fall through */
493 case 1:
494 case 5:
d4c715fa 495 memcpy(bus.bustype, "ISA ", 6);
4ef81297
AS
496 break;
497 case 2:
498 case 6:
499 case 3:
d4c715fa 500 memcpy(bus.bustype, "EISA ", 6);
4ef81297
AS
501 break;
502 case 4:
503 case 7:
d4c715fa 504 memcpy(bus.bustype, "MCA ", 6);
1da177e4
LT
505 }
506 MP_bus_info(&bus);
507 if (mpc_default_type > 4) {
d4c715fa
JSR
508 bus.busid = 1;
509 memcpy(bus.bustype, "PCI ", 6);
1da177e4
LT
510 MP_bus_info(&bus);
511 }
512
5df82c7d
JSR
513 ioapic.type = MP_IOAPIC;
514 ioapic.apicid = 2;
515 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
516 ioapic.flags = MPC_APIC_USABLE;
517 ioapic.apicaddr = 0xFEC00000;
1da177e4
LT
518 MP_ioapic_info(&ioapic);
519
520 /*
521 * We set up most of the low 16 IO-APIC pins according to MPS rules.
522 */
523 construct_default_ioirq_mptable(mpc_default_type);
85cc35fa
TG
524}
525#else
39e00fe2 526static inline void __init construct_ioapic_table(int mpc_default_type) { }
61048c63 527#endif
85cc35fa
TG
528
529static inline void __init construct_default_ISA_mptable(int mpc_default_type)
530{
f4f21b71 531 struct mpc_cpu processor;
8fb2952b 532 struct mpc_lintsrc lintsrc;
85cc35fa
TG
533 int linttypes[2] = { mp_ExtINT, mp_NMI };
534 int i;
535
536 /*
537 * local APIC has default address
538 */
539 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
540
541 /*
542 * 2 CPUs, numbered 0 & 1.
543 */
c4563826 544 processor.type = MP_PROCESSOR;
85cc35fa 545 /* Either an integrated APIC or a discrete 82489DX. */
c4563826
JSR
546 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
547 processor.cpuflag = CPU_ENABLED;
548 processor.cpufeature = (boot_cpu_data.x86 << 8) |
85cc35fa 549 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
c4563826
JSR
550 processor.featureflag = boot_cpu_data.x86_capability[0];
551 processor.reserved[0] = 0;
552 processor.reserved[1] = 0;
85cc35fa 553 for (i = 0; i < 2; i++) {
c4563826 554 processor.apicid = i;
85cc35fa
TG
555 MP_processor_info(&processor);
556 }
557
558 construct_ioapic_table(mpc_default_type);
559
b5ced7cd
JSR
560 lintsrc.type = MP_LINTSRC;
561 lintsrc.irqflag = 0; /* conforming */
562 lintsrc.srcbusid = 0;
563 lintsrc.srcbusirq = 0;
564 lintsrc.destapic = MP_APIC_ALL;
1da177e4 565 for (i = 0; i < 2; i++) {
b5ced7cd
JSR
566 lintsrc.irqtype = linttypes[i];
567 lintsrc.destapiclint = i;
1da177e4
LT
568 MP_lintsrc_info(&lintsrc);
569 }
570}
571
572static struct intel_mp_floating *mpf_found;
573
574/*
575 * Scan the memory blocks for an SMP configuration block.
576 */
3b33553b 577static void __init __get_smp_config(unsigned int early)
1da177e4
LT
578{
579 struct intel_mp_floating *mpf = mpf_found;
580
69b88afa
YL
581 if (!mpf)
582 return;
583
888032cd
AS
584 if (acpi_lapic && early)
585 return;
69b88afa 586
1da177e4 587 /*
69b88afa
YL
588 * MPS doesn't support hyperthreading, aka only have
589 * thread 0 apic id in MPS table
1da177e4 590 */
69b88afa 591 if (acpi_lapic && acpi_ioapic)
1da177e4 592 return;
1da177e4 593
69b88afa
YL
594 if (x86_quirks->mach_get_smp_config) {
595 if (x86_quirks->mach_get_smp_config(early))
596 return;
597 }
9adc1386 598
4ef81297
AS
599 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
600 mpf->mpf_specification);
b3e24164 601#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
4ef81297 602 if (mpf->mpf_feature2 & (1 << 7)) {
1da177e4
LT
603 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
604 pic_mode = 1;
605 } else {
606 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
607 pic_mode = 0;
608 }
4421b1c8 609#endif
1da177e4
LT
610 /*
611 * Now see if we need to read further.
612 */
613 if (mpf->mpf_feature1 != 0) {
888032cd
AS
614 if (early) {
615 /*
616 * local APIC has default address
617 */
618 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
619 return;
620 }
1da177e4 621
4ef81297
AS
622 printk(KERN_INFO "Default MP configuration #%d\n",
623 mpf->mpf_feature1);
1da177e4
LT
624 construct_default_ISA_mptable(mpf->mpf_feature1);
625
626 } else if (mpf->mpf_physptr) {
627
628 /*
629 * Read the physical hardware table. Anything here will
630 * override the defaults.
631 */
888032cd 632 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
bab4b27c 633#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 634 smp_found_config = 0;
bab4b27c 635#endif
4ef81297
AS
636 printk(KERN_ERR
637 "BIOS bug, MP table errors detected!...\n");
4421b1c8
AS
638 printk(KERN_ERR "... disabling SMP support. "
639 "(tell your hw vendor)\n");
1da177e4
LT
640 return;
641 }
61048c63 642
888032cd
AS
643 if (early)
644 return;
61048c63 645#ifdef CONFIG_X86_IO_APIC
1da177e4
LT
646 /*
647 * If there are no explicit MP IRQ entries, then we are
648 * broken. We set up most of the low 16 IO-APIC pins to
649 * ISA defaults and hope it will work.
650 */
651 if (!mp_irq_entries) {
00fb8606 652 struct mpc_bus bus;
1da177e4 653
4421b1c8
AS
654 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
655 "using default mptable. "
656 "(tell your hw vendor)\n");
1da177e4 657
d4c715fa
JSR
658 bus.type = MP_BUS;
659 bus.busid = 0;
660 memcpy(bus.bustype, "ISA ", 6);
1da177e4
LT
661 MP_bus_info(&bus);
662
663 construct_default_ioirq_mptable(0);
664 }
61048c63 665#endif
1da177e4
LT
666 } else
667 BUG();
668
888032cd
AS
669 if (!early)
670 printk(KERN_INFO "Processors: %d\n", num_processors);
1da177e4
LT
671 /*
672 * Only use the first configuration found.
673 */
674}
675
888032cd
AS
676void __init early_get_smp_config(void)
677{
678 __get_smp_config(1);
679}
680
681void __init get_smp_config(void)
682{
683 __get_smp_config(0);
684}
685
686static int __init smp_scan_config(unsigned long base, unsigned long length,
687 unsigned reserve)
1da177e4 688{
92fd4b7a 689 unsigned int *bp = phys_to_virt(base);
1da177e4
LT
690 struct intel_mp_floating *mpf;
691
eeb0d7d1
RH
692 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
693 bp, length);
5d47a271 694 BUILD_BUG_ON(sizeof(*mpf) != 16);
1da177e4
LT
695
696 while (length > 0) {
697 mpf = (struct intel_mp_floating *)bp;
698 if ((*bp == SMP_MAGIC_IDENT) &&
4ef81297
AS
699 (mpf->mpf_length == 1) &&
700 !mpf_checksum((unsigned char *)bp, 16) &&
701 ((mpf->mpf_specification == 1)
702 || (mpf->mpf_specification == 4))) {
bab4b27c 703#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 704 smp_found_config = 1;
bab4b27c 705#endif
92fd4b7a 706 mpf_found = mpf;
b1f006b6 707
e91a3b43 708 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
4ef81297 709 mpf, virt_to_phys(mpf));
b1f006b6
YL
710
711 if (!reserve)
712 return 1;
d2dbf343 713 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
72a7fe39 714 BOOTMEM_DEFAULT);
1da177e4 715 if (mpf->mpf_physptr) {
d2dbf343
YL
716 unsigned long size = PAGE_SIZE;
717#ifdef CONFIG_X86_32
1da177e4
LT
718 /*
719 * We cannot access to MPC table to compute
720 * table size yet, as only few megabytes from
721 * the bottom is mapped now.
722 * PC-9800's MPC table places on the very last
723 * of physical memory; so that simply reserving
724 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
725 * in reserve_bootmem.
726 */
1da177e4
LT
727 unsigned long end = max_low_pfn * PAGE_SIZE;
728 if (mpf->mpf_physptr + size > end)
729 size = end - mpf->mpf_physptr;
d2dbf343
YL
730#endif
731 reserve_bootmem_generic(mpf->mpf_physptr, size,
72a7fe39 732 BOOTMEM_DEFAULT);
1da177e4
LT
733 }
734
d2dbf343 735 return 1;
1da177e4
LT
736 }
737 bp += 4;
738 length -= 16;
739 }
740 return 0;
741}
742
3b33553b 743static void __init __find_smp_config(unsigned int reserve)
1da177e4
LT
744{
745 unsigned int address;
746
3c9cb6de
YL
747 if (x86_quirks->mach_find_smp_config) {
748 if (x86_quirks->mach_find_smp_config(reserve))
3b33553b
IM
749 return;
750 }
1da177e4
LT
751 /*
752 * FIXME: Linux assumes you have 640K of base ram..
753 * this continues the error...
754 *
755 * 1) Scan the bottom 1K for a signature
756 * 2) Scan the top 1K of base RAM
757 * 3) Scan the 64K of bios
758 */
888032cd
AS
759 if (smp_scan_config(0x0, 0x400, reserve) ||
760 smp_scan_config(639 * 0x400, 0x400, reserve) ||
761 smp_scan_config(0xF0000, 0x10000, reserve))
1da177e4
LT
762 return;
763 /*
764 * If it is an SMP machine we should know now, unless the
765 * configuration is in an EISA/MCA bus machine with an
766 * extended bios data area.
767 *
768 * there is a real-mode segmented pointer pointing to the
769 * 4K EBDA area at 0x40E, calculate and scan it here.
770 *
771 * NOTE! There are Linux loaders that will corrupt the EBDA
772 * area, and as such this kind of SMP config may be less
773 * trustworthy, simply because the SMP table may have been
774 * stomped on during early boot. These loaders are buggy and
775 * should be fixed.
776 *
777 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
778 */
779
780 address = get_bios_ebda();
781 if (address)
888032cd
AS
782 smp_scan_config(address, 0x400, reserve);
783}
784
785void __init early_find_smp_config(void)
786{
787 __find_smp_config(0);
788}
789
790void __init find_smp_config(void)
791{
792 __find_smp_config(1);
1da177e4 793}
2944e16b
YL
794
795#ifdef CONFIG_X86_IO_APIC
796static u8 __initdata irq_used[MAX_IRQ_SOURCES];
797
540d4e72 798static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
2944e16b
YL
799{
800 int i;
801
e253b396 802 if (m->irqtype != mp_INT)
2944e16b
YL
803 return 0;
804
e253b396 805 if (m->irqflag != 0x0f)
2944e16b
YL
806 return 0;
807
808 /* not legacy */
809
810 for (i = 0; i < mp_irq_entries; i++) {
811 if (mp_irqs[i].mp_irqtype != mp_INT)
812 continue;
813
814 if (mp_irqs[i].mp_irqflag != 0x0f)
815 continue;
816
e253b396 817 if (mp_irqs[i].mp_srcbus != m->srcbus)
2944e16b 818 continue;
e253b396 819 if (mp_irqs[i].mp_srcbusirq != m->srcbusirq)
2944e16b
YL
820 continue;
821 if (irq_used[i]) {
822 /* already claimed */
823 return -2;
824 }
825 irq_used[i] = 1;
826 return i;
827 }
828
829 /* not found */
830 return -1;
831}
832
833#define SPARE_SLOT_NUM 20
834
540d4e72 835static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
2944e16b
YL
836#endif
837
f29521e4 838static int __init replace_intsrc_all(struct mpc_table *mpc,
2944e16b
YL
839 unsigned long mpc_new_phys,
840 unsigned long mpc_new_length)
841{
842#ifdef CONFIG_X86_IO_APIC
843 int i;
844 int nr_m_spare = 0;
845#endif
846
847 int count = sizeof(*mpc);
848 unsigned char *mpt = ((unsigned char *)mpc) + count;
849
6c65da50
JSR
850 printk(KERN_INFO "mpc_length %x\n", mpc->length);
851 while (count < mpc->length) {
2944e16b
YL
852 switch (*mpt) {
853 case MP_PROCESSOR:
854 {
f4f21b71 855 struct mpc_cpu *m = (struct mpc_cpu *)mpt;
2944e16b
YL
856 mpt += sizeof(*m);
857 count += sizeof(*m);
858 break;
859 }
860 case MP_BUS:
861 {
00fb8606 862 struct mpc_bus *m = (struct mpc_bus *)mpt;
2944e16b
YL
863 mpt += sizeof(*m);
864 count += sizeof(*m);
865 break;
866 }
867 case MP_IOAPIC:
868 {
2b85b5fb
JSR
869 mpt += sizeof(struct mpc_ioapic);
870 count += sizeof(struct mpc_ioapic);
2944e16b
YL
871 break;
872 }
873 case MP_INTSRC:
874 {
875#ifdef CONFIG_X86_IO_APIC
540d4e72 876 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
2944e16b
YL
877
878 printk(KERN_INFO "OLD ");
879 print_MP_intsrc_info(m);
880 i = get_MP_intsrc_index(m);
881 if (i > 0) {
882 assign_to_mpc_intsrc(&mp_irqs[i], m);
883 printk(KERN_INFO "NEW ");
884 print_mp_irq_info(&mp_irqs[i]);
885 } else if (!i) {
886 /* legacy, do nothing */
887 } else if (nr_m_spare < SPARE_SLOT_NUM) {
888 /*
889 * not found (-1), or duplicated (-2)
890 * are invalid entries,
891 * we need to use the slot later
892 */
893 m_spare[nr_m_spare] = m;
894 nr_m_spare++;
895 }
896#endif
540d4e72
JSR
897 mpt += sizeof(struct mpc_intsrc);
898 count += sizeof(struct mpc_intsrc);
2944e16b
YL
899 break;
900 }
901 case MP_LINTSRC:
902 {
8fb2952b
JSR
903 struct mpc_lintsrc *m =
904 (struct mpc_lintsrc *)mpt;
2944e16b
YL
905 mpt += sizeof(*m);
906 count += sizeof(*m);
907 break;
908 }
909 default:
910 /* wrong mptable */
911 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
912 printk(KERN_ERR "type %x\n", *mpt);
913 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
6c65da50 914 1, mpc, mpc->length, 1);
2944e16b
YL
915 goto out;
916 }
917 }
918
919#ifdef CONFIG_X86_IO_APIC
920 for (i = 0; i < mp_irq_entries; i++) {
921 if (irq_used[i])
922 continue;
923
924 if (mp_irqs[i].mp_irqtype != mp_INT)
925 continue;
926
927 if (mp_irqs[i].mp_irqflag != 0x0f)
928 continue;
929
930 if (nr_m_spare > 0) {
931 printk(KERN_INFO "*NEW* found ");
932 nr_m_spare--;
933 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
934 m_spare[nr_m_spare] = NULL;
935 } else {
540d4e72
JSR
936 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
937 count += sizeof(struct mpc_intsrc);
2944e16b
YL
938 if (!mpc_new_phys) {
939 printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
940 } else {
941 if (count <= mpc_new_length)
942 printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
943 else {
944 printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
945 goto out;
946 }
947 }
948 assign_to_mpc_intsrc(&mp_irqs[i], m);
6c65da50 949 mpc->length = count;
540d4e72 950 mpt += sizeof(struct mpc_intsrc);
2944e16b
YL
951 }
952 print_mp_irq_info(&mp_irqs[i]);
953 }
954#endif
955out:
956 /* update checksum */
6c65da50
JSR
957 mpc->checksum = 0;
958 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
2944e16b
YL
959
960 return 0;
961}
962
fcfa146e
YL
963static int __initdata enable_update_mptable;
964
2944e16b
YL
965static int __init update_mptable_setup(char *str)
966{
967 enable_update_mptable = 1;
968 return 0;
969}
970early_param("update_mptable", update_mptable_setup);
971
972static unsigned long __initdata mpc_new_phys;
973static unsigned long mpc_new_length __initdata = 4096;
974
975/* alloc_mptable or alloc_mptable=4k */
976static int __initdata alloc_mptable;
977static int __init parse_alloc_mptable_opt(char *p)
978{
979 enable_update_mptable = 1;
980 alloc_mptable = 1;
981 if (!p)
982 return 0;
983 mpc_new_length = memparse(p, &p);
984 return 0;
985}
986early_param("alloc_mptable", parse_alloc_mptable_opt);
987
988void __init early_reserve_e820_mpc_new(void)
989{
990 if (enable_update_mptable && alloc_mptable) {
991 u64 startt = 0;
992#ifdef CONFIG_X86_TRAMPOLINE
993 startt = TRAMPOLINE_BASE;
994#endif
995 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
996 }
997}
998
999static int __init update_mp_table(void)
1000{
1001 char str[16];
1002 char oem[10];
1003 struct intel_mp_floating *mpf;
f29521e4 1004 struct mpc_table *mpc, *mpc_new;
2944e16b
YL
1005
1006 if (!enable_update_mptable)
1007 return 0;
1008
1009 mpf = mpf_found;
1010 if (!mpf)
1011 return 0;
1012
1013 /*
1014 * Now see if we need to go further.
1015 */
1016 if (mpf->mpf_feature1 != 0)
1017 return 0;
1018
1019 if (!mpf->mpf_physptr)
1020 return 0;
1021
1022 mpc = phys_to_virt(mpf->mpf_physptr);
1023
1024 if (!smp_check_mpc(mpc, oem, str))
1025 return 0;
1026
1027 printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
1028 printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr);
1029
6c65da50 1030 if (mpc_new_phys && mpc->length > mpc_new_length) {
2944e16b
YL
1031 mpc_new_phys = 0;
1032 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
1033 mpc_new_length);
1034 }
1035
1036 if (!mpc_new_phys) {
1037 unsigned char old, new;
1038 /* check if we can change the postion */
6c65da50
JSR
1039 mpc->checksum = 0;
1040 old = mpf_checksum((unsigned char *)mpc, mpc->length);
1041 mpc->checksum = 0xff;
1042 new = mpf_checksum((unsigned char *)mpc, mpc->length);
2944e16b
YL
1043 if (old == new) {
1044 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
1045 return 0;
1046 }
1047 printk(KERN_INFO "use in-positon replacing\n");
1048 } else {
1049 mpf->mpf_physptr = mpc_new_phys;
1050 mpc_new = phys_to_virt(mpc_new_phys);
6c65da50 1051 memcpy(mpc_new, mpc, mpc->length);
2944e16b
YL
1052 mpc = mpc_new;
1053 /* check if we can modify that */
1054 if (mpc_new_phys - mpf->mpf_physptr) {
1055 struct intel_mp_floating *mpf_new;
1056 /* steal 16 bytes from [0, 1k) */
1057 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1058 mpf_new = phys_to_virt(0x400 - 16);
1059 memcpy(mpf_new, mpf, 16);
1060 mpf = mpf_new;
1061 mpf->mpf_physptr = mpc_new_phys;
1062 }
1063 mpf->mpf_checksum = 0;
1064 mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16);
1065 printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr);
1066 }
1067
1068 /*
1069 * only replace the one with mp_INT and
1070 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1071 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1072 * may need pci=routeirq for all coverage
1073 */
1074 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1075
1076 return 0;
1077}
1078
1079late_initcall(update_mp_table);