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Commit | Line | Data |
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1da177e4 | 1 | /* |
11113f84 | 2 | * Intel Multiprocessor Specification 1.1 and 1.4 |
1da177e4 LT |
3 | * compliant MP-table parsing routines. |
4 | * | |
87c6fe26 | 5 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> |
8f47e163 | 6 | * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> |
85bdddec | 7 | * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/mm.h> | |
1da177e4 | 11 | #include <linux/init.h> |
1da177e4 | 12 | #include <linux/delay.h> |
1da177e4 | 13 | #include <linux/bootmem.h> |
1da177e4 LT |
14 | #include <linux/kernel_stat.h> |
15 | #include <linux/mc146818rtc.h> | |
16 | #include <linux/bitops.h> | |
85bdddec AS |
17 | #include <linux/acpi.h> |
18 | #include <linux/module.h> | |
103ceffb | 19 | #include <linux/smp.h> |
629e15d2 | 20 | #include <linux/pci.h> |
1da177e4 | 21 | |
1da177e4 LT |
22 | #include <asm/mtrr.h> |
23 | #include <asm/mpspec.h> | |
85bdddec | 24 | #include <asm/pgalloc.h> |
1da177e4 | 25 | #include <asm/io_apic.h> |
85bdddec | 26 | #include <asm/proto.h> |
ce3fe6b2 | 27 | #include <asm/bios_ebda.h> |
2944e16b YL |
28 | #include <asm/e820.h> |
29 | #include <asm/trampoline.h> | |
3c9cb6de | 30 | #include <asm/setup.h> |
4884d8e6 | 31 | #include <asm/smp.h> |
1da177e4 | 32 | |
7b6aa335 | 33 | #include <asm/apic.h> |
1da177e4 LT |
34 | /* |
35 | * Checksum an MP configuration block. | |
36 | */ | |
37 | ||
38 | static int __init mpf_checksum(unsigned char *mp, int len) | |
39 | { | |
40 | int sum = 0; | |
41 | ||
42 | while (len--) | |
43 | sum += *mp++; | |
44 | ||
45 | return sum & 0xFF; | |
46 | } | |
47 | ||
fd6c6661 TG |
48 | int __init default_mpc_apic_id(struct mpc_cpu *m) |
49 | { | |
50 | return m->apicid; | |
51 | } | |
52 | ||
f4f21b71 | 53 | static void __init MP_processor_info(struct mpc_cpu *m) |
c853c676 AS |
54 | { |
55 | int apicid; | |
746f2244 | 56 | char *bootup_cpu = ""; |
c853c676 | 57 | |
c4563826 | 58 | if (!(m->cpuflag & CPU_ENABLED)) { |
7b1292e2 | 59 | disabled_cpus++; |
1da177e4 | 60 | return; |
7b1292e2 | 61 | } |
64898a8b | 62 | |
fd6c6661 | 63 | apicid = x86_init.mpparse.mpc_apic_id(m); |
64898a8b | 64 | |
c4563826 | 65 | if (m->cpuflag & CPU_BOOTPROCESSOR) { |
746f2244 | 66 | bootup_cpu = " (Bootup-CPU)"; |
c4563826 | 67 | boot_cpu_physical_apicid = m->apicid; |
1da177e4 LT |
68 | } |
69 | ||
c4563826 JSR |
70 | printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); |
71 | generic_processor_info(apicid, m->apicver); | |
1da177e4 LT |
72 | } |
73 | ||
85cc35fa | 74 | #ifdef CONFIG_X86_IO_APIC |
90e1c696 | 75 | void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str) |
1da177e4 | 76 | { |
d4c715fa | 77 | memcpy(str, m->bustype, 6); |
1da177e4 | 78 | str[6] = 0; |
90e1c696 TG |
79 | apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); |
80 | } | |
1da177e4 | 81 | |
90e1c696 TG |
82 | static void __init MP_bus_info(struct mpc_bus *m) |
83 | { | |
84 | char str[7]; | |
1da177e4 | 85 | |
90e1c696 | 86 | x86_init.mpparse.mpc_oem_bus_info(m, str); |
1da177e4 | 87 | |
5e4edbb7 | 88 | #if MAX_MP_BUSSES < 256 |
d4c715fa | 89 | if (m->busid >= MAX_MP_BUSSES) { |
c0ec31ad | 90 | printk(KERN_WARNING "MP table busid value (%d) for bustype %s " |
4ef81297 | 91 | " is too large, max. supported is %d\n", |
d4c715fa | 92 | m->busid, str, MAX_MP_BUSSES - 1); |
c0ec31ad RD |
93 | return; |
94 | } | |
5e4edbb7 | 95 | #endif |
c0ec31ad | 96 | |
f8924e77 | 97 | if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { |
d4c715fa | 98 | set_bit(m->busid, mp_bus_not_pci); |
103ceffb | 99 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 100 | mp_bus_id_to_type[m->busid] = MP_BUS_ISA; |
f8924e77 AS |
101 | #endif |
102 | } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { | |
52fdb568 TG |
103 | if (x86_init.mpparse.mpc_oem_pci_bus) |
104 | x86_init.mpparse.mpc_oem_pci_bus(m); | |
64898a8b | 105 | |
d4c715fa | 106 | clear_bit(m->busid, mp_bus_not_pci); |
103ceffb | 107 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 108 | mp_bus_id_to_type[m->busid] = MP_BUS_PCI; |
4ef81297 | 109 | } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { |
d4c715fa | 110 | mp_bus_id_to_type[m->busid] = MP_BUS_EISA; |
4ef81297 | 111 | } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { |
d4c715fa | 112 | mp_bus_id_to_type[m->busid] = MP_BUS_MCA; |
c0a282c2 | 113 | #endif |
f8924e77 AS |
114 | } else |
115 | printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); | |
1da177e4 | 116 | } |
61048c63 | 117 | |
2b85b5fb | 118 | static void __init MP_ioapic_info(struct mpc_ioapic *m) |
1da177e4 | 119 | { |
5df82c7d | 120 | if (!(m->flags & MPC_APIC_USABLE)) |
1da177e4 LT |
121 | return; |
122 | ||
64883ab0 | 123 | printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", |
5df82c7d | 124 | m->apicid, m->apicver, m->apicaddr); |
857033a6 | 125 | |
a4384df3 | 126 | mp_register_ioapic(m->apicid, m->apicaddr, gsi_top); |
1da177e4 LT |
127 | } |
128 | ||
540d4e72 | 129 | static void print_MP_intsrc_info(struct mpc_intsrc *m) |
1da177e4 | 130 | { |
eeb0d7d1 | 131 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 132 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
e253b396 JSR |
133 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, |
134 | m->srcbusirq, m->dstapic, m->dstirq); | |
2944e16b YL |
135 | } |
136 | ||
c2c21745 | 137 | static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) |
2944e16b | 138 | { |
eeb0d7d1 | 139 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
2944e16b | 140 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
c2c21745 JSR |
141 | mp_irq->irqtype, mp_irq->irqflag & 3, |
142 | (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, | |
143 | mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); | |
2944e16b YL |
144 | } |
145 | ||
540d4e72 | 146 | static void __init assign_to_mp_irq(struct mpc_intsrc *m, |
c2c21745 | 147 | struct mpc_intsrc *mp_irq) |
2944e16b | 148 | { |
c2c21745 JSR |
149 | mp_irq->dstapic = m->dstapic; |
150 | mp_irq->type = m->type; | |
151 | mp_irq->irqtype = m->irqtype; | |
152 | mp_irq->irqflag = m->irqflag; | |
153 | mp_irq->srcbus = m->srcbus; | |
154 | mp_irq->srcbusirq = m->srcbusirq; | |
155 | mp_irq->dstirq = m->dstirq; | |
2944e16b YL |
156 | } |
157 | ||
c2c21745 | 158 | static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, |
540d4e72 | 159 | struct mpc_intsrc *m) |
2944e16b | 160 | { |
c2c21745 JSR |
161 | m->dstapic = mp_irq->dstapic; |
162 | m->type = mp_irq->type; | |
163 | m->irqtype = mp_irq->irqtype; | |
164 | m->irqflag = mp_irq->irqflag; | |
165 | m->srcbus = mp_irq->srcbus; | |
166 | m->srcbusirq = mp_irq->srcbusirq; | |
167 | m->dstirq = mp_irq->dstirq; | |
2944e16b YL |
168 | } |
169 | ||
c2c21745 | 170 | static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, |
540d4e72 | 171 | struct mpc_intsrc *m) |
2944e16b | 172 | { |
c2c21745 | 173 | if (mp_irq->dstapic != m->dstapic) |
2944e16b | 174 | return 1; |
c2c21745 | 175 | if (mp_irq->type != m->type) |
2944e16b | 176 | return 2; |
c2c21745 | 177 | if (mp_irq->irqtype != m->irqtype) |
2944e16b | 178 | return 3; |
c2c21745 | 179 | if (mp_irq->irqflag != m->irqflag) |
2944e16b | 180 | return 4; |
c2c21745 | 181 | if (mp_irq->srcbus != m->srcbus) |
2944e16b | 182 | return 5; |
c2c21745 | 183 | if (mp_irq->srcbusirq != m->srcbusirq) |
2944e16b | 184 | return 6; |
c2c21745 | 185 | if (mp_irq->dstirq != m->dstirq) |
2944e16b YL |
186 | return 7; |
187 | ||
188 | return 0; | |
189 | } | |
190 | ||
540d4e72 | 191 | static void __init MP_intsrc_info(struct mpc_intsrc *m) |
2944e16b YL |
192 | { |
193 | int i; | |
194 | ||
195 | print_MP_intsrc_info(m); | |
196 | ||
fcfa146e YL |
197 | for (i = 0; i < mp_irq_entries; i++) { |
198 | if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) | |
199 | return; | |
200 | } | |
2944e16b YL |
201 | |
202 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
1da177e4 LT |
203 | if (++mp_irq_entries == MAX_IRQ_SOURCES) |
204 | panic("Max # of irq sources exceeded!!\n"); | |
205 | } | |
a6830278 JSR |
206 | #else /* CONFIG_X86_IO_APIC */ |
207 | static inline void __init MP_bus_info(struct mpc_bus *m) {} | |
208 | static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} | |
209 | static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {} | |
210 | #endif /* CONFIG_X86_IO_APIC */ | |
1da177e4 | 211 | |
61048c63 | 212 | |
8fb2952b | 213 | static void __init MP_lintsrc_info(struct mpc_lintsrc *m) |
1da177e4 | 214 | { |
eeb0d7d1 | 215 | apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 216 | " IRQ %02x, APIC ID %x, APIC LINT %02x\n", |
b5ced7cd JSR |
217 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, |
218 | m->srcbusirq, m->destapic, m->destapiclint); | |
1da177e4 LT |
219 | } |
220 | ||
1da177e4 LT |
221 | /* |
222 | * Read/parse the MPC | |
223 | */ | |
224 | ||
f29521e4 | 225 | static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) |
1da177e4 | 226 | { |
1da177e4 | 227 | |
6c65da50 | 228 | if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { |
e950bea8 | 229 | printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", |
6c65da50 JSR |
230 | mpc->signature[0], mpc->signature[1], |
231 | mpc->signature[2], mpc->signature[3]); | |
1da177e4 LT |
232 | return 0; |
233 | } | |
6c65da50 | 234 | if (mpf_checksum((unsigned char *)mpc, mpc->length)) { |
e950bea8 | 235 | printk(KERN_ERR "MPTABLE: checksum error!\n"); |
1da177e4 LT |
236 | return 0; |
237 | } | |
6c65da50 | 238 | if (mpc->spec != 0x01 && mpc->spec != 0x04) { |
e950bea8 | 239 | printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", |
6c65da50 | 240 | mpc->spec); |
1da177e4 LT |
241 | return 0; |
242 | } | |
6c65da50 | 243 | if (!mpc->lapic) { |
e950bea8 | 244 | printk(KERN_ERR "MPTABLE: null local APIC address!\n"); |
1da177e4 LT |
245 | return 0; |
246 | } | |
6c65da50 | 247 | memcpy(oem, mpc->oem, 8); |
4ef81297 | 248 | oem[8] = 0; |
11a62a05 | 249 | printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); |
1da177e4 | 250 | |
6c65da50 | 251 | memcpy(str, mpc->productid, 12); |
4ef81297 | 252 | str[12] = 0; |
1da177e4 | 253 | |
11a62a05 | 254 | printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); |
1da177e4 | 255 | |
6c65da50 | 256 | printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic); |
1da177e4 | 257 | |
2944e16b YL |
258 | return 1; |
259 | } | |
260 | ||
a6830278 JSR |
261 | static void skip_entry(unsigned char **ptr, int *count, int size) |
262 | { | |
263 | *ptr += size; | |
264 | *count += size; | |
265 | } | |
266 | ||
5a5737ea JSR |
267 | static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) |
268 | { | |
269 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n" | |
270 | "type %x\n", *mpt); | |
271 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
272 | 1, mpc, mpc->length, 1); | |
273 | } | |
274 | ||
72302142 TG |
275 | void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } |
276 | ||
f29521e4 | 277 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) |
2944e16b YL |
278 | { |
279 | char str[16]; | |
280 | char oem[10]; | |
281 | ||
282 | int count = sizeof(*mpc); | |
283 | unsigned char *mpt = ((unsigned char *)mpc) + count; | |
284 | ||
285 | if (!smp_check_mpc(mpc, oem, str)) | |
286 | return 0; | |
287 | ||
288 | #ifdef CONFIG_X86_32 | |
9c764247 | 289 | generic_mps_oem_check(mpc, oem, str); |
2944e16b | 290 | #endif |
e950bea8 | 291 | /* save the local APIC address, it might be non-default */ |
1da177e4 | 292 | if (!acpi_lapic) |
6c65da50 | 293 | mp_lapic_addr = mpc->lapic; |
1da177e4 | 294 | |
888032cd AS |
295 | if (early) |
296 | return 1; | |
297 | ||
72302142 TG |
298 | if (mpc->oemptr) |
299 | x86_init.mpparse.smp_read_mpc_oem(mpc); | |
64898a8b | 300 | |
1da177e4 | 301 | /* |
4ef81297 | 302 | * Now process the configuration blocks. |
1da177e4 | 303 | */ |
f4848472 | 304 | x86_init.mpparse.mpc_record(0); |
64898a8b | 305 | |
6c65da50 | 306 | while (count < mpc->length) { |
4ef81297 AS |
307 | switch (*mpt) { |
308 | case MP_PROCESSOR: | |
a6830278 JSR |
309 | /* ACPI may have already provided this data */ |
310 | if (!acpi_lapic) | |
c58603e8 | 311 | MP_processor_info((struct mpc_cpu *)mpt); |
a6830278 JSR |
312 | skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); |
313 | break; | |
4ef81297 | 314 | case MP_BUS: |
c58603e8 | 315 | MP_bus_info((struct mpc_bus *)mpt); |
a6830278 JSR |
316 | skip_entry(&mpt, &count, sizeof(struct mpc_bus)); |
317 | break; | |
4ef81297 | 318 | case MP_IOAPIC: |
c58603e8 | 319 | MP_ioapic_info((struct mpc_ioapic *)mpt); |
a6830278 JSR |
320 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); |
321 | break; | |
4ef81297 | 322 | case MP_INTSRC: |
c58603e8 | 323 | MP_intsrc_info((struct mpc_intsrc *)mpt); |
a6830278 JSR |
324 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); |
325 | break; | |
4ef81297 | 326 | case MP_LINTSRC: |
c58603e8 | 327 | MP_lintsrc_info((struct mpc_lintsrc *)mpt); |
a6830278 JSR |
328 | skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); |
329 | break; | |
4ef81297 | 330 | default: |
711554db | 331 | /* wrong mptable */ |
5a5737ea | 332 | smp_dump_mptable(mpc, mpt); |
6c65da50 | 333 | count = mpc->length; |
711554db | 334 | break; |
1da177e4 | 335 | } |
f4848472 | 336 | x86_init.mpparse.mpc_record(1); |
1da177e4 | 337 | } |
e0da3364 | 338 | |
1da177e4 | 339 | if (!num_processors) |
e950bea8 | 340 | printk(KERN_ERR "MPTABLE: no processors registered!\n"); |
1da177e4 LT |
341 | return num_processors; |
342 | } | |
343 | ||
61048c63 AS |
344 | #ifdef CONFIG_X86_IO_APIC |
345 | ||
1da177e4 LT |
346 | static int __init ELCR_trigger(unsigned int irq) |
347 | { | |
348 | unsigned int port; | |
349 | ||
350 | port = 0x4d0 + (irq >> 3); | |
351 | return (inb(port) >> (irq & 7)) & 1; | |
352 | } | |
353 | ||
354 | static void __init construct_default_ioirq_mptable(int mpc_default_type) | |
355 | { | |
540d4e72 | 356 | struct mpc_intsrc intsrc; |
1da177e4 LT |
357 | int i; |
358 | int ELCR_fallback = 0; | |
359 | ||
e253b396 JSR |
360 | intsrc.type = MP_INTSRC; |
361 | intsrc.irqflag = 0; /* conforming */ | |
362 | intsrc.srcbus = 0; | |
b5ba7e6d | 363 | intsrc.dstapic = mp_ioapics[0].apicid; |
1da177e4 | 364 | |
e253b396 | 365 | intsrc.irqtype = mp_INT; |
1da177e4 LT |
366 | |
367 | /* | |
368 | * If true, we have an ISA/PCI system with no IRQ entries | |
369 | * in the MP table. To prevent the PCI interrupts from being set up | |
370 | * incorrectly, we try to use the ELCR. The sanity check to see if | |
371 | * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can | |
372 | * never be level sensitive, so we simply see if the ELCR agrees. | |
373 | * If it does, we assume it's valid. | |
374 | */ | |
375 | if (mpc_default_type == 5) { | |
62441bf1 AS |
376 | printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " |
377 | "falling back to ELCR\n"); | |
1da177e4 | 378 | |
62441bf1 AS |
379 | if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || |
380 | ELCR_trigger(13)) | |
381 | printk(KERN_ERR "ELCR contains invalid data... " | |
382 | "not using ELCR\n"); | |
1da177e4 | 383 | else { |
4ef81297 AS |
384 | printk(KERN_INFO |
385 | "Using ELCR to identify PCI interrupts\n"); | |
1da177e4 LT |
386 | ELCR_fallback = 1; |
387 | } | |
388 | } | |
389 | ||
390 | for (i = 0; i < 16; i++) { | |
391 | switch (mpc_default_type) { | |
392 | case 2: | |
393 | if (i == 0 || i == 13) | |
394 | continue; /* IRQ0 & IRQ13 not connected */ | |
395 | /* fall through */ | |
396 | default: | |
397 | if (i == 2) | |
398 | continue; /* IRQ2 is never connected */ | |
399 | } | |
400 | ||
401 | if (ELCR_fallback) { | |
402 | /* | |
403 | * If the ELCR indicates a level-sensitive interrupt, we | |
404 | * copy that information over to the MP table in the | |
405 | * irqflag field (level sensitive, active high polarity). | |
406 | */ | |
407 | if (ELCR_trigger(i)) | |
e253b396 | 408 | intsrc.irqflag = 13; |
1da177e4 | 409 | else |
e253b396 | 410 | intsrc.irqflag = 0; |
1da177e4 LT |
411 | } |
412 | ||
e253b396 JSR |
413 | intsrc.srcbusirq = i; |
414 | intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ | |
1da177e4 LT |
415 | MP_intsrc_info(&intsrc); |
416 | } | |
417 | ||
e253b396 JSR |
418 | intsrc.irqtype = mp_ExtINT; |
419 | intsrc.srcbusirq = 0; | |
420 | intsrc.dstirq = 0; /* 8259A to INTIN0 */ | |
1da177e4 LT |
421 | MP_intsrc_info(&intsrc); |
422 | } | |
423 | ||
61048c63 | 424 | |
39e00fe2 | 425 | static void __init construct_ioapic_table(int mpc_default_type) |
1da177e4 | 426 | { |
2b85b5fb | 427 | struct mpc_ioapic ioapic; |
00fb8606 | 428 | struct mpc_bus bus; |
1da177e4 | 429 | |
d4c715fa JSR |
430 | bus.type = MP_BUS; |
431 | bus.busid = 0; | |
1da177e4 | 432 | switch (mpc_default_type) { |
4ef81297 | 433 | default: |
62441bf1 | 434 | printk(KERN_ERR "???\nUnknown standard configuration %d\n", |
4ef81297 AS |
435 | mpc_default_type); |
436 | /* fall through */ | |
437 | case 1: | |
438 | case 5: | |
d4c715fa | 439 | memcpy(bus.bustype, "ISA ", 6); |
4ef81297 AS |
440 | break; |
441 | case 2: | |
442 | case 6: | |
443 | case 3: | |
d4c715fa | 444 | memcpy(bus.bustype, "EISA ", 6); |
4ef81297 AS |
445 | break; |
446 | case 4: | |
447 | case 7: | |
d4c715fa | 448 | memcpy(bus.bustype, "MCA ", 6); |
1da177e4 LT |
449 | } |
450 | MP_bus_info(&bus); | |
451 | if (mpc_default_type > 4) { | |
d4c715fa JSR |
452 | bus.busid = 1; |
453 | memcpy(bus.bustype, "PCI ", 6); | |
1da177e4 LT |
454 | MP_bus_info(&bus); |
455 | } | |
456 | ||
8f3e1df4 CG |
457 | ioapic.type = MP_IOAPIC; |
458 | ioapic.apicid = 2; | |
459 | ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; | |
460 | ioapic.flags = MPC_APIC_USABLE; | |
461 | ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE; | |
1da177e4 LT |
462 | MP_ioapic_info(&ioapic); |
463 | ||
464 | /* | |
465 | * We set up most of the low 16 IO-APIC pins according to MPS rules. | |
466 | */ | |
467 | construct_default_ioirq_mptable(mpc_default_type); | |
85cc35fa TG |
468 | } |
469 | #else | |
39e00fe2 | 470 | static inline void __init construct_ioapic_table(int mpc_default_type) { } |
61048c63 | 471 | #endif |
85cc35fa TG |
472 | |
473 | static inline void __init construct_default_ISA_mptable(int mpc_default_type) | |
474 | { | |
f4f21b71 | 475 | struct mpc_cpu processor; |
8fb2952b | 476 | struct mpc_lintsrc lintsrc; |
85cc35fa TG |
477 | int linttypes[2] = { mp_ExtINT, mp_NMI }; |
478 | int i; | |
479 | ||
480 | /* | |
481 | * local APIC has default address | |
482 | */ | |
483 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
484 | ||
485 | /* | |
486 | * 2 CPUs, numbered 0 & 1. | |
487 | */ | |
c4563826 | 488 | processor.type = MP_PROCESSOR; |
85cc35fa | 489 | /* Either an integrated APIC or a discrete 82489DX. */ |
c4563826 JSR |
490 | processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; |
491 | processor.cpuflag = CPU_ENABLED; | |
492 | processor.cpufeature = (boot_cpu_data.x86 << 8) | | |
85cc35fa | 493 | (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; |
c4563826 JSR |
494 | processor.featureflag = boot_cpu_data.x86_capability[0]; |
495 | processor.reserved[0] = 0; | |
496 | processor.reserved[1] = 0; | |
85cc35fa | 497 | for (i = 0; i < 2; i++) { |
c4563826 | 498 | processor.apicid = i; |
85cc35fa TG |
499 | MP_processor_info(&processor); |
500 | } | |
501 | ||
502 | construct_ioapic_table(mpc_default_type); | |
503 | ||
b5ced7cd JSR |
504 | lintsrc.type = MP_LINTSRC; |
505 | lintsrc.irqflag = 0; /* conforming */ | |
506 | lintsrc.srcbusid = 0; | |
507 | lintsrc.srcbusirq = 0; | |
508 | lintsrc.destapic = MP_APIC_ALL; | |
1da177e4 | 509 | for (i = 0; i < 2; i++) { |
b5ced7cd JSR |
510 | lintsrc.irqtype = linttypes[i]; |
511 | lintsrc.destapiclint = i; | |
1da177e4 LT |
512 | MP_lintsrc_info(&lintsrc); |
513 | } | |
514 | } | |
515 | ||
41401db6 | 516 | static struct mpf_intel *mpf_found; |
1da177e4 | 517 | |
8d4dd919 YL |
518 | static unsigned long __init get_mpc_size(unsigned long physptr) |
519 | { | |
520 | struct mpc_table *mpc; | |
521 | unsigned long size; | |
522 | ||
523 | mpc = early_ioremap(physptr, PAGE_SIZE); | |
524 | size = mpc->length; | |
525 | early_iounmap(mpc, PAGE_SIZE); | |
526 | apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); | |
527 | ||
528 | return size; | |
529 | } | |
530 | ||
0b3ba0c3 JSR |
531 | static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) |
532 | { | |
533 | struct mpc_table *mpc; | |
534 | unsigned long size; | |
535 | ||
536 | size = get_mpc_size(mpf->physptr); | |
537 | mpc = early_ioremap(mpf->physptr, size); | |
538 | /* | |
539 | * Read the physical hardware table. Anything here will | |
540 | * override the defaults. | |
541 | */ | |
542 | if (!smp_read_mpc(mpc, early)) { | |
543 | #ifdef CONFIG_X86_LOCAL_APIC | |
544 | smp_found_config = 0; | |
545 | #endif | |
546 | printk(KERN_ERR "BIOS bug, MP table errors detected!...\n" | |
547 | "... disabling SMP support. (tell your hw vendor)\n"); | |
548 | early_iounmap(mpc, size); | |
549 | return -1; | |
550 | } | |
551 | early_iounmap(mpc, size); | |
552 | ||
553 | if (early) | |
554 | return -1; | |
555 | ||
556 | #ifdef CONFIG_X86_IO_APIC | |
557 | /* | |
558 | * If there are no explicit MP IRQ entries, then we are | |
559 | * broken. We set up most of the low 16 IO-APIC pins to | |
560 | * ISA defaults and hope it will work. | |
561 | */ | |
562 | if (!mp_irq_entries) { | |
563 | struct mpc_bus bus; | |
564 | ||
565 | printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " | |
566 | "using default mptable. (tell your hw vendor)\n"); | |
567 | ||
568 | bus.type = MP_BUS; | |
569 | bus.busid = 0; | |
570 | memcpy(bus.bustype, "ISA ", 6); | |
571 | MP_bus_info(&bus); | |
572 | ||
573 | construct_default_ioirq_mptable(0); | |
574 | } | |
575 | #endif | |
576 | ||
577 | return 0; | |
578 | } | |
579 | ||
1da177e4 LT |
580 | /* |
581 | * Scan the memory blocks for an SMP configuration block. | |
582 | */ | |
b3f1b617 | 583 | void __init default_get_smp_config(unsigned int early) |
1da177e4 | 584 | { |
41401db6 | 585 | struct mpf_intel *mpf = mpf_found; |
1da177e4 | 586 | |
69b88afa YL |
587 | if (!mpf) |
588 | return; | |
589 | ||
888032cd AS |
590 | if (acpi_lapic && early) |
591 | return; | |
69b88afa | 592 | |
1da177e4 | 593 | /* |
69b88afa YL |
594 | * MPS doesn't support hyperthreading, aka only have |
595 | * thread 0 apic id in MPS table | |
1da177e4 | 596 | */ |
69b88afa | 597 | if (acpi_lapic && acpi_ioapic) |
1da177e4 | 598 | return; |
1da177e4 | 599 | |
4ef81297 | 600 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", |
1eb1b3b6 | 601 | mpf->specification); |
b3e24164 | 602 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
1eb1b3b6 | 603 | if (mpf->feature2 & (1 << 7)) { |
1da177e4 LT |
604 | printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); |
605 | pic_mode = 1; | |
606 | } else { | |
607 | printk(KERN_INFO " Virtual Wire compatibility mode.\n"); | |
608 | pic_mode = 0; | |
609 | } | |
4421b1c8 | 610 | #endif |
1da177e4 LT |
611 | /* |
612 | * Now see if we need to read further. | |
613 | */ | |
1eb1b3b6 | 614 | if (mpf->feature1 != 0) { |
888032cd AS |
615 | if (early) { |
616 | /* | |
617 | * local APIC has default address | |
618 | */ | |
619 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
620 | return; | |
621 | } | |
1da177e4 | 622 | |
4ef81297 | 623 | printk(KERN_INFO "Default MP configuration #%d\n", |
1eb1b3b6 JSR |
624 | mpf->feature1); |
625 | construct_default_ISA_mptable(mpf->feature1); | |
1da177e4 | 626 | |
1eb1b3b6 | 627 | } else if (mpf->physptr) { |
0b3ba0c3 | 628 | if (check_physptr(mpf, early)) |
1da177e4 | 629 | return; |
1da177e4 LT |
630 | } else |
631 | BUG(); | |
632 | ||
888032cd AS |
633 | if (!early) |
634 | printk(KERN_INFO "Processors: %d\n", num_processors); | |
1da177e4 LT |
635 | /* |
636 | * Only use the first configuration found. | |
637 | */ | |
638 | } | |
639 | ||
b24c2a92 | 640 | static void __init smp_reserve_memory(struct mpf_intel *mpf) |
a6830278 JSR |
641 | { |
642 | unsigned long size = get_mpc_size(mpf->physptr); | |
a6830278 | 643 | |
909fc87b | 644 | reserve_early_overlap_ok(mpf->physptr, mpf->physptr+size, "MP-table mpc"); |
a6830278 JSR |
645 | } |
646 | ||
b24c2a92 | 647 | static int __init smp_scan_config(unsigned long base, unsigned long length) |
1da177e4 | 648 | { |
92fd4b7a | 649 | unsigned int *bp = phys_to_virt(base); |
41401db6 | 650 | struct mpf_intel *mpf; |
b24c2a92 | 651 | unsigned long mem; |
1da177e4 | 652 | |
eeb0d7d1 RH |
653 | apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", |
654 | bp, length); | |
5d47a271 | 655 | BUILD_BUG_ON(sizeof(*mpf) != 16); |
1da177e4 LT |
656 | |
657 | while (length > 0) { | |
41401db6 | 658 | mpf = (struct mpf_intel *)bp; |
1da177e4 | 659 | if ((*bp == SMP_MAGIC_IDENT) && |
1eb1b3b6 | 660 | (mpf->length == 1) && |
4ef81297 | 661 | !mpf_checksum((unsigned char *)bp, 16) && |
1eb1b3b6 JSR |
662 | ((mpf->specification == 1) |
663 | || (mpf->specification == 4))) { | |
bab4b27c | 664 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 665 | smp_found_config = 1; |
bab4b27c | 666 | #endif |
92fd4b7a | 667 | mpf_found = mpf; |
b1f006b6 | 668 | |
ba1511bf JSR |
669 | printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", |
670 | mpf, (u64)virt_to_phys(mpf)); | |
b1f006b6 | 671 | |
b24c2a92 | 672 | mem = virt_to_phys(mpf); |
909fc87b | 673 | reserve_early_overlap_ok(mem, mem + sizeof(*mpf), "MP-table mpf"); |
a6830278 | 674 | if (mpf->physptr) |
b24c2a92 | 675 | smp_reserve_memory(mpf); |
1da177e4 | 676 | |
d2dbf343 | 677 | return 1; |
1da177e4 LT |
678 | } |
679 | bp += 4; | |
680 | length -= 16; | |
681 | } | |
682 | return 0; | |
683 | } | |
684 | ||
b24c2a92 | 685 | void __init default_find_smp_config(void) |
1da177e4 LT |
686 | { |
687 | unsigned int address; | |
688 | ||
689 | /* | |
690 | * FIXME: Linux assumes you have 640K of base ram.. | |
691 | * this continues the error... | |
692 | * | |
693 | * 1) Scan the bottom 1K for a signature | |
694 | * 2) Scan the top 1K of base RAM | |
695 | * 3) Scan the 64K of bios | |
696 | */ | |
b24c2a92 YL |
697 | if (smp_scan_config(0x0, 0x400) || |
698 | smp_scan_config(639 * 0x400, 0x400) || | |
699 | smp_scan_config(0xF0000, 0x10000)) | |
1da177e4 LT |
700 | return; |
701 | /* | |
702 | * If it is an SMP machine we should know now, unless the | |
703 | * configuration is in an EISA/MCA bus machine with an | |
704 | * extended bios data area. | |
705 | * | |
706 | * there is a real-mode segmented pointer pointing to the | |
707 | * 4K EBDA area at 0x40E, calculate and scan it here. | |
708 | * | |
709 | * NOTE! There are Linux loaders that will corrupt the EBDA | |
710 | * area, and as such this kind of SMP config may be less | |
711 | * trustworthy, simply because the SMP table may have been | |
712 | * stomped on during early boot. These loaders are buggy and | |
713 | * should be fixed. | |
714 | * | |
715 | * MP1.4 SPEC states to only scan first 1K of 4K EBDA. | |
716 | */ | |
717 | ||
718 | address = get_bios_ebda(); | |
719 | if (address) | |
b24c2a92 | 720 | smp_scan_config(address, 0x400); |
888032cd AS |
721 | } |
722 | ||
2944e16b YL |
723 | #ifdef CONFIG_X86_IO_APIC |
724 | static u8 __initdata irq_used[MAX_IRQ_SOURCES]; | |
725 | ||
540d4e72 | 726 | static int __init get_MP_intsrc_index(struct mpc_intsrc *m) |
2944e16b YL |
727 | { |
728 | int i; | |
729 | ||
e253b396 | 730 | if (m->irqtype != mp_INT) |
2944e16b YL |
731 | return 0; |
732 | ||
e253b396 | 733 | if (m->irqflag != 0x0f) |
2944e16b YL |
734 | return 0; |
735 | ||
736 | /* not legacy */ | |
737 | ||
738 | for (i = 0; i < mp_irq_entries; i++) { | |
c2c21745 | 739 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
740 | continue; |
741 | ||
c2c21745 | 742 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
743 | continue; |
744 | ||
c2c21745 | 745 | if (mp_irqs[i].srcbus != m->srcbus) |
2944e16b | 746 | continue; |
c2c21745 | 747 | if (mp_irqs[i].srcbusirq != m->srcbusirq) |
2944e16b YL |
748 | continue; |
749 | if (irq_used[i]) { | |
750 | /* already claimed */ | |
751 | return -2; | |
752 | } | |
753 | irq_used[i] = 1; | |
754 | return i; | |
755 | } | |
756 | ||
757 | /* not found */ | |
758 | return -1; | |
759 | } | |
760 | ||
761 | #define SPARE_SLOT_NUM 20 | |
762 | ||
540d4e72 | 763 | static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; |
a6830278 | 764 | |
57592224 | 765 | static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) |
a6830278 JSR |
766 | { |
767 | int i; | |
768 | ||
769 | apic_printk(APIC_VERBOSE, "OLD "); | |
770 | print_MP_intsrc_info(m); | |
771 | ||
772 | i = get_MP_intsrc_index(m); | |
773 | if (i > 0) { | |
774 | assign_to_mpc_intsrc(&mp_irqs[i], m); | |
775 | apic_printk(APIC_VERBOSE, "NEW "); | |
776 | print_mp_irq_info(&mp_irqs[i]); | |
777 | return; | |
778 | } | |
779 | if (!i) { | |
780 | /* legacy, do nothing */ | |
781 | return; | |
782 | } | |
783 | if (*nr_m_spare < SPARE_SLOT_NUM) { | |
784 | /* | |
785 | * not found (-1), or duplicated (-2) are invalid entries, | |
786 | * we need to use the slot later | |
787 | */ | |
788 | m_spare[*nr_m_spare] = m; | |
789 | *nr_m_spare += 1; | |
790 | } | |
791 | } | |
792 | #else /* CONFIG_X86_IO_APIC */ | |
57592224 RM |
793 | static |
794 | inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} | |
a6830278 JSR |
795 | #endif /* CONFIG_X86_IO_APIC */ |
796 | ||
ee214558 YL |
797 | static int |
798 | check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) | |
a6830278 | 799 | { |
ee214558 YL |
800 | int ret = 0; |
801 | ||
802 | if (!mpc_new_phys || count <= mpc_new_length) { | |
803 | WARN(1, "update_mptable: No spare slots (length: %x)\n", count); | |
804 | return -1; | |
a6830278 JSR |
805 | } |
806 | ||
ee214558 | 807 | return ret; |
a6830278 | 808 | } |
2944e16b | 809 | |
f29521e4 | 810 | static int __init replace_intsrc_all(struct mpc_table *mpc, |
2944e16b YL |
811 | unsigned long mpc_new_phys, |
812 | unsigned long mpc_new_length) | |
813 | { | |
814 | #ifdef CONFIG_X86_IO_APIC | |
815 | int i; | |
2944e16b | 816 | #endif |
2944e16b | 817 | int count = sizeof(*mpc); |
a6830278 | 818 | int nr_m_spare = 0; |
2944e16b YL |
819 | unsigned char *mpt = ((unsigned char *)mpc) + count; |
820 | ||
6c65da50 JSR |
821 | printk(KERN_INFO "mpc_length %x\n", mpc->length); |
822 | while (count < mpc->length) { | |
2944e16b YL |
823 | switch (*mpt) { |
824 | case MP_PROCESSOR: | |
a6830278 JSR |
825 | skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); |
826 | break; | |
2944e16b | 827 | case MP_BUS: |
a6830278 JSR |
828 | skip_entry(&mpt, &count, sizeof(struct mpc_bus)); |
829 | break; | |
2944e16b | 830 | case MP_IOAPIC: |
a6830278 JSR |
831 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); |
832 | break; | |
2944e16b | 833 | case MP_INTSRC: |
c58603e8 | 834 | check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); |
a6830278 JSR |
835 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); |
836 | break; | |
2944e16b | 837 | case MP_LINTSRC: |
a6830278 JSR |
838 | skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); |
839 | break; | |
2944e16b YL |
840 | default: |
841 | /* wrong mptable */ | |
5a5737ea | 842 | smp_dump_mptable(mpc, mpt); |
2944e16b YL |
843 | goto out; |
844 | } | |
845 | } | |
846 | ||
847 | #ifdef CONFIG_X86_IO_APIC | |
848 | for (i = 0; i < mp_irq_entries; i++) { | |
849 | if (irq_used[i]) | |
850 | continue; | |
851 | ||
c2c21745 | 852 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
853 | continue; |
854 | ||
c2c21745 | 855 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
856 | continue; |
857 | ||
858 | if (nr_m_spare > 0) { | |
82034d6f | 859 | apic_printk(APIC_VERBOSE, "*NEW* found\n"); |
2944e16b YL |
860 | nr_m_spare--; |
861 | assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); | |
862 | m_spare[nr_m_spare] = NULL; | |
863 | } else { | |
540d4e72 JSR |
864 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
865 | count += sizeof(struct mpc_intsrc); | |
ee214558 | 866 | if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) |
a6830278 | 867 | goto out; |
2944e16b | 868 | assign_to_mpc_intsrc(&mp_irqs[i], m); |
6c65da50 | 869 | mpc->length = count; |
540d4e72 | 870 | mpt += sizeof(struct mpc_intsrc); |
2944e16b YL |
871 | } |
872 | print_mp_irq_info(&mp_irqs[i]); | |
873 | } | |
874 | #endif | |
875 | out: | |
876 | /* update checksum */ | |
6c65da50 JSR |
877 | mpc->checksum = 0; |
878 | mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
879 | |
880 | return 0; | |
881 | } | |
882 | ||
f1bdb523 | 883 | int enable_update_mptable; |
fcfa146e | 884 | |
2944e16b YL |
885 | static int __init update_mptable_setup(char *str) |
886 | { | |
887 | enable_update_mptable = 1; | |
629e15d2 YL |
888 | #ifdef CONFIG_PCI |
889 | pci_routeirq = 1; | |
890 | #endif | |
2944e16b YL |
891 | return 0; |
892 | } | |
893 | early_param("update_mptable", update_mptable_setup); | |
894 | ||
895 | static unsigned long __initdata mpc_new_phys; | |
896 | static unsigned long mpc_new_length __initdata = 4096; | |
897 | ||
898 | /* alloc_mptable or alloc_mptable=4k */ | |
899 | static int __initdata alloc_mptable; | |
900 | static int __init parse_alloc_mptable_opt(char *p) | |
901 | { | |
902 | enable_update_mptable = 1; | |
629e15d2 YL |
903 | #ifdef CONFIG_PCI |
904 | pci_routeirq = 1; | |
905 | #endif | |
2944e16b YL |
906 | alloc_mptable = 1; |
907 | if (!p) | |
908 | return 0; | |
909 | mpc_new_length = memparse(p, &p); | |
910 | return 0; | |
911 | } | |
912 | early_param("alloc_mptable", parse_alloc_mptable_opt); | |
913 | ||
914 | void __init early_reserve_e820_mpc_new(void) | |
915 | { | |
916 | if (enable_update_mptable && alloc_mptable) { | |
917 | u64 startt = 0; | |
2944e16b YL |
918 | mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); |
919 | } | |
920 | } | |
921 | ||
922 | static int __init update_mp_table(void) | |
923 | { | |
924 | char str[16]; | |
925 | char oem[10]; | |
41401db6 | 926 | struct mpf_intel *mpf; |
f29521e4 | 927 | struct mpc_table *mpc, *mpc_new; |
2944e16b YL |
928 | |
929 | if (!enable_update_mptable) | |
930 | return 0; | |
931 | ||
932 | mpf = mpf_found; | |
933 | if (!mpf) | |
934 | return 0; | |
935 | ||
936 | /* | |
937 | * Now see if we need to go further. | |
938 | */ | |
1eb1b3b6 | 939 | if (mpf->feature1 != 0) |
2944e16b YL |
940 | return 0; |
941 | ||
1eb1b3b6 | 942 | if (!mpf->physptr) |
2944e16b YL |
943 | return 0; |
944 | ||
1eb1b3b6 | 945 | mpc = phys_to_virt(mpf->physptr); |
2944e16b YL |
946 | |
947 | if (!smp_check_mpc(mpc, oem, str)) | |
948 | return 0; | |
949 | ||
ba1511bf | 950 | printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); |
1eb1b3b6 | 951 | printk(KERN_INFO "physptr: %x\n", mpf->physptr); |
2944e16b | 952 | |
6c65da50 | 953 | if (mpc_new_phys && mpc->length > mpc_new_length) { |
2944e16b YL |
954 | mpc_new_phys = 0; |
955 | printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", | |
956 | mpc_new_length); | |
957 | } | |
958 | ||
959 | if (!mpc_new_phys) { | |
960 | unsigned char old, new; | |
961 | /* check if we can change the postion */ | |
6c65da50 JSR |
962 | mpc->checksum = 0; |
963 | old = mpf_checksum((unsigned char *)mpc, mpc->length); | |
964 | mpc->checksum = 0xff; | |
965 | new = mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
966 | if (old == new) { |
967 | printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); | |
968 | return 0; | |
969 | } | |
970 | printk(KERN_INFO "use in-positon replacing\n"); | |
971 | } else { | |
1eb1b3b6 | 972 | mpf->physptr = mpc_new_phys; |
2944e16b | 973 | mpc_new = phys_to_virt(mpc_new_phys); |
6c65da50 | 974 | memcpy(mpc_new, mpc, mpc->length); |
2944e16b YL |
975 | mpc = mpc_new; |
976 | /* check if we can modify that */ | |
1eb1b3b6 | 977 | if (mpc_new_phys - mpf->physptr) { |
41401db6 | 978 | struct mpf_intel *mpf_new; |
2944e16b YL |
979 | /* steal 16 bytes from [0, 1k) */ |
980 | printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); | |
981 | mpf_new = phys_to_virt(0x400 - 16); | |
982 | memcpy(mpf_new, mpf, 16); | |
983 | mpf = mpf_new; | |
1eb1b3b6 | 984 | mpf->physptr = mpc_new_phys; |
2944e16b | 985 | } |
1eb1b3b6 JSR |
986 | mpf->checksum = 0; |
987 | mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); | |
988 | printk(KERN_INFO "physptr new: %x\n", mpf->physptr); | |
2944e16b YL |
989 | } |
990 | ||
991 | /* | |
992 | * only replace the one with mp_INT and | |
993 | * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, | |
994 | * already in mp_irqs , stored by ... and mp_config_acpi_gsi, | |
995 | * may need pci=routeirq for all coverage | |
996 | */ | |
997 | replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); | |
998 | ||
999 | return 0; | |
1000 | } | |
1001 | ||
1002 | late_initcall(update_mp_table); |