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1da177e4 1/*
11113f84 2 * Intel Multiprocessor Specification 1.1 and 1.4
1da177e4
LT
3 * compliant MP-table parsing routines.
4 *
87c6fe26 5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
8f47e163 6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
85bdddec 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
1da177e4
LT
8 */
9
10#include <linux/mm.h>
1da177e4 11#include <linux/init.h>
1da177e4 12#include <linux/delay.h>
1da177e4 13#include <linux/bootmem.h>
1da177e4
LT
14#include <linux/kernel_stat.h>
15#include <linux/mc146818rtc.h>
16#include <linux/bitops.h>
85bdddec
AS
17#include <linux/acpi.h>
18#include <linux/module.h>
103ceffb 19#include <linux/smp.h>
1da177e4 20
1da177e4
LT
21#include <asm/mtrr.h>
22#include <asm/mpspec.h>
85bdddec 23#include <asm/pgalloc.h>
1da177e4 24#include <asm/io_apic.h>
85bdddec 25#include <asm/proto.h>
ce3fe6b2 26#include <asm/bios_ebda.h>
2944e16b
YL
27#include <asm/e820.h>
28#include <asm/trampoline.h>
3c9cb6de 29#include <asm/setup.h>
4884d8e6 30#include <asm/smp.h>
1da177e4 31
1dcdd3d1 32#include <asm/genapic.h>
1da177e4
LT
33/*
34 * Checksum an MP configuration block.
35 */
36
37static int __init mpf_checksum(unsigned char *mp, int len)
38{
39 int sum = 0;
40
41 while (len--)
42 sum += *mp++;
43
44 return sum & 0xFF;
45}
46
f4f21b71 47static void __init MP_processor_info(struct mpc_cpu *m)
c853c676
AS
48{
49 int apicid;
746f2244 50 char *bootup_cpu = "";
c853c676 51
c4563826 52 if (!(m->cpuflag & CPU_ENABLED)) {
7b1292e2 53 disabled_cpus++;
1da177e4 54 return;
7b1292e2 55 }
64898a8b
YL
56
57 if (x86_quirks->mpc_apic_id)
58 apicid = x86_quirks->mpc_apic_id(m);
ab530e1f 59 else
c4563826 60 apicid = m->apicid;
64898a8b 61
c4563826 62 if (m->cpuflag & CPU_BOOTPROCESSOR) {
746f2244 63 bootup_cpu = " (Bootup-CPU)";
c4563826 64 boot_cpu_physical_apicid = m->apicid;
1da177e4
LT
65 }
66
c4563826
JSR
67 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
68 generic_processor_info(apicid, m->apicver);
1da177e4
LT
69}
70
85cc35fa 71#ifdef CONFIG_X86_IO_APIC
00fb8606 72static void __init MP_bus_info(struct mpc_bus *m)
1da177e4
LT
73{
74 char str[7];
d4c715fa 75 memcpy(str, m->bustype, 6);
1da177e4
LT
76 str[6] = 0;
77
64898a8b
YL
78 if (x86_quirks->mpc_oem_bus_info)
79 x86_quirks->mpc_oem_bus_info(m, str);
80 else
d4c715fa 81 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
1da177e4 82
5e4edbb7 83#if MAX_MP_BUSSES < 256
d4c715fa 84 if (m->busid >= MAX_MP_BUSSES) {
c0ec31ad 85 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
4ef81297 86 " is too large, max. supported is %d\n",
d4c715fa 87 m->busid, str, MAX_MP_BUSSES - 1);
c0ec31ad
RD
88 return;
89 }
5e4edbb7 90#endif
c0ec31ad 91
f8924e77 92 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
d4c715fa 93 set_bit(m->busid, mp_bus_not_pci);
103ceffb 94#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
d4c715fa 95 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
f8924e77
AS
96#endif
97 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
64898a8b
YL
98 if (x86_quirks->mpc_oem_pci_bus)
99 x86_quirks->mpc_oem_pci_bus(m);
100
d4c715fa 101 clear_bit(m->busid, mp_bus_not_pci);
103ceffb 102#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
d4c715fa 103 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
4ef81297 104 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
d4c715fa 105 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
4ef81297 106 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
d4c715fa 107 mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
c0a282c2 108#endif
f8924e77
AS
109 } else
110 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
1da177e4 111}
85cc35fa 112#endif
1da177e4 113
61048c63
AS
114#ifdef CONFIG_X86_IO_APIC
115
857033a6
AS
116static int bad_ioapic(unsigned long address)
117{
118 if (nr_ioapics >= MAX_IO_APICS) {
119 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
120 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
121 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
122 }
123 if (!address) {
124 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
125 " found in table, skipping!\n");
126 return 1;
127 }
128 return 0;
129}
130
2b85b5fb 131static void __init MP_ioapic_info(struct mpc_ioapic *m)
1da177e4 132{
5df82c7d 133 if (!(m->flags & MPC_APIC_USABLE))
1da177e4
LT
134 return;
135
64883ab0 136 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
5df82c7d 137 m->apicid, m->apicver, m->apicaddr);
857033a6 138
5df82c7d 139 if (bad_ioapic(m->apicaddr))
1da177e4 140 return;
857033a6 141
b5ba7e6d
JSR
142 mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
143 mp_ioapics[nr_ioapics].apicid = m->apicid;
144 mp_ioapics[nr_ioapics].type = m->type;
145 mp_ioapics[nr_ioapics].apicver = m->apicver;
146 mp_ioapics[nr_ioapics].flags = m->flags;
1da177e4
LT
147 nr_ioapics++;
148}
149
540d4e72 150static void print_MP_intsrc_info(struct mpc_intsrc *m)
1da177e4 151{
eeb0d7d1 152 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
1da177e4 153 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
e253b396
JSR
154 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
155 m->srcbusirq, m->dstapic, m->dstirq);
2944e16b
YL
156}
157
c2c21745 158static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
2944e16b 159{
eeb0d7d1 160 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
2944e16b 161 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
c2c21745
JSR
162 mp_irq->irqtype, mp_irq->irqflag & 3,
163 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
164 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
2944e16b
YL
165}
166
540d4e72 167static void __init assign_to_mp_irq(struct mpc_intsrc *m,
c2c21745 168 struct mpc_intsrc *mp_irq)
2944e16b 169{
c2c21745
JSR
170 mp_irq->dstapic = m->dstapic;
171 mp_irq->type = m->type;
172 mp_irq->irqtype = m->irqtype;
173 mp_irq->irqflag = m->irqflag;
174 mp_irq->srcbus = m->srcbus;
175 mp_irq->srcbusirq = m->srcbusirq;
176 mp_irq->dstirq = m->dstirq;
2944e16b
YL
177}
178
c2c21745 179static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
540d4e72 180 struct mpc_intsrc *m)
2944e16b 181{
c2c21745
JSR
182 m->dstapic = mp_irq->dstapic;
183 m->type = mp_irq->type;
184 m->irqtype = mp_irq->irqtype;
185 m->irqflag = mp_irq->irqflag;
186 m->srcbus = mp_irq->srcbus;
187 m->srcbusirq = mp_irq->srcbusirq;
188 m->dstirq = mp_irq->dstirq;
2944e16b
YL
189}
190
c2c21745 191static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
540d4e72 192 struct mpc_intsrc *m)
2944e16b 193{
c2c21745 194 if (mp_irq->dstapic != m->dstapic)
2944e16b 195 return 1;
c2c21745 196 if (mp_irq->type != m->type)
2944e16b 197 return 2;
c2c21745 198 if (mp_irq->irqtype != m->irqtype)
2944e16b 199 return 3;
c2c21745 200 if (mp_irq->irqflag != m->irqflag)
2944e16b 201 return 4;
c2c21745 202 if (mp_irq->srcbus != m->srcbus)
2944e16b 203 return 5;
c2c21745 204 if (mp_irq->srcbusirq != m->srcbusirq)
2944e16b 205 return 6;
c2c21745 206 if (mp_irq->dstirq != m->dstirq)
2944e16b
YL
207 return 7;
208
209 return 0;
210}
211
540d4e72 212static void __init MP_intsrc_info(struct mpc_intsrc *m)
2944e16b
YL
213{
214 int i;
215
216 print_MP_intsrc_info(m);
217
fcfa146e
YL
218 for (i = 0; i < mp_irq_entries; i++) {
219 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
220 return;
221 }
2944e16b
YL
222
223 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
1da177e4
LT
224 if (++mp_irq_entries == MAX_IRQ_SOURCES)
225 panic("Max # of irq sources exceeded!!\n");
226}
227
61048c63
AS
228#endif
229
8fb2952b 230static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
1da177e4 231{
eeb0d7d1 232 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
1da177e4 233 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
b5ced7cd
JSR
234 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
235 m->srcbusirq, m->destapic, m->destapiclint);
1da177e4
LT
236}
237
1da177e4
LT
238/*
239 * Read/parse the MPC
240 */
241
f29521e4 242static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
1da177e4 243{
1da177e4 244
6c65da50 245 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
e950bea8 246 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
6c65da50
JSR
247 mpc->signature[0], mpc->signature[1],
248 mpc->signature[2], mpc->signature[3]);
1da177e4
LT
249 return 0;
250 }
6c65da50 251 if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
e950bea8 252 printk(KERN_ERR "MPTABLE: checksum error!\n");
1da177e4
LT
253 return 0;
254 }
6c65da50 255 if (mpc->spec != 0x01 && mpc->spec != 0x04) {
e950bea8 256 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
6c65da50 257 mpc->spec);
1da177e4
LT
258 return 0;
259 }
6c65da50 260 if (!mpc->lapic) {
e950bea8 261 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
1da177e4
LT
262 return 0;
263 }
6c65da50 264 memcpy(oem, mpc->oem, 8);
4ef81297 265 oem[8] = 0;
11a62a05 266 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
1da177e4 267
6c65da50 268 memcpy(str, mpc->productid, 12);
4ef81297 269 str[12] = 0;
1da177e4 270
11a62a05 271 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
1da177e4 272
6c65da50 273 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
1da177e4 274
2944e16b
YL
275 return 1;
276}
277
f29521e4 278static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
2944e16b
YL
279{
280 char str[16];
281 char oem[10];
282
283 int count = sizeof(*mpc);
284 unsigned char *mpt = ((unsigned char *)mpc) + count;
285
286 if (!smp_check_mpc(mpc, oem, str))
287 return 0;
288
289#ifdef CONFIG_X86_32
9c764247 290 generic_mps_oem_check(mpc, oem, str);
2944e16b 291#endif
e950bea8 292 /* save the local APIC address, it might be non-default */
1da177e4 293 if (!acpi_lapic)
6c65da50 294 mp_lapic_addr = mpc->lapic;
1da177e4 295
888032cd
AS
296 if (early)
297 return 1;
298
6c65da50
JSR
299 if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
300 struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
301 x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
64898a8b
YL
302 }
303
1da177e4 304 /*
4ef81297 305 * Now process the configuration blocks.
1da177e4 306 */
64898a8b
YL
307 if (x86_quirks->mpc_record)
308 *x86_quirks->mpc_record = 0;
309
6c65da50 310 while (count < mpc->length) {
4ef81297
AS
311 switch (*mpt) {
312 case MP_PROCESSOR:
1da177e4 313 {
f4f21b71 314 struct mpc_cpu *m = (struct mpc_cpu *)mpt;
1da177e4
LT
315 /* ACPI may have already provided this data */
316 if (!acpi_lapic)
317 MP_processor_info(m);
318 mpt += sizeof(*m);
319 count += sizeof(*m);
320 break;
321 }
4ef81297 322 case MP_BUS:
1da177e4 323 {
00fb8606 324 struct mpc_bus *m = (struct mpc_bus *)mpt;
85cc35fa 325#ifdef CONFIG_X86_IO_APIC
1da177e4 326 MP_bus_info(m);
85cc35fa 327#endif
1da177e4
LT
328 mpt += sizeof(*m);
329 count += sizeof(*m);
330 break;
331 }
4ef81297 332 case MP_IOAPIC:
1da177e4 333 {
61048c63 334#ifdef CONFIG_X86_IO_APIC
2b85b5fb 335 struct mpc_ioapic *m = (struct mpc_ioapic *)mpt;
1da177e4 336 MP_ioapic_info(m);
61048c63 337#endif
2b85b5fb
JSR
338 mpt += sizeof(struct mpc_ioapic);
339 count += sizeof(struct mpc_ioapic);
1da177e4
LT
340 break;
341 }
4ef81297 342 case MP_INTSRC:
1da177e4 343 {
61048c63 344#ifdef CONFIG_X86_IO_APIC
540d4e72 345 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
1da177e4
LT
346
347 MP_intsrc_info(m);
61048c63 348#endif
540d4e72
JSR
349 mpt += sizeof(struct mpc_intsrc);
350 count += sizeof(struct mpc_intsrc);
1da177e4
LT
351 break;
352 }
4ef81297 353 case MP_LINTSRC:
1da177e4 354 {
8fb2952b
JSR
355 struct mpc_lintsrc *m =
356 (struct mpc_lintsrc *)mpt;
1da177e4 357 MP_lintsrc_info(m);
4ef81297
AS
358 mpt += sizeof(*m);
359 count += sizeof(*m);
1da177e4
LT
360 break;
361 }
4ef81297 362 default:
711554db
YL
363 /* wrong mptable */
364 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
365 printk(KERN_ERR "type %x\n", *mpt);
366 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
6c65da50
JSR
367 1, mpc, mpc->length, 1);
368 count = mpc->length;
711554db 369 break;
1da177e4 370 }
64898a8b
YL
371 if (x86_quirks->mpc_record)
372 (*x86_quirks->mpc_record)++;
1da177e4 373 }
e0da3364 374
26f7ef14
YL
375#ifdef CONFIG_X86_BIGSMP
376 generic_bigsmp_probe();
e0da3364
YL
377#endif
378
72ce0165
IM
379 if (apic->setup_apic_routing)
380 apic->setup_apic_routing();
381
1da177e4 382 if (!num_processors)
e950bea8 383 printk(KERN_ERR "MPTABLE: no processors registered!\n");
1da177e4
LT
384 return num_processors;
385}
386
61048c63
AS
387#ifdef CONFIG_X86_IO_APIC
388
1da177e4
LT
389static int __init ELCR_trigger(unsigned int irq)
390{
391 unsigned int port;
392
393 port = 0x4d0 + (irq >> 3);
394 return (inb(port) >> (irq & 7)) & 1;
395}
396
397static void __init construct_default_ioirq_mptable(int mpc_default_type)
398{
540d4e72 399 struct mpc_intsrc intsrc;
1da177e4
LT
400 int i;
401 int ELCR_fallback = 0;
402
e253b396
JSR
403 intsrc.type = MP_INTSRC;
404 intsrc.irqflag = 0; /* conforming */
405 intsrc.srcbus = 0;
b5ba7e6d 406 intsrc.dstapic = mp_ioapics[0].apicid;
1da177e4 407
e253b396 408 intsrc.irqtype = mp_INT;
1da177e4
LT
409
410 /*
411 * If true, we have an ISA/PCI system with no IRQ entries
412 * in the MP table. To prevent the PCI interrupts from being set up
413 * incorrectly, we try to use the ELCR. The sanity check to see if
414 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
415 * never be level sensitive, so we simply see if the ELCR agrees.
416 * If it does, we assume it's valid.
417 */
418 if (mpc_default_type == 5) {
62441bf1
AS
419 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
420 "falling back to ELCR\n");
1da177e4 421
62441bf1
AS
422 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
423 ELCR_trigger(13))
424 printk(KERN_ERR "ELCR contains invalid data... "
425 "not using ELCR\n");
1da177e4 426 else {
4ef81297
AS
427 printk(KERN_INFO
428 "Using ELCR to identify PCI interrupts\n");
1da177e4
LT
429 ELCR_fallback = 1;
430 }
431 }
432
433 for (i = 0; i < 16; i++) {
434 switch (mpc_default_type) {
435 case 2:
436 if (i == 0 || i == 13)
437 continue; /* IRQ0 & IRQ13 not connected */
438 /* fall through */
439 default:
440 if (i == 2)
441 continue; /* IRQ2 is never connected */
442 }
443
444 if (ELCR_fallback) {
445 /*
446 * If the ELCR indicates a level-sensitive interrupt, we
447 * copy that information over to the MP table in the
448 * irqflag field (level sensitive, active high polarity).
449 */
450 if (ELCR_trigger(i))
e253b396 451 intsrc.irqflag = 13;
1da177e4 452 else
e253b396 453 intsrc.irqflag = 0;
1da177e4
LT
454 }
455
e253b396
JSR
456 intsrc.srcbusirq = i;
457 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
1da177e4
LT
458 MP_intsrc_info(&intsrc);
459 }
460
e253b396
JSR
461 intsrc.irqtype = mp_ExtINT;
462 intsrc.srcbusirq = 0;
463 intsrc.dstirq = 0; /* 8259A to INTIN0 */
1da177e4
LT
464 MP_intsrc_info(&intsrc);
465}
466
61048c63 467
39e00fe2 468static void __init construct_ioapic_table(int mpc_default_type)
1da177e4 469{
2b85b5fb 470 struct mpc_ioapic ioapic;
00fb8606 471 struct mpc_bus bus;
1da177e4 472
d4c715fa
JSR
473 bus.type = MP_BUS;
474 bus.busid = 0;
1da177e4 475 switch (mpc_default_type) {
4ef81297 476 default:
62441bf1 477 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
4ef81297
AS
478 mpc_default_type);
479 /* fall through */
480 case 1:
481 case 5:
d4c715fa 482 memcpy(bus.bustype, "ISA ", 6);
4ef81297
AS
483 break;
484 case 2:
485 case 6:
486 case 3:
d4c715fa 487 memcpy(bus.bustype, "EISA ", 6);
4ef81297
AS
488 break;
489 case 4:
490 case 7:
d4c715fa 491 memcpy(bus.bustype, "MCA ", 6);
1da177e4
LT
492 }
493 MP_bus_info(&bus);
494 if (mpc_default_type > 4) {
d4c715fa
JSR
495 bus.busid = 1;
496 memcpy(bus.bustype, "PCI ", 6);
1da177e4
LT
497 MP_bus_info(&bus);
498 }
499
5df82c7d
JSR
500 ioapic.type = MP_IOAPIC;
501 ioapic.apicid = 2;
502 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
503 ioapic.flags = MPC_APIC_USABLE;
504 ioapic.apicaddr = 0xFEC00000;
1da177e4
LT
505 MP_ioapic_info(&ioapic);
506
507 /*
508 * We set up most of the low 16 IO-APIC pins according to MPS rules.
509 */
510 construct_default_ioirq_mptable(mpc_default_type);
85cc35fa
TG
511}
512#else
39e00fe2 513static inline void __init construct_ioapic_table(int mpc_default_type) { }
61048c63 514#endif
85cc35fa
TG
515
516static inline void __init construct_default_ISA_mptable(int mpc_default_type)
517{
f4f21b71 518 struct mpc_cpu processor;
8fb2952b 519 struct mpc_lintsrc lintsrc;
85cc35fa
TG
520 int linttypes[2] = { mp_ExtINT, mp_NMI };
521 int i;
522
523 /*
524 * local APIC has default address
525 */
526 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
527
528 /*
529 * 2 CPUs, numbered 0 & 1.
530 */
c4563826 531 processor.type = MP_PROCESSOR;
85cc35fa 532 /* Either an integrated APIC or a discrete 82489DX. */
c4563826
JSR
533 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
534 processor.cpuflag = CPU_ENABLED;
535 processor.cpufeature = (boot_cpu_data.x86 << 8) |
85cc35fa 536 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
c4563826
JSR
537 processor.featureflag = boot_cpu_data.x86_capability[0];
538 processor.reserved[0] = 0;
539 processor.reserved[1] = 0;
85cc35fa 540 for (i = 0; i < 2; i++) {
c4563826 541 processor.apicid = i;
85cc35fa
TG
542 MP_processor_info(&processor);
543 }
544
545 construct_ioapic_table(mpc_default_type);
546
b5ced7cd
JSR
547 lintsrc.type = MP_LINTSRC;
548 lintsrc.irqflag = 0; /* conforming */
549 lintsrc.srcbusid = 0;
550 lintsrc.srcbusirq = 0;
551 lintsrc.destapic = MP_APIC_ALL;
1da177e4 552 for (i = 0; i < 2; i++) {
b5ced7cd
JSR
553 lintsrc.irqtype = linttypes[i];
554 lintsrc.destapiclint = i;
1da177e4
LT
555 MP_lintsrc_info(&lintsrc);
556 }
557}
558
41401db6 559static struct mpf_intel *mpf_found;
1da177e4
LT
560
561/*
562 * Scan the memory blocks for an SMP configuration block.
563 */
3b33553b 564static void __init __get_smp_config(unsigned int early)
1da177e4 565{
41401db6 566 struct mpf_intel *mpf = mpf_found;
1da177e4 567
69b88afa
YL
568 if (!mpf)
569 return;
570
888032cd
AS
571 if (acpi_lapic && early)
572 return;
69b88afa 573
1da177e4 574 /*
69b88afa
YL
575 * MPS doesn't support hyperthreading, aka only have
576 * thread 0 apic id in MPS table
1da177e4 577 */
69b88afa 578 if (acpi_lapic && acpi_ioapic)
1da177e4 579 return;
1da177e4 580
69b88afa
YL
581 if (x86_quirks->mach_get_smp_config) {
582 if (x86_quirks->mach_get_smp_config(early))
583 return;
584 }
9adc1386 585
4ef81297 586 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
1eb1b3b6 587 mpf->specification);
b3e24164 588#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
1eb1b3b6 589 if (mpf->feature2 & (1 << 7)) {
1da177e4
LT
590 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
591 pic_mode = 1;
592 } else {
593 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
594 pic_mode = 0;
595 }
4421b1c8 596#endif
1da177e4
LT
597 /*
598 * Now see if we need to read further.
599 */
1eb1b3b6 600 if (mpf->feature1 != 0) {
888032cd
AS
601 if (early) {
602 /*
603 * local APIC has default address
604 */
605 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
606 return;
607 }
1da177e4 608
4ef81297 609 printk(KERN_INFO "Default MP configuration #%d\n",
1eb1b3b6
JSR
610 mpf->feature1);
611 construct_default_ISA_mptable(mpf->feature1);
1da177e4 612
1eb1b3b6 613 } else if (mpf->physptr) {
1da177e4
LT
614
615 /*
616 * Read the physical hardware table. Anything here will
617 * override the defaults.
618 */
1eb1b3b6 619 if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) {
bab4b27c 620#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 621 smp_found_config = 0;
bab4b27c 622#endif
4ef81297
AS
623 printk(KERN_ERR
624 "BIOS bug, MP table errors detected!...\n");
4421b1c8
AS
625 printk(KERN_ERR "... disabling SMP support. "
626 "(tell your hw vendor)\n");
1da177e4
LT
627 return;
628 }
61048c63 629
888032cd
AS
630 if (early)
631 return;
61048c63 632#ifdef CONFIG_X86_IO_APIC
1da177e4
LT
633 /*
634 * If there are no explicit MP IRQ entries, then we are
635 * broken. We set up most of the low 16 IO-APIC pins to
636 * ISA defaults and hope it will work.
637 */
638 if (!mp_irq_entries) {
00fb8606 639 struct mpc_bus bus;
1da177e4 640
4421b1c8
AS
641 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
642 "using default mptable. "
643 "(tell your hw vendor)\n");
1da177e4 644
d4c715fa
JSR
645 bus.type = MP_BUS;
646 bus.busid = 0;
647 memcpy(bus.bustype, "ISA ", 6);
1da177e4
LT
648 MP_bus_info(&bus);
649
650 construct_default_ioirq_mptable(0);
651 }
61048c63 652#endif
1da177e4
LT
653 } else
654 BUG();
655
888032cd
AS
656 if (!early)
657 printk(KERN_INFO "Processors: %d\n", num_processors);
1da177e4
LT
658 /*
659 * Only use the first configuration found.
660 */
661}
662
888032cd
AS
663void __init early_get_smp_config(void)
664{
665 __get_smp_config(1);
666}
667
668void __init get_smp_config(void)
669{
670 __get_smp_config(0);
671}
672
673static int __init smp_scan_config(unsigned long base, unsigned long length,
674 unsigned reserve)
1da177e4 675{
92fd4b7a 676 unsigned int *bp = phys_to_virt(base);
41401db6 677 struct mpf_intel *mpf;
1da177e4 678
eeb0d7d1
RH
679 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
680 bp, length);
5d47a271 681 BUILD_BUG_ON(sizeof(*mpf) != 16);
1da177e4
LT
682
683 while (length > 0) {
41401db6 684 mpf = (struct mpf_intel *)bp;
1da177e4 685 if ((*bp == SMP_MAGIC_IDENT) &&
1eb1b3b6 686 (mpf->length == 1) &&
4ef81297 687 !mpf_checksum((unsigned char *)bp, 16) &&
1eb1b3b6
JSR
688 ((mpf->specification == 1)
689 || (mpf->specification == 4))) {
bab4b27c 690#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 691 smp_found_config = 1;
bab4b27c 692#endif
92fd4b7a 693 mpf_found = mpf;
b1f006b6 694
e91a3b43 695 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
4ef81297 696 mpf, virt_to_phys(mpf));
b1f006b6
YL
697
698 if (!reserve)
699 return 1;
d2dbf343 700 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
72a7fe39 701 BOOTMEM_DEFAULT);
1eb1b3b6 702 if (mpf->physptr) {
d2dbf343
YL
703 unsigned long size = PAGE_SIZE;
704#ifdef CONFIG_X86_32
1da177e4
LT
705 /*
706 * We cannot access to MPC table to compute
707 * table size yet, as only few megabytes from
708 * the bottom is mapped now.
709 * PC-9800's MPC table places on the very last
710 * of physical memory; so that simply reserving
1eb1b3b6 711 * PAGE_SIZE from mpf->physptr yields BUG()
1da177e4
LT
712 * in reserve_bootmem.
713 */
1da177e4 714 unsigned long end = max_low_pfn * PAGE_SIZE;
1eb1b3b6
JSR
715 if (mpf->physptr + size > end)
716 size = end - mpf->physptr;
d2dbf343 717#endif
1eb1b3b6 718 reserve_bootmem_generic(mpf->physptr, size,
72a7fe39 719 BOOTMEM_DEFAULT);
1da177e4
LT
720 }
721
d2dbf343 722 return 1;
1da177e4
LT
723 }
724 bp += 4;
725 length -= 16;
726 }
727 return 0;
728}
729
3b33553b 730static void __init __find_smp_config(unsigned int reserve)
1da177e4
LT
731{
732 unsigned int address;
733
3c9cb6de
YL
734 if (x86_quirks->mach_find_smp_config) {
735 if (x86_quirks->mach_find_smp_config(reserve))
3b33553b
IM
736 return;
737 }
1da177e4
LT
738 /*
739 * FIXME: Linux assumes you have 640K of base ram..
740 * this continues the error...
741 *
742 * 1) Scan the bottom 1K for a signature
743 * 2) Scan the top 1K of base RAM
744 * 3) Scan the 64K of bios
745 */
888032cd
AS
746 if (smp_scan_config(0x0, 0x400, reserve) ||
747 smp_scan_config(639 * 0x400, 0x400, reserve) ||
748 smp_scan_config(0xF0000, 0x10000, reserve))
1da177e4
LT
749 return;
750 /*
751 * If it is an SMP machine we should know now, unless the
752 * configuration is in an EISA/MCA bus machine with an
753 * extended bios data area.
754 *
755 * there is a real-mode segmented pointer pointing to the
756 * 4K EBDA area at 0x40E, calculate and scan it here.
757 *
758 * NOTE! There are Linux loaders that will corrupt the EBDA
759 * area, and as such this kind of SMP config may be less
760 * trustworthy, simply because the SMP table may have been
761 * stomped on during early boot. These loaders are buggy and
762 * should be fixed.
763 *
764 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
765 */
766
767 address = get_bios_ebda();
768 if (address)
888032cd
AS
769 smp_scan_config(address, 0x400, reserve);
770}
771
772void __init early_find_smp_config(void)
773{
774 __find_smp_config(0);
775}
776
777void __init find_smp_config(void)
778{
779 __find_smp_config(1);
1da177e4 780}
2944e16b
YL
781
782#ifdef CONFIG_X86_IO_APIC
783static u8 __initdata irq_used[MAX_IRQ_SOURCES];
784
540d4e72 785static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
2944e16b
YL
786{
787 int i;
788
e253b396 789 if (m->irqtype != mp_INT)
2944e16b
YL
790 return 0;
791
e253b396 792 if (m->irqflag != 0x0f)
2944e16b
YL
793 return 0;
794
795 /* not legacy */
796
797 for (i = 0; i < mp_irq_entries; i++) {
c2c21745 798 if (mp_irqs[i].irqtype != mp_INT)
2944e16b
YL
799 continue;
800
c2c21745 801 if (mp_irqs[i].irqflag != 0x0f)
2944e16b
YL
802 continue;
803
c2c21745 804 if (mp_irqs[i].srcbus != m->srcbus)
2944e16b 805 continue;
c2c21745 806 if (mp_irqs[i].srcbusirq != m->srcbusirq)
2944e16b
YL
807 continue;
808 if (irq_used[i]) {
809 /* already claimed */
810 return -2;
811 }
812 irq_used[i] = 1;
813 return i;
814 }
815
816 /* not found */
817 return -1;
818}
819
820#define SPARE_SLOT_NUM 20
821
540d4e72 822static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
2944e16b
YL
823#endif
824
f29521e4 825static int __init replace_intsrc_all(struct mpc_table *mpc,
2944e16b
YL
826 unsigned long mpc_new_phys,
827 unsigned long mpc_new_length)
828{
829#ifdef CONFIG_X86_IO_APIC
830 int i;
831 int nr_m_spare = 0;
832#endif
833
834 int count = sizeof(*mpc);
835 unsigned char *mpt = ((unsigned char *)mpc) + count;
836
6c65da50
JSR
837 printk(KERN_INFO "mpc_length %x\n", mpc->length);
838 while (count < mpc->length) {
2944e16b
YL
839 switch (*mpt) {
840 case MP_PROCESSOR:
841 {
f4f21b71 842 struct mpc_cpu *m = (struct mpc_cpu *)mpt;
2944e16b
YL
843 mpt += sizeof(*m);
844 count += sizeof(*m);
845 break;
846 }
847 case MP_BUS:
848 {
00fb8606 849 struct mpc_bus *m = (struct mpc_bus *)mpt;
2944e16b
YL
850 mpt += sizeof(*m);
851 count += sizeof(*m);
852 break;
853 }
854 case MP_IOAPIC:
855 {
2b85b5fb
JSR
856 mpt += sizeof(struct mpc_ioapic);
857 count += sizeof(struct mpc_ioapic);
2944e16b
YL
858 break;
859 }
860 case MP_INTSRC:
861 {
862#ifdef CONFIG_X86_IO_APIC
540d4e72 863 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
2944e16b
YL
864
865 printk(KERN_INFO "OLD ");
866 print_MP_intsrc_info(m);
867 i = get_MP_intsrc_index(m);
868 if (i > 0) {
869 assign_to_mpc_intsrc(&mp_irqs[i], m);
870 printk(KERN_INFO "NEW ");
871 print_mp_irq_info(&mp_irqs[i]);
872 } else if (!i) {
873 /* legacy, do nothing */
874 } else if (nr_m_spare < SPARE_SLOT_NUM) {
875 /*
876 * not found (-1), or duplicated (-2)
877 * are invalid entries,
878 * we need to use the slot later
879 */
880 m_spare[nr_m_spare] = m;
881 nr_m_spare++;
882 }
883#endif
540d4e72
JSR
884 mpt += sizeof(struct mpc_intsrc);
885 count += sizeof(struct mpc_intsrc);
2944e16b
YL
886 break;
887 }
888 case MP_LINTSRC:
889 {
8fb2952b
JSR
890 struct mpc_lintsrc *m =
891 (struct mpc_lintsrc *)mpt;
2944e16b
YL
892 mpt += sizeof(*m);
893 count += sizeof(*m);
894 break;
895 }
896 default:
897 /* wrong mptable */
898 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
899 printk(KERN_ERR "type %x\n", *mpt);
900 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
6c65da50 901 1, mpc, mpc->length, 1);
2944e16b
YL
902 goto out;
903 }
904 }
905
906#ifdef CONFIG_X86_IO_APIC
907 for (i = 0; i < mp_irq_entries; i++) {
908 if (irq_used[i])
909 continue;
910
c2c21745 911 if (mp_irqs[i].irqtype != mp_INT)
2944e16b
YL
912 continue;
913
c2c21745 914 if (mp_irqs[i].irqflag != 0x0f)
2944e16b
YL
915 continue;
916
917 if (nr_m_spare > 0) {
918 printk(KERN_INFO "*NEW* found ");
919 nr_m_spare--;
920 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
921 m_spare[nr_m_spare] = NULL;
922 } else {
540d4e72
JSR
923 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
924 count += sizeof(struct mpc_intsrc);
2944e16b
YL
925 if (!mpc_new_phys) {
926 printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
927 } else {
928 if (count <= mpc_new_length)
929 printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
930 else {
931 printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
932 goto out;
933 }
934 }
935 assign_to_mpc_intsrc(&mp_irqs[i], m);
6c65da50 936 mpc->length = count;
540d4e72 937 mpt += sizeof(struct mpc_intsrc);
2944e16b
YL
938 }
939 print_mp_irq_info(&mp_irqs[i]);
940 }
941#endif
942out:
943 /* update checksum */
6c65da50
JSR
944 mpc->checksum = 0;
945 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
2944e16b
YL
946
947 return 0;
948}
949
fcfa146e
YL
950static int __initdata enable_update_mptable;
951
2944e16b
YL
952static int __init update_mptable_setup(char *str)
953{
954 enable_update_mptable = 1;
955 return 0;
956}
957early_param("update_mptable", update_mptable_setup);
958
959static unsigned long __initdata mpc_new_phys;
960static unsigned long mpc_new_length __initdata = 4096;
961
962/* alloc_mptable or alloc_mptable=4k */
963static int __initdata alloc_mptable;
964static int __init parse_alloc_mptable_opt(char *p)
965{
966 enable_update_mptable = 1;
967 alloc_mptable = 1;
968 if (!p)
969 return 0;
970 mpc_new_length = memparse(p, &p);
971 return 0;
972}
973early_param("alloc_mptable", parse_alloc_mptable_opt);
974
975void __init early_reserve_e820_mpc_new(void)
976{
977 if (enable_update_mptable && alloc_mptable) {
978 u64 startt = 0;
979#ifdef CONFIG_X86_TRAMPOLINE
980 startt = TRAMPOLINE_BASE;
981#endif
982 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
983 }
984}
985
986static int __init update_mp_table(void)
987{
988 char str[16];
989 char oem[10];
41401db6 990 struct mpf_intel *mpf;
f29521e4 991 struct mpc_table *mpc, *mpc_new;
2944e16b
YL
992
993 if (!enable_update_mptable)
994 return 0;
995
996 mpf = mpf_found;
997 if (!mpf)
998 return 0;
999
1000 /*
1001 * Now see if we need to go further.
1002 */
1eb1b3b6 1003 if (mpf->feature1 != 0)
2944e16b
YL
1004 return 0;
1005
1eb1b3b6 1006 if (!mpf->physptr)
2944e16b
YL
1007 return 0;
1008
1eb1b3b6 1009 mpc = phys_to_virt(mpf->physptr);
2944e16b
YL
1010
1011 if (!smp_check_mpc(mpc, oem, str))
1012 return 0;
1013
1014 printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
1eb1b3b6 1015 printk(KERN_INFO "physptr: %x\n", mpf->physptr);
2944e16b 1016
6c65da50 1017 if (mpc_new_phys && mpc->length > mpc_new_length) {
2944e16b
YL
1018 mpc_new_phys = 0;
1019 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
1020 mpc_new_length);
1021 }
1022
1023 if (!mpc_new_phys) {
1024 unsigned char old, new;
1025 /* check if we can change the postion */
6c65da50
JSR
1026 mpc->checksum = 0;
1027 old = mpf_checksum((unsigned char *)mpc, mpc->length);
1028 mpc->checksum = 0xff;
1029 new = mpf_checksum((unsigned char *)mpc, mpc->length);
2944e16b
YL
1030 if (old == new) {
1031 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
1032 return 0;
1033 }
1034 printk(KERN_INFO "use in-positon replacing\n");
1035 } else {
1eb1b3b6 1036 mpf->physptr = mpc_new_phys;
2944e16b 1037 mpc_new = phys_to_virt(mpc_new_phys);
6c65da50 1038 memcpy(mpc_new, mpc, mpc->length);
2944e16b
YL
1039 mpc = mpc_new;
1040 /* check if we can modify that */
1eb1b3b6 1041 if (mpc_new_phys - mpf->physptr) {
41401db6 1042 struct mpf_intel *mpf_new;
2944e16b
YL
1043 /* steal 16 bytes from [0, 1k) */
1044 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1045 mpf_new = phys_to_virt(0x400 - 16);
1046 memcpy(mpf_new, mpf, 16);
1047 mpf = mpf_new;
1eb1b3b6 1048 mpf->physptr = mpc_new_phys;
2944e16b 1049 }
1eb1b3b6
JSR
1050 mpf->checksum = 0;
1051 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
1052 printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
2944e16b
YL
1053 }
1054
1055 /*
1056 * only replace the one with mp_INT and
1057 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1058 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1059 * may need pci=routeirq for all coverage
1060 */
1061 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1062
1063 return 0;
1064}
1065
1066late_initcall(update_mp_table);