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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
11113f84 | 2 | * Intel Multiprocessor Specification 1.1 and 1.4 |
1da177e4 LT |
3 | * compliant MP-table parsing routines. |
4 | * | |
5 | * (c) 1995 Alan Cox, Building #3 <alan@redhat.com> | |
6 | * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> | |
85bdddec | 7 | * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/mm.h> | |
1da177e4 | 11 | #include <linux/init.h> |
1da177e4 | 12 | #include <linux/delay.h> |
1da177e4 | 13 | #include <linux/bootmem.h> |
1da177e4 LT |
14 | #include <linux/kernel_stat.h> |
15 | #include <linux/mc146818rtc.h> | |
16 | #include <linux/bitops.h> | |
85bdddec AS |
17 | #include <linux/acpi.h> |
18 | #include <linux/module.h> | |
1da177e4 LT |
19 | |
20 | #include <asm/smp.h> | |
1da177e4 LT |
21 | #include <asm/mtrr.h> |
22 | #include <asm/mpspec.h> | |
85bdddec | 23 | #include <asm/pgalloc.h> |
1da177e4 | 24 | #include <asm/io_apic.h> |
85bdddec AS |
25 | #include <asm/proto.h> |
26 | #include <asm/acpi.h> | |
ce3fe6b2 | 27 | #include <asm/bios_ebda.h> |
1da177e4 LT |
28 | |
29 | #include <mach_apic.h> | |
85bdddec | 30 | #ifdef CONFIG_X86_32 |
874c4fe3 | 31 | #include <mach_apicdef.h> |
1da177e4 | 32 | #include <mach_mpparse.h> |
85bdddec | 33 | #endif |
1da177e4 | 34 | |
1da177e4 LT |
35 | /* |
36 | * Checksum an MP configuration block. | |
37 | */ | |
38 | ||
39 | static int __init mpf_checksum(unsigned char *mp, int len) | |
40 | { | |
41 | int sum = 0; | |
42 | ||
43 | while (len--) | |
44 | sum += *mp++; | |
45 | ||
46 | return sum & 0xFF; | |
47 | } | |
48 | ||
86420506 | 49 | #ifdef CONFIG_X86_NUMAQ |
1da177e4 LT |
50 | /* |
51 | * Have to match translation table entries to main table entries by counter | |
52 | * hence the mpc_record variable .... can't see a less disgusting way of | |
53 | * doing this .... | |
54 | */ | |
55 | ||
4ef81297 AS |
56 | static int mpc_record; |
57 | static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY] | |
58 | __cpuinitdata; | |
86420506 | 59 | #endif |
1da177e4 | 60 | |
c853c676 AS |
61 | static void __cpuinit MP_processor_info(struct mpc_config_processor *m) |
62 | { | |
63 | int apicid; | |
746f2244 | 64 | char *bootup_cpu = ""; |
c853c676 | 65 | |
7b1292e2 GC |
66 | if (!(m->mpc_cpuflag & CPU_ENABLED)) { |
67 | disabled_cpus++; | |
1da177e4 | 68 | return; |
7b1292e2 | 69 | } |
4655c7de | 70 | #ifdef CONFIG_X86_NUMAQ |
1da177e4 | 71 | apicid = mpc_apic_id(m, translation_table[mpc_record]); |
4655c7de | 72 | #else |
4655c7de AS |
73 | apicid = m->mpc_apicid; |
74 | #endif | |
1da177e4 | 75 | if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) { |
746f2244 | 76 | bootup_cpu = " (Bootup-CPU)"; |
1da177e4 | 77 | boot_cpu_physical_apicid = m->mpc_apicid; |
1da177e4 LT |
78 | } |
79 | ||
746f2244 | 80 | printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu); |
c853c676 | 81 | generic_processor_info(apicid, m->mpc_apicver); |
1da177e4 LT |
82 | } |
83 | ||
4ef81297 | 84 | static void __init MP_bus_info(struct mpc_config_bus *m) |
1da177e4 LT |
85 | { |
86 | char str[7]; | |
1da177e4 LT |
87 | memcpy(str, m->mpc_bustype, 6); |
88 | str[6] = 0; | |
89 | ||
0ec153af | 90 | #ifdef CONFIG_X86_NUMAQ |
1da177e4 | 91 | mpc_oem_bus_info(m, str, translation_table[mpc_record]); |
0ec153af | 92 | #else |
11a62a05 | 93 | printk(KERN_INFO "Bus #%d is %s\n", m->mpc_busid, str); |
0ec153af | 94 | #endif |
1da177e4 | 95 | |
5e4edbb7 | 96 | #if MAX_MP_BUSSES < 256 |
c0ec31ad RD |
97 | if (m->mpc_busid >= MAX_MP_BUSSES) { |
98 | printk(KERN_WARNING "MP table busid value (%d) for bustype %s " | |
4ef81297 AS |
99 | " is too large, max. supported is %d\n", |
100 | m->mpc_busid, str, MAX_MP_BUSSES - 1); | |
c0ec31ad RD |
101 | return; |
102 | } | |
5e4edbb7 | 103 | #endif |
c0ec31ad | 104 | |
f8924e77 AS |
105 | if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { |
106 | set_bit(m->mpc_busid, mp_bus_not_pci); | |
107 | #if defined(CONFIG_EISA) || defined (CONFIG_MCA) | |
108 | mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA; | |
109 | #endif | |
110 | } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { | |
d285e338 | 111 | #ifdef CONFIG_X86_NUMAQ |
1da177e4 | 112 | mpc_oem_pci_bus(m, translation_table[mpc_record]); |
d285e338 | 113 | #endif |
a6333c3c | 114 | clear_bit(m->mpc_busid, mp_bus_not_pci); |
c0a282c2 AS |
115 | #if defined(CONFIG_EISA) || defined (CONFIG_MCA) |
116 | mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI; | |
4ef81297 | 117 | } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { |
9e0a2de2 | 118 | mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA; |
4ef81297 | 119 | } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { |
1da177e4 | 120 | mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA; |
c0a282c2 | 121 | #endif |
f8924e77 AS |
122 | } else |
123 | printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); | |
1da177e4 LT |
124 | } |
125 | ||
61048c63 AS |
126 | #ifdef CONFIG_X86_IO_APIC |
127 | ||
857033a6 AS |
128 | static int bad_ioapic(unsigned long address) |
129 | { | |
130 | if (nr_ioapics >= MAX_IO_APICS) { | |
131 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
132 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
133 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
134 | } | |
135 | if (!address) { | |
136 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
137 | " found in table, skipping!\n"); | |
138 | return 1; | |
139 | } | |
140 | return 0; | |
141 | } | |
142 | ||
4ef81297 | 143 | static void __init MP_ioapic_info(struct mpc_config_ioapic *m) |
1da177e4 LT |
144 | { |
145 | if (!(m->mpc_flags & MPC_APIC_USABLE)) | |
146 | return; | |
147 | ||
64883ab0 | 148 | printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", |
4ef81297 | 149 | m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr); |
857033a6 AS |
150 | |
151 | if (bad_ioapic(m->mpc_apicaddr)) | |
1da177e4 | 152 | return; |
857033a6 | 153 | |
ec2cd0a2 AS |
154 | mp_ioapics[nr_ioapics].mp_apicaddr = m->mpc_apicaddr; |
155 | mp_ioapics[nr_ioapics].mp_apicid = m->mpc_apicid; | |
156 | mp_ioapics[nr_ioapics].mp_type = m->mpc_type; | |
157 | mp_ioapics[nr_ioapics].mp_apicver = m->mpc_apicver; | |
158 | mp_ioapics[nr_ioapics].mp_flags = m->mpc_flags; | |
1da177e4 LT |
159 | nr_ioapics++; |
160 | } | |
161 | ||
4ef81297 | 162 | static void __init MP_intsrc_info(struct mpc_config_intsrc *m) |
1da177e4 | 163 | { |
11a62a05 | 164 | printk(KERN_INFO "Int: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 165 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
4ef81297 AS |
166 | m->mpc_irqtype, m->mpc_irqflag & 3, |
167 | (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus, | |
168 | m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq); | |
2fddb6e2 AS |
169 | mp_irqs[mp_irq_entries].mp_dstapic = m->mpc_dstapic; |
170 | mp_irqs[mp_irq_entries].mp_type = m->mpc_type; | |
171 | mp_irqs[mp_irq_entries].mp_irqtype = m->mpc_irqtype; | |
172 | mp_irqs[mp_irq_entries].mp_irqflag = m->mpc_irqflag; | |
173 | mp_irqs[mp_irq_entries].mp_srcbus = m->mpc_srcbus; | |
174 | mp_irqs[mp_irq_entries].mp_srcbusirq = m->mpc_srcbusirq; | |
175 | mp_irqs[mp_irq_entries].mp_dstirq = m->mpc_dstirq; | |
1da177e4 LT |
176 | if (++mp_irq_entries == MAX_IRQ_SOURCES) |
177 | panic("Max # of irq sources exceeded!!\n"); | |
178 | } | |
179 | ||
61048c63 AS |
180 | #endif |
181 | ||
4ef81297 | 182 | static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m) |
1da177e4 | 183 | { |
11a62a05 | 184 | printk(KERN_INFO "Lint: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 185 | " IRQ %02x, APIC ID %x, APIC LINT %02x\n", |
4ef81297 AS |
186 | m->mpc_irqtype, m->mpc_irqflag & 3, |
187 | (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid, | |
188 | m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint); | |
1da177e4 LT |
189 | } |
190 | ||
191 | #ifdef CONFIG_X86_NUMAQ | |
4ef81297 | 192 | static void __init MP_translation_info(struct mpc_config_translation *m) |
1da177e4 | 193 | { |
4ef81297 AS |
194 | printk(KERN_INFO |
195 | "Translation: record %d, type %d, quad %d, global %d, local %d\n", | |
196 | mpc_record, m->trans_type, m->trans_quad, m->trans_global, | |
197 | m->trans_local); | |
1da177e4 | 198 | |
4ef81297 | 199 | if (mpc_record >= MAX_MPC_ENTRY) |
1da177e4 LT |
200 | printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n"); |
201 | else | |
4ef81297 | 202 | translation_table[mpc_record] = m; /* stash this for later */ |
1da177e4 LT |
203 | if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad)) |
204 | node_set_online(m->trans_quad); | |
205 | } | |
206 | ||
207 | /* | |
208 | * Read/parse the MPC oem tables | |
209 | */ | |
210 | ||
4ef81297 AS |
211 | static void __init smp_read_mpc_oem(struct mp_config_oemtable *oemtable, |
212 | unsigned short oemsize) | |
1da177e4 | 213 | { |
4ef81297 AS |
214 | int count = sizeof(*oemtable); /* the header size */ |
215 | unsigned char *oemptr = ((unsigned char *)oemtable) + count; | |
216 | ||
1da177e4 | 217 | mpc_record = 0; |
4ef81297 AS |
218 | printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n", |
219 | oemtable); | |
220 | if (memcmp(oemtable->oem_signature, MPC_OEM_SIGNATURE, 4)) { | |
221 | printk(KERN_WARNING | |
222 | "SMP mpc oemtable: bad signature [%c%c%c%c]!\n", | |
223 | oemtable->oem_signature[0], oemtable->oem_signature[1], | |
224 | oemtable->oem_signature[2], oemtable->oem_signature[3]); | |
1da177e4 LT |
225 | return; |
226 | } | |
4ef81297 | 227 | if (mpf_checksum((unsigned char *)oemtable, oemtable->oem_length)) { |
1da177e4 LT |
228 | printk(KERN_WARNING "SMP oem mptable: checksum error!\n"); |
229 | return; | |
230 | } | |
231 | while (count < oemtable->oem_length) { | |
232 | switch (*oemptr) { | |
4ef81297 | 233 | case MP_TRANSLATION: |
1da177e4 | 234 | { |
4ef81297 AS |
235 | struct mpc_config_translation *m = |
236 | (struct mpc_config_translation *)oemptr; | |
1da177e4 LT |
237 | MP_translation_info(m); |
238 | oemptr += sizeof(*m); | |
239 | count += sizeof(*m); | |
240 | ++mpc_record; | |
241 | break; | |
242 | } | |
4ef81297 | 243 | default: |
1da177e4 | 244 | { |
4ef81297 AS |
245 | printk(KERN_WARNING |
246 | "Unrecognised OEM table entry type! - %d\n", | |
247 | (int)*oemptr); | |
1da177e4 LT |
248 | return; |
249 | } | |
250 | } | |
4ef81297 | 251 | } |
1da177e4 LT |
252 | } |
253 | ||
254 | static inline void mps_oem_check(struct mp_config_table *mpc, char *oem, | |
4ef81297 | 255 | char *productid) |
1da177e4 LT |
256 | { |
257 | if (strncmp(oem, "IBM NUMA", 8)) | |
258 | printk("Warning! May not be a NUMA-Q system!\n"); | |
259 | if (mpc->mpc_oemptr) | |
4ef81297 AS |
260 | smp_read_mpc_oem((struct mp_config_oemtable *)mpc->mpc_oemptr, |
261 | mpc->mpc_oemsize); | |
1da177e4 | 262 | } |
4ef81297 | 263 | #endif /* CONFIG_X86_NUMAQ */ |
1da177e4 LT |
264 | |
265 | /* | |
266 | * Read/parse the MPC | |
267 | */ | |
268 | ||
888032cd | 269 | static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early) |
1da177e4 LT |
270 | { |
271 | char str[16]; | |
272 | char oem[10]; | |
4ef81297 AS |
273 | int count = sizeof(*mpc); |
274 | unsigned char *mpt = ((unsigned char *)mpc) + count; | |
1da177e4 | 275 | |
4ef81297 | 276 | if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) { |
e950bea8 AS |
277 | printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", |
278 | mpc->mpc_signature[0], mpc->mpc_signature[1], | |
279 | mpc->mpc_signature[2], mpc->mpc_signature[3]); | |
1da177e4 LT |
280 | return 0; |
281 | } | |
4ef81297 | 282 | if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) { |
e950bea8 | 283 | printk(KERN_ERR "MPTABLE: checksum error!\n"); |
1da177e4 LT |
284 | return 0; |
285 | } | |
4ef81297 | 286 | if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) { |
e950bea8 | 287 | printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", |
4ef81297 | 288 | mpc->mpc_spec); |
1da177e4 LT |
289 | return 0; |
290 | } | |
291 | if (!mpc->mpc_lapic) { | |
e950bea8 | 292 | printk(KERN_ERR "MPTABLE: null local APIC address!\n"); |
1da177e4 LT |
293 | return 0; |
294 | } | |
4ef81297 AS |
295 | memcpy(oem, mpc->mpc_oem, 8); |
296 | oem[8] = 0; | |
11a62a05 | 297 | printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); |
1da177e4 | 298 | |
4ef81297 AS |
299 | memcpy(str, mpc->mpc_productid, 12); |
300 | str[12] = 0; | |
1da177e4 | 301 | |
e950bea8 | 302 | #ifdef CONFIG_X86_32 |
1da177e4 | 303 | mps_oem_check(mpc, oem, str); |
e950bea8 | 304 | #endif |
11a62a05 | 305 | printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); |
1da177e4 | 306 | |
e950bea8 | 307 | printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic); |
1da177e4 | 308 | |
e950bea8 | 309 | /* save the local APIC address, it might be non-default */ |
1da177e4 LT |
310 | if (!acpi_lapic) |
311 | mp_lapic_addr = mpc->mpc_lapic; | |
312 | ||
888032cd AS |
313 | if (early) |
314 | return 1; | |
315 | ||
1da177e4 | 316 | /* |
4ef81297 | 317 | * Now process the configuration blocks. |
1da177e4 | 318 | */ |
86420506 | 319 | #ifdef CONFIG_X86_NUMAQ |
1da177e4 | 320 | mpc_record = 0; |
86420506 | 321 | #endif |
1da177e4 | 322 | while (count < mpc->mpc_length) { |
4ef81297 AS |
323 | switch (*mpt) { |
324 | case MP_PROCESSOR: | |
1da177e4 | 325 | { |
4ef81297 AS |
326 | struct mpc_config_processor *m = |
327 | (struct mpc_config_processor *)mpt; | |
1da177e4 LT |
328 | /* ACPI may have already provided this data */ |
329 | if (!acpi_lapic) | |
330 | MP_processor_info(m); | |
331 | mpt += sizeof(*m); | |
332 | count += sizeof(*m); | |
333 | break; | |
334 | } | |
4ef81297 | 335 | case MP_BUS: |
1da177e4 | 336 | { |
4ef81297 AS |
337 | struct mpc_config_bus *m = |
338 | (struct mpc_config_bus *)mpt; | |
1da177e4 LT |
339 | MP_bus_info(m); |
340 | mpt += sizeof(*m); | |
341 | count += sizeof(*m); | |
342 | break; | |
343 | } | |
4ef81297 | 344 | case MP_IOAPIC: |
1da177e4 | 345 | { |
61048c63 | 346 | #ifdef CONFIG_X86_IO_APIC |
4ef81297 AS |
347 | struct mpc_config_ioapic *m = |
348 | (struct mpc_config_ioapic *)mpt; | |
1da177e4 | 349 | MP_ioapic_info(m); |
61048c63 | 350 | #endif |
4ef81297 AS |
351 | mpt += sizeof(struct mpc_config_ioapic); |
352 | count += sizeof(struct mpc_config_ioapic); | |
1da177e4 LT |
353 | break; |
354 | } | |
4ef81297 | 355 | case MP_INTSRC: |
1da177e4 | 356 | { |
61048c63 | 357 | #ifdef CONFIG_X86_IO_APIC |
4ef81297 AS |
358 | struct mpc_config_intsrc *m = |
359 | (struct mpc_config_intsrc *)mpt; | |
1da177e4 LT |
360 | |
361 | MP_intsrc_info(m); | |
61048c63 | 362 | #endif |
4ef81297 AS |
363 | mpt += sizeof(struct mpc_config_intsrc); |
364 | count += sizeof(struct mpc_config_intsrc); | |
1da177e4 LT |
365 | break; |
366 | } | |
4ef81297 | 367 | case MP_LINTSRC: |
1da177e4 | 368 | { |
4ef81297 AS |
369 | struct mpc_config_lintsrc *m = |
370 | (struct mpc_config_lintsrc *)mpt; | |
1da177e4 | 371 | MP_lintsrc_info(m); |
4ef81297 AS |
372 | mpt += sizeof(*m); |
373 | count += sizeof(*m); | |
1da177e4 LT |
374 | break; |
375 | } | |
4ef81297 | 376 | default: |
711554db YL |
377 | /* wrong mptable */ |
378 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"); | |
379 | printk(KERN_ERR "type %x\n", *mpt); | |
380 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
381 | 1, mpc, mpc->mpc_length, 1); | |
382 | count = mpc->mpc_length; | |
383 | break; | |
1da177e4 | 384 | } |
86420506 | 385 | #ifdef CONFIG_X86_NUMAQ |
1da177e4 | 386 | ++mpc_record; |
86420506 | 387 | #endif |
1da177e4 | 388 | } |
3c43f039 | 389 | setup_apic_routing(); |
1da177e4 | 390 | if (!num_processors) |
e950bea8 | 391 | printk(KERN_ERR "MPTABLE: no processors registered!\n"); |
1da177e4 LT |
392 | return num_processors; |
393 | } | |
394 | ||
61048c63 AS |
395 | #ifdef CONFIG_X86_IO_APIC |
396 | ||
1da177e4 LT |
397 | static int __init ELCR_trigger(unsigned int irq) |
398 | { | |
399 | unsigned int port; | |
400 | ||
401 | port = 0x4d0 + (irq >> 3); | |
402 | return (inb(port) >> (irq & 7)) & 1; | |
403 | } | |
404 | ||
405 | static void __init construct_default_ioirq_mptable(int mpc_default_type) | |
406 | { | |
407 | struct mpc_config_intsrc intsrc; | |
408 | int i; | |
409 | int ELCR_fallback = 0; | |
410 | ||
411 | intsrc.mpc_type = MP_INTSRC; | |
4ef81297 | 412 | intsrc.mpc_irqflag = 0; /* conforming */ |
1da177e4 | 413 | intsrc.mpc_srcbus = 0; |
ec2cd0a2 | 414 | intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid; |
1da177e4 LT |
415 | |
416 | intsrc.mpc_irqtype = mp_INT; | |
417 | ||
418 | /* | |
419 | * If true, we have an ISA/PCI system with no IRQ entries | |
420 | * in the MP table. To prevent the PCI interrupts from being set up | |
421 | * incorrectly, we try to use the ELCR. The sanity check to see if | |
422 | * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can | |
423 | * never be level sensitive, so we simply see if the ELCR agrees. | |
424 | * If it does, we assume it's valid. | |
425 | */ | |
426 | if (mpc_default_type == 5) { | |
62441bf1 AS |
427 | printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " |
428 | "falling back to ELCR\n"); | |
1da177e4 | 429 | |
62441bf1 AS |
430 | if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || |
431 | ELCR_trigger(13)) | |
432 | printk(KERN_ERR "ELCR contains invalid data... " | |
433 | "not using ELCR\n"); | |
1da177e4 | 434 | else { |
4ef81297 AS |
435 | printk(KERN_INFO |
436 | "Using ELCR to identify PCI interrupts\n"); | |
1da177e4 LT |
437 | ELCR_fallback = 1; |
438 | } | |
439 | } | |
440 | ||
441 | for (i = 0; i < 16; i++) { | |
442 | switch (mpc_default_type) { | |
443 | case 2: | |
444 | if (i == 0 || i == 13) | |
445 | continue; /* IRQ0 & IRQ13 not connected */ | |
446 | /* fall through */ | |
447 | default: | |
448 | if (i == 2) | |
449 | continue; /* IRQ2 is never connected */ | |
450 | } | |
451 | ||
452 | if (ELCR_fallback) { | |
453 | /* | |
454 | * If the ELCR indicates a level-sensitive interrupt, we | |
455 | * copy that information over to the MP table in the | |
456 | * irqflag field (level sensitive, active high polarity). | |
457 | */ | |
458 | if (ELCR_trigger(i)) | |
459 | intsrc.mpc_irqflag = 13; | |
460 | else | |
461 | intsrc.mpc_irqflag = 0; | |
462 | } | |
463 | ||
464 | intsrc.mpc_srcbusirq = i; | |
4ef81297 | 465 | intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ |
1da177e4 LT |
466 | MP_intsrc_info(&intsrc); |
467 | } | |
468 | ||
469 | intsrc.mpc_irqtype = mp_ExtINT; | |
470 | intsrc.mpc_srcbusirq = 0; | |
4ef81297 | 471 | intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */ |
1da177e4 LT |
472 | MP_intsrc_info(&intsrc); |
473 | } | |
474 | ||
61048c63 AS |
475 | #endif |
476 | ||
1da177e4 LT |
477 | static inline void __init construct_default_ISA_mptable(int mpc_default_type) |
478 | { | |
479 | struct mpc_config_processor processor; | |
480 | struct mpc_config_bus bus; | |
61048c63 | 481 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 | 482 | struct mpc_config_ioapic ioapic; |
61048c63 | 483 | #endif |
1da177e4 LT |
484 | struct mpc_config_lintsrc lintsrc; |
485 | int linttypes[2] = { mp_ExtINT, mp_NMI }; | |
486 | int i; | |
487 | ||
488 | /* | |
489 | * local APIC has default address | |
490 | */ | |
491 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
492 | ||
493 | /* | |
494 | * 2 CPUs, numbered 0 & 1. | |
495 | */ | |
496 | processor.mpc_type = MP_PROCESSOR; | |
497 | /* Either an integrated APIC or a discrete 82489DX. */ | |
498 | processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01; | |
499 | processor.mpc_cpuflag = CPU_ENABLED; | |
500 | processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) | | |
4ef81297 | 501 | (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; |
1da177e4 LT |
502 | processor.mpc_featureflag = boot_cpu_data.x86_capability[0]; |
503 | processor.mpc_reserved[0] = 0; | |
504 | processor.mpc_reserved[1] = 0; | |
505 | for (i = 0; i < 2; i++) { | |
506 | processor.mpc_apicid = i; | |
507 | MP_processor_info(&processor); | |
508 | } | |
509 | ||
510 | bus.mpc_type = MP_BUS; | |
511 | bus.mpc_busid = 0; | |
512 | switch (mpc_default_type) { | |
4ef81297 | 513 | default: |
62441bf1 | 514 | printk(KERN_ERR "???\nUnknown standard configuration %d\n", |
4ef81297 AS |
515 | mpc_default_type); |
516 | /* fall through */ | |
517 | case 1: | |
518 | case 5: | |
519 | memcpy(bus.mpc_bustype, "ISA ", 6); | |
520 | break; | |
521 | case 2: | |
522 | case 6: | |
523 | case 3: | |
524 | memcpy(bus.mpc_bustype, "EISA ", 6); | |
525 | break; | |
526 | case 4: | |
527 | case 7: | |
528 | memcpy(bus.mpc_bustype, "MCA ", 6); | |
1da177e4 LT |
529 | } |
530 | MP_bus_info(&bus); | |
531 | if (mpc_default_type > 4) { | |
532 | bus.mpc_busid = 1; | |
533 | memcpy(bus.mpc_bustype, "PCI ", 6); | |
534 | MP_bus_info(&bus); | |
535 | } | |
536 | ||
61048c63 | 537 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
538 | ioapic.mpc_type = MP_IOAPIC; |
539 | ioapic.mpc_apicid = 2; | |
540 | ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01; | |
541 | ioapic.mpc_flags = MPC_APIC_USABLE; | |
542 | ioapic.mpc_apicaddr = 0xFEC00000; | |
543 | MP_ioapic_info(&ioapic); | |
544 | ||
545 | /* | |
546 | * We set up most of the low 16 IO-APIC pins according to MPS rules. | |
547 | */ | |
548 | construct_default_ioirq_mptable(mpc_default_type); | |
61048c63 | 549 | #endif |
1da177e4 | 550 | lintsrc.mpc_type = MP_LINTSRC; |
4ef81297 | 551 | lintsrc.mpc_irqflag = 0; /* conforming */ |
1da177e4 LT |
552 | lintsrc.mpc_srcbusid = 0; |
553 | lintsrc.mpc_srcbusirq = 0; | |
554 | lintsrc.mpc_destapic = MP_APIC_ALL; | |
555 | for (i = 0; i < 2; i++) { | |
556 | lintsrc.mpc_irqtype = linttypes[i]; | |
557 | lintsrc.mpc_destapiclint = i; | |
558 | MP_lintsrc_info(&lintsrc); | |
559 | } | |
560 | } | |
561 | ||
562 | static struct intel_mp_floating *mpf_found; | |
563 | ||
564 | /* | |
565 | * Scan the memory blocks for an SMP configuration block. | |
566 | */ | |
888032cd | 567 | static void __init __get_smp_config(unsigned early) |
1da177e4 LT |
568 | { |
569 | struct intel_mp_floating *mpf = mpf_found; | |
570 | ||
888032cd AS |
571 | if (acpi_lapic && early) |
572 | return; | |
1da177e4 | 573 | /* |
4ef81297 | 574 | * ACPI supports both logical (e.g. Hyper-Threading) and physical |
1da177e4 LT |
575 | * processors, where MPS only supports physical. |
576 | */ | |
577 | if (acpi_lapic && acpi_ioapic) { | |
4421b1c8 AS |
578 | printk(KERN_INFO "Using ACPI (MADT) for SMP configuration " |
579 | "information\n"); | |
1da177e4 | 580 | return; |
4ef81297 | 581 | } else if (acpi_lapic) |
4421b1c8 AS |
582 | printk(KERN_INFO "Using ACPI for processor (LAPIC) " |
583 | "configuration information\n"); | |
1da177e4 | 584 | |
4ef81297 AS |
585 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", |
586 | mpf->mpf_specification); | |
b3e24164 | 587 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
4ef81297 | 588 | if (mpf->mpf_feature2 & (1 << 7)) { |
1da177e4 LT |
589 | printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); |
590 | pic_mode = 1; | |
591 | } else { | |
592 | printk(KERN_INFO " Virtual Wire compatibility mode.\n"); | |
593 | pic_mode = 0; | |
594 | } | |
4421b1c8 | 595 | #endif |
1da177e4 LT |
596 | /* |
597 | * Now see if we need to read further. | |
598 | */ | |
599 | if (mpf->mpf_feature1 != 0) { | |
888032cd AS |
600 | if (early) { |
601 | /* | |
602 | * local APIC has default address | |
603 | */ | |
604 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
605 | return; | |
606 | } | |
1da177e4 | 607 | |
4ef81297 AS |
608 | printk(KERN_INFO "Default MP configuration #%d\n", |
609 | mpf->mpf_feature1); | |
1da177e4 LT |
610 | construct_default_ISA_mptable(mpf->mpf_feature1); |
611 | ||
612 | } else if (mpf->mpf_physptr) { | |
613 | ||
614 | /* | |
615 | * Read the physical hardware table. Anything here will | |
616 | * override the defaults. | |
617 | */ | |
888032cd | 618 | if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) { |
bab4b27c | 619 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 620 | smp_found_config = 0; |
bab4b27c | 621 | #endif |
4ef81297 AS |
622 | printk(KERN_ERR |
623 | "BIOS bug, MP table errors detected!...\n"); | |
4421b1c8 AS |
624 | printk(KERN_ERR "... disabling SMP support. " |
625 | "(tell your hw vendor)\n"); | |
1da177e4 LT |
626 | return; |
627 | } | |
61048c63 | 628 | |
888032cd AS |
629 | if (early) |
630 | return; | |
61048c63 | 631 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
632 | /* |
633 | * If there are no explicit MP IRQ entries, then we are | |
634 | * broken. We set up most of the low 16 IO-APIC pins to | |
635 | * ISA defaults and hope it will work. | |
636 | */ | |
637 | if (!mp_irq_entries) { | |
638 | struct mpc_config_bus bus; | |
639 | ||
4421b1c8 AS |
640 | printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " |
641 | "using default mptable. " | |
642 | "(tell your hw vendor)\n"); | |
1da177e4 LT |
643 | |
644 | bus.mpc_type = MP_BUS; | |
645 | bus.mpc_busid = 0; | |
646 | memcpy(bus.mpc_bustype, "ISA ", 6); | |
647 | MP_bus_info(&bus); | |
648 | ||
649 | construct_default_ioirq_mptable(0); | |
650 | } | |
61048c63 | 651 | #endif |
1da177e4 LT |
652 | } else |
653 | BUG(); | |
654 | ||
888032cd AS |
655 | if (!early) |
656 | printk(KERN_INFO "Processors: %d\n", num_processors); | |
1da177e4 LT |
657 | /* |
658 | * Only use the first configuration found. | |
659 | */ | |
660 | } | |
661 | ||
888032cd AS |
662 | void __init early_get_smp_config(void) |
663 | { | |
664 | __get_smp_config(1); | |
665 | } | |
666 | ||
667 | void __init get_smp_config(void) | |
668 | { | |
669 | __get_smp_config(0); | |
670 | } | |
671 | ||
672 | static int __init smp_scan_config(unsigned long base, unsigned long length, | |
673 | unsigned reserve) | |
1da177e4 | 674 | { |
92fd4b7a | 675 | unsigned int *bp = phys_to_virt(base); |
1da177e4 LT |
676 | struct intel_mp_floating *mpf; |
677 | ||
11a62a05 | 678 | printk(KERN_DEBUG "Scan SMP from %p for %ld bytes.\n", bp, length); |
5d47a271 | 679 | BUILD_BUG_ON(sizeof(*mpf) != 16); |
1da177e4 LT |
680 | |
681 | while (length > 0) { | |
682 | mpf = (struct intel_mp_floating *)bp; | |
683 | if ((*bp == SMP_MAGIC_IDENT) && | |
4ef81297 AS |
684 | (mpf->mpf_length == 1) && |
685 | !mpf_checksum((unsigned char *)bp, 16) && | |
686 | ((mpf->mpf_specification == 1) | |
687 | || (mpf->mpf_specification == 4))) { | |
bab4b27c | 688 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 689 | smp_found_config = 1; |
bab4b27c | 690 | #endif |
92fd4b7a AS |
691 | mpf_found = mpf; |
692 | #ifdef CONFIG_X86_32 | |
e91a3b43 | 693 | printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n", |
4ef81297 | 694 | mpf, virt_to_phys(mpf)); |
72a7fe39 BW |
695 | reserve_bootmem(virt_to_phys(mpf), PAGE_SIZE, |
696 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
697 | if (mpf->mpf_physptr) { |
698 | /* | |
699 | * We cannot access to MPC table to compute | |
700 | * table size yet, as only few megabytes from | |
701 | * the bottom is mapped now. | |
702 | * PC-9800's MPC table places on the very last | |
703 | * of physical memory; so that simply reserving | |
704 | * PAGE_SIZE from mpg->mpf_physptr yields BUG() | |
705 | * in reserve_bootmem. | |
706 | */ | |
707 | unsigned long size = PAGE_SIZE; | |
708 | unsigned long end = max_low_pfn * PAGE_SIZE; | |
709 | if (mpf->mpf_physptr + size > end) | |
710 | size = end - mpf->mpf_physptr; | |
72a7fe39 BW |
711 | reserve_bootmem(mpf->mpf_physptr, size, |
712 | BOOTMEM_DEFAULT); | |
1da177e4 LT |
713 | } |
714 | ||
92fd4b7a AS |
715 | #else |
716 | if (!reserve) | |
717 | return 1; | |
718 | ||
719 | reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE); | |
720 | if (mpf->mpf_physptr) | |
721 | reserve_bootmem_generic(mpf->mpf_physptr, | |
722 | PAGE_SIZE); | |
723 | #endif | |
724 | return 1; | |
1da177e4 LT |
725 | } |
726 | bp += 4; | |
727 | length -= 16; | |
728 | } | |
729 | return 0; | |
730 | } | |
731 | ||
888032cd | 732 | static void __init __find_smp_config(unsigned reserve) |
1da177e4 LT |
733 | { |
734 | unsigned int address; | |
735 | ||
736 | /* | |
737 | * FIXME: Linux assumes you have 640K of base ram.. | |
738 | * this continues the error... | |
739 | * | |
740 | * 1) Scan the bottom 1K for a signature | |
741 | * 2) Scan the top 1K of base RAM | |
742 | * 3) Scan the 64K of bios | |
743 | */ | |
888032cd AS |
744 | if (smp_scan_config(0x0, 0x400, reserve) || |
745 | smp_scan_config(639 * 0x400, 0x400, reserve) || | |
746 | smp_scan_config(0xF0000, 0x10000, reserve)) | |
1da177e4 LT |
747 | return; |
748 | /* | |
749 | * If it is an SMP machine we should know now, unless the | |
750 | * configuration is in an EISA/MCA bus machine with an | |
751 | * extended bios data area. | |
752 | * | |
753 | * there is a real-mode segmented pointer pointing to the | |
754 | * 4K EBDA area at 0x40E, calculate and scan it here. | |
755 | * | |
756 | * NOTE! There are Linux loaders that will corrupt the EBDA | |
757 | * area, and as such this kind of SMP config may be less | |
758 | * trustworthy, simply because the SMP table may have been | |
759 | * stomped on during early boot. These loaders are buggy and | |
760 | * should be fixed. | |
761 | * | |
762 | * MP1.4 SPEC states to only scan first 1K of 4K EBDA. | |
763 | */ | |
764 | ||
765 | address = get_bios_ebda(); | |
766 | if (address) | |
888032cd AS |
767 | smp_scan_config(address, 0x400, reserve); |
768 | } | |
769 | ||
770 | void __init early_find_smp_config(void) | |
771 | { | |
772 | __find_smp_config(0); | |
773 | } | |
774 | ||
775 | void __init find_smp_config(void) | |
776 | { | |
777 | __find_smp_config(1); | |
1da177e4 | 778 | } |