[net-next-2.6.git] / arch / x86 / kernel / irq_32.c

/*
 *	Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
 *
 * This file contains the lowest level x86-specific interrupt
 * entry, irq-stacks and irq statistics code. All the remaining
 * irq logic is done by the generic kernel/irq/ code and
 * by the x86-specific irq controller code. (e.g. i8259.c and
 * io_apic.c.)
 */

#include <linux/module.h>
#include <linux/seq_file.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/notifier.h>
#include <linux/cpu.h>
#include <linux/delay.h>

#include <asm/apic.h>
#include <asm/uaccess.h>

DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
EXPORT_PER_CPU_SYMBOL(irq_stat);

DEFINE_PER_CPU(struct pt_regs *, irq_regs);
EXPORT_PER_CPU_SYMBOL(irq_regs);

#ifdef CONFIG_DEBUG_STACKOVERFLOW
/* Debugging check for stack overflow: is there less than 1KB free? */
static int check_stack_overflow(void)
{
	long sp;

	__asm__ __volatile__("andl %%esp,%0" :
			     "=r" (sp) : "0" (THREAD_SIZE - 1));

	return sp < (sizeof(struct thread_info) + STACK_WARN);
}

static void print_stack_overflow(void)
{
	printk(KERN_WARNING "low stack detected by irq handler\n");
	dump_stack();
}

#else
static inline int check_stack_overflow(void) { return 0; }
static inline void print_stack_overflow(void) { }
#endif

#ifdef CONFIG_4KSTACKS
/*
 * per-CPU IRQ handling contexts (thread information and stack)
 */
union irq_ctx {
	struct thread_info      tinfo;
	u32                     stack[THREAD_SIZE/sizeof(u32)];
};

static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;

static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;

static void call_on_stack(void *func, void *stack)
{
	asm volatile("xchgl	%%ebx,%%esp	\n"
		     "call	*%%edi		\n"
		     "movl	%%ebx,%%esp	\n"
		     : "=b" (stack)
		     : "0" (stack),
		       "D"(func)
		     : "memory", "cc", "edx", "ecx", "eax");
}

static inline int
execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
{
	union irq_ctx *curctx, *irqctx;
	u32 *isp, arg1, arg2;

	curctx = (union irq_ctx *) current_thread_info();
	irqctx = hardirq_ctx[smp_processor_id()];

	/*
	 * this is where we switch to the IRQ stack. However, if we are
	 * already using the IRQ stack (because we interrupted a hardirq
	 * handler) we can't do that and just have to keep using the
	 * current stack (which is the irq stack already after all)
	 */
	if (unlikely(curctx == irqctx))
		return 0;

	/* build the stack frame on the IRQ stack */
	isp = (u32 *) ((char*)irqctx + sizeof(*irqctx));
	irqctx->tinfo.task = curctx->tinfo.task;
	irqctx->tinfo.previous_esp = current_stack_pointer;

	/*
	 * Copy the softirq bits in preempt_count so that the
	 * softirq checks work in the hardirq context.
	 */
	irqctx->tinfo.preempt_count =
		(irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
		(curctx->tinfo.preempt_count & SOFTIRQ_MASK);

	if (unlikely(overflow))
		call_on_stack(print_stack_overflow, isp);

	asm volatile("xchgl	%%ebx,%%esp	\n"
		     "call	*%%edi		\n"
		     "movl	%%ebx,%%esp	\n"
		     : "=a" (arg1), "=d" (arg2), "=b" (isp)
		     :  "0" (irq),   "1" (desc),  "2" (isp),
			"D" (desc->handle_irq)
		     : "memory", "cc", "ecx");
	return 1;
}

/*
 * allocate per-cpu stacks for hardirq and for softirq processing
 */
void __cpuinit irq_ctx_init(int cpu)
{
	union irq_ctx *irqctx;

	if (hardirq_ctx[cpu])
		return;

	irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
	irqctx->tinfo.task		= NULL;
	irqctx->tinfo.exec_domain	= NULL;
	irqctx->tinfo.cpu		= cpu;
	irqctx->tinfo.preempt_count	= HARDIRQ_OFFSET;
	irqctx->tinfo.addr_limit	= MAKE_MM_SEG(0);

	hardirq_ctx[cpu] = irqctx;

	irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
	irqctx->tinfo.task		= NULL;
	irqctx->tinfo.exec_domain	= NULL;
	irqctx->tinfo.cpu		= cpu;
	irqctx->tinfo.preempt_count	= 0;
	irqctx->tinfo.addr_limit	= MAKE_MM_SEG(0);

	softirq_ctx[cpu] = irqctx;

	printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n",
	       cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
}

void irq_ctx_exit(int cpu)
{
	hardirq_ctx[cpu] = NULL;
}

asmlinkage void do_softirq(void)
{
	unsigned long flags;
	struct thread_info *curctx;
	union irq_ctx *irqctx;
	u32 *isp;

	if (in_interrupt())
		return;

	local_irq_save(flags);

	if (local_softirq_pending()) {
		curctx = current_thread_info();
		irqctx = softirq_ctx[smp_processor_id()];
		irqctx->tinfo.task = curctx->task;
		irqctx->tinfo.previous_esp = current_stack_pointer;

		/* build the stack frame on the softirq stack */
		isp = (u32*) ((char*)irqctx + sizeof(*irqctx));

		call_on_stack(__do_softirq, isp);
		/*
		 * Shouldnt happen, we returned above if in_interrupt():
		 */
		WARN_ON_ONCE(softirq_count());
	}

	local_irq_restore(flags);
}

#else
static inline int
execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; }
#endif

/*
 * do_IRQ handles all normal device IRQ's (the special
 * SMP cross-CPU interrupts have their own specific
 * handlers).
 */
unsigned int do_IRQ(struct pt_regs *regs)
{
	struct pt_regs *old_regs;
	/* high bit used in ret_from_ code */
	int overflow;
	unsigned vector = ~regs->orig_ax;
	struct irq_desc *desc;
	unsigned irq;


	old_regs = set_irq_regs(regs);
	irq_enter();
	irq = __get_cpu_var(vector_irq)[vector];

	overflow = check_stack_overflow();

	desc = irq_to_desc(irq);
	if (unlikely(!desc)) {
		printk(KERN_EMERG "%s: cannot handle IRQ %d vector %#x cpu %d\n",
					__func__, irq, vector, smp_processor_id());
		BUG();
	}

	if (!execute_on_irq_stack(overflow, desc, irq)) {
		if (unlikely(overflow))
			print_stack_overflow();
		desc->handle_irq(irq, desc);
	}

	irq_exit();
	set_irq_regs(old_regs);
	return 1;
}

#ifdef CONFIG_HOTPLUG_CPU
#include <mach_apic.h>

void fixup_irqs(cpumask_t map)
{
	unsigned int irq;
	static int warned;
	struct irq_desc *desc;

	for_each_irq_desc(irq, desc) {
		cpumask_t mask;

		if (!desc)
			continue;
		if (irq == 2)
			continue;

		cpus_and(mask, desc->affinity, map);
		if (any_online_cpu(mask) == NR_CPUS) {
			printk("Breaking affinity for irq %i\n", irq);
			mask = map;
		}
		if (desc->chip->set_affinity)
			desc->chip->set_affinity(irq, mask);
		else if (desc->action && !(warned++))
			printk("Cannot set affinity for irq %i\n", irq);
	}

#if 0
	barrier();
	/* Ingo Molnar says: "after the IO-APIC masks have been redirected
	   [note the nop - the interrupt-enable boundary on x86 is two
	   instructions from sti] - to flush out pending hardirqs and
	   IPIs. After this point nothing is supposed to reach this CPU." */
	__asm__ __volatile__("sti; nop; cli");
	barrier();
#else
	/* That doesn't seem sufficient.  Give it 1ms. */
	local_irq_enable();
	mdelay(1);
	local_irq_disable();
#endif
}
#endif
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
	3	*
	4	* This file contains the lowest level x86-specific interrupt
	5	* entry, irq-stacks and irq statistics code. All the remaining
	6	* irq logic is done by the generic kernel/irq/ code and
	7	* by the x86-specific irq controller code. (e.g. i8259.c and
	8	* io_apic.c.)
	9	*/
	10
1da177e4 LT	11	#include <linux/module.h>
	12	#include <linux/seq_file.h>
	13	#include <linux/interrupt.h>
	14	#include <linux/kernel_stat.h>
f3705136 ZM	15	#include <linux/notifier.h>
	16	#include <linux/cpu.h>
	17	#include <linux/delay.h>
1da177e4	18
e05d723f TG	19	#include <asm/apic.h>
	20	#include <asm/uaccess.h>
	21
f34e3b61	22	DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
1da177e4 LT	23	EXPORT_PER_CPU_SYMBOL(irq_stat);
1da177e4 LT	24
7c3576d2 JF	25	DEFINE_PER_CPU(struct pt_regs *, irq_regs);
	26	EXPORT_PER_CPU_SYMBOL(irq_regs);
	27
de9b10af TG	28	#ifdef CONFIG_DEBUG_STACKOVERFLOW
	29	/* Debugging check for stack overflow: is there less than 1KB free? */
	30	static int check_stack_overflow(void)
	31	{
	32	long sp;
	33
	34	__asm__ __volatile__("andl %%esp,%0" :
	35	"=r" (sp) : "0" (THREAD_SIZE - 1));
	36
	37	return sp < (sizeof(struct thread_info) + STACK_WARN);
	38	}
	39
	40	static void print_stack_overflow(void)
	41	{
	42	printk(KERN_WARNING "low stack detected by irq handler\n");
	43	dump_stack();
	44	}
	45
	46	#else
	47	static inline int check_stack_overflow(void) { return 0; }
	48	static inline void print_stack_overflow(void) { }
	49	#endif
	50
1da177e4 LT	51	#ifdef CONFIG_4KSTACKS
	52	/*
	53	* per-CPU IRQ handling contexts (thread information and stack)
	54	*/
	55	union irq_ctx {
	56	struct thread_info tinfo;
	57	u32 stack[THREAD_SIZE/sizeof(u32)];
	58	};
	59
22722051 AM	60	static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
22722051 AM	61	static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
1da177e4	62
cbcd79c2 JF	63	static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
cbcd79c2 JF	64	static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
a052b68b	65
403d8efc	66	static void call_on_stack(void func, void stack)
04b361ab	67	{
403d8efc TG	68	asm volatile("xchgl %%ebx,%%esp \n"
	69	"call *%%edi \n"
	70	"movl %%ebx,%%esp \n"
	71	: "=b" (stack)
	72	: "0" (stack),
	73	"D"(func)
	74	: "memory", "cc", "edx", "ecx", "eax");
04b361ab	75	}
1da177e4	76
de9b10af TG	77	static inline int
	78	execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
	79	{
	80	union irq_ctx curctx, irqctx;
403d8efc	81	u32 *isp, arg1, arg2;
1da177e4 LT	82
	83	curctx = (union irq_ctx *) current_thread_info();
	84	irqctx = hardirq_ctx[smp_processor_id()];
	85
	86	/*
	87	* this is where we switch to the IRQ stack. However, if we are
	88	* already using the IRQ stack (because we interrupted a hardirq
	89	* handler) we can't do that and just have to keep using the
	90	* current stack (which is the irq stack already after all)
	91	*/
de9b10af TG	92	if (unlikely(curctx == irqctx))
de9b10af TG	93	return 0;
1da177e4	94
de9b10af TG	95	/* build the stack frame on the IRQ stack */
	96	isp = (u32 ) ((char)irqctx + sizeof(*irqctx));
	97	irqctx->tinfo.task = curctx->tinfo.task;
	98	irqctx->tinfo.previous_esp = current_stack_pointer;
1da177e4	99
de9b10af TG	100	/*
	101	* Copy the softirq bits in preempt_count so that the
	102	* softirq checks work in the hardirq context.
	103	*/
	104	irqctx->tinfo.preempt_count =
	105	(irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) \|
	106	(curctx->tinfo.preempt_count & SOFTIRQ_MASK);
	107
	108	if (unlikely(overflow))
403d8efc TG	109	call_on_stack(print_stack_overflow, isp);
	110
	111	asm volatile("xchgl %%ebx,%%esp \n"
	112	"call *%%edi \n"
	113	"movl %%ebx,%%esp \n"
	114	: "=a" (arg1), "=d" (arg2), "=b" (isp)
	115	: "0" (irq), "1" (desc), "2" (isp),
	116	"D" (desc->handle_irq)
	117	: "memory", "cc", "ecx");
1da177e4 LT	118	return 1;
	119	}
	120
1da177e4 LT	121	/*
	122	* allocate per-cpu stacks for hardirq and for softirq processing
	123	*/
403d8efc	124	void __cpuinit irq_ctx_init(int cpu)
1da177e4 LT	125	{
	126	union irq_ctx *irqctx;
	127
	128	if (hardirq_ctx[cpu])
	129	return;
	130
	131	irqctx = (union irq_ctx) &hardirq_stack[cpuTHREAD_SIZE];
403d8efc TG	132	irqctx->tinfo.task = NULL;
	133	irqctx->tinfo.exec_domain = NULL;
	134	irqctx->tinfo.cpu = cpu;
	135	irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
	136	irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
1da177e4 LT	137
	138	hardirq_ctx[cpu] = irqctx;
	139
	140	irqctx = (union irq_ctx) &softirq_stack[cpuTHREAD_SIZE];
403d8efc TG	141	irqctx->tinfo.task = NULL;
	142	irqctx->tinfo.exec_domain = NULL;
	143	irqctx->tinfo.cpu = cpu;
	144	irqctx->tinfo.preempt_count = 0;
	145	irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
1da177e4 LT	146
	147	softirq_ctx[cpu] = irqctx;
	148
403d8efc TG	149	printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n",
403d8efc TG	150	cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
1da177e4 LT	151	}
1da177e4 LT	152
e1367daf LS	153	void irq_ctx_exit(int cpu)
	154	{
	155	hardirq_ctx[cpu] = NULL;
	156	}
	157
1da177e4 LT	158	asmlinkage void do_softirq(void)
	159	{
	160	unsigned long flags;
	161	struct thread_info *curctx;
	162	union irq_ctx *irqctx;
	163	u32 *isp;
	164
	165	if (in_interrupt())
	166	return;
	167
	168	local_irq_save(flags);
	169
	170	if (local_softirq_pending()) {
	171	curctx = current_thread_info();
	172	irqctx = softirq_ctx[smp_processor_id()];
	173	irqctx->tinfo.task = curctx->task;
	174	irqctx->tinfo.previous_esp = current_stack_pointer;
	175
	176	/* build the stack frame on the softirq stack */
	177	isp = (u32) ((char)irqctx + sizeof(*irqctx));
	178
403d8efc	179	call_on_stack(__do_softirq, isp);
55f327fa IM	180	/*
55f327fa IM	181	* Shouldnt happen, we returned above if in_interrupt():
403d8efc	182	*/
55f327fa	183	WARN_ON_ONCE(softirq_count());
1da177e4 LT	184	}
	185
	186	local_irq_restore(flags);
	187	}
403d8efc TG	188
	189	#else
	190	static inline int
	191	execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; }
1da177e4 LT	192	#endif
1da177e4 LT	193
403d8efc TG	194	/*
	195	* do_IRQ handles all normal device IRQ's (the special
	196	* SMP cross-CPU interrupts have their own specific
	197	* handlers).
	198	*/
	199	unsigned int do_IRQ(struct pt_regs *regs)
	200	{
	201	struct pt_regs *old_regs;
	202	/* high bit used in ret_from_ code */
497c9a19 YL	203	int overflow;
497c9a19 YL	204	unsigned vector = ~regs->orig_ax;
199751d7	205	struct irq_desc *desc;
497c9a19	206	unsigned irq;
403d8efc	207
403d8efc TG	208
	209	old_regs = set_irq_regs(regs);
	210	irq_enter();
497c9a19	211	irq = __get_cpu_var(vector_irq)[vector];
403d8efc TG	212
	213	overflow = check_stack_overflow();
	214
497c9a19 YL	215	desc = irq_to_desc(irq);
497c9a19 YL	216	if (unlikely(!desc)) {
7a959cff YL	217	printk(KERN_EMERG "%s: cannot handle IRQ %d vector %#x cpu %d\n",
7a959cff YL	218	__func__, irq, vector, smp_processor_id());
497c9a19 YL	219	BUG();
	220	}
	221
403d8efc TG	222	if (!execute_on_irq_stack(overflow, desc, irq)) {
	223	if (unlikely(overflow))
	224	print_stack_overflow();
	225	desc->handle_irq(irq, desc);
	226	}
	227
	228	irq_exit();
	229	set_irq_regs(old_regs);
	230	return 1;
	231	}
	232
f3705136 ZM	233	#ifdef CONFIG_HOTPLUG_CPU
	234	#include <mach_apic.h>
	235
	236	void fixup_irqs(cpumask_t map)
	237	{
	238	unsigned int irq;
	239	static int warned;
199751d7	240	struct irq_desc *desc;
f3705136	241
199751d7	242	for_each_irq_desc(irq, desc) {
f3705136	243	cpumask_t mask;
08678b08	244
0b8f1efa YL	245	if (!desc)
0b8f1efa YL	246	continue;
f3705136 ZM	247	if (irq == 2)
	248	continue;
	249
08678b08	250	cpus_and(mask, desc->affinity, map);
f3705136 ZM	251	if (any_online_cpu(mask) == NR_CPUS) {
	252	printk("Breaking affinity for irq %i\n", irq);
	253	mask = map;
	254	}
08678b08 YL	255	if (desc->chip->set_affinity)
	256	desc->chip->set_affinity(irq, mask);
	257	else if (desc->action && !(warned++))
f3705136 ZM	258	printk("Cannot set affinity for irq %i\n", irq);
	259	}
	260
	261	#if 0
	262	barrier();
	263	/* Ingo Molnar says: "after the IO-APIC masks have been redirected
	264	[note the nop - the interrupt-enable boundary on x86 is two
	265	instructions from sti] - to flush out pending hardirqs and
	266	IPIs. After this point nothing is supposed to reach this CPU." */
	267	__asm__ __volatile__("sti; nop; cli");
	268	barrier();
	269	#else
	270	/* That doesn't seem sufficient. Give it 1ms. */
	271	local_irq_enable();
	272	mdelay(1);
	273	local_irq_disable();
	274	#endif
	275	}
	276	#endif
	277