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x86, xsave: Sync xsave memory layout with its header for user handling
[net-next-2.6.git] / arch / x86 / kernel / i387.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Copyright (C) 1994 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
129f6946 8#include <linux/module.h>
44210111 9#include <linux/regset.h>
f668964e 10#include <linux/sched.h>
5a0e3ad6 11#include <linux/slab.h>
f668964e
IM
12
13#include <asm/sigcontext.h>
1da177e4 14#include <asm/processor.h>
1da177e4 15#include <asm/math_emu.h>
1da177e4 16#include <asm/uaccess.h>
f668964e
IM
17#include <asm/ptrace.h>
18#include <asm/i387.h>
19#include <asm/user.h>
1da177e4 20
44210111 21#ifdef CONFIG_X86_64
f668964e
IM
22# include <asm/sigcontext32.h>
23# include <asm/user32.h>
44210111 24#else
ab513701
SS
25# define save_i387_xstate_ia32 save_i387_xstate
26# define restore_i387_xstate_ia32 restore_i387_xstate
f668964e 27# define _fpstate_ia32 _fpstate
ab513701 28# define _xstate_ia32 _xstate
3c1c7f10 29# define sig_xstate_ia32_size sig_xstate_size
c37b5efe 30# define fx_sw_reserved_ia32 fx_sw_reserved
f668964e
IM
31# define user_i387_ia32_struct user_i387_struct
32# define user32_fxsr_struct user_fxsr_struct
44210111
RM
33#endif
34
1da177e4 35#ifdef CONFIG_MATH_EMULATION
f668964e 36# define HAVE_HWFP (boot_cpu_data.hard_math)
1da177e4 37#else
f668964e 38# define HAVE_HWFP 1
1da177e4
LT
39#endif
40
f668964e 41static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
61c4628b 42unsigned int xstate_size;
3c1c7f10 43unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
61c4628b 44static struct i387_fxsave_struct fx_scratch __cpuinitdata;
1da177e4 45
61c4628b 46void __cpuinit mxcsr_feature_mask_init(void)
1da177e4
LT
47{
48 unsigned long mask = 0;
f668964e 49
1da177e4
LT
50 clts();
51 if (cpu_has_fxsr) {
61c4628b
SS
52 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
53 asm volatile("fxsave %0" : : "m" (fx_scratch));
54 mask = fx_scratch.mxcsr_mask;
3b095a04
CG
55 if (mask == 0)
56 mask = 0x0000ffbf;
57 }
1da177e4
LT
58 mxcsr_feature_mask &= mask;
59 stts();
60}
61
9bc646f1 62void __cpuinit init_thread_xstate(void)
61c4628b 63{
e8a496ac
SS
64 if (!HAVE_HWFP) {
65 xstate_size = sizeof(struct i387_soft_struct);
66 return;
67 }
68
dc1e35c6
SS
69 if (cpu_has_xsave) {
70 xsave_cntxt_init();
71 return;
72 }
73
61c4628b
SS
74 if (cpu_has_fxsr)
75 xstate_size = sizeof(struct i387_fxsave_struct);
76#ifdef CONFIG_X86_32
77 else
78 xstate_size = sizeof(struct i387_fsave_struct);
79#endif
61c4628b
SS
80}
81
44210111
RM
82#ifdef CONFIG_X86_64
83/*
84 * Called at bootup to set up the initial FPU state that is later cloned
85 * into all processes.
86 */
87void __cpuinit fpu_init(void)
88{
89 unsigned long oldcr0 = read_cr0();
f668964e 90
44210111
RM
91 set_in_cr4(X86_CR4_OSFXSR);
92 set_in_cr4(X86_CR4_OSXMMEXCPT);
93
f668964e 94 write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
44210111 95
dc1e35c6
SS
96 /*
97 * Boot processor to setup the FP and extended state context info.
98 */
99 if (!smp_processor_id())
100 init_thread_xstate();
101 xsave_init();
102
44210111
RM
103 mxcsr_feature_mask_init();
104 /* clean state in init */
c9ad4882 105 current_thread_info()->status = 0;
44210111
RM
106 clear_used_math();
107}
108#endif /* CONFIG_X86_64 */
109
86603283 110static void fpu_finit(struct fpu *fpu)
1da177e4 111{
e8a496ac
SS
112#ifdef CONFIG_X86_32
113 if (!HAVE_HWFP) {
86603283
AK
114 finit_soft_fpu(&fpu->state->soft);
115 return;
e8a496ac
SS
116 }
117#endif
118
1da177e4 119 if (cpu_has_fxsr) {
86603283 120 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
61c4628b
SS
121
122 memset(fx, 0, xstate_size);
123 fx->cwd = 0x37f;
1da177e4 124 if (cpu_has_xmm)
61c4628b 125 fx->mxcsr = MXCSR_DEFAULT;
1da177e4 126 } else {
86603283 127 struct i387_fsave_struct *fp = &fpu->state->fsave;
61c4628b
SS
128 memset(fp, 0, xstate_size);
129 fp->cwd = 0xffff037fu;
130 fp->swd = 0xffff0000u;
131 fp->twd = 0xffffffffu;
132 fp->fos = 0xffff0000u;
1da177e4 133 }
86603283
AK
134}
135
136/*
137 * The _current_ task is using the FPU for the first time
138 * so initialize it and set the mxcsr to its default
139 * value at reset if we support XMM instructions and then
140 * remeber the current task has used the FPU.
141 */
142int init_fpu(struct task_struct *tsk)
143{
144 int ret;
145
146 if (tsk_used_math(tsk)) {
147 if (HAVE_HWFP && tsk == current)
148 unlazy_fpu(tsk);
149 return 0;
150 }
151
44210111 152 /*
86603283 153 * Memory allocation at the first usage of the FPU and other state.
44210111 154 */
86603283
AK
155 ret = fpu_alloc(&tsk->thread.fpu);
156 if (ret)
157 return ret;
158
159 fpu_finit(&tsk->thread.fpu);
160
1da177e4 161 set_stopped_child_used_math(tsk);
aa283f49 162 return 0;
1da177e4
LT
163}
164
5b3efd50
SS
165/*
166 * The xstateregs_active() routine is the same as the fpregs_active() routine,
167 * as the "regset->n" for the xstate regset will be updated based on the feature
168 * capabilites supported by the xsave.
169 */
44210111
RM
170int fpregs_active(struct task_struct *target, const struct user_regset *regset)
171{
172 return tsk_used_math(target) ? regset->n : 0;
173}
1da177e4 174
44210111 175int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
1da177e4 176{
44210111
RM
177 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
178}
1da177e4 179
44210111
RM
180int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
181 unsigned int pos, unsigned int count,
182 void *kbuf, void __user *ubuf)
183{
aa283f49
SS
184 int ret;
185
44210111
RM
186 if (!cpu_has_fxsr)
187 return -ENODEV;
188
aa283f49
SS
189 ret = init_fpu(target);
190 if (ret)
191 return ret;
44210111 192
29104e10
SS
193 sanitize_i387_state(target);
194
44210111 195 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
86603283 196 &target->thread.fpu.state->fxsave, 0, -1);
1da177e4 197}
44210111
RM
198
199int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
200 unsigned int pos, unsigned int count,
201 const void *kbuf, const void __user *ubuf)
202{
203 int ret;
204
205 if (!cpu_has_fxsr)
206 return -ENODEV;
207
aa283f49
SS
208 ret = init_fpu(target);
209 if (ret)
210 return ret;
211
29104e10
SS
212 sanitize_i387_state(target);
213
44210111 214 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
86603283 215 &target->thread.fpu.state->fxsave, 0, -1);
44210111
RM
216
217 /*
218 * mxcsr reserved bits must be masked to zero for security reasons.
219 */
86603283 220 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
44210111 221
42deec6f
SS
222 /*
223 * update the header bits in the xsave header, indicating the
224 * presence of FP and SSE state.
225 */
226 if (cpu_has_xsave)
86603283 227 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
42deec6f 228
44210111
RM
229 return ret;
230}
231
5b3efd50
SS
232int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
233 unsigned int pos, unsigned int count,
234 void *kbuf, void __user *ubuf)
235{
236 int ret;
237
238 if (!cpu_has_xsave)
239 return -ENODEV;
240
241 ret = init_fpu(target);
242 if (ret)
243 return ret;
244
245 /*
ff7fbc72
SS
246 * Copy the 48bytes defined by the software first into the xstate
247 * memory layout in the thread struct, so that we can copy the entire
248 * xstateregs to the user using one user_regset_copyout().
5b3efd50 249 */
86603283 250 memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
ff7fbc72 251 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
5b3efd50
SS
252
253 /*
ff7fbc72 254 * Copy the xstate memory layout.
5b3efd50
SS
255 */
256 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
86603283 257 &target->thread.fpu.state->xsave, 0, -1);
5b3efd50
SS
258 return ret;
259}
260
261int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
262 unsigned int pos, unsigned int count,
263 const void *kbuf, const void __user *ubuf)
264{
265 int ret;
266 struct xsave_hdr_struct *xsave_hdr;
267
268 if (!cpu_has_xsave)
269 return -ENODEV;
270
271 ret = init_fpu(target);
272 if (ret)
273 return ret;
274
275 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
86603283 276 &target->thread.fpu.state->xsave, 0, -1);
5b3efd50
SS
277
278 /*
279 * mxcsr reserved bits must be masked to zero for security reasons.
280 */
86603283 281 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
5b3efd50 282
86603283 283 xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
5b3efd50
SS
284
285 xsave_hdr->xstate_bv &= pcntxt_mask;
286 /*
287 * These bits must be zero.
288 */
289 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
290
291 return ret;
292}
293
44210111 294#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
1da177e4 295
1da177e4
LT
296/*
297 * FPU tag word conversions.
298 */
299
3b095a04 300static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
1da177e4
LT
301{
302 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
3b095a04 303
1da177e4 304 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
3b095a04 305 tmp = ~twd;
44210111 306 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
3b095a04
CG
307 /* and move the valid bits to the lower byte. */
308 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
309 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
310 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
f668964e 311
3b095a04 312 return tmp;
1da177e4
LT
313}
314
1da177e4 315#define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
44210111
RM
316#define FP_EXP_TAG_VALID 0
317#define FP_EXP_TAG_ZERO 1
318#define FP_EXP_TAG_SPECIAL 2
319#define FP_EXP_TAG_EMPTY 3
320
321static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
322{
323 struct _fpxreg *st;
324 u32 tos = (fxsave->swd >> 11) & 7;
325 u32 twd = (unsigned long) fxsave->twd;
326 u32 tag;
327 u32 ret = 0xffff0000u;
328 int i;
1da177e4 329
44210111 330 for (i = 0; i < 8; i++, twd >>= 1) {
3b095a04
CG
331 if (twd & 0x1) {
332 st = FPREG_ADDR(fxsave, (i - tos) & 7);
1da177e4 333
3b095a04 334 switch (st->exponent & 0x7fff) {
1da177e4 335 case 0x7fff:
44210111 336 tag = FP_EXP_TAG_SPECIAL;
1da177e4
LT
337 break;
338 case 0x0000:
3b095a04
CG
339 if (!st->significand[0] &&
340 !st->significand[1] &&
341 !st->significand[2] &&
44210111
RM
342 !st->significand[3])
343 tag = FP_EXP_TAG_ZERO;
344 else
345 tag = FP_EXP_TAG_SPECIAL;
1da177e4
LT
346 break;
347 default:
44210111
RM
348 if (st->significand[3] & 0x8000)
349 tag = FP_EXP_TAG_VALID;
350 else
351 tag = FP_EXP_TAG_SPECIAL;
1da177e4
LT
352 break;
353 }
354 } else {
44210111 355 tag = FP_EXP_TAG_EMPTY;
1da177e4 356 }
44210111 357 ret |= tag << (2 * i);
1da177e4
LT
358 }
359 return ret;
360}
361
362/*
44210111 363 * FXSR floating point environment conversions.
1da177e4
LT
364 */
365
f668964e
IM
366static void
367convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
1da177e4 368{
86603283 369 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
44210111
RM
370 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
371 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
372 int i;
1da177e4 373
44210111
RM
374 env->cwd = fxsave->cwd | 0xffff0000u;
375 env->swd = fxsave->swd | 0xffff0000u;
376 env->twd = twd_fxsr_to_i387(fxsave);
377
378#ifdef CONFIG_X86_64
379 env->fip = fxsave->rip;
380 env->foo = fxsave->rdp;
381 if (tsk == current) {
382 /*
383 * should be actually ds/cs at fpu exception time, but
384 * that information is not available in 64bit mode.
385 */
f668964e
IM
386 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
387 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
1da177e4 388 } else {
44210111 389 struct pt_regs *regs = task_pt_regs(tsk);
f668964e 390
44210111
RM
391 env->fos = 0xffff0000 | tsk->thread.ds;
392 env->fcs = regs->cs;
1da177e4 393 }
44210111
RM
394#else
395 env->fip = fxsave->fip;
609b5297 396 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
44210111
RM
397 env->foo = fxsave->foo;
398 env->fos = fxsave->fos;
399#endif
1da177e4 400
44210111
RM
401 for (i = 0; i < 8; ++i)
402 memcpy(&to[i], &from[i], sizeof(to[0]));
1da177e4
LT
403}
404
44210111
RM
405static void convert_to_fxsr(struct task_struct *tsk,
406 const struct user_i387_ia32_struct *env)
1da177e4 407
1da177e4 408{
86603283 409 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
44210111
RM
410 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
411 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
412 int i;
1da177e4 413
44210111
RM
414 fxsave->cwd = env->cwd;
415 fxsave->swd = env->swd;
416 fxsave->twd = twd_i387_to_fxsr(env->twd);
417 fxsave->fop = (u16) ((u32) env->fcs >> 16);
418#ifdef CONFIG_X86_64
419 fxsave->rip = env->fip;
420 fxsave->rdp = env->foo;
421 /* cs and ds ignored */
422#else
423 fxsave->fip = env->fip;
424 fxsave->fcs = (env->fcs & 0xffff);
425 fxsave->foo = env->foo;
426 fxsave->fos = env->fos;
427#endif
1da177e4 428
44210111
RM
429 for (i = 0; i < 8; ++i)
430 memcpy(&to[i], &from[i], sizeof(from[0]));
1da177e4
LT
431}
432
44210111
RM
433int fpregs_get(struct task_struct *target, const struct user_regset *regset,
434 unsigned int pos, unsigned int count,
435 void *kbuf, void __user *ubuf)
1da177e4 436{
44210111 437 struct user_i387_ia32_struct env;
aa283f49 438 int ret;
1da177e4 439
aa283f49
SS
440 ret = init_fpu(target);
441 if (ret)
442 return ret;
1da177e4 443
e8a496ac
SS
444 if (!HAVE_HWFP)
445 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
446
f668964e 447 if (!cpu_has_fxsr) {
44210111 448 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
86603283 449 &target->thread.fpu.state->fsave, 0,
61c4628b 450 -1);
f668964e 451 }
1da177e4 452
29104e10
SS
453 sanitize_i387_state(target);
454
44210111
RM
455 if (kbuf && pos == 0 && count == sizeof(env)) {
456 convert_from_fxsr(kbuf, target);
457 return 0;
1da177e4 458 }
44210111
RM
459
460 convert_from_fxsr(&env, target);
f668964e 461
44210111 462 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
1da177e4
LT
463}
464
44210111
RM
465int fpregs_set(struct task_struct *target, const struct user_regset *regset,
466 unsigned int pos, unsigned int count,
467 const void *kbuf, const void __user *ubuf)
1da177e4 468{
44210111
RM
469 struct user_i387_ia32_struct env;
470 int ret;
1da177e4 471
aa283f49
SS
472 ret = init_fpu(target);
473 if (ret)
474 return ret;
475
29104e10
SS
476 sanitize_i387_state(target);
477
e8a496ac
SS
478 if (!HAVE_HWFP)
479 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
480
f668964e 481 if (!cpu_has_fxsr) {
44210111 482 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
86603283 483 &target->thread.fpu.state->fsave, 0, -1);
f668964e 484 }
44210111
RM
485
486 if (pos > 0 || count < sizeof(env))
487 convert_from_fxsr(&env, target);
488
489 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
490 if (!ret)
491 convert_to_fxsr(target, &env);
492
42deec6f
SS
493 /*
494 * update the header bit in the xsave header, indicating the
495 * presence of FP.
496 */
497 if (cpu_has_xsave)
86603283 498 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
44210111 499 return ret;
1da177e4
LT
500}
501
502/*
503 * Signal frame handlers.
504 */
505
44210111 506static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
1da177e4
LT
507{
508 struct task_struct *tsk = current;
86603283 509 struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
1da177e4 510
61c4628b
SS
511 fp->status = fp->swd;
512 if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
1da177e4
LT
513 return -1;
514 return 1;
515}
516
44210111 517static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
1da177e4
LT
518{
519 struct task_struct *tsk = current;
86603283 520 struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
44210111 521 struct user_i387_ia32_struct env;
1da177e4
LT
522 int err = 0;
523
44210111
RM
524 convert_from_fxsr(&env, tsk);
525 if (__copy_to_user(buf, &env, sizeof(env)))
1da177e4
LT
526 return -1;
527
61c4628b 528 err |= __put_user(fx->swd, &buf->status);
3b095a04
CG
529 err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
530 if (err)
1da177e4
LT
531 return -1;
532
c37b5efe 533 if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
1da177e4
LT
534 return -1;
535 return 1;
536}
537
c37b5efe
SS
538static int save_i387_xsave(void __user *buf)
539{
04944b79 540 struct task_struct *tsk = current;
c37b5efe
SS
541 struct _fpstate_ia32 __user *fx = buf;
542 int err = 0;
543
29104e10
SS
544
545 sanitize_i387_state(tsk);
546
04944b79
SS
547 /*
548 * For legacy compatible, we always set FP/SSE bits in the bit
549 * vector while saving the state to the user context.
550 * This will enable us capturing any changes(during sigreturn) to
551 * the FP/SSE bits by the legacy applications which don't touch
552 * xstate_bv in the xsave header.
553 *
554 * xsave aware applications can change the xstate_bv in the xsave
555 * header as well as change any contents in the memory layout.
556 * xrestore as part of sigreturn will capture all the changes.
557 */
86603283 558 tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
04944b79 559
c37b5efe
SS
560 if (save_i387_fxsave(fx) < 0)
561 return -1;
562
563 err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
564 sizeof(struct _fpx_sw_bytes));
565 err |= __put_user(FP_XSTATE_MAGIC2,
566 (__u32 __user *) (buf + sig_xstate_ia32_size
567 - FP_XSTATE_MAGIC2_SIZE));
568 if (err)
569 return -1;
570
571 return 1;
572}
573
ab513701 574int save_i387_xstate_ia32(void __user *buf)
1da177e4 575{
ab513701
SS
576 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
577 struct task_struct *tsk = current;
578
3b095a04 579 if (!used_math())
1da177e4 580 return 0;
ab513701
SS
581
582 if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
583 return -EACCES;
f668964e
IM
584 /*
585 * This will cause a "finit" to be triggered by the next
1da177e4
LT
586 * attempted FPU operation by the 'current' process.
587 */
588 clear_used_math();
589
f668964e 590 if (!HAVE_HWFP) {
44210111
RM
591 return fpregs_soft_get(current, NULL,
592 0, sizeof(struct user_i387_ia32_struct),
ab513701 593 NULL, fp) ? -1 : 1;
1da177e4 594 }
f668964e 595
ab513701
SS
596 unlazy_fpu(tsk);
597
c37b5efe
SS
598 if (cpu_has_xsave)
599 return save_i387_xsave(fp);
f668964e 600 if (cpu_has_fxsr)
ab513701 601 return save_i387_fxsave(fp);
f668964e 602 else
ab513701 603 return save_i387_fsave(fp);
1da177e4
LT
604}
605
44210111 606static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
1da177e4
LT
607{
608 struct task_struct *tsk = current;
f668964e 609
86603283 610 return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
3b095a04 611 sizeof(struct i387_fsave_struct));
1da177e4
LT
612}
613
c37b5efe
SS
614static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
615 unsigned int size)
1da177e4 616{
1da177e4 617 struct task_struct *tsk = current;
44210111 618 struct user_i387_ia32_struct env;
f668964e
IM
619 int err;
620
86603283 621 err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
c37b5efe 622 size);
1da177e4 623 /* mxcsr reserved bits must be masked to zero for security reasons */
86603283 624 tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
44210111
RM
625 if (err || __copy_from_user(&env, buf, sizeof(env)))
626 return 1;
627 convert_to_fxsr(tsk, &env);
f668964e 628
44210111 629 return 0;
1da177e4
LT
630}
631
c37b5efe
SS
632static int restore_i387_xsave(void __user *buf)
633{
634 struct _fpx_sw_bytes fx_sw_user;
635 struct _fpstate_ia32 __user *fx_user =
636 ((struct _fpstate_ia32 __user *) buf);
637 struct i387_fxsave_struct __user *fx =
638 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
639 struct xsave_hdr_struct *xsave_hdr =
86603283 640 &current->thread.fpu.state->xsave.xsave_hdr;
6152e4b1 641 u64 mask;
c37b5efe
SS
642 int err;
643
644 if (check_for_xstate(fx, buf, &fx_sw_user))
645 goto fx_only;
646
6152e4b1 647 mask = fx_sw_user.xstate_bv;
c37b5efe
SS
648
649 err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
650
6152e4b1 651 xsave_hdr->xstate_bv &= pcntxt_mask;
c37b5efe
SS
652 /*
653 * These bits must be zero.
654 */
655 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
656
657 /*
658 * Init the state that is not present in the memory layout
659 * and enabled by the OS.
660 */
6152e4b1
PA
661 mask = ~(pcntxt_mask & ~mask);
662 xsave_hdr->xstate_bv &= mask;
c37b5efe
SS
663
664 return err;
665fx_only:
666 /*
667 * Couldn't find the extended state information in the memory
668 * layout. Restore the FP/SSE and init the other extended state
669 * enabled by the OS.
670 */
671 xsave_hdr->xstate_bv = XSTATE_FPSSE;
672 return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
673}
674
ab513701 675int restore_i387_xstate_ia32(void __user *buf)
1da177e4
LT
676{
677 int err;
e8a496ac 678 struct task_struct *tsk = current;
ab513701 679 struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
1da177e4 680
e8a496ac 681 if (HAVE_HWFP)
fd3c3ed5
SS
682 clear_fpu(tsk);
683
ab513701
SS
684 if (!buf) {
685 if (used_math()) {
686 clear_fpu(tsk);
687 clear_used_math();
688 }
689
690 return 0;
691 } else
692 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
693 return -EACCES;
694
e8a496ac
SS
695 if (!used_math()) {
696 err = init_fpu(tsk);
697 if (err)
698 return err;
699 }
fd3c3ed5 700
e8a496ac 701 if (HAVE_HWFP) {
c37b5efe
SS
702 if (cpu_has_xsave)
703 err = restore_i387_xsave(buf);
704 else if (cpu_has_fxsr)
705 err = restore_i387_fxsave(fp, sizeof(struct
706 i387_fxsave_struct));
f668964e 707 else
ab513701 708 err = restore_i387_fsave(fp);
1da177e4 709 } else {
44210111
RM
710 err = fpregs_soft_set(current, NULL,
711 0, sizeof(struct user_i387_ia32_struct),
ab513701 712 NULL, fp) != 0;
1da177e4
LT
713 }
714 set_used_math();
f668964e 715
1da177e4
LT
716 return err;
717}
718
1da177e4
LT
719/*
720 * FPU state for core dumps.
60b3b9af
RM
721 * This is only used for a.out dumps now.
722 * It is declared generically using elf_fpregset_t (which is
723 * struct user_i387_struct) but is in fact only used for 32-bit
724 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
1da177e4 725 */
3b095a04 726int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
1da177e4 727{
1da177e4 728 struct task_struct *tsk = current;
f668964e 729 int fpvalid;
1da177e4
LT
730
731 fpvalid = !!used_math();
60b3b9af
RM
732 if (fpvalid)
733 fpvalid = !fpregs_get(tsk, NULL,
734 0, sizeof(struct user_i387_ia32_struct),
735 fpu, NULL);
1da177e4
LT
736
737 return fpvalid;
738}
129f6946 739EXPORT_SYMBOL(dump_fpu);
1da177e4 740
60b3b9af 741#endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */