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CommitLineData
1da177e4
LT
1/*
2 * boot.c - Architecture-Specific Low-Level ACPI Boot Support
3 *
4 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
5 * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 */
25
26#include <linux/init.h>
1da177e4 27#include <linux/acpi.h>
d66bea57 28#include <linux/acpi_pmtmr.h>
1da177e4 29#include <linux/efi.h>
73fea175 30#include <linux/cpumask.h>
1da177e4 31#include <linux/module.h>
aea00143 32#include <linux/dmi.h>
b33fa1f3 33#include <linux/irq.h>
f0f4c343
AD
34#include <linux/bootmem.h>
35#include <linux/ioport.h>
1da177e4
LT
36
37#include <asm/pgtable.h>
38#include <asm/io_apic.h>
39#include <asm/apic.h>
40#include <asm/io.h>
1da177e4 41#include <asm/mpspec.h>
dfac2189 42#include <asm/smp.h>
1da177e4 43
f6bc4029
GOC
44#ifdef CONFIG_X86_LOCAL_APIC
45# include <mach_apic.h>
46#endif
47
e8924acb 48static int __initdata acpi_force = 0;
1a3f239d 49
df3bb57d
AK
50#ifdef CONFIG_ACPI
51int acpi_disabled = 0;
52#else
53int acpi_disabled = 1;
54#endif
55EXPORT_SYMBOL(acpi_disabled);
56
1da177e4
LT
57#ifdef CONFIG_X86_64
58
1da177e4 59#include <asm/proto.h>
ae261868 60#include <asm/genapic.h>
637029c6 61
4be44fcd 62#else /* X86 */
1da177e4
LT
63
64#ifdef CONFIG_X86_LOCAL_APIC
65#include <mach_apic.h>
66#include <mach_mpparse.h>
4be44fcd 67#endif /* CONFIG_X86_LOCAL_APIC */
1da177e4 68
4be44fcd 69#endif /* X86 */
1da177e4
LT
70
71#define BAD_MADT_ENTRY(entry, end) ( \
72 (!entry) || (unsigned long)entry + sizeof(*entry) > end || \
5f3b1a8b 73 ((struct acpi_subtable_header *)entry)->length < sizeof(*entry))
1da177e4
LT
74
75#define PREFIX "ACPI: "
76
90d53909 77int acpi_noirq; /* skip ACPI IRQ initialization */
6e4be1ff
YL
78int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
79EXPORT_SYMBOL(acpi_pci_disabled);
1da177e4
LT
80int acpi_ht __initdata = 1; /* enable HT */
81
82int acpi_lapic;
83int acpi_ioapic;
84int acpi_strict;
1da177e4 85
471694ea
MR
86static int disable_irq0_through_ioapic __initdata;
87
5f3b1a8b 88u8 acpi_sci_flags __initdata;
1da177e4
LT
89int acpi_sci_override_gsi __initdata;
90int acpi_skip_timer_override __initdata;
fa18f477 91int acpi_use_timer_override __initdata;
1da177e4
LT
92
93#ifdef CONFIG_X86_LOCAL_APIC
94static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
95#endif
96
97#ifndef __HAVE_ARCH_CMPXCHG
98#warning ACPI uses CMPXCHG, i486 and later hardware
99#endif
100
1da177e4
LT
101/* --------------------------------------------------------------------------
102 Boot-time Configuration
103 -------------------------------------------------------------------------- */
104
105/*
106 * The default interrupt routing model is PIC (8259). This gets
27b46d76 107 * overridden if IOAPICs are enumerated (below).
1da177e4 108 */
4be44fcd 109enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
1da177e4
LT
110
111#ifdef CONFIG_X86_64
112
113/* rely on all ACPI tables being in the direct mapping */
2fdf0741 114char *__init __acpi_map_table(unsigned long phys_addr, unsigned long size)
1da177e4
LT
115{
116 if (!phys_addr || !size)
4be44fcd 117 return NULL;
1da177e4 118
67794292 119 if (phys_addr+size <= (max_pfn_mapped << PAGE_SHIFT) + PAGE_SIZE)
1da177e4
LT
120 return __va(phys_addr);
121
122 return NULL;
123}
124
125#else
126
127/*
128 * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END,
129 * to map the target physical address. The problem is that set_fixmap()
130 * provides a single page, and it is possible that the page is not
131 * sufficient.
132 * By using this area, we can map up to MAX_IO_APICS pages temporarily,
133 * i.e. until the next __va_range() call.
134 *
135 * Important Safety Note: The fixed I/O APIC page numbers are *subtracted*
136 * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and
137 * count idx down while incrementing the phys address.
138 */
2fdf0741 139char *__init __acpi_map_table(unsigned long phys, unsigned long size)
1da177e4
LT
140{
141 unsigned long base, offset, mapped_size;
142 int idx;
143
4be44fcd
LB
144 if (phys + size < 8 * 1024 * 1024)
145 return __va(phys);
1da177e4
LT
146
147 offset = phys & (PAGE_SIZE - 1);
148 mapped_size = PAGE_SIZE - offset;
149 set_fixmap(FIX_ACPI_END, phys);
150 base = fix_to_virt(FIX_ACPI_END);
151
152 /*
153 * Most cases can be covered by the below.
154 */
155 idx = FIX_ACPI_END;
156 while (mapped_size < size) {
157 if (--idx < FIX_ACPI_BEGIN)
158 return NULL; /* cannot handle this */
159 phys += PAGE_SIZE;
160 set_fixmap(idx, phys);
161 mapped_size += PAGE_SIZE;
162 }
163
4be44fcd 164 return ((unsigned char *)base + offset);
1da177e4
LT
165}
166#endif
167
168#ifdef CONFIG_PCI_MMCONFIG
54549391 169/* The physical address of the MMCONFIG aperture. Set from ACPI tables. */
15a58ed1 170struct acpi_mcfg_allocation *pci_mmcfg_config;
54549391
GKH
171int pci_mmcfg_config_num;
172
ceb6c468 173int __init acpi_parse_mcfg(struct acpi_table_header *header)
1da177e4
LT
174{
175 struct acpi_table_mcfg *mcfg;
54549391
GKH
176 unsigned long i;
177 int config_size;
1da177e4 178
ceb6c468 179 if (!header)
1da177e4
LT
180 return -EINVAL;
181
ceb6c468 182 mcfg = (struct acpi_table_mcfg *)header;
1da177e4 183
54549391
GKH
184 /* how many config structures do we have */
185 pci_mmcfg_config_num = 0;
ceb6c468 186 i = header->length - sizeof(struct acpi_table_mcfg);
15a58ed1 187 while (i >= sizeof(struct acpi_mcfg_allocation)) {
54549391 188 ++pci_mmcfg_config_num;
15a58ed1 189 i -= sizeof(struct acpi_mcfg_allocation);
54549391
GKH
190 };
191 if (pci_mmcfg_config_num == 0) {
192 printk(KERN_ERR PREFIX "MMCONFIG has no entries\n");
1da177e4
LT
193 return -ENODEV;
194 }
195
54549391
GKH
196 config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config);
197 pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL);
198 if (!pci_mmcfg_config) {
199 printk(KERN_WARNING PREFIX
200 "No memory for MCFG config tables\n");
201 return -ENOMEM;
202 }
203
ad363f80 204 memcpy(pci_mmcfg_config, &mcfg[1], config_size);
54549391 205 for (i = 0; i < pci_mmcfg_config_num; ++i) {
15a58ed1 206 if (pci_mmcfg_config[i].address > 0xFFFFFFFF) {
54549391
GKH
207 printk(KERN_ERR PREFIX
208 "MMCONFIG not in low 4GB of memory\n");
acc7c2e0
KR
209 kfree(pci_mmcfg_config);
210 pci_mmcfg_config_num = 0;
54549391
GKH
211 return -ENODEV;
212 }
213 }
1da177e4
LT
214
215 return 0;
216}
4be44fcd 217#endif /* CONFIG_PCI_MMCONFIG */
1da177e4
LT
218
219#ifdef CONFIG_X86_LOCAL_APIC
15a58ed1 220static int __init acpi_parse_madt(struct acpi_table_header *table)
1da177e4 221{
4be44fcd 222 struct acpi_table_madt *madt = NULL;
1da177e4 223
15a58ed1 224 if (!cpu_has_apic)
1da177e4
LT
225 return -EINVAL;
226
15a58ed1 227 madt = (struct acpi_table_madt *)table;
1da177e4
LT
228 if (!madt) {
229 printk(KERN_WARNING PREFIX "Unable to map MADT\n");
230 return -ENODEV;
231 }
232
ad363f80
AS
233 if (madt->address) {
234 acpi_lapic_addr = (u64) madt->address;
1da177e4
LT
235
236 printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n",
ad363f80 237 madt->address);
1da177e4
LT
238 }
239
240 acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id);
4be44fcd 241
1da177e4
LT
242 return 0;
243}
244
dfac2189
AS
245static void __cpuinit acpi_register_lapic(int id, u8 enabled)
246{
fb3bbd6a
YL
247 unsigned int ver = 0;
248
dfac2189
AS
249 if (!enabled) {
250 ++disabled_cpus;
251 return;
252 }
253
fb3bbd6a
YL
254#ifdef CONFIG_X86_32
255 if (boot_cpu_physical_apicid != -1U)
256 ver = apic_version[boot_cpu_physical_apicid];
257#endif
258
259 generic_processor_info(id, ver);
dfac2189
AS
260}
261
1da177e4 262static int __init
5f3b1a8b 263acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end)
1da177e4 264{
5f3b1a8b 265 struct acpi_madt_local_apic *processor = NULL;
1da177e4 266
5f3b1a8b 267 processor = (struct acpi_madt_local_apic *)header;
1da177e4
LT
268
269 if (BAD_MADT_ENTRY(processor, end))
270 return -EINVAL;
271
272 acpi_table_print_madt_entry(header);
273
7f66ae48
AR
274 /*
275 * We need to register disabled CPU as well to permit
276 * counting disabled CPUs. This allows us to size
277 * cpus_possible_map more accurately, to permit
278 * to not preallocating memory for all NR_CPUS
279 * when we use CPU hotplug.
280 */
dfac2189
AS
281 acpi_register_lapic(processor->id, /* APIC ID */
282 processor->lapic_flags & ACPI_MADT_ENABLED);
1da177e4
LT
283
284 return 0;
285}
286
ac049c1d
JS
287static int __init
288acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end)
289{
290 struct acpi_madt_local_sapic *processor = NULL;
291
292 processor = (struct acpi_madt_local_sapic *)header;
293
294 if (BAD_MADT_ENTRY(processor, end))
295 return -EINVAL;
296
297 acpi_table_print_madt_entry(header);
298
dfac2189
AS
299 acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */
300 processor->lapic_flags & ACPI_MADT_ENABLED);
ac049c1d
JS
301
302 return 0;
303}
304
1da177e4 305static int __init
5f3b1a8b 306acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header,
4be44fcd 307 const unsigned long end)
1da177e4 308{
5f3b1a8b 309 struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
1da177e4 310
5f3b1a8b 311 lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
1da177e4
LT
312
313 if (BAD_MADT_ENTRY(lapic_addr_ovr, end))
314 return -EINVAL;
315
316 acpi_lapic_addr = lapic_addr_ovr->address;
317
318 return 0;
319}
320
321static int __init
5f3b1a8b 322acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end)
1da177e4 323{
5f3b1a8b 324 struct acpi_madt_local_apic_nmi *lapic_nmi = NULL;
1da177e4 325
5f3b1a8b 326 lapic_nmi = (struct acpi_madt_local_apic_nmi *)header;
1da177e4
LT
327
328 if (BAD_MADT_ENTRY(lapic_nmi, end))
329 return -EINVAL;
330
331 acpi_table_print_madt_entry(header);
332
333 if (lapic_nmi->lint != 1)
334 printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n");
335
336 return 0;
337}
338
4be44fcd 339#endif /*CONFIG_X86_LOCAL_APIC */
1da177e4 340
8466361a 341#ifdef CONFIG_X86_IO_APIC
1da177e4
LT
342
343static int __init
5f3b1a8b 344acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
1da177e4 345{
5f3b1a8b 346 struct acpi_madt_io_apic *ioapic = NULL;
1da177e4 347
5f3b1a8b 348 ioapic = (struct acpi_madt_io_apic *)header;
1da177e4
LT
349
350 if (BAD_MADT_ENTRY(ioapic, end))
351 return -EINVAL;
4be44fcd 352
1da177e4
LT
353 acpi_table_print_madt_entry(header);
354
4be44fcd
LB
355 mp_register_ioapic(ioapic->id,
356 ioapic->address, ioapic->global_irq_base);
357
1da177e4
LT
358 return 0;
359}
360
361/*
362 * Parse Interrupt Source Override for the ACPI SCI
363 */
e82c354b 364static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger)
1da177e4
LT
365{
366 if (trigger == 0) /* compatible SCI trigger is level */
367 trigger = 3;
368
369 if (polarity == 0) /* compatible SCI polarity is low */
370 polarity = 3;
371
372 /* Command-line over-ride via acpi_sci= */
5f3b1a8b
AS
373 if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK)
374 trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2;
1da177e4 375
5f3b1a8b
AS
376 if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
377 polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
1da177e4
LT
378
379 /*
4be44fcd 380 * mp_config_acpi_legacy_irqs() already setup IRQs < 16
1da177e4
LT
381 * If GSI is < 16, this will update its flags,
382 * else it will create a new mp_irqs[] entry.
383 */
7bdd21ce 384 mp_override_legacy_irq(gsi, polarity, trigger, gsi);
1da177e4
LT
385
386 /*
387 * stash over-ride to indicate we've been here
cee324b1 388 * and for later update of acpi_gbl_FADT
1da177e4 389 */
7bdd21ce 390 acpi_sci_override_gsi = gsi;
1da177e4
LT
391 return;
392}
393
394static int __init
5f3b1a8b 395acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
4be44fcd 396 const unsigned long end)
1da177e4 397{
5f3b1a8b 398 struct acpi_madt_interrupt_override *intsrc = NULL;
1da177e4 399
5f3b1a8b 400 intsrc = (struct acpi_madt_interrupt_override *)header;
1da177e4
LT
401
402 if (BAD_MADT_ENTRY(intsrc, end))
403 return -EINVAL;
404
405 acpi_table_print_madt_entry(header);
406
5f3b1a8b 407 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
7bdd21ce 408 acpi_sci_ioapic_setup(intsrc->global_irq,
5f3b1a8b
AS
409 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
410 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2);
1da177e4
LT
411 return 0;
412 }
413
414 if (acpi_skip_timer_override &&
5f3b1a8b 415 intsrc->source_irq == 0 && intsrc->global_irq == 2) {
4be44fcd
LB
416 printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n");
417 return 0;
1da177e4
LT
418 }
419
5f3b1a8b
AS
420 mp_override_legacy_irq(intsrc->source_irq,
421 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
422 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
423 intsrc->global_irq);
1da177e4
LT
424
425 return 0;
426}
427
1da177e4 428static int __init
5f3b1a8b 429acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end)
1da177e4 430{
5f3b1a8b 431 struct acpi_madt_nmi_source *nmi_src = NULL;
1da177e4 432
5f3b1a8b 433 nmi_src = (struct acpi_madt_nmi_source *)header;
1da177e4
LT
434
435 if (BAD_MADT_ENTRY(nmi_src, end))
436 return -EINVAL;
437
438 acpi_table_print_madt_entry(header);
439
440 /* TBD: Support nimsrc entries? */
441
442 return 0;
443}
444
4be44fcd 445#endif /* CONFIG_X86_IO_APIC */
1da177e4 446
1da177e4
LT
447/*
448 * acpi_pic_sci_set_trigger()
5f3b1a8b 449 *
1da177e4
LT
450 * use ELCR to set PIC-mode trigger type for SCI
451 *
452 * If a PIC-mode SCI is not recognized or gives spurious IRQ7's
453 * it may require Edge Trigger -- use "acpi_sci=edge"
454 *
455 * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
456 * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge.
27b46d76
SA
457 * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0)
458 * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0)
1da177e4
LT
459 */
460
4be44fcd 461void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
1da177e4
LT
462{
463 unsigned int mask = 1 << irq;
464 unsigned int old, new;
465
466 /* Real old ELCR mask */
467 old = inb(0x4d0) | (inb(0x4d1) << 8);
468
469 /*
27b46d76 470 * If we use ACPI to set PCI IRQs, then we should clear ELCR
1da177e4
LT
471 * since we will set it correctly as we enable the PCI irq
472 * routing.
473 */
474 new = acpi_noirq ? old : 0;
475
476 /*
477 * Update SCI information in the ELCR, it isn't in the PCI
478 * routing tables..
479 */
480 switch (trigger) {
4be44fcd 481 case 1: /* Edge - clear */
1da177e4
LT
482 new &= ~mask;
483 break;
4be44fcd 484 case 3: /* Level - set */
1da177e4
LT
485 new |= mask;
486 break;
487 }
488
489 if (old == new)
490 return;
491
492 printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old);
493 outb(new, 0x4d0);
494 outb(new >> 8, 0x4d1);
495}
496
1da177e4
LT
497int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
498{
f023d764 499 *irq = gsi;
1da177e4
LT
500 return 0;
501}
502
1f3a6a15
KK
503/*
504 * success: return IRQ number (>=0)
505 * failure: return < 0
506 */
cb654695 507int acpi_register_gsi(u32 gsi, int triggering, int polarity)
1da177e4
LT
508{
509 unsigned int irq;
510 unsigned int plat_gsi = gsi;
511
512#ifdef CONFIG_PCI
513 /*
514 * Make sure all (legacy) PCI IRQs are set as level-triggered.
515 */
516 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
cb654695 517 if (triggering == ACPI_LEVEL_SENSITIVE)
4be44fcd 518 eisa_set_level_irq(gsi);
1da177e4
LT
519 }
520#endif
521
522#ifdef CONFIG_X86_IO_APIC
523 if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) {
cb654695 524 plat_gsi = mp_register_gsi(gsi, triggering, polarity);
1da177e4
LT
525 }
526#endif
527 acpi_gsi_to_irq(plat_gsi, &irq);
528 return irq;
529}
4be44fcd 530
1da177e4
LT
531/*
532 * ACPI based hotplug support for CPU
533 */
534#ifdef CONFIG_ACPI_HOTPLUG_CPU
009cbadb
SR
535
536static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
1da177e4 537{
73fea175
AR
538 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
539 union acpi_object *obj;
5f3b1a8b 540 struct acpi_madt_local_apic *lapic;
73fea175
AR
541 cpumask_t tmp_map, new_map;
542 u8 physid;
543 int cpu;
544
545 if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer)))
546 return -EINVAL;
547
548 if (!buffer.length || !buffer.pointer)
549 return -EINVAL;
550
551 obj = buffer.pointer;
552 if (obj->type != ACPI_TYPE_BUFFER ||
553 obj->buffer.length < sizeof(*lapic)) {
554 kfree(buffer.pointer);
555 return -EINVAL;
556 }
557
5f3b1a8b 558 lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer;
73fea175 559
5f3b1a8b
AS
560 if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC ||
561 !(lapic->lapic_flags & ACPI_MADT_ENABLED)) {
73fea175
AR
562 kfree(buffer.pointer);
563 return -EINVAL;
564 }
565
566 physid = lapic->id;
567
568 kfree(buffer.pointer);
569 buffer.length = ACPI_ALLOCATE_BUFFER;
570 buffer.pointer = NULL;
571
572 tmp_map = cpu_present_map;
dfac2189 573 acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED);
73fea175
AR
574
575 /*
576 * If mp_register_lapic successfully generates a new logical cpu
577 * number, then the following will get us exactly what was mapped
578 */
579 cpus_andnot(new_map, cpu_present_map, tmp_map);
580 if (cpus_empty(new_map)) {
581 printk ("Unable to map lapic to logical cpu number\n");
582 return -EINVAL;
583 }
584
585 cpu = first_cpu(new_map);
586
587 *pcpu = cpu;
588 return 0;
1da177e4 589}
1da177e4 590
009cbadb
SR
591/* wrapper to silence section mismatch warning */
592int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu)
593{
594 return _acpi_map_lsapic(handle, pcpu);
595}
4be44fcd 596EXPORT_SYMBOL(acpi_map_lsapic);
1da177e4 597
4be44fcd 598int acpi_unmap_lsapic(int cpu)
1da177e4 599{
71fff5e6 600 per_cpu(x86_cpu_to_apicid, cpu) = -1;
73fea175
AR
601 cpu_clear(cpu, cpu_present_map);
602 num_processors--;
603
604 return (0);
1da177e4 605}
4be44fcd 606
1da177e4 607EXPORT_SYMBOL(acpi_unmap_lsapic);
4be44fcd 608#endif /* CONFIG_ACPI_HOTPLUG_CPU */
1da177e4 609
4be44fcd 610int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
b1bb248a
KK
611{
612 /* TBD */
613 return -EINVAL;
614}
4be44fcd 615
b1bb248a
KK
616EXPORT_SYMBOL(acpi_register_ioapic);
617
4be44fcd 618int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
b1bb248a
KK
619{
620 /* TBD */
621 return -EINVAL;
622}
4be44fcd 623
b1bb248a
KK
624EXPORT_SYMBOL(acpi_unregister_ioapic);
625
5f3b1a8b 626static int __init acpi_parse_sbf(struct acpi_table_header *table)
1da177e4 627{
5f3b1a8b 628 struct acpi_table_boot *sb;
1da177e4 629
5f3b1a8b 630 sb = (struct acpi_table_boot *)table;
1da177e4
LT
631 if (!sb) {
632 printk(KERN_WARNING PREFIX "Unable to map SBF\n");
633 return -ENODEV;
634 }
635
5f3b1a8b 636 sbf_port = sb->cmos_index; /* Save CMOS port */
1da177e4
LT
637
638 return 0;
639}
640
1da177e4 641#ifdef CONFIG_HPET_TIMER
2d0c87c3 642#include <asm/hpet.h>
1da177e4 643
a1dfd851
AD
644static struct __initdata resource *hpet_res;
645
5f3b1a8b 646static int __init acpi_parse_hpet(struct acpi_table_header *table)
1da177e4
LT
647{
648 struct acpi_table_hpet *hpet_tbl;
649
5f3b1a8b 650 hpet_tbl = (struct acpi_table_hpet *)table;
1da177e4
LT
651 if (!hpet_tbl) {
652 printk(KERN_WARNING PREFIX "Unable to map HPET\n");
653 return -ENODEV;
654 }
655
ad363f80 656 if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
1da177e4
LT
657 printk(KERN_WARNING PREFIX "HPET timers must be located in "
658 "memory.\n");
659 return -1;
660 }
f0f4c343 661
2d0c87c3 662 hpet_address = hpet_tbl->address.address;
f4df73c2
TG
663
664 /*
665 * Some broken BIOSes advertise HPET at 0x0. We really do not
666 * want to allocate a resource there.
667 */
668 if (!hpet_address) {
669 printk(KERN_WARNING PREFIX
670 "HPET id: %#x base: %#lx is invalid\n",
671 hpet_tbl->id, hpet_address);
672 return 0;
673 }
674#ifdef CONFIG_X86_64
675 /*
676 * Some even more broken BIOSes advertise HPET at
677 * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add
678 * some noise:
679 */
680 if (hpet_address == 0xfed0000000000000UL) {
681 if (!hpet_force_user) {
682 printk(KERN_WARNING PREFIX "HPET id: %#x "
683 "base: 0xfed0000000000000 is bogus\n "
684 "try hpet=force on the kernel command line to "
685 "fix it up to 0xfed00000.\n", hpet_tbl->id);
686 hpet_address = 0;
687 return 0;
688 }
689 printk(KERN_WARNING PREFIX
690 "HPET id: %#x base: 0xfed0000000000000 fixed up "
691 "to 0xfed00000.\n", hpet_tbl->id);
692 hpet_address >>= 32;
693 }
694#endif
4be44fcd 695 printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
2d0c87c3 696 hpet_tbl->id, hpet_address);
1da177e4 697
a1dfd851
AD
698 /*
699 * Allocate and initialize the HPET firmware resource for adding into
700 * the resource tree during the lateinit timeframe.
701 */
702#define HPET_RESOURCE_NAME_SIZE 9
703 hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
704
a1dfd851
AD
705 hpet_res->name = (void *)&hpet_res[1];
706 hpet_res->flags = IORESOURCE_MEM;
707 snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u",
708 hpet_tbl->sequence);
709
710 hpet_res->start = hpet_address;
711 hpet_res->end = hpet_address + (1 * 1024) - 1;
712
1da177e4
LT
713 return 0;
714}
a1dfd851
AD
715
716/*
717 * hpet_insert_resource inserts the HPET resources used into the resource
718 * tree.
719 */
720static __init int hpet_insert_resource(void)
721{
722 if (!hpet_res)
723 return 1;
724
725 return insert_resource(&iomem_resource, hpet_res);
726}
727
728late_initcall(hpet_insert_resource);
729
1da177e4
LT
730#else
731#define acpi_parse_hpet NULL
732#endif
733
5f3b1a8b 734static int __init acpi_parse_fadt(struct acpi_table_header *table)
1da177e4 735{
90660ec3 736
1da177e4
LT
737#ifdef CONFIG_X86_PM_TIMER
738 /* detect the location of the ACPI PM Timer */
5f3b1a8b 739 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) {
1da177e4 740 /* FADT rev. 2 */
5f3b1a8b 741 if (acpi_gbl_FADT.xpm_timer_block.space_id !=
4be44fcd 742 ACPI_ADR_SPACE_SYSTEM_IO)
1da177e4
LT
743 return 0;
744
5f3b1a8b 745 pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address;
e6e87b4b
DSL
746 /*
747 * "X" fields are optional extensions to the original V1.0
748 * fields, so we must selectively expand V1.0 fields if the
749 * corresponding X field is zero.
750 */
751 if (!pmtmr_ioport)
5f3b1a8b 752 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
1da177e4
LT
753 } else {
754 /* FADT rev. 1 */
5f3b1a8b 755 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
1da177e4
LT
756 }
757 if (pmtmr_ioport)
4be44fcd
LB
758 printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n",
759 pmtmr_ioport);
1da177e4
LT
760#endif
761 return 0;
762}
763
1da177e4
LT
764#ifdef CONFIG_X86_LOCAL_APIC
765/*
766 * Parse LAPIC entries in MADT
767 * returns 0 on success, < 0 on error
768 */
31d2092e
AS
769
770static void __init acpi_register_lapic_address(unsigned long address)
771{
772 mp_lapic_addr = address;
773
774 set_fixmap_nocache(FIX_APIC_BASE, address);
fb3bbd6a 775 if (boot_cpu_physical_apicid == -1U) {
31d2092e 776 boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());
fb3bbd6a
YL
777#ifdef CONFIG_X86_32
778 apic_version[boot_cpu_physical_apicid] =
779 GET_APIC_VERSION(apic_read(APIC_LVR));
780#endif
781 }
31d2092e
AS
782}
783
cbf9bd60
YL
784static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
785{
786 int count;
787
788 if (!cpu_has_apic)
789 return -ENODEV;
790
791 /*
792 * Note that the LAPIC address is obtained from the MADT (32-bit value)
793 * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value).
794 */
795
796 count =
797 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
798 acpi_parse_lapic_addr_ovr, 0);
799 if (count < 0) {
800 printk(KERN_ERR PREFIX
801 "Error parsing LAPIC address override entry\n");
802 return count;
803 }
804
805 acpi_register_lapic_address(acpi_lapic_addr);
806
807 return count;
808}
809
4be44fcd 810static int __init acpi_parse_madt_lapic_entries(void)
1da177e4
LT
811{
812 int count;
813
0fcd2709
AK
814 if (!cpu_has_apic)
815 return -ENODEV;
816
5f3b1a8b 817 /*
1da177e4
LT
818 * Note that the LAPIC address is obtained from the MADT (32-bit value)
819 * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value).
820 */
821
4be44fcd 822 count =
5f3b1a8b 823 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
4be44fcd 824 acpi_parse_lapic_addr_ovr, 0);
1da177e4 825 if (count < 0) {
4be44fcd
LB
826 printk(KERN_ERR PREFIX
827 "Error parsing LAPIC address override entry\n");
1da177e4
LT
828 return count;
829 }
830
31d2092e 831 acpi_register_lapic_address(acpi_lapic_addr);
1da177e4 832
ac049c1d
JS
833 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC,
834 acpi_parse_sapic, MAX_APICS);
835
836 if (!count)
837 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC,
838 acpi_parse_lapic, MAX_APICS);
4be44fcd 839 if (!count) {
1da177e4
LT
840 printk(KERN_ERR PREFIX "No LAPIC entries present\n");
841 /* TBD: Cleanup to allow fallback to MPS */
842 return -ENODEV;
4be44fcd 843 } else if (count < 0) {
1da177e4
LT
844 printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n");
845 /* TBD: Cleanup to allow fallback to MPS */
846 return count;
847 }
848
4be44fcd 849 count =
5f3b1a8b 850 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0);
1da177e4
LT
851 if (count < 0) {
852 printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n");
853 /* TBD: Cleanup to allow fallback to MPS */
854 return count;
855 }
856 return 0;
857}
4be44fcd 858#endif /* CONFIG_X86_LOCAL_APIC */
1da177e4 859
8466361a 860#ifdef CONFIG_X86_IO_APIC
11113f84
AS
861#define MP_ISA_BUS 0
862
d49c4288 863#ifdef CONFIG_X86_ES7000
11113f84
AS
864extern int es7000_plat;
865#endif
866
5f895148
AS
867static struct {
868 int apic_id;
869 int gsi_base;
870 int gsi_end;
871 DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
872} mp_ioapic_routing[MAX_IO_APICS];
11113f84
AS
873
874static int mp_find_ioapic(int gsi)
875{
876 int i = 0;
877
878 /* Find the IOAPIC that manages this GSI. */
879 for (i = 0; i < nr_ioapics; i++) {
880 if ((gsi >= mp_ioapic_routing[i].gsi_base)
881 && (gsi <= mp_ioapic_routing[i].gsi_end))
882 return i;
883 }
884
885 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
886 return -1;
887}
888
889static u8 __init uniq_ioapic_id(u8 id)
890{
891#ifdef CONFIG_X86_32
892 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
893 !APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
894 return io_apic_get_unique_id(nr_ioapics, id);
895 else
896 return id;
897#else
898 int i;
899 DECLARE_BITMAP(used, 256);
900 bitmap_zero(used, 256);
901 for (i = 0; i < nr_ioapics; i++) {
ec2cd0a2
AS
902 struct mp_config_ioapic *ia = &mp_ioapics[i];
903 __set_bit(ia->mp_apicid, used);
11113f84
AS
904 }
905 if (!test_bit(id, used))
906 return id;
907 return find_first_zero_bit(used, 256);
908#endif
909}
910
911static int bad_ioapic(unsigned long address)
912{
913 if (nr_ioapics >= MAX_IO_APICS) {
914 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
915 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
916 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
917 }
918 if (!address) {
919 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
920 " found in table, skipping!\n");
921 return 1;
922 }
923 return 0;
924}
925
926void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
927{
928 int idx = 0;
929
930 if (bad_ioapic(address))
931 return;
932
933 idx = nr_ioapics;
934
ec2cd0a2
AS
935 mp_ioapics[idx].mp_type = MP_IOAPIC;
936 mp_ioapics[idx].mp_flags = MPC_APIC_USABLE;
937 mp_ioapics[idx].mp_apicaddr = address;
11113f84
AS
938
939 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
ec2cd0a2 940 mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id);
11113f84 941#ifdef CONFIG_X86_32
ec2cd0a2 942 mp_ioapics[idx].mp_apicver = io_apic_get_version(idx);
11113f84 943#else
ec2cd0a2 944 mp_ioapics[idx].mp_apicver = 0;
11113f84
AS
945#endif
946 /*
947 * Build basic GSI lookup table to facilitate gsi->io_apic lookups
948 * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
949 */
ec2cd0a2 950 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid;
11113f84
AS
951 mp_ioapic_routing[idx].gsi_base = gsi_base;
952 mp_ioapic_routing[idx].gsi_end = gsi_base +
953 io_apic_get_redir_entries(idx);
954
ec2cd0a2
AS
955 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, "
956 "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid,
957 mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr,
11113f84
AS
958 mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end);
959
960 nr_ioapics++;
961}
962
fcfa146e
YL
963static void assign_to_mp_irq(struct mp_config_intsrc *m,
964 struct mp_config_intsrc *mp_irq)
965{
966 memcpy(mp_irq, m, sizeof(struct mp_config_intsrc));
967}
968
969static int mp_irq_cmp(struct mp_config_intsrc *mp_irq,
970 struct mp_config_intsrc *m)
971{
972 return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc));
973}
974
975static void save_mp_irq(struct mp_config_intsrc *m)
976{
977 int i;
978
979 for (i = 0; i < mp_irq_entries; i++) {
980 if (!mp_irq_cmp(&mp_irqs[i], m))
981 return;
982 }
983
984 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
985 if (++mp_irq_entries == MAX_IRQ_SOURCES)
986 panic("Max # of irq sources exceeded!!\n");
987}
988
11113f84
AS
989void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
990{
6df8809b
YL
991 int ioapic;
992 int pin;
fcfa146e 993 struct mp_config_intsrc mp_irq;
11113f84 994
471694ea
MR
995 /* Skip the 8254 timer interrupt (IRQ 0) if requested. */
996 if (bus_irq == 0 && disable_irq0_through_ioapic)
997 return;
998
11113f84
AS
999 /*
1000 * Convert 'gsi' to 'ioapic.pin'.
1001 */
1002 ioapic = mp_find_ioapic(gsi);
1003 if (ioapic < 0)
1004 return;
1005 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
1006
1007 /*
1008 * TBD: This check is for faulty timer entries, where the override
1009 * erroneously sets the trigger to level, resulting in a HUGE
1010 * increase of timer interrupts!
1011 */
1012 if ((bus_irq == 0) && (trigger == 3))
1013 trigger = 1;
1014
fcfa146e
YL
1015 mp_irq.mp_type = MP_INTSRC;
1016 mp_irq.mp_irqtype = mp_INT;
1017 mp_irq.mp_irqflag = (trigger << 2) | polarity;
1018 mp_irq.mp_srcbus = MP_ISA_BUS;
1019 mp_irq.mp_srcbusirq = bus_irq; /* IRQ */
1020 mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */
1021 mp_irq.mp_dstirq = pin; /* INTIN# */
11113f84 1022
fcfa146e 1023 save_mp_irq(&mp_irq);
11113f84
AS
1024}
1025
1026void __init mp_config_acpi_legacy_irqs(void)
1027{
6df8809b
YL
1028 int i;
1029 int ioapic;
1030 unsigned int dstapic;
fcfa146e 1031 struct mp_config_intsrc mp_irq;
11113f84
AS
1032
1033#if defined (CONFIG_MCA) || defined (CONFIG_EISA)
1034 /*
1035 * Fabricate the legacy ISA bus (bus #31).
1036 */
1037 mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA;
1038#endif
1039 set_bit(MP_ISA_BUS, mp_bus_not_pci);
1040 Dprintk("Bus #%d is ISA\n", MP_ISA_BUS);
1041
d49c4288 1042#ifdef CONFIG_X86_ES7000
11113f84
AS
1043 /*
1044 * Older generations of ES7000 have no legacy identity mappings
1045 */
1046 if (es7000_plat == 1)
1047 return;
1048#endif
1049
1050 /*
1051 * Locate the IOAPIC that manages the ISA IRQs (0-15).
1052 */
1053 ioapic = mp_find_ioapic(0);
1054 if (ioapic < 0)
1055 return;
6df8809b 1056 dstapic = mp_ioapics[ioapic].mp_apicid;
11113f84 1057
11113f84
AS
1058 /*
1059 * Use the default configuration for the IRQs 0-15. Unless
1060 * overridden by (MADT) interrupt source override entries.
1061 */
1062 for (i = 0; i < 16; i++) {
1063 int idx;
1064
471694ea
MR
1065 /* Skip the 8254 timer interrupt (IRQ 0) if requested. */
1066 if (i == 0 && disable_irq0_through_ioapic)
1067 continue;
1068
11113f84 1069 for (idx = 0; idx < mp_irq_entries; idx++) {
2fddb6e2 1070 struct mp_config_intsrc *irq = mp_irqs + idx;
11113f84
AS
1071
1072 /* Do we already have a mapping for this ISA IRQ? */
2fddb6e2
AS
1073 if (irq->mp_srcbus == MP_ISA_BUS
1074 && irq->mp_srcbusirq == i)
11113f84
AS
1075 break;
1076
1077 /* Do we already have a mapping for this IOAPIC pin */
6df8809b
YL
1078 if (irq->mp_dstapic == dstapic &&
1079 irq->mp_dstirq == i)
11113f84
AS
1080 break;
1081 }
1082
1083 if (idx != mp_irq_entries) {
1084 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
1085 continue; /* IRQ already used */
1086 }
1087
fcfa146e
YL
1088 mp_irq.mp_type = MP_INTSRC;
1089 mp_irq.mp_irqflag = 0; /* Conforming */
1090 mp_irq.mp_srcbus = MP_ISA_BUS;
1091 mp_irq.mp_dstapic = dstapic;
1092 mp_irq.mp_irqtype = mp_INT;
1093 mp_irq.mp_srcbusirq = i; /* Identity mapped */
1094 mp_irq.mp_dstirq = i;
11113f84 1095
fcfa146e 1096 save_mp_irq(&mp_irq);
11113f84
AS
1097 }
1098}
1099
1100int mp_register_gsi(u32 gsi, int triggering, int polarity)
1101{
1102 int ioapic;
1103 int ioapic_pin;
1104#ifdef CONFIG_X86_32
1105#define MAX_GSI_NUM 4096
1106#define IRQ_COMPRESSION_START 64
1107
1108 static int pci_irq = IRQ_COMPRESSION_START;
1109 /*
1110 * Mapping between Global System Interrupts, which
1111 * represent all possible interrupts, and IRQs
1112 * assigned to actual devices.
1113 */
1114 static int gsi_to_irq[MAX_GSI_NUM];
1115#else
1116
1117 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
1118 return gsi;
1119#endif
1120
1121 /* Don't set up the ACPI SCI because it's already set up */
1122 if (acpi_gbl_FADT.sci_interrupt == gsi)
1123 return gsi;
1124
1125 ioapic = mp_find_ioapic(gsi);
1126 if (ioapic < 0) {
1127 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
1128 return gsi;
1129 }
1130
1131 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
1132
1133#ifdef CONFIG_X86_32
1134 if (ioapic_renumber_irq)
1135 gsi = ioapic_renumber_irq(ioapic, gsi);
1136#endif
1137
1138 /*
1139 * Avoid pin reprogramming. PRTs typically include entries
1140 * with redundant pin->gsi mappings (but unique PCI devices);
1141 * we only program the IOAPIC on the first.
1142 */
1143 if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
1144 printk(KERN_ERR "Invalid reference to IOAPIC pin "
1145 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
1146 ioapic_pin);
1147 return gsi;
1148 }
1149 if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) {
1150 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
1151 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
1152#ifdef CONFIG_X86_32
1153 return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]);
1154#else
1155 return gsi;
1156#endif
1157 }
1158
1159 set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed);
1160#ifdef CONFIG_X86_32
1161 /*
1162 * For GSI >= 64, use IRQ compression
1163 */
1164 if ((gsi >= IRQ_COMPRESSION_START)
1165 && (triggering == ACPI_LEVEL_SENSITIVE)) {
1166 /*
1167 * For PCI devices assign IRQs in order, avoiding gaps
1168 * due to unused I/O APIC pins.
1169 */
1170 int irq = gsi;
1171 if (gsi < MAX_GSI_NUM) {
1172 /*
1173 * Retain the VIA chipset work-around (gsi > 15), but
1174 * avoid a problem where the 8254 timer (IRQ0) is setup
1175 * via an override (so it's not on pin 0 of the ioapic),
1176 * and at the same time, the pin 0 interrupt is a PCI
1177 * type. The gsi > 15 test could cause these two pins
1178 * to be shared as IRQ0, and they are not shareable.
1179 * So test for this condition, and if necessary, avoid
1180 * the pin collision.
1181 */
1182 gsi = pci_irq++;
1183 /*
1184 * Don't assign IRQ used by ACPI SCI
1185 */
1186 if (gsi == acpi_gbl_FADT.sci_interrupt)
1187 gsi = pci_irq++;
1188 gsi_to_irq[irq] = gsi;
1189 } else {
1190 printk(KERN_ERR "GSI %u is too high\n", gsi);
1191 return gsi;
1192 }
1193 }
1194#endif
1195 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
1196 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
1197 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
1198 return gsi;
1199}
1200
2944e16b
YL
1201int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
1202 u32 gsi, int triggering, int polarity)
1203{
fcfa146e
YL
1204#ifdef CONFIG_X86_MPPARSE
1205 struct mp_config_intsrc mp_irq;
2944e16b
YL
1206 int ioapic;
1207
fcfa146e 1208 if (!acpi_ioapic)
d867e531
YL
1209 return 0;
1210
2944e16b 1211 /* print the entry should happen on mptable identically */
fcfa146e
YL
1212 mp_irq.mp_type = MP_INTSRC;
1213 mp_irq.mp_irqtype = mp_INT;
1214 mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
2944e16b 1215 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
fcfa146e
YL
1216 mp_irq.mp_srcbus = number;
1217 mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
2944e16b 1218 ioapic = mp_find_ioapic(gsi);
fcfa146e
YL
1219 mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id;
1220 mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base;
2944e16b 1221
fcfa146e
YL
1222 save_mp_irq(&mp_irq);
1223#endif
2944e16b
YL
1224 return 0;
1225}
1226
1da177e4
LT
1227/*
1228 * Parse IOAPIC related entries in MADT
1229 * returns 0 on success, < 0 on error
1230 */
4be44fcd 1231static int __init acpi_parse_madt_ioapic_entries(void)
1da177e4
LT
1232{
1233 int count;
1234
1235 /*
1236 * ACPI interpreter is required to complete interrupt setup,
1237 * so if it is off, don't enumerate the io-apics with ACPI.
1238 * If MPS is present, it will handle them,
1239 * otherwise the system will stay in PIC mode
1240 */
1241 if (acpi_disabled || acpi_noirq) {
1242 return -ENODEV;
4be44fcd 1243 }
1da177e4 1244
5f3b1a8b 1245 if (!cpu_has_apic)
d3b6a349
AK
1246 return -ENODEV;
1247
1da177e4 1248 /*
4be44fcd 1249 * if "noapic" boot option, don't look for IO-APICs
1da177e4
LT
1250 */
1251 if (skip_ioapic_setup) {
1252 printk(KERN_INFO PREFIX "Skipping IOAPIC probe "
4be44fcd 1253 "due to 'noapic' option.\n");
1da177e4
LT
1254 return -ENODEV;
1255 }
1256
4be44fcd 1257 count =
5f3b1a8b 1258 acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic,
4be44fcd 1259 MAX_IO_APICS);
1da177e4
LT
1260 if (!count) {
1261 printk(KERN_ERR PREFIX "No IOAPIC entries present\n");
1262 return -ENODEV;
4be44fcd 1263 } else if (count < 0) {
1da177e4
LT
1264 printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n");
1265 return count;
1266 }
1267
4be44fcd 1268 count =
5f3b1a8b 1269 acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr,
4be44fcd 1270 NR_IRQ_VECTORS);
1da177e4 1271 if (count < 0) {
4be44fcd
LB
1272 printk(KERN_ERR PREFIX
1273 "Error parsing interrupt source overrides entry\n");
1da177e4
LT
1274 /* TBD: Cleanup to allow fallback to MPS */
1275 return count;
1276 }
1277
1278 /*
1279 * If BIOS did not supply an INT_SRC_OVR for the SCI
1280 * pretend we got one so we can set the SCI flags.
1281 */
1282 if (!acpi_sci_override_gsi)
cee324b1 1283 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0);
1da177e4
LT
1284
1285 /* Fill in identity legacy mapings where no override */
1286 mp_config_acpi_legacy_irqs();
1287
4be44fcd 1288 count =
5f3b1a8b 1289 acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src,
4be44fcd 1290 NR_IRQ_VECTORS);
1da177e4
LT
1291 if (count < 0) {
1292 printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n");
1293 /* TBD: Cleanup to allow fallback to MPS */
1294 return count;
1295 }
1296
1297 return 0;
1298}
1299#else
1300static inline int acpi_parse_madt_ioapic_entries(void)
1301{
1302 return -1;
1303}
8466361a 1304#endif /* !CONFIG_X86_IO_APIC */
1da177e4 1305
cbf9bd60
YL
1306static void __init early_acpi_process_madt(void)
1307{
1308#ifdef CONFIG_X86_LOCAL_APIC
1309 int error;
1310
1311 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
1312
1313 /*
1314 * Parse MADT LAPIC entries
1315 */
1316 error = early_acpi_parse_madt_lapic_addr_ovr();
1317 if (!error) {
1318 acpi_lapic = 1;
1319 smp_found_config = 1;
1320 }
1321 if (error == -EINVAL) {
1322 /*
1323 * Dell Precision Workstation 410, 610 come here.
1324 */
1325 printk(KERN_ERR PREFIX
1326 "Invalid BIOS MADT, disabling ACPI\n");
1327 disable_acpi();
1328 }
1329 }
1330#endif
1331}
1332
4be44fcd 1333static void __init acpi_process_madt(void)
1da177e4
LT
1334{
1335#ifdef CONFIG_X86_LOCAL_APIC
7f8f97c3 1336 int error;
1da177e4 1337
7f8f97c3 1338 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
1da177e4
LT
1339
1340 /*
1341 * Parse MADT LAPIC entries
1342 */
1343 error = acpi_parse_madt_lapic_entries();
1344 if (!error) {
1345 acpi_lapic = 1;
1346
911a62d4
VP
1347#ifdef CONFIG_X86_GENERICARCH
1348 generic_bigsmp_probe();
1349#endif
1da177e4
LT
1350 /*
1351 * Parse MADT IO-APIC entries
1352 */
1353 error = acpi_parse_madt_ioapic_entries();
1354 if (!error) {
1355 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
1356 acpi_irq_balance_set(NULL);
1357 acpi_ioapic = 1;
1358
1359 smp_found_config = 1;
3c43f039 1360 setup_apic_routing();
1da177e4
LT
1361 }
1362 }
1363 if (error == -EINVAL) {
1364 /*
1365 * Dell Precision Workstation 410, 610 come here.
1366 */
4be44fcd
LB
1367 printk(KERN_ERR PREFIX
1368 "Invalid BIOS MADT, disabling ACPI\n");
1da177e4
LT
1369 disable_acpi();
1370 }
1371 }
1372#endif
1373 return;
1374}
1375
aea00143
AP
1376#ifdef __i386__
1377
1855256c 1378static int __init disable_acpi_irq(const struct dmi_system_id *d)
aea00143
AP
1379{
1380 if (!acpi_force) {
1381 printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n",
1382 d->ident);
1383 acpi_noirq_set();
1384 }
1385 return 0;
1386}
1387
1855256c 1388static int __init disable_acpi_pci(const struct dmi_system_id *d)
aea00143
AP
1389{
1390 if (!acpi_force) {
1391 printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n",
1392 d->ident);
1393 acpi_disable_pci();
1394 }
1395 return 0;
1396}
aea00143 1397
1855256c 1398static int __init dmi_disable_acpi(const struct dmi_system_id *d)
aea00143
AP
1399{
1400 if (!acpi_force) {
4be44fcd 1401 printk(KERN_NOTICE "%s detected: acpi off\n", d->ident);
aea00143
AP
1402 disable_acpi();
1403 } else {
1404 printk(KERN_NOTICE
1405 "Warning: DMI blacklist says broken, but acpi forced\n");
1406 }
1407 return 0;
1408}
1409
1410/*
1411 * Limit ACPI to CPU enumeration for HT
1412 */
1855256c 1413static int __init force_acpi_ht(const struct dmi_system_id *d)
aea00143
AP
1414{
1415 if (!acpi_force) {
4be44fcd
LB
1416 printk(KERN_NOTICE "%s detected: force use of acpi=ht\n",
1417 d->ident);
aea00143
AP
1418 disable_acpi();
1419 acpi_ht = 1;
1420 } else {
1421 printk(KERN_NOTICE
1422 "Warning: acpi=force overrules DMI blacklist: acpi=ht\n");
1423 }
1424 return 0;
1425}
1426
9340e1cc
MG
1427/*
1428 * Don't register any I/O APIC entries for the 8254 timer IRQ.
1429 */
1430static int __init
1431dmi_disable_irq0_through_ioapic(const struct dmi_system_id *d)
1432{
1433 pr_notice("%s detected: disabling IRQ 0 through I/O APIC\n", d->ident);
1434 disable_irq0_through_ioapic = 1;
1435 return 0;
1436}
1437
aea00143
AP
1438/*
1439 * If your system is blacklisted here, but you find that acpi=force
1440 * works for you, please contact acpi-devel@sourceforge.net
1441 */
1442static struct dmi_system_id __initdata acpi_dmi_table[] = {
1443 /*
1444 * Boxes that need ACPI disabled
1445 */
1446 {
4be44fcd
LB
1447 .callback = dmi_disable_acpi,
1448 .ident = "IBM Thinkpad",
1449 .matches = {
1450 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1451 DMI_MATCH(DMI_BOARD_NAME, "2629H1G"),
1452 },
1453 },
aea00143
AP
1454
1455 /*
1456 * Boxes that need acpi=ht
1457 */
1458 {
4be44fcd
LB
1459 .callback = force_acpi_ht,
1460 .ident = "FSC Primergy T850",
1461 .matches = {
1462 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
1463 DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"),
1464 },
1465 },
aea00143 1466 {
4be44fcd
LB
1467 .callback = force_acpi_ht,
1468 .ident = "HP VISUALIZE NT Workstation",
1469 .matches = {
1470 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
1471 DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"),
1472 },
1473 },
aea00143 1474 {
4be44fcd
LB
1475 .callback = force_acpi_ht,
1476 .ident = "Compaq Workstation W8000",
1477 .matches = {
1478 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
1479 DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"),
1480 },
1481 },
aea00143 1482 {
4be44fcd
LB
1483 .callback = force_acpi_ht,
1484 .ident = "ASUS P4B266",
1485 .matches = {
1486 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1487 DMI_MATCH(DMI_BOARD_NAME, "P4B266"),
1488 },
1489 },
aea00143 1490 {
4be44fcd
LB
1491 .callback = force_acpi_ht,
1492 .ident = "ASUS P2B-DS",
1493 .matches = {
1494 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1495 DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"),
1496 },
1497 },
aea00143 1498 {
4be44fcd
LB
1499 .callback = force_acpi_ht,
1500 .ident = "ASUS CUR-DLS",
1501 .matches = {
1502 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1503 DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"),
1504 },
1505 },
aea00143 1506 {
4be44fcd
LB
1507 .callback = force_acpi_ht,
1508 .ident = "ABIT i440BX-W83977",
1509 .matches = {
1510 DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"),
1511 DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"),
1512 },
1513 },
aea00143 1514 {
4be44fcd
LB
1515 .callback = force_acpi_ht,
1516 .ident = "IBM Bladecenter",
1517 .matches = {
1518 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1519 DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"),
1520 },
1521 },
aea00143 1522 {
4be44fcd
LB
1523 .callback = force_acpi_ht,
1524 .ident = "IBM eServer xSeries 360",
1525 .matches = {
1526 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1527 DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"),
1528 },
1529 },
aea00143 1530 {
4be44fcd
LB
1531 .callback = force_acpi_ht,
1532 .ident = "IBM eserver xSeries 330",
1533 .matches = {
1534 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1535 DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"),
1536 },
1537 },
aea00143 1538 {
4be44fcd
LB
1539 .callback = force_acpi_ht,
1540 .ident = "IBM eserver xSeries 440",
1541 .matches = {
1542 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1543 DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"),
1544 },
1545 },
aea00143 1546
aea00143
AP
1547 /*
1548 * Boxes that need ACPI PCI IRQ routing disabled
1549 */
1550 {
4be44fcd
LB
1551 .callback = disable_acpi_irq,
1552 .ident = "ASUS A7V",
1553 .matches = {
1554 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
1555 DMI_MATCH(DMI_BOARD_NAME, "<A7V>"),
1556 /* newer BIOS, Revision 1011, does work */
1557 DMI_MATCH(DMI_BIOS_VERSION,
1558 "ASUS A7V ACPI BIOS Revision 1007"),
1559 },
1560 },
74586fca
LB
1561 {
1562 /*
1563 * Latest BIOS for IBM 600E (1.16) has bad pcinum
1564 * for LPC bridge, which is needed for the PCI
1565 * interrupt links to work. DSDT fix is in bug 5966.
1566 * 2645, 2646 model numbers are shared with 600/600E/600X
1567 */
1568 .callback = disable_acpi_irq,
1569 .ident = "IBM Thinkpad 600 Series 2645",
1570 .matches = {
1571 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1572 DMI_MATCH(DMI_BOARD_NAME, "2645"),
1573 },
1574 },
1575 {
1576 .callback = disable_acpi_irq,
1577 .ident = "IBM Thinkpad 600 Series 2646",
1578 .matches = {
1579 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1580 DMI_MATCH(DMI_BOARD_NAME, "2646"),
1581 },
1582 },
aea00143
AP
1583 /*
1584 * Boxes that need ACPI PCI IRQ routing and PCI scan disabled
1585 */
4be44fcd
LB
1586 { /* _BBN 0 bug */
1587 .callback = disable_acpi_pci,
1588 .ident = "ASUS PR-DLS",
1589 .matches = {
1590 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1591 DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"),
1592 DMI_MATCH(DMI_BIOS_VERSION,
1593 "ASUS PR-DLS ACPI BIOS Revision 1010"),
1594 DMI_MATCH(DMI_BIOS_DATE, "03/21/2003")
1595 },
1596 },
aea00143 1597 {
4be44fcd
LB
1598 .callback = disable_acpi_pci,
1599 .ident = "Acer TravelMate 36x Laptop",
1600 .matches = {
1601 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1602 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1603 },
1604 },
9340e1cc
MG
1605 /*
1606 * HP laptops which use a DSDT reporting as HP/SB400/10000,
1607 * which includes some code which overrides all temperature
1608 * trip points to 16C if the INTIN2 input of the I/O APIC
1609 * is enabled. This input is incorrectly designated the
1610 * ISA IRQ 0 via an interrupt source override even though
1611 * it is wired to the output of the master 8259A and INTIN0
1612 * is not connected at all. Abandon any attempts to route
1613 * IRQ 0 through the I/O APIC therefore.
1614 */
1615 {
1616 .callback = dmi_disable_irq0_through_ioapic,
1617 .ident = "HP NX6125 laptop",
1618 .matches = {
1619 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1620 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"),
1621 },
1622 },
1623 {
1624 .callback = dmi_disable_irq0_through_ioapic,
1625 .ident = "HP NX6325 laptop",
1626 .matches = {
1627 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1628 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"),
1629 },
1630 },
4be44fcd 1631 {}
aea00143
AP
1632};
1633
4be44fcd 1634#endif /* __i386__ */
aea00143 1635
1da177e4
LT
1636/*
1637 * acpi_boot_table_init() and acpi_boot_init()
1638 * called from setup_arch(), always.
1639 * 1. checksums all tables
1640 * 2. enumerates lapics
1641 * 3. enumerates io-apics
1642 *
1643 * acpi_table_init() is separate to allow reading SRAT without
1644 * other side effects.
1645 *
1646 * side effects of acpi_boot_init:
1647 * acpi_lapic = 1 if LAPIC found
1648 * acpi_ioapic = 1 if IOAPIC found
1649 * if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
1650 * if acpi_blacklisted() acpi_disabled = 1;
1651 * acpi_irq_model=...
1652 * ...
1653 *
1654 * return value: (currently ignored)
1655 * 0: success
1656 * !0: failure
1657 */
1658
4be44fcd 1659int __init acpi_boot_table_init(void)
1da177e4
LT
1660{
1661 int error;
1662
aea00143
AP
1663#ifdef __i386__
1664 dmi_check_system(acpi_dmi_table);
1665#endif
1666
1da177e4
LT
1667 /*
1668 * If acpi_disabled, bail out
1669 * One exception: acpi=ht continues far enough to enumerate LAPICs
1670 */
1671 if (acpi_disabled && !acpi_ht)
4be44fcd 1672 return 1;
1da177e4 1673
5f3b1a8b 1674 /*
1da177e4
LT
1675 * Initialize the ACPI boot-time table parser.
1676 */
1677 error = acpi_table_init();
1678 if (error) {
1679 disable_acpi();
1680 return error;
1681 }
1da177e4 1682
5f3b1a8b 1683 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1da177e4
LT
1684
1685 /*
1686 * blacklist may disable ACPI entirely
1687 */
1688 error = acpi_blacklisted();
1689 if (error) {
1da177e4
LT
1690 if (acpi_force) {
1691 printk(KERN_WARNING PREFIX "acpi=force override\n");
1692 } else {
1693 printk(KERN_WARNING PREFIX "Disabling ACPI support\n");
1694 disable_acpi();
1695 return error;
1696 }
1697 }
cbf9bd60
YL
1698
1699 return 0;
1700}
1701
1702int __init early_acpi_boot_init(void)
1703{
1704 /*
1705 * If acpi_disabled, bail out
1706 * One exception: acpi=ht continues far enough to enumerate LAPICs
1707 */
1708 if (acpi_disabled && !acpi_ht)
1709 return 1;
1710
1711 /*
1712 * Process the Multiple APIC Description Table (MADT), if present
1713 */
1714 early_acpi_process_madt();
1da177e4
LT
1715
1716 return 0;
1717}
1718
1da177e4
LT
1719int __init acpi_boot_init(void)
1720{
1721 /*
1722 * If acpi_disabled, bail out
1723 * One exception: acpi=ht continues far enough to enumerate LAPICs
1724 */
1725 if (acpi_disabled && !acpi_ht)
4be44fcd 1726 return 1;
1da177e4 1727
5f3b1a8b 1728 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1da177e4
LT
1729
1730 /*
1731 * set sci_int and PM timer address
1732 */
ceb6c468 1733 acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
1da177e4
LT
1734
1735 /*
1736 * Process the Multiple APIC Description Table (MADT), if present
1737 */
1738 acpi_process_madt();
1739
5f3b1a8b 1740 acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
1da177e4
LT
1741
1742 return 0;
1743}
1a3f239d
RR
1744
1745static int __init parse_acpi(char *arg)
1746{
1747 if (!arg)
1748 return -EINVAL;
1749
1750 /* "acpi=off" disables both ACPI table parsing and interpreter */
1751 if (strcmp(arg, "off") == 0) {
1752 disable_acpi();
1753 }
1754 /* acpi=force to over-ride black-list */
1755 else if (strcmp(arg, "force") == 0) {
1756 acpi_force = 1;
1757 acpi_ht = 1;
1758 acpi_disabled = 0;
1759 }
1760 /* acpi=strict disables out-of-spec workarounds */
1761 else if (strcmp(arg, "strict") == 0) {
1762 acpi_strict = 1;
1763 }
1764 /* Limit ACPI just to boot-time to enable HT */
1765 else if (strcmp(arg, "ht") == 0) {
1766 if (!acpi_force)
1767 disable_acpi();
1768 acpi_ht = 1;
1769 }
1770 /* "acpi=noirq" disables ACPI interrupt routing */
1771 else if (strcmp(arg, "noirq") == 0) {
1772 acpi_noirq_set();
1773 } else {
1774 /* Core will printk when we return error. */
1775 return -EINVAL;
1776 }
1777 return 0;
1778}
1779early_param("acpi", parse_acpi);
1780
1781/* FIXME: Using pci= for an ACPI parameter is a travesty. */
1782static int __init parse_pci(char *arg)
1783{
1784 if (arg && strcmp(arg, "noacpi") == 0)
1785 acpi_disable_pci();
1786 return 0;
1787}
1788early_param("pci", parse_pci);
1789
1790#ifdef CONFIG_X86_IO_APIC
1791static int __init parse_acpi_skip_timer_override(char *arg)
1792{
1793 acpi_skip_timer_override = 1;
1794 return 0;
1795}
1796early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override);
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AK
1797
1798static int __init parse_acpi_use_timer_override(char *arg)
1799{
1800 acpi_use_timer_override = 1;
1801 return 0;
1802}
1803early_param("acpi_use_timer_override", parse_acpi_use_timer_override);
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1804#endif /* CONFIG_X86_IO_APIC */
1805
1806static int __init setup_acpi_sci(char *s)
1807{
1808 if (!s)
1809 return -EINVAL;
1810 if (!strcmp(s, "edge"))
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AS
1811 acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE |
1812 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1a3f239d 1813 else if (!strcmp(s, "level"))
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AS
1814 acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
1815 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1a3f239d 1816 else if (!strcmp(s, "high"))
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AS
1817 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
1818 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1a3f239d 1819 else if (!strcmp(s, "low"))
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AS
1820 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
1821 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
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1822 else
1823 return -EINVAL;
1824 return 0;
1825}
1826early_param("acpi_sci", setup_acpi_sci);
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AM
1827
1828int __acpi_acquire_global_lock(unsigned int *lock)
1829{
1830 unsigned int old, new, val;
1831 do {
1832 old = *lock;
1833 new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1));
1834 val = cmpxchg(lock, old, new);
1835 } while (unlikely (val != old));
1836 return (new < 3) ? -1 : 0;
1837}
1838
1839int __acpi_release_global_lock(unsigned int *lock)
1840{
1841 unsigned int old, new, val;
1842 do {
1843 old = *lock;
1844 new = old & ~0x3;
1845 val = cmpxchg(lock, old, new);
1846 } while (unlikely (val != old));
1847 return old & 0x1;
1848}