[net-next-2.6.git] / arch / x86 / include / asm / pgtable_32.h

#ifndef _ASM_X86_PGTABLE_32_H
#define _ASM_X86_PGTABLE_32_H

#include <asm/pgtable_32_types.h>

/*
 * The Linux memory management assumes a three-level page table setup. On
 * the i386, we use that, but "fold" the mid level into the top-level page
 * table, so that we physically have the same two-level page table as the
 * i386 mmu expects.
 *
 * This file contains the functions and defines necessary to modify and use
 * the i386 page table tree.
 */
#ifndef __ASSEMBLY__
#include <asm/processor.h>
#include <asm/fixmap.h>
#include <linux/threads.h>
#include <asm/paravirt.h>

#include <linux/bitops.h>
#include <linux/list.h>
#include <linux/spinlock.h>

struct mm_struct;
struct vm_area_struct;

extern pgd_t swapper_pg_dir[1024];

static inline void pgtable_cache_init(void) { }
static inline void check_pgt_cache(void) { }
void paging_init(void);

extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);


/*
 * Define this if things work differently on an i386 and an i486:
 * it will (on an i486) warn about kernel memory accesses that are
 * done without a 'access_ok(VERIFY_WRITE,..)'
 */
#undef TEST_ACCESS_OK

#ifdef CONFIG_X86_PAE
# include <asm/pgtable-3level.h>
#else
# include <asm/pgtable-2level.h>
#endif

#if defined(CONFIG_HIGHPTE)
#define __KM_PTE			\
	(in_nmi() ? KM_NMI_PTE : 	\
	 in_irq() ? KM_IRQ_PTE :	\
	 KM_PTE0)
#define pte_offset_map(dir, address)					\
	((pte_t *)kmap_atomic(pmd_page(*(dir)), __KM_PTE) +		\
	 pte_index((address)))
#define pte_offset_map_nested(dir, address)				\
	((pte_t *)kmap_atomic(pmd_page(*(dir)), KM_PTE1) +		\
	 pte_index((address)))
#define pte_unmap(pte) kunmap_atomic((pte), __KM_PTE)
#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
#else
#define pte_offset_map(dir, address)					\
	((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
#define pte_unmap(pte) do { } while (0)
#define pte_unmap_nested(pte) do { } while (0)
#endif

/* Clear a kernel PTE and flush it from the TLB */
#define kpte_clear_flush(ptep, vaddr)		\
do {						\
	pte_clear(&init_mm, (vaddr), (ptep));	\
	__flush_tlb_one((vaddr));		\
} while (0)

/*
 * The i386 doesn't have any external MMU info: the kernel page
 * tables contain all the necessary information.
 */
#define update_mmu_cache(vma, address, ptep) do { } while (0)

#endif /* !__ASSEMBLY__ */

/*
 * kern_addr_valid() is (1) for FLATMEM and (0) for
 * SPARSEMEM and DISCONTIGMEM
 */
#ifdef CONFIG_FLATMEM
#define kern_addr_valid(addr)	(1)
#else
#define kern_addr_valid(kaddr)	(0)
#endif

#endif /* _ASM_X86_PGTABLE_32_H */
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_PGTABLE_32_H
1965aae3 PA	2	#define _ASM_X86_PGTABLE_32_H
1da177e4	3
f402a65f	4	#include <asm/pgtable_32_types.h>
1da177e4 LT	5
	6	/*
	7	* The Linux memory management assumes a three-level page table setup. On
	8	* the i386, we use that, but "fold" the mid level into the top-level page
	9	* table, so that we physically have the same two-level page table as the
	10	* i386 mmu expects.
	11	*
	12	* This file contains the functions and defines necessary to modify and use
	13	* the i386 page table tree.
	14	*/
	15	#ifndef __ASSEMBLY__
	16	#include <asm/processor.h>
	17	#include <asm/fixmap.h>
	18	#include <linux/threads.h>
da181a8b	19	#include <asm/paravirt.h>
1da177e4	20
1977f032	21	#include <linux/bitops.h>
1da177e4 LT	22	#include <linux/list.h>
	23	#include <linux/spinlock.h>
	24
8c65b4a6 TS	25	struct mm_struct;
	26	struct vm_area_struct;
	27
1da177e4	28	extern pgd_t swapper_pg_dir[1024];
1da177e4	29
985a34bd TG	30	static inline void pgtable_cache_init(void) { }
985a34bd TG	31	static inline void check_pgt_cache(void) { }
1da177e4 LT	32	void paging_init(void);
1da177e4 LT	33
01eb7858	34	extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
f1d1a842	35
e621bd18	36
1da177e4 LT	37	/*
	38	* Define this if things work differently on an i386 and an i486:
	39	* it will (on an i486) warn about kernel memory accesses that are
e49332bd	40	* done without a 'access_ok(VERIFY_WRITE,..)'
1da177e4	41	*/
e49332bd	42	#undef TEST_ACCESS_OK
1da177e4	43
1da177e4 LT	44	#ifdef CONFIG_X86_PAE
	45	# include <asm/pgtable-3level.h>
	46	#else
	47	# include <asm/pgtable-2level.h>
	48	#endif
	49
1da177e4	50	#if defined(CONFIG_HIGHPTE)
0990b1c6 PZ	51	#define __KM_PTE \
	52	(in_nmi() ? KM_NMI_PTE : \
	53	in_irq() ? KM_IRQ_PTE : \
	54	KM_PTE0)
cf840147	55	#define pte_offset_map(dir, address) \
dad52fc0	56	((pte_t )kmap_atomic(pmd_page((dir)), __KM_PTE) + \
cf840147 JP	57	pte_index((address)))
cf840147 JP	58	#define pte_offset_map_nested(dir, address) \
dad52fc0	59	((pte_t )kmap_atomic(pmd_page((dir)), KM_PTE1) + \
cf840147	60	pte_index((address)))
3ff0141a	61	#define pte_unmap(pte) kunmap_atomic((pte), __KM_PTE)
cf840147	62	#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
1da177e4	63	#else
cf840147 JP	64	#define pte_offset_map(dir, address) \
	65	((pte_t )page_address(pmd_page((dir))) + pte_index((address)))
	66	#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
1da177e4 LT	67	#define pte_unmap(pte) do { } while (0)
	68	#define pte_unmap_nested(pte) do { } while (0)
	69	#endif
	70
23002d88	71	/* Clear a kernel PTE and flush it from the TLB */
cf840147 JP	72	#define kpte_clear_flush(ptep, vaddr) \
	73	do { \
	74	pte_clear(&init_mm, (vaddr), (ptep)); \
	75	__flush_tlb_one((vaddr)); \
23002d88 ZA	76	} while (0)
23002d88 ZA	77
1da177e4 LT	78	/*
	79	* The i386 doesn't have any external MMU info: the kernel page
	80	* tables contain all the necessary information.
1da177e4	81	*/
4b3073e1	82	#define update_mmu_cache(vma, address, ptep) do { } while (0)
b239fb25	83
1da177e4 LT	84	#endif /* !__ASSEMBLY__ */
1da177e4 LT	85
4757d7d8 TG	86	/*
	87	* kern_addr_valid() is (1) for FLATMEM and (0) for
	88	* SPARSEMEM and DISCONTIGMEM
	89	*/
05b79bdc	90	#ifdef CONFIG_FLATMEM
1da177e4	91	#define kern_addr_valid(addr) (1)
4757d7d8 TG	92	#else
	93	#define kern_addr_valid(kaddr) (0)
	94	#endif
1da177e4	95
1965aae3	96	#endif /* _ASM_X86_PGTABLE_32_H */