[net-next-2.6.git] / arch / x86 / include / asm / percpu.h

#ifndef _ASM_X86_PERCPU_H
#define _ASM_X86_PERCPU_H

#ifdef CONFIG_X86_64
#define __percpu_seg		gs
#define __percpu_mov_op		movq
#else
#define __percpu_seg		fs
#define __percpu_mov_op		movl
#endif

#ifdef __ASSEMBLY__

/*
 * PER_CPU finds an address of a per-cpu variable.
 *
 * Args:
 *    var - variable name
 *    reg - 32bit register
 *
 * The resulting address is stored in the "reg" argument.
 *
 * Example:
 *    PER_CPU(cpu_gdt_descr, %ebx)
 */
#ifdef CONFIG_SMP
#define PER_CPU(var, reg)						\
	__percpu_mov_op %__percpu_seg:this_cpu_off, reg;		\
	lea var(reg), reg
#define PER_CPU_VAR(var)	%__percpu_seg:var
#else /* ! SMP */
#define PER_CPU(var, reg)	__percpu_mov_op $var, reg
#define PER_CPU_VAR(var)	var
#endif	/* SMP */

#ifdef CONFIG_X86_64_SMP
#define INIT_PER_CPU_VAR(var)  init_per_cpu__##var
#else
#define INIT_PER_CPU_VAR(var)  var
#endif

#else /* ...!ASSEMBLY */

#include <linux/kernel.h>
#include <linux/stringify.h>

#ifdef CONFIG_SMP
#define __percpu_arg(x)		"%%"__stringify(__percpu_seg)":%P" #x
#define __my_cpu_offset		percpu_read(this_cpu_off)
#else
#define __percpu_arg(x)		"%P" #x
#endif

/*
 * Initialized pointers to per-cpu variables needed for the boot
 * processor need to use these macros to get the proper address
 * offset from __per_cpu_load on SMP.
 *
 * There also must be an entry in vmlinux_64.lds.S
 */
#define DECLARE_INIT_PER_CPU(var) \
       extern typeof(var) init_per_cpu_var(var)

#ifdef CONFIG_X86_64_SMP
#define init_per_cpu_var(var)  init_per_cpu__##var
#else
#define init_per_cpu_var(var)  var
#endif

/* For arch-specific code, we can use direct single-insn ops (they
 * don't give an lvalue though). */
extern void __bad_percpu_size(void);

#define percpu_to_op(op, var, val)			\
do {							\
	typedef typeof(var) pto_T__;			\
	if (0) {					\
		pto_T__ pto_tmp__;			\
		pto_tmp__ = (val);			\
	}						\
	switch (sizeof(var)) {				\
	case 1:						\
		asm(op "b %1,"__percpu_arg(0)		\
		    : "+m" (var)			\
		    : "qi" ((pto_T__)(val)));		\
		break;					\
	case 2:						\
		asm(op "w %1,"__percpu_arg(0)		\
		    : "+m" (var)			\
		    : "ri" ((pto_T__)(val)));		\
		break;					\
	case 4:						\
		asm(op "l %1,"__percpu_arg(0)		\
		    : "+m" (var)			\
		    : "ri" ((pto_T__)(val)));		\
		break;					\
	case 8:						\
		asm(op "q %1,"__percpu_arg(0)		\
		    : "+m" (var)			\
		    : "re" ((pto_T__)(val)));		\
		break;					\
	default: __bad_percpu_size();			\
	}						\
} while (0)

/*
 * Generate a percpu add to memory instruction and optimize code
 * if one is added or subtracted.
 */
#define percpu_add_op(var, val)						\
do {									\
	typedef typeof(var) pao_T__;					\
	const int pao_ID__ = (__builtin_constant_p(val) &&		\
			      ((val) == 1 || (val) == -1)) ? (val) : 0;	\
	if (0) {							\
		pao_T__ pao_tmp__;					\
		pao_tmp__ = (val);					\
	}								\
	switch (sizeof(var)) {						\
	case 1:								\
		if (pao_ID__ == 1)					\
			asm("incb "__percpu_arg(0) : "+m" (var));	\
		else if (pao_ID__ == -1)				\
			asm("decb "__percpu_arg(0) : "+m" (var));	\
		else							\
			asm("addb %1, "__percpu_arg(0)			\
			    : "+m" (var)				\
			    : "qi" ((pao_T__)(val)));			\
		break;							\
	case 2:								\
		if (pao_ID__ == 1)					\
			asm("incw "__percpu_arg(0) : "+m" (var));	\
		else if (pao_ID__ == -1)				\
			asm("decw "__percpu_arg(0) : "+m" (var));	\
		else							\
			asm("addw %1, "__percpu_arg(0)			\
			    : "+m" (var)				\
			    : "ri" ((pao_T__)(val)));			\
		break;							\
	case 4:								\
		if (pao_ID__ == 1)					\
			asm("incl "__percpu_arg(0) : "+m" (var));	\
		else if (pao_ID__ == -1)				\
			asm("decl "__percpu_arg(0) : "+m" (var));	\
		else							\
			asm("addl %1, "__percpu_arg(0)			\
			    : "+m" (var)				\
			    : "ri" ((pao_T__)(val)));			\
		break;							\
	case 8:								\
		if (pao_ID__ == 1)					\
			asm("incq "__percpu_arg(0) : "+m" (var));	\
		else if (pao_ID__ == -1)				\
			asm("decq "__percpu_arg(0) : "+m" (var));	\
		else							\
			asm("addq %1, "__percpu_arg(0)			\
			    : "+m" (var)				\
			    : "re" ((pao_T__)(val)));			\
		break;							\
	default: __bad_percpu_size();					\
	}								\
} while (0)

#define percpu_from_op(op, var, constraint)		\
({							\
	typeof(var) pfo_ret__;				\
	switch (sizeof(var)) {				\
	case 1:						\
		asm(op "b "__percpu_arg(1)",%0"		\
		    : "=q" (pfo_ret__)			\
		    : constraint);			\
		break;					\
	case 2:						\
		asm(op "w "__percpu_arg(1)",%0"		\
		    : "=r" (pfo_ret__)			\
		    : constraint);			\
		break;					\
	case 4:						\
		asm(op "l "__percpu_arg(1)",%0"		\
		    : "=r" (pfo_ret__)			\
		    : constraint);			\
		break;					\
	case 8:						\
		asm(op "q "__percpu_arg(1)",%0"		\
		    : "=r" (pfo_ret__)			\
		    : constraint);			\
		break;					\
	default: __bad_percpu_size();			\
	}						\
	pfo_ret__;					\
})

#define percpu_unary_op(op, var)			\
({							\
	switch (sizeof(var)) {				\
	case 1:						\
		asm(op "b "__percpu_arg(0)		\
		    : "+m" (var));			\
		break;					\
	case 2:						\
		asm(op "w "__percpu_arg(0)		\
		    : "+m" (var));			\
		break;					\
	case 4:						\
		asm(op "l "__percpu_arg(0)		\
		    : "+m" (var));			\
		break;					\
	case 8:						\
		asm(op "q "__percpu_arg(0)		\
		    : "+m" (var));			\
		break;					\
	default: __bad_percpu_size();			\
	}						\
})

/*
 * percpu_read() makes gcc load the percpu variable every time it is
 * accessed while percpu_read_stable() allows the value to be cached.
 * percpu_read_stable() is more efficient and can be used if its value
 * is guaranteed to be valid across cpus.  The current users include
 * get_current() and get_thread_info() both of which are actually
 * per-thread variables implemented as per-cpu variables and thus
 * stable for the duration of the respective task.
 */
#define percpu_read(var)		percpu_from_op("mov", var, "m" (var))
#define percpu_read_stable(var)		percpu_from_op("mov", var, "p" (&(var)))
#define percpu_write(var, val)		percpu_to_op("mov", var, val)
#define percpu_add(var, val)		percpu_add_op(var, val)
#define percpu_sub(var, val)		percpu_add_op(var, -(val))
#define percpu_and(var, val)		percpu_to_op("and", var, val)
#define percpu_or(var, val)		percpu_to_op("or", var, val)
#define percpu_xor(var, val)		percpu_to_op("xor", var, val)
#define percpu_inc(var)		percpu_unary_op("inc", var)

#define __this_cpu_read_1(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))
#define __this_cpu_read_2(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))
#define __this_cpu_read_4(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))

#define __this_cpu_write_1(pcp, val)	percpu_to_op("mov", (pcp), val)
#define __this_cpu_write_2(pcp, val)	percpu_to_op("mov", (pcp), val)
#define __this_cpu_write_4(pcp, val)	percpu_to_op("mov", (pcp), val)
#define __this_cpu_add_1(pcp, val)	percpu_add_op((pcp), val)
#define __this_cpu_add_2(pcp, val)	percpu_add_op((pcp), val)
#define __this_cpu_add_4(pcp, val)	percpu_add_op((pcp), val)
#define __this_cpu_and_1(pcp, val)	percpu_to_op("and", (pcp), val)
#define __this_cpu_and_2(pcp, val)	percpu_to_op("and", (pcp), val)
#define __this_cpu_and_4(pcp, val)	percpu_to_op("and", (pcp), val)
#define __this_cpu_or_1(pcp, val)	percpu_to_op("or", (pcp), val)
#define __this_cpu_or_2(pcp, val)	percpu_to_op("or", (pcp), val)
#define __this_cpu_or_4(pcp, val)	percpu_to_op("or", (pcp), val)
#define __this_cpu_xor_1(pcp, val)	percpu_to_op("xor", (pcp), val)
#define __this_cpu_xor_2(pcp, val)	percpu_to_op("xor", (pcp), val)
#define __this_cpu_xor_4(pcp, val)	percpu_to_op("xor", (pcp), val)

#define this_cpu_read_1(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))
#define this_cpu_read_2(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))
#define this_cpu_read_4(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))
#define this_cpu_write_1(pcp, val)	percpu_to_op("mov", (pcp), val)
#define this_cpu_write_2(pcp, val)	percpu_to_op("mov", (pcp), val)
#define this_cpu_write_4(pcp, val)	percpu_to_op("mov", (pcp), val)
#define this_cpu_add_1(pcp, val)	percpu_add_op((pcp), val)
#define this_cpu_add_2(pcp, val)	percpu_add_op((pcp), val)
#define this_cpu_add_4(pcp, val)	percpu_add_op((pcp), val)
#define this_cpu_and_1(pcp, val)	percpu_to_op("and", (pcp), val)
#define this_cpu_and_2(pcp, val)	percpu_to_op("and", (pcp), val)
#define this_cpu_and_4(pcp, val)	percpu_to_op("and", (pcp), val)
#define this_cpu_or_1(pcp, val)		percpu_to_op("or", (pcp), val)
#define this_cpu_or_2(pcp, val)		percpu_to_op("or", (pcp), val)
#define this_cpu_or_4(pcp, val)		percpu_to_op("or", (pcp), val)
#define this_cpu_xor_1(pcp, val)	percpu_to_op("xor", (pcp), val)
#define this_cpu_xor_2(pcp, val)	percpu_to_op("xor", (pcp), val)
#define this_cpu_xor_4(pcp, val)	percpu_to_op("xor", (pcp), val)

#define irqsafe_cpu_add_1(pcp, val)	percpu_add_op((pcp), val)
#define irqsafe_cpu_add_2(pcp, val)	percpu_add_op((pcp), val)
#define irqsafe_cpu_add_4(pcp, val)	percpu_add_op((pcp), val)
#define irqsafe_cpu_and_1(pcp, val)	percpu_to_op("and", (pcp), val)
#define irqsafe_cpu_and_2(pcp, val)	percpu_to_op("and", (pcp), val)
#define irqsafe_cpu_and_4(pcp, val)	percpu_to_op("and", (pcp), val)
#define irqsafe_cpu_or_1(pcp, val)	percpu_to_op("or", (pcp), val)
#define irqsafe_cpu_or_2(pcp, val)	percpu_to_op("or", (pcp), val)
#define irqsafe_cpu_or_4(pcp, val)	percpu_to_op("or", (pcp), val)
#define irqsafe_cpu_xor_1(pcp, val)	percpu_to_op("xor", (pcp), val)
#define irqsafe_cpu_xor_2(pcp, val)	percpu_to_op("xor", (pcp), val)
#define irqsafe_cpu_xor_4(pcp, val)	percpu_to_op("xor", (pcp), val)

/*
 * Per cpu atomic 64 bit operations are only available under 64 bit.
 * 32 bit must fall back to generic operations.
 */
#ifdef CONFIG_X86_64
#define __this_cpu_read_8(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))
#define __this_cpu_write_8(pcp, val)	percpu_to_op("mov", (pcp), val)
#define __this_cpu_add_8(pcp, val)	percpu_add_op((pcp), val)
#define __this_cpu_and_8(pcp, val)	percpu_to_op("and", (pcp), val)
#define __this_cpu_or_8(pcp, val)	percpu_to_op("or", (pcp), val)
#define __this_cpu_xor_8(pcp, val)	percpu_to_op("xor", (pcp), val)

#define this_cpu_read_8(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))
#define this_cpu_write_8(pcp, val)	percpu_to_op("mov", (pcp), val)
#define this_cpu_add_8(pcp, val)	percpu_add_op((pcp), val)
#define this_cpu_and_8(pcp, val)	percpu_to_op("and", (pcp), val)
#define this_cpu_or_8(pcp, val)		percpu_to_op("or", (pcp), val)
#define this_cpu_xor_8(pcp, val)	percpu_to_op("xor", (pcp), val)

#define irqsafe_cpu_add_8(pcp, val)	percpu_add_op((pcp), val)
#define irqsafe_cpu_and_8(pcp, val)	percpu_to_op("and", (pcp), val)
#define irqsafe_cpu_or_8(pcp, val)	percpu_to_op("or", (pcp), val)
#define irqsafe_cpu_xor_8(pcp, val)	percpu_to_op("xor", (pcp), val)

#endif

/* This is not atomic against other CPUs -- CPU preemption needs to be off */
#define x86_test_and_clear_bit_percpu(bit, var)				\
({									\
	int old__;							\
	asm volatile("btr %2,"__percpu_arg(1)"\n\tsbbl %0,%0"		\
		     : "=r" (old__), "+m" (var)				\
		     : "dIr" (bit));					\
	old__;								\
})

#include <asm-generic/percpu.h>

/* We can use this directly for local CPU (faster). */
DECLARE_PER_CPU(unsigned long, this_cpu_off);

#endif /* !__ASSEMBLY__ */

#ifdef CONFIG_SMP

/*
 * Define the "EARLY_PER_CPU" macros.  These are used for some per_cpu
 * variables that are initialized and accessed before there are per_cpu
 * areas allocated.
 */

#define	DEFINE_EARLY_PER_CPU(_type, _name, _initvalue)			\
	DEFINE_PER_CPU(_type, _name) = _initvalue;			\
	__typeof__(_type) _name##_early_map[NR_CPUS] __initdata =	\
				{ [0 ... NR_CPUS-1] = _initvalue };	\
	__typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map

#define EXPORT_EARLY_PER_CPU_SYMBOL(_name)			\
	EXPORT_PER_CPU_SYMBOL(_name)

#define DECLARE_EARLY_PER_CPU(_type, _name)			\
	DECLARE_PER_CPU(_type, _name);				\
	extern __typeof__(_type) *_name##_early_ptr;		\
	extern __typeof__(_type)  _name##_early_map[]

#define	early_per_cpu_ptr(_name) (_name##_early_ptr)
#define	early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])
#define	early_per_cpu(_name, _cpu) 				\
	*(early_per_cpu_ptr(_name) ?				\
		&early_per_cpu_ptr(_name)[_cpu] :		\
		&per_cpu(_name, _cpu))

#else	/* !CONFIG_SMP */
#define	DEFINE_EARLY_PER_CPU(_type, _name, _initvalue)		\
	DEFINE_PER_CPU(_type, _name) = _initvalue

#define EXPORT_EARLY_PER_CPU_SYMBOL(_name)			\
	EXPORT_PER_CPU_SYMBOL(_name)

#define DECLARE_EARLY_PER_CPU(_type, _name)			\
	DECLARE_PER_CPU(_type, _name)

#define	early_per_cpu(_name, _cpu) per_cpu(_name, _cpu)
#define	early_per_cpu_ptr(_name) NULL
/* no early_per_cpu_map() */

#endif	/* !CONFIG_SMP */

#endif /* _ASM_X86_PERCPU_H */
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_PERCPU_H
1965aae3 PA	2	#define _ASM_X86_PERCPU_H
3334052a	3
1a51e3a0	4	#ifdef CONFIG_X86_64
9939ddaf TH	5	#define __percpu_seg gs
9939ddaf TH	6	#define __percpu_mov_op movq
1a51e3a0	7	#else
9939ddaf TH	8	#define __percpu_seg fs
9939ddaf TH	9	#define __percpu_mov_op movl
96a388de	10	#endif
3334052a	11
	12	#ifdef __ASSEMBLY__
	13
	14	/*
	15	* PER_CPU finds an address of a per-cpu variable.
	16	*
	17	* Args:
	18	* var - variable name
	19	* reg - 32bit register
	20	*
	21	* The resulting address is stored in the "reg" argument.
	22	*
	23	* Example:
	24	* PER_CPU(cpu_gdt_descr, %ebx)
	25	*/
	26	#ifdef CONFIG_SMP
9939ddaf	27	#define PER_CPU(var, reg) \
dd17c8f7 RR	28	__percpu_mov_op %__percpu_seg:this_cpu_off, reg; \
	29	lea var(reg), reg
	30	#define PER_CPU_VAR(var) %__percpu_seg:var
3334052a	31	#else /* ! SMP */
dd17c8f7 RR	32	#define PER_CPU(var, reg) __percpu_mov_op $var, reg
dd17c8f7 RR	33	#define PER_CPU_VAR(var) var
3334052a	34	#endif /* SMP */
3334052a	35
2add8e23 BG	36	#ifdef CONFIG_X86_64_SMP
	37	#define INIT_PER_CPU_VAR(var) init_per_cpu__##var
	38	#else
dd17c8f7	39	#define INIT_PER_CPU_VAR(var) var
2add8e23 BG	40	#endif
2add8e23 BG	41
3334052a	42	#else /* ...!ASSEMBLY */
3334052a	43
e59a1bb2	44	#include <linux/kernel.h>
9939ddaf	45	#include <linux/stringify.h>
3334052a	46
9939ddaf	47	#ifdef CONFIG_SMP
87b26406	48	#define __percpu_arg(x) "%%"__stringify(__percpu_seg)":%P" #x
6dbde353	49	#define __my_cpu_offset percpu_read(this_cpu_off)
9939ddaf	50	#else
ed8d9adf	51	#define __percpu_arg(x) "%P" #x
9939ddaf	52	#endif
3334052a	53
2add8e23 BG	54	/*
	55	* Initialized pointers to per-cpu variables needed for the boot
	56	* processor need to use these macros to get the proper address
	57	* offset from __per_cpu_load on SMP.
	58	*
	59	* There also must be an entry in vmlinux_64.lds.S
	60	*/
	61	#define DECLARE_INIT_PER_CPU(var) \
dd17c8f7	62	extern typeof(var) init_per_cpu_var(var)
2add8e23 BG	63
	64	#ifdef CONFIG_X86_64_SMP
	65	#define init_per_cpu_var(var) init_per_cpu__##var
	66	#else
dd17c8f7	67	#define init_per_cpu_var(var) var
2add8e23 BG	68	#endif
2add8e23 BG	69
3334052a	70	/* For arch-specific code, we can use direct single-insn ops (they
	71	* don't give an lvalue though). */
	72	extern void __bad_percpu_size(void);
	73
bc9e3be2 JP	74	#define percpu_to_op(op, var, val) \
bc9e3be2 JP	75	do { \
0f5e4816	76	typedef typeof(var) pto_T__; \
bc9e3be2	77	if (0) { \
0f5e4816 TH	78	pto_T__ pto_tmp__; \
0f5e4816 TH	79	pto_tmp__ = (val); \
bc9e3be2 JP	80	} \
	81	switch (sizeof(var)) { \
	82	case 1: \
87b26406	83	asm(op "b %1,"__percpu_arg(0) \
bc9e3be2	84	: "+m" (var) \
0f5e4816	85	: "qi" ((pto_T__)(val))); \
bc9e3be2 JP	86	break; \
bc9e3be2 JP	87	case 2: \
87b26406	88	asm(op "w %1,"__percpu_arg(0) \
bc9e3be2	89	: "+m" (var) \
0f5e4816	90	: "ri" ((pto_T__)(val))); \
bc9e3be2 JP	91	break; \
bc9e3be2 JP	92	case 4: \
87b26406	93	asm(op "l %1,"__percpu_arg(0) \
bc9e3be2	94	: "+m" (var) \
0f5e4816	95	: "ri" ((pto_T__)(val))); \
bc9e3be2	96	break; \
9939ddaf	97	case 8: \
87b26406	98	asm(op "q %1,"__percpu_arg(0) \
9939ddaf	99	: "+m" (var) \
0f5e4816	100	: "re" ((pto_T__)(val))); \
9939ddaf	101	break; \
bc9e3be2 JP	102	default: __bad_percpu_size(); \
	103	} \
	104	} while (0)
	105
5917dae8 CL	106	/*
5917dae8 CL	107	* Generate a percpu add to memory instruction and optimize code
40f0a5d0	108	* if one is added or subtracted.
5917dae8 CL	109	*/
	110	#define percpu_add_op(var, val) \
	111	do { \
	112	typedef typeof(var) pao_T__; \
	113	const int pao_ID__ = (__builtin_constant_p(val) && \
	114	((val) == 1 \|\| (val) == -1)) ? (val) : 0; \
	115	if (0) { \
	116	pao_T__ pao_tmp__; \
	117	pao_tmp__ = (val); \
	118	} \
	119	switch (sizeof(var)) { \
	120	case 1: \
	121	if (pao_ID__ == 1) \
	122	asm("incb "__percpu_arg(0) : "+m" (var)); \
	123	else if (pao_ID__ == -1) \
	124	asm("decb "__percpu_arg(0) : "+m" (var)); \
	125	else \
	126	asm("addb %1, "__percpu_arg(0) \
	127	: "+m" (var) \
	128	: "qi" ((pao_T__)(val))); \
	129	break; \
	130	case 2: \
	131	if (pao_ID__ == 1) \
	132	asm("incw "__percpu_arg(0) : "+m" (var)); \
	133	else if (pao_ID__ == -1) \
	134	asm("decw "__percpu_arg(0) : "+m" (var)); \
	135	else \
	136	asm("addw %1, "__percpu_arg(0) \
	137	: "+m" (var) \
	138	: "ri" ((pao_T__)(val))); \
	139	break; \
	140	case 4: \
	141	if (pao_ID__ == 1) \
	142	asm("incl "__percpu_arg(0) : "+m" (var)); \
	143	else if (pao_ID__ == -1) \
	144	asm("decl "__percpu_arg(0) : "+m" (var)); \
	145	else \
	146	asm("addl %1, "__percpu_arg(0) \
	147	: "+m" (var) \
	148	: "ri" ((pao_T__)(val))); \
	149	break; \
	150	case 8: \
	151	if (pao_ID__ == 1) \
	152	asm("incq "__percpu_arg(0) : "+m" (var)); \
	153	else if (pao_ID__ == -1) \
	154	asm("decq "__percpu_arg(0) : "+m" (var)); \
	155	else \
	156	asm("addq %1, "__percpu_arg(0) \
	157	: "+m" (var) \
	158	: "re" ((pao_T__)(val))); \
	159	break; \
	160	default: __bad_percpu_size(); \
	161	} \
	162	} while (0)
	163
ed8d9adf	164	#define percpu_from_op(op, var, constraint) \
bc9e3be2	165	({ \
0f5e4816	166	typeof(var) pfo_ret__; \
bc9e3be2 JP	167	switch (sizeof(var)) { \
bc9e3be2 JP	168	case 1: \
87b26406	169	asm(op "b "__percpu_arg(1)",%0" \
0f5e4816	170	: "=q" (pfo_ret__) \
ed8d9adf	171	: constraint); \
bc9e3be2 JP	172	break; \
bc9e3be2 JP	173	case 2: \
87b26406	174	asm(op "w "__percpu_arg(1)",%0" \
0f5e4816	175	: "=r" (pfo_ret__) \
ed8d9adf	176	: constraint); \
bc9e3be2 JP	177	break; \
bc9e3be2 JP	178	case 4: \
87b26406	179	asm(op "l "__percpu_arg(1)",%0" \
0f5e4816	180	: "=r" (pfo_ret__) \
ed8d9adf	181	: constraint); \
9939ddaf TH	182	break; \
9939ddaf TH	183	case 8: \
87b26406	184	asm(op "q "__percpu_arg(1)",%0" \
0f5e4816	185	: "=r" (pfo_ret__) \
ed8d9adf	186	: constraint); \
bc9e3be2 JP	187	break; \
	188	default: __bad_percpu_size(); \
	189	} \
0f5e4816	190	pfo_ret__; \
bc9e3be2	191	})
3334052a	192
402af0d7 JB	193	#define percpu_unary_op(op, var) \
	194	({ \
	195	switch (sizeof(var)) { \
	196	case 1: \
	197	asm(op "b "__percpu_arg(0) \
	198	: "+m" (var)); \
	199	break; \
	200	case 2: \
	201	asm(op "w "__percpu_arg(0) \
	202	: "+m" (var)); \
	203	break; \
	204	case 4: \
	205	asm(op "l "__percpu_arg(0) \
	206	: "+m" (var)); \
	207	break; \
	208	case 8: \
	209	asm(op "q "__percpu_arg(0) \
	210	: "+m" (var)); \
	211	break; \
	212	default: __bad_percpu_size(); \
	213	} \
	214	})
	215
ed8d9adf LT	216	/*
	217	* percpu_read() makes gcc load the percpu variable every time it is
	218	* accessed while percpu_read_stable() allows the value to be cached.
	219	* percpu_read_stable() is more efficient and can be used if its value
	220	* is guaranteed to be valid across cpus. The current users include
	221	* get_current() and get_thread_info() both of which are actually
	222	* per-thread variables implemented as per-cpu variables and thus
	223	* stable for the duration of the respective task.
	224	*/
dd17c8f7 RR	225	#define percpu_read(var) percpu_from_op("mov", var, "m" (var))
	226	#define percpu_read_stable(var) percpu_from_op("mov", var, "p" (&(var)))
	227	#define percpu_write(var, val) percpu_to_op("mov", var, val)
5917dae8 CL	228	#define percpu_add(var, val) percpu_add_op(var, val)
5917dae8 CL	229	#define percpu_sub(var, val) percpu_add_op(var, -(val))
dd17c8f7 RR	230	#define percpu_and(var, val) percpu_to_op("and", var, val)
	231	#define percpu_or(var, val) percpu_to_op("or", var, val)
	232	#define percpu_xor(var, val) percpu_to_op("xor", var, val)
402af0d7	233	#define percpu_inc(var) percpu_unary_op("inc", var)
9939ddaf	234
30ed1a79 CL	235	#define __this_cpu_read_1(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
	236	#define __this_cpu_read_2(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
	237	#define __this_cpu_read_4(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
	238
	239	#define __this_cpu_write_1(pcp, val) percpu_to_op("mov", (pcp), val)
	240	#define __this_cpu_write_2(pcp, val) percpu_to_op("mov", (pcp), val)
	241	#define __this_cpu_write_4(pcp, val) percpu_to_op("mov", (pcp), val)
5917dae8 CL	242	#define __this_cpu_add_1(pcp, val) percpu_add_op((pcp), val)
	243	#define __this_cpu_add_2(pcp, val) percpu_add_op((pcp), val)
	244	#define __this_cpu_add_4(pcp, val) percpu_add_op((pcp), val)
30ed1a79 CL	245	#define __this_cpu_and_1(pcp, val) percpu_to_op("and", (pcp), val)
	246	#define __this_cpu_and_2(pcp, val) percpu_to_op("and", (pcp), val)
	247	#define __this_cpu_and_4(pcp, val) percpu_to_op("and", (pcp), val)
	248	#define __this_cpu_or_1(pcp, val) percpu_to_op("or", (pcp), val)
	249	#define __this_cpu_or_2(pcp, val) percpu_to_op("or", (pcp), val)
	250	#define __this_cpu_or_4(pcp, val) percpu_to_op("or", (pcp), val)
	251	#define __this_cpu_xor_1(pcp, val) percpu_to_op("xor", (pcp), val)
	252	#define __this_cpu_xor_2(pcp, val) percpu_to_op("xor", (pcp), val)
	253	#define __this_cpu_xor_4(pcp, val) percpu_to_op("xor", (pcp), val)
	254
	255	#define this_cpu_read_1(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
	256	#define this_cpu_read_2(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
	257	#define this_cpu_read_4(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
	258	#define this_cpu_write_1(pcp, val) percpu_to_op("mov", (pcp), val)
	259	#define this_cpu_write_2(pcp, val) percpu_to_op("mov", (pcp), val)
	260	#define this_cpu_write_4(pcp, val) percpu_to_op("mov", (pcp), val)
5917dae8 CL	261	#define this_cpu_add_1(pcp, val) percpu_add_op((pcp), val)
	262	#define this_cpu_add_2(pcp, val) percpu_add_op((pcp), val)
	263	#define this_cpu_add_4(pcp, val) percpu_add_op((pcp), val)
30ed1a79 CL	264	#define this_cpu_and_1(pcp, val) percpu_to_op("and", (pcp), val)
	265	#define this_cpu_and_2(pcp, val) percpu_to_op("and", (pcp), val)
	266	#define this_cpu_and_4(pcp, val) percpu_to_op("and", (pcp), val)
	267	#define this_cpu_or_1(pcp, val) percpu_to_op("or", (pcp), val)
	268	#define this_cpu_or_2(pcp, val) percpu_to_op("or", (pcp), val)
	269	#define this_cpu_or_4(pcp, val) percpu_to_op("or", (pcp), val)
	270	#define this_cpu_xor_1(pcp, val) percpu_to_op("xor", (pcp), val)
	271	#define this_cpu_xor_2(pcp, val) percpu_to_op("xor", (pcp), val)
	272	#define this_cpu_xor_4(pcp, val) percpu_to_op("xor", (pcp), val)
	273
5917dae8 CL	274	#define irqsafe_cpu_add_1(pcp, val) percpu_add_op((pcp), val)
	275	#define irqsafe_cpu_add_2(pcp, val) percpu_add_op((pcp), val)
	276	#define irqsafe_cpu_add_4(pcp, val) percpu_add_op((pcp), val)
30ed1a79 CL	277	#define irqsafe_cpu_and_1(pcp, val) percpu_to_op("and", (pcp), val)
	278	#define irqsafe_cpu_and_2(pcp, val) percpu_to_op("and", (pcp), val)
	279	#define irqsafe_cpu_and_4(pcp, val) percpu_to_op("and", (pcp), val)
	280	#define irqsafe_cpu_or_1(pcp, val) percpu_to_op("or", (pcp), val)
	281	#define irqsafe_cpu_or_2(pcp, val) percpu_to_op("or", (pcp), val)
	282	#define irqsafe_cpu_or_4(pcp, val) percpu_to_op("or", (pcp), val)
	283	#define irqsafe_cpu_xor_1(pcp, val) percpu_to_op("xor", (pcp), val)
	284	#define irqsafe_cpu_xor_2(pcp, val) percpu_to_op("xor", (pcp), val)
	285	#define irqsafe_cpu_xor_4(pcp, val) percpu_to_op("xor", (pcp), val)
	286
	287	/*
	288	* Per cpu atomic 64 bit operations are only available under 64 bit.
	289	* 32 bit must fall back to generic operations.
	290	*/
	291	#ifdef CONFIG_X86_64
	292	#define __this_cpu_read_8(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
	293	#define __this_cpu_write_8(pcp, val) percpu_to_op("mov", (pcp), val)
5917dae8	294	#define __this_cpu_add_8(pcp, val) percpu_add_op((pcp), val)
30ed1a79 CL	295	#define __this_cpu_and_8(pcp, val) percpu_to_op("and", (pcp), val)
	296	#define __this_cpu_or_8(pcp, val) percpu_to_op("or", (pcp), val)
	297	#define __this_cpu_xor_8(pcp, val) percpu_to_op("xor", (pcp), val)
	298
	299	#define this_cpu_read_8(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
	300	#define this_cpu_write_8(pcp, val) percpu_to_op("mov", (pcp), val)
5917dae8	301	#define this_cpu_add_8(pcp, val) percpu_add_op((pcp), val)
30ed1a79 CL	302	#define this_cpu_and_8(pcp, val) percpu_to_op("and", (pcp), val)
	303	#define this_cpu_or_8(pcp, val) percpu_to_op("or", (pcp), val)
	304	#define this_cpu_xor_8(pcp, val) percpu_to_op("xor", (pcp), val)
	305
5917dae8	306	#define irqsafe_cpu_add_8(pcp, val) percpu_add_op((pcp), val)
30ed1a79 CL	307	#define irqsafe_cpu_and_8(pcp, val) percpu_to_op("and", (pcp), val)
	308	#define irqsafe_cpu_or_8(pcp, val) percpu_to_op("or", (pcp), val)
	309	#define irqsafe_cpu_xor_8(pcp, val) percpu_to_op("xor", (pcp), val)
	310
	311	#endif
	312
49357d19 TH	313	/* This is not atomic against other CPUs -- CPU preemption needs to be off */
	314	#define x86_test_and_clear_bit_percpu(bit, var) \
	315	({ \
	316	int old__; \
87b26406	317	asm volatile("btr %2,"__percpu_arg(1)"\n\tsbbl %0,%0" \
dd17c8f7	318	: "=r" (old__), "+m" (var) \
87b26406	319	: "dIr" (bit)); \
49357d19 TH	320	old__; \
	321	})
	322
6dbde353 IM	323	#include <asm-generic/percpu.h>
	324
	325	/* We can use this directly for local CPU (faster). */
	326	DECLARE_PER_CPU(unsigned long, this_cpu_off);
	327
3334052a	328	#endif /* !__ASSEMBLY__ */
23ca4bba MT	329
	330	#ifdef CONFIG_SMP
	331
	332	/*
	333	* Define the "EARLY_PER_CPU" macros. These are used for some per_cpu
	334	* variables that are initialized and accessed before there are per_cpu
	335	* areas allocated.
	336	*/
	337
	338	#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
	339	DEFINE_PER_CPU(_type, _name) = _initvalue; \
	340	__typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
	341	{ [0 ... NR_CPUS-1] = _initvalue }; \
c6a92a25	342	__typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
23ca4bba MT	343
	344	#define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
	345	EXPORT_PER_CPU_SYMBOL(_name)
	346
	347	#define DECLARE_EARLY_PER_CPU(_type, _name) \
	348	DECLARE_PER_CPU(_type, _name); \
	349	extern __typeof__(_type) *_name##_early_ptr; \
	350	extern __typeof__(_type) _name##_early_map[]
	351
	352	#define early_per_cpu_ptr(_name) (_name##_early_ptr)
	353	#define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])
	354	#define early_per_cpu(_name, _cpu) \
f10fcd47 TH	355	*(early_per_cpu_ptr(_name) ? \
	356	&early_per_cpu_ptr(_name)[_cpu] : \
	357	&per_cpu(_name, _cpu))
23ca4bba MT	358
	359	#else /* !CONFIG_SMP */
	360	#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
	361	DEFINE_PER_CPU(_type, _name) = _initvalue
	362
	363	#define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
	364	EXPORT_PER_CPU_SYMBOL(_name)
	365
	366	#define DECLARE_EARLY_PER_CPU(_type, _name) \
	367	DECLARE_PER_CPU(_type, _name)
	368
	369	#define early_per_cpu(_name, _cpu) per_cpu(_name, _cpu)
	370	#define early_per_cpu_ptr(_name) NULL
	371	/* no early_per_cpu_map() */
	372
	373	#endif /* !CONFIG_SMP */
	374
1965aae3	375	#endif /* _ASM_X86_PERCPU_H */