[net-next-2.6.git] / arch / x86 / include / asm / hpet.h

#ifndef _ASM_X86_HPET_H
#define _ASM_X86_HPET_H

#include <linux/msi.h>

#ifdef CONFIG_HPET_TIMER

#define HPET_MMAP_SIZE		1024

#define HPET_ID			0x000
#define HPET_PERIOD		0x004
#define HPET_CFG		0x010
#define HPET_STATUS		0x020
#define HPET_COUNTER		0x0f0

#define HPET_Tn_CFG(n)		(0x100 + 0x20 * n)
#define HPET_Tn_CMP(n)		(0x108 + 0x20 * n)
#define HPET_Tn_ROUTE(n)	(0x110 + 0x20 * n)

#define HPET_T0_CFG		0x100
#define HPET_T0_CMP		0x108
#define HPET_T0_ROUTE		0x110
#define HPET_T1_CFG		0x120
#define HPET_T1_CMP		0x128
#define HPET_T1_ROUTE		0x130
#define HPET_T2_CFG		0x140
#define HPET_T2_CMP		0x148
#define HPET_T2_ROUTE		0x150

#define HPET_ID_REV		0x000000ff
#define HPET_ID_NUMBER		0x00001f00
#define HPET_ID_64BIT		0x00002000
#define HPET_ID_LEGSUP		0x00008000
#define HPET_ID_VENDOR		0xffff0000
#define	HPET_ID_NUMBER_SHIFT	8
#define HPET_ID_VENDOR_SHIFT	16

#define HPET_ID_VENDOR_8086	0x8086

#define HPET_CFG_ENABLE		0x001
#define HPET_CFG_LEGACY		0x002
#define	HPET_LEGACY_8254	2
#define	HPET_LEGACY_RTC		8

#define HPET_TN_LEVEL		0x0002
#define HPET_TN_ENABLE		0x0004
#define HPET_TN_PERIODIC	0x0008
#define HPET_TN_PERIODIC_CAP	0x0010
#define HPET_TN_64BIT_CAP	0x0020
#define HPET_TN_SETVAL		0x0040
#define HPET_TN_32BIT		0x0100
#define HPET_TN_ROUTE		0x3e00
#define HPET_TN_FSB		0x4000
#define HPET_TN_FSB_CAP		0x8000
#define HPET_TN_ROUTE_SHIFT	9

/* Max HPET Period is 10^8 femto sec as in HPET spec */
#define HPET_MAX_PERIOD		100000000UL
/*
 * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
 * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
 */
#define HPET_MIN_PERIOD		100000UL

/* hpet memory map physical address */
extern unsigned long hpet_address;
extern unsigned long force_hpet_address;
extern u8 hpet_blockid;
extern int hpet_force_user;
extern u8 hpet_msi_disable;
extern int is_hpet_enabled(void);
extern int hpet_enable(void);
extern void hpet_disable(void);
extern unsigned int hpet_readl(unsigned int a);
extern void force_hpet_resume(void);

extern void hpet_msi_unmask(unsigned int irq);
extern void hpet_msi_mask(unsigned int irq);
extern void hpet_msi_write(unsigned int irq, struct msi_msg *msg);
extern void hpet_msi_read(unsigned int irq, struct msi_msg *msg);

#ifdef CONFIG_PCI_MSI
extern int arch_setup_hpet_msi(unsigned int irq, unsigned int id);
#else
static inline int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
{
	return -EINVAL;
}
#endif

#ifdef CONFIG_HPET_EMULATE_RTC

#include <linux/interrupt.h>

typedef irqreturn_t (*rtc_irq_handler)(int interrupt, void *cookie);
extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
			       unsigned char sec);
extern int hpet_set_periodic_freq(unsigned long freq);
extern int hpet_rtc_dropped_irq(void);
extern int hpet_rtc_timer_init(void);
extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
extern int hpet_register_irq_handler(rtc_irq_handler handler);
extern void hpet_unregister_irq_handler(rtc_irq_handler handler);

#endif /* CONFIG_HPET_EMULATE_RTC */

#else /* CONFIG_HPET_TIMER */

static inline int hpet_enable(void) { return 0; }
static inline int is_hpet_enabled(void) { return 0; }
#define hpet_readl(a) 0

#endif
#endif /* _ASM_X86_HPET_H */
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_HPET_H
1965aae3 PA	2	#define _ASM_X86_HPET_H
b8ce3359	3
58ac1e76	4	#include <linux/msi.h>
58ac1e76	5
b8ce3359 TG	6	#ifdef CONFIG_HPET_TIMER
b8ce3359 TG	7
b8ce3359 TG	8	#define HPET_MMAP_SIZE 1024
	9
	10	#define HPET_ID 0x000
	11	#define HPET_PERIOD 0x004
	12	#define HPET_CFG 0x010
	13	#define HPET_STATUS 0x020
	14	#define HPET_COUNTER 0x0f0
58ac1e76	15
	16	#define HPET_Tn_CFG(n) (0x100 + 0x20 * n)
	17	#define HPET_Tn_CMP(n) (0x108 + 0x20 * n)
	18	#define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n)
	19
b8ce3359 TG	20	#define HPET_T0_CFG 0x100
	21	#define HPET_T0_CMP 0x108
	22	#define HPET_T0_ROUTE 0x110
	23	#define HPET_T1_CFG 0x120
	24	#define HPET_T1_CMP 0x128
	25	#define HPET_T1_ROUTE 0x130
	26	#define HPET_T2_CFG 0x140
	27	#define HPET_T2_CMP 0x148
	28	#define HPET_T2_ROUTE 0x150
	29
	30	#define HPET_ID_REV 0x000000ff
	31	#define HPET_ID_NUMBER 0x00001f00
	32	#define HPET_ID_64BIT 0x00002000
	33	#define HPET_ID_LEGSUP 0x00008000
	34	#define HPET_ID_VENDOR 0xffff0000
	35	#define HPET_ID_NUMBER_SHIFT 8
	36	#define HPET_ID_VENDOR_SHIFT 16
	37
	38	#define HPET_ID_VENDOR_8086 0x8086
	39
	40	#define HPET_CFG_ENABLE 0x001
	41	#define HPET_CFG_LEGACY 0x002
	42	#define HPET_LEGACY_8254 2
	43	#define HPET_LEGACY_RTC 8
	44
	45	#define HPET_TN_LEVEL 0x0002
	46	#define HPET_TN_ENABLE 0x0004
	47	#define HPET_TN_PERIODIC 0x0008
	48	#define HPET_TN_PERIODIC_CAP 0x0010
	49	#define HPET_TN_64BIT_CAP 0x0020
	50	#define HPET_TN_SETVAL 0x0040
	51	#define HPET_TN_32BIT 0x0100
	52	#define HPET_TN_ROUTE 0x3e00
	53	#define HPET_TN_FSB 0x4000
	54	#define HPET_TN_FSB_CAP 0x8000
	55	#define HPET_TN_ROUTE_SHIFT 9
	56
	57	/* Max HPET Period is 10^8 femto sec as in HPET spec */
	58	#define HPET_MAX_PERIOD 100000000UL
	59	/*
	60	* Min HPET period is 10^5 femto sec just for safety. If it is less than this,
	61	* then 32 bit HPET counter wrapsaround in less than 0.5 sec.
	62	*/
	63	#define HPET_MIN_PERIOD 100000UL
	64
	65	/* hpet memory map physical address */
	66	extern unsigned long hpet_address;
59c69f2a	67	extern unsigned long force_hpet_address;
c8bc6f3c	68	extern u8 hpet_blockid;
b17530bd	69	extern int hpet_force_user;
73472a46	70	extern u8 hpet_msi_disable;
b8ce3359 TG	71	extern int is_hpet_enabled(void);
b8ce3359 TG	72	extern int hpet_enable(void);
c86c7fbc	73	extern void hpet_disable(void);
5946fa3d	74	extern unsigned int hpet_readl(unsigned int a);
bfe0c1cc	75	extern void force_hpet_resume(void);
b8ce3359	76
58ac1e76	77	extern void hpet_msi_unmask(unsigned int irq);
	78	extern void hpet_msi_mask(unsigned int irq);
	79	extern void hpet_msi_write(unsigned int irq, struct msi_msg *msg);
	80	extern void hpet_msi_read(unsigned int irq, struct msi_msg *msg);
	81
	82	#ifdef CONFIG_PCI_MSI
c8bc6f3c	83	extern int arch_setup_hpet_msi(unsigned int irq, unsigned int id);
58ac1e76	84	#else
c8bc6f3c	85	static inline int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
58ac1e76	86	{
	87	return -EINVAL;
	88	}
	89	#endif
	90
b8ce3359 TG	91	#ifdef CONFIG_HPET_EMULATE_RTC
	92
	93	#include <linux/interrupt.h>
	94
1bdbdaac	95	typedef irqreturn_t (rtc_irq_handler)(int interrupt, void cookie);
b8ce3359 TG	96	extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
	97	extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
	98	extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
	99	unsigned char sec);
	100	extern int hpet_set_periodic_freq(unsigned long freq);
	101	extern int hpet_rtc_dropped_irq(void);
	102	extern int hpet_rtc_timer_init(void);
	103	extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
1bdbdaac BW	104	extern int hpet_register_irq_handler(rtc_irq_handler handler);
1bdbdaac BW	105	extern void hpet_unregister_irq_handler(rtc_irq_handler handler);
b8ce3359 TG	106
	107	#endif /* CONFIG_HPET_EMULATE_RTC */
	108
df619e6b	109	#else /* CONFIG_HPET_TIMER */
b8ce3359 TG	110
b8ce3359 TG	111	static inline int hpet_enable(void) { return 0; }
df619e6b	112	static inline int is_hpet_enabled(void) { return 0; }
bfc0f594	113	#define hpet_readl(a) 0
b8ce3359	114
df619e6b	115	#endif
1965aae3	116	#endif /* _ASM_X86_HPET_H */