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1da177e4 LT |
1 | /* $Id: irq.c,v 1.114 2001/12/11 04:55:51 davem Exp $ |
2 | * arch/sparc/kernel/irq.c: Interrupt request handling routines. On the | |
3 | * Sparc the IRQ's are basically 'cast in stone' | |
4 | * and you are supposed to probe the prom's device | |
5 | * node trees to find out who's got which IRQ. | |
6 | * | |
7 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | |
8 | * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx) | |
9 | * Copyright (C) 1995,2002 Pete A. Zaitcev (zaitcev@yahoo.com) | |
10 | * Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk) | |
11 | * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org) | |
12 | */ | |
13 | ||
14 | #include <linux/config.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/sched.h> | |
17 | #include <linux/ptrace.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/linkage.h> | |
20 | #include <linux/kernel_stat.h> | |
21 | #include <linux/signal.h> | |
22 | #include <linux/sched.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/random.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/smp.h> | |
28 | #include <linux/smp_lock.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/threads.h> | |
31 | #include <linux/spinlock.h> | |
32 | #include <linux/seq_file.h> | |
33 | ||
34 | #include <asm/ptrace.h> | |
35 | #include <asm/processor.h> | |
36 | #include <asm/system.h> | |
37 | #include <asm/psr.h> | |
38 | #include <asm/smp.h> | |
39 | #include <asm/vaddrs.h> | |
40 | #include <asm/timer.h> | |
41 | #include <asm/openprom.h> | |
42 | #include <asm/oplib.h> | |
43 | #include <asm/traps.h> | |
44 | #include <asm/irq.h> | |
45 | #include <asm/io.h> | |
46 | #include <asm/pgalloc.h> | |
47 | #include <asm/pgtable.h> | |
48 | #include <asm/pcic.h> | |
49 | #include <asm/cacheflush.h> | |
50 | ||
51 | #ifdef CONFIG_SMP | |
52 | #define SMP_NOP2 "nop; nop;\n\t" | |
53 | #define SMP_NOP3 "nop; nop; nop;\n\t" | |
54 | #else | |
55 | #define SMP_NOP2 | |
56 | #define SMP_NOP3 | |
57 | #endif /* SMP */ | |
58 | unsigned long __local_irq_save(void) | |
59 | { | |
60 | unsigned long retval; | |
61 | unsigned long tmp; | |
62 | ||
63 | __asm__ __volatile__( | |
64 | "rd %%psr, %0\n\t" | |
65 | SMP_NOP3 /* Sun4m + Cypress + SMP bug */ | |
66 | "or %0, %2, %1\n\t" | |
67 | "wr %1, 0, %%psr\n\t" | |
68 | "nop; nop; nop\n" | |
69 | : "=&r" (retval), "=r" (tmp) | |
70 | : "i" (PSR_PIL) | |
71 | : "memory"); | |
72 | ||
73 | return retval; | |
74 | } | |
75 | ||
76 | void local_irq_enable(void) | |
77 | { | |
78 | unsigned long tmp; | |
79 | ||
80 | __asm__ __volatile__( | |
81 | "rd %%psr, %0\n\t" | |
82 | SMP_NOP3 /* Sun4m + Cypress + SMP bug */ | |
83 | "andn %0, %1, %0\n\t" | |
84 | "wr %0, 0, %%psr\n\t" | |
85 | "nop; nop; nop\n" | |
86 | : "=&r" (tmp) | |
87 | : "i" (PSR_PIL) | |
88 | : "memory"); | |
89 | } | |
90 | ||
91 | void local_irq_restore(unsigned long old_psr) | |
92 | { | |
93 | unsigned long tmp; | |
94 | ||
95 | __asm__ __volatile__( | |
96 | "rd %%psr, %0\n\t" | |
97 | "and %2, %1, %2\n\t" | |
98 | SMP_NOP2 /* Sun4m + Cypress + SMP bug */ | |
99 | "andn %0, %1, %0\n\t" | |
100 | "wr %0, %2, %%psr\n\t" | |
101 | "nop; nop; nop\n" | |
102 | : "=&r" (tmp) | |
103 | : "i" (PSR_PIL), "r" (old_psr) | |
104 | : "memory"); | |
105 | } | |
106 | ||
107 | EXPORT_SYMBOL(__local_irq_save); | |
108 | EXPORT_SYMBOL(local_irq_enable); | |
109 | EXPORT_SYMBOL(local_irq_restore); | |
110 | ||
111 | /* | |
112 | * Dave Redman (djhr@tadpole.co.uk) | |
113 | * | |
114 | * IRQ numbers.. These are no longer restricted to 15.. | |
115 | * | |
116 | * this is done to enable SBUS cards and onboard IO to be masked | |
117 | * correctly. using the interrupt level isn't good enough. | |
118 | * | |
119 | * For example: | |
120 | * A device interrupting at sbus level6 and the Floppy both come in | |
121 | * at IRQ11, but enabling and disabling them requires writing to | |
122 | * different bits in the SLAVIO/SEC. | |
123 | * | |
124 | * As a result of these changes sun4m machines could now support | |
125 | * directed CPU interrupts using the existing enable/disable irq code | |
126 | * with tweaks. | |
127 | * | |
128 | */ | |
129 | ||
130 | static void irq_panic(void) | |
131 | { | |
132 | extern char *cputypval; | |
133 | prom_printf("machine: %s doesn't have irq handlers defined!\n",cputypval); | |
134 | prom_halt(); | |
135 | } | |
136 | ||
137 | void (*sparc_init_timers)(irqreturn_t (*)(int, void *,struct pt_regs *)) = | |
138 | (void (*)(irqreturn_t (*)(int, void *,struct pt_regs *))) irq_panic; | |
139 | ||
140 | /* | |
141 | * Dave Redman (djhr@tadpole.co.uk) | |
142 | * | |
143 | * There used to be extern calls and hard coded values here.. very sucky! | |
144 | * instead, because some of the devices attach very early, I do something | |
145 | * equally sucky but at least we'll never try to free statically allocated | |
146 | * space or call kmalloc before kmalloc_init :(. | |
147 | * | |
148 | * In fact it's the timer10 that attaches first.. then timer14 | |
149 | * then kmalloc_init is called.. then the tty interrupts attach. | |
150 | * hmmm.... | |
151 | * | |
152 | */ | |
153 | #define MAX_STATIC_ALLOC 4 | |
154 | struct irqaction static_irqaction[MAX_STATIC_ALLOC]; | |
155 | int static_irq_count; | |
156 | ||
157 | struct irqaction *irq_action[NR_IRQS] = { | |
158 | [0 ... (NR_IRQS-1)] = NULL | |
159 | }; | |
160 | ||
161 | /* Used to protect the IRQ action lists */ | |
162 | DEFINE_SPINLOCK(irq_action_lock); | |
163 | ||
164 | int show_interrupts(struct seq_file *p, void *v) | |
165 | { | |
166 | int i = *(loff_t *) v; | |
167 | struct irqaction * action; | |
168 | unsigned long flags; | |
169 | #ifdef CONFIG_SMP | |
170 | int j; | |
171 | #endif | |
172 | ||
173 | if (sparc_cpu_model == sun4d) { | |
174 | extern int show_sun4d_interrupts(struct seq_file *, void *); | |
175 | ||
176 | return show_sun4d_interrupts(p, v); | |
177 | } | |
178 | spin_lock_irqsave(&irq_action_lock, flags); | |
179 | if (i < NR_IRQS) { | |
180 | action = *(i + irq_action); | |
181 | if (!action) | |
182 | goto out_unlock; | |
183 | seq_printf(p, "%3d: ", i); | |
184 | #ifndef CONFIG_SMP | |
185 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
186 | #else | |
394e3902 AM |
187 | for_each_online_cpu(j) { |
188 | seq_printf(p, "%10u ", | |
1da177e4 LT |
189 | kstat_cpu(cpu_logical_map(j)).irqs[i]); |
190 | } | |
191 | #endif | |
192 | seq_printf(p, " %c %s", | |
193 | (action->flags & SA_INTERRUPT) ? '+' : ' ', | |
194 | action->name); | |
195 | for (action=action->next; action; action = action->next) { | |
196 | seq_printf(p, ",%s %s", | |
197 | (action->flags & SA_INTERRUPT) ? " +" : "", | |
198 | action->name); | |
199 | } | |
200 | seq_putc(p, '\n'); | |
201 | } | |
202 | out_unlock: | |
203 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
204 | return 0; | |
205 | } | |
206 | ||
207 | void free_irq(unsigned int irq, void *dev_id) | |
208 | { | |
209 | struct irqaction * action; | |
210 | struct irqaction * tmp = NULL; | |
211 | unsigned long flags; | |
212 | unsigned int cpu_irq; | |
213 | ||
214 | if (sparc_cpu_model == sun4d) { | |
215 | extern void sun4d_free_irq(unsigned int, void *); | |
216 | ||
217 | sun4d_free_irq(irq, dev_id); | |
218 | return; | |
219 | } | |
220 | cpu_irq = irq & (NR_IRQS - 1); | |
221 | if (cpu_irq > 14) { /* 14 irq levels on the sparc */ | |
222 | printk("Trying to free bogus IRQ %d\n", irq); | |
223 | return; | |
224 | } | |
225 | ||
226 | spin_lock_irqsave(&irq_action_lock, flags); | |
227 | ||
228 | action = *(cpu_irq + irq_action); | |
229 | ||
230 | if (!action->handler) { | |
231 | printk("Trying to free free IRQ%d\n",irq); | |
232 | goto out_unlock; | |
233 | } | |
234 | if (dev_id) { | |
235 | for (; action; action = action->next) { | |
236 | if (action->dev_id == dev_id) | |
237 | break; | |
238 | tmp = action; | |
239 | } | |
240 | if (!action) { | |
241 | printk("Trying to free free shared IRQ%d\n",irq); | |
242 | goto out_unlock; | |
243 | } | |
244 | } else if (action->flags & SA_SHIRQ) { | |
245 | printk("Trying to free shared IRQ%d with NULL device ID\n", irq); | |
246 | goto out_unlock; | |
247 | } | |
248 | if (action->flags & SA_STATIC_ALLOC) | |
249 | { | |
250 | /* This interrupt is marked as specially allocated | |
251 | * so it is a bad idea to free it. | |
252 | */ | |
253 | printk("Attempt to free statically allocated IRQ%d (%s)\n", | |
254 | irq, action->name); | |
255 | goto out_unlock; | |
256 | } | |
257 | ||
258 | if (action && tmp) | |
259 | tmp->next = action->next; | |
260 | else | |
261 | *(cpu_irq + irq_action) = action->next; | |
262 | ||
263 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
264 | ||
265 | synchronize_irq(irq); | |
266 | ||
267 | spin_lock_irqsave(&irq_action_lock, flags); | |
268 | ||
269 | kfree(action); | |
270 | ||
271 | if (!(*(cpu_irq + irq_action))) | |
272 | disable_irq(irq); | |
273 | ||
274 | out_unlock: | |
275 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
276 | } | |
277 | ||
278 | EXPORT_SYMBOL(free_irq); | |
279 | ||
280 | /* | |
281 | * This is called when we want to synchronize with | |
282 | * interrupts. We may for example tell a device to | |
283 | * stop sending interrupts: but to make sure there | |
284 | * are no interrupts that are executing on another | |
285 | * CPU we need to call this function. | |
286 | */ | |
287 | #ifdef CONFIG_SMP | |
288 | void synchronize_irq(unsigned int irq) | |
289 | { | |
290 | printk("synchronize_irq says: implement me!\n"); | |
291 | BUG(); | |
292 | } | |
293 | #endif /* SMP */ | |
294 | ||
295 | void unexpected_irq(int irq, void *dev_id, struct pt_regs * regs) | |
296 | { | |
297 | int i; | |
298 | struct irqaction * action; | |
299 | unsigned int cpu_irq; | |
300 | ||
301 | cpu_irq = irq & (NR_IRQS - 1); | |
302 | action = *(cpu_irq + irq_action); | |
303 | ||
304 | printk("IO device interrupt, irq = %d\n", irq); | |
305 | printk("PC = %08lx NPC = %08lx FP=%08lx\n", regs->pc, | |
306 | regs->npc, regs->u_regs[14]); | |
307 | if (action) { | |
308 | printk("Expecting: "); | |
309 | for (i = 0; i < 16; i++) | |
310 | if (action->handler) | |
311 | printk("[%s:%d:0x%x] ", action->name, | |
312 | (int) i, (unsigned int) action->handler); | |
313 | } | |
314 | printk("AIEEE\n"); | |
315 | panic("bogus interrupt received"); | |
316 | } | |
317 | ||
318 | void handler_irq(int irq, struct pt_regs * regs) | |
319 | { | |
320 | struct irqaction * action; | |
321 | int cpu = smp_processor_id(); | |
322 | #ifdef CONFIG_SMP | |
323 | extern void smp4m_irq_rotate(int cpu); | |
324 | #endif | |
325 | ||
326 | irq_enter(); | |
327 | disable_pil_irq(irq); | |
328 | #ifdef CONFIG_SMP | |
329 | /* Only rotate on lower priority IRQ's (scsi, ethernet, etc.). */ | |
330 | if(irq < 10) | |
331 | smp4m_irq_rotate(cpu); | |
332 | #endif | |
333 | action = *(irq + irq_action); | |
334 | kstat_cpu(cpu).irqs[irq]++; | |
335 | do { | |
336 | if (!action || !action->handler) | |
337 | unexpected_irq(irq, NULL, regs); | |
338 | action->handler(irq, action->dev_id, regs); | |
339 | action = action->next; | |
340 | } while (action); | |
341 | enable_pil_irq(irq); | |
342 | irq_exit(); | |
343 | } | |
344 | ||
345 | #ifdef CONFIG_BLK_DEV_FD | |
346 | extern void floppy_interrupt(int irq, void *dev_id, struct pt_regs *regs); | |
347 | ||
348 | void sparc_floppy_irq(int irq, void *dev_id, struct pt_regs *regs) | |
349 | { | |
350 | int cpu = smp_processor_id(); | |
351 | ||
352 | disable_pil_irq(irq); | |
353 | irq_enter(); | |
354 | kstat_cpu(cpu).irqs[irq]++; | |
355 | floppy_interrupt(irq, dev_id, regs); | |
356 | irq_exit(); | |
357 | enable_pil_irq(irq); | |
358 | // XXX Eek, it's totally changed with preempt_count() and such | |
359 | // if (softirq_pending(cpu)) | |
360 | // do_softirq(); | |
361 | } | |
362 | #endif | |
363 | ||
364 | /* Fast IRQ's on the Sparc can only have one routine attached to them, | |
365 | * thus no sharing possible. | |
366 | */ | |
367 | int request_fast_irq(unsigned int irq, | |
368 | irqreturn_t (*handler)(int, void *, struct pt_regs *), | |
369 | unsigned long irqflags, const char *devname) | |
370 | { | |
371 | struct irqaction *action; | |
372 | unsigned long flags; | |
373 | unsigned int cpu_irq; | |
374 | int ret; | |
375 | #ifdef CONFIG_SMP | |
376 | struct tt_entry *trap_table; | |
377 | extern struct tt_entry trapbase_cpu1, trapbase_cpu2, trapbase_cpu3; | |
378 | #endif | |
379 | ||
380 | cpu_irq = irq & (NR_IRQS - 1); | |
381 | if(cpu_irq > 14) { | |
382 | ret = -EINVAL; | |
383 | goto out; | |
384 | } | |
385 | if(!handler) { | |
386 | ret = -EINVAL; | |
387 | goto out; | |
388 | } | |
389 | ||
390 | spin_lock_irqsave(&irq_action_lock, flags); | |
391 | ||
392 | action = *(cpu_irq + irq_action); | |
393 | if(action) { | |
394 | if(action->flags & SA_SHIRQ) | |
395 | panic("Trying to register fast irq when already shared.\n"); | |
396 | if(irqflags & SA_SHIRQ) | |
397 | panic("Trying to register fast irq as shared.\n"); | |
398 | ||
399 | /* Anyway, someone already owns it so cannot be made fast. */ | |
400 | printk("request_fast_irq: Trying to register yet already owned.\n"); | |
401 | ret = -EBUSY; | |
402 | goto out_unlock; | |
403 | } | |
404 | ||
405 | /* If this is flagged as statically allocated then we use our | |
406 | * private struct which is never freed. | |
407 | */ | |
408 | if (irqflags & SA_STATIC_ALLOC) { | |
409 | if (static_irq_count < MAX_STATIC_ALLOC) | |
410 | action = &static_irqaction[static_irq_count++]; | |
411 | else | |
412 | printk("Fast IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", | |
413 | irq, devname); | |
414 | } | |
415 | ||
416 | if (action == NULL) | |
417 | action = (struct irqaction *)kmalloc(sizeof(struct irqaction), | |
418 | GFP_ATOMIC); | |
419 | ||
420 | if (!action) { | |
421 | ret = -ENOMEM; | |
422 | goto out_unlock; | |
423 | } | |
424 | ||
425 | /* Dork with trap table if we get this far. */ | |
426 | #define INSTANTIATE(table) \ | |
427 | table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_one = SPARC_RD_PSR_L0; \ | |
428 | table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two = \ | |
429 | SPARC_BRANCH((unsigned long) handler, \ | |
430 | (unsigned long) &table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two);\ | |
431 | table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_three = SPARC_RD_WIM_L3; \ | |
432 | table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_four = SPARC_NOP; | |
433 | ||
434 | INSTANTIATE(sparc_ttable) | |
435 | #ifdef CONFIG_SMP | |
436 | trap_table = &trapbase_cpu1; INSTANTIATE(trap_table) | |
437 | trap_table = &trapbase_cpu2; INSTANTIATE(trap_table) | |
438 | trap_table = &trapbase_cpu3; INSTANTIATE(trap_table) | |
439 | #endif | |
440 | #undef INSTANTIATE | |
441 | /* | |
442 | * XXX Correct thing whould be to flush only I- and D-cache lines | |
443 | * which contain the handler in question. But as of time of the | |
444 | * writing we have no CPU-neutral interface to fine-grained flushes. | |
445 | */ | |
446 | flush_cache_all(); | |
447 | ||
448 | action->handler = handler; | |
449 | action->flags = irqflags; | |
450 | cpus_clear(action->mask); | |
451 | action->name = devname; | |
452 | action->dev_id = NULL; | |
453 | action->next = NULL; | |
454 | ||
455 | *(cpu_irq + irq_action) = action; | |
456 | ||
457 | enable_irq(irq); | |
458 | ||
459 | ret = 0; | |
460 | out_unlock: | |
461 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
462 | out: | |
463 | return ret; | |
464 | } | |
465 | ||
466 | int request_irq(unsigned int irq, | |
467 | irqreturn_t (*handler)(int, void *, struct pt_regs *), | |
468 | unsigned long irqflags, const char * devname, void *dev_id) | |
469 | { | |
470 | struct irqaction * action, *tmp = NULL; | |
471 | unsigned long flags; | |
472 | unsigned int cpu_irq; | |
473 | int ret; | |
474 | ||
475 | if (sparc_cpu_model == sun4d) { | |
476 | extern int sun4d_request_irq(unsigned int, | |
477 | irqreturn_t (*)(int, void *, struct pt_regs *), | |
478 | unsigned long, const char *, void *); | |
479 | return sun4d_request_irq(irq, handler, irqflags, devname, dev_id); | |
480 | } | |
481 | cpu_irq = irq & (NR_IRQS - 1); | |
482 | if(cpu_irq > 14) { | |
483 | ret = -EINVAL; | |
484 | goto out; | |
485 | } | |
486 | if (!handler) { | |
487 | ret = -EINVAL; | |
488 | goto out; | |
489 | } | |
490 | ||
491 | spin_lock_irqsave(&irq_action_lock, flags); | |
492 | ||
493 | action = *(cpu_irq + irq_action); | |
494 | if (action) { | |
495 | if ((action->flags & SA_SHIRQ) && (irqflags & SA_SHIRQ)) { | |
496 | for (tmp = action; tmp->next; tmp = tmp->next); | |
497 | } else { | |
498 | ret = -EBUSY; | |
499 | goto out_unlock; | |
500 | } | |
501 | if ((action->flags & SA_INTERRUPT) ^ (irqflags & SA_INTERRUPT)) { | |
502 | printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq); | |
503 | ret = -EBUSY; | |
504 | goto out_unlock; | |
505 | } | |
506 | action = NULL; /* Or else! */ | |
507 | } | |
508 | ||
509 | /* If this is flagged as statically allocated then we use our | |
510 | * private struct which is never freed. | |
511 | */ | |
512 | if (irqflags & SA_STATIC_ALLOC) { | |
513 | if (static_irq_count < MAX_STATIC_ALLOC) | |
514 | action = &static_irqaction[static_irq_count++]; | |
515 | else | |
516 | printk("Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", irq, devname); | |
517 | } | |
518 | ||
519 | if (action == NULL) | |
520 | action = (struct irqaction *)kmalloc(sizeof(struct irqaction), | |
521 | GFP_ATOMIC); | |
522 | ||
523 | if (!action) { | |
524 | ret = -ENOMEM; | |
525 | goto out_unlock; | |
526 | } | |
527 | ||
528 | action->handler = handler; | |
529 | action->flags = irqflags; | |
530 | cpus_clear(action->mask); | |
531 | action->name = devname; | |
532 | action->next = NULL; | |
533 | action->dev_id = dev_id; | |
534 | ||
535 | if (tmp) | |
536 | tmp->next = action; | |
537 | else | |
538 | *(cpu_irq + irq_action) = action; | |
539 | ||
540 | enable_irq(irq); | |
541 | ||
542 | ret = 0; | |
543 | out_unlock: | |
544 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
545 | out: | |
546 | return ret; | |
547 | } | |
548 | ||
549 | EXPORT_SYMBOL(request_irq); | |
550 | ||
551 | /* We really don't need these at all on the Sparc. We only have | |
552 | * stubs here because they are exported to modules. | |
553 | */ | |
554 | unsigned long probe_irq_on(void) | |
555 | { | |
556 | return 0; | |
557 | } | |
558 | ||
559 | EXPORT_SYMBOL(probe_irq_on); | |
560 | ||
561 | int probe_irq_off(unsigned long mask) | |
562 | { | |
563 | return 0; | |
564 | } | |
565 | ||
566 | EXPORT_SYMBOL(probe_irq_off); | |
567 | ||
568 | /* djhr | |
569 | * This could probably be made indirect too and assigned in the CPU | |
570 | * bits of the code. That would be much nicer I think and would also | |
571 | * fit in with the idea of being able to tune your kernel for your machine | |
572 | * by removing unrequired machine and device support. | |
573 | * | |
574 | */ | |
575 | ||
576 | void __init init_IRQ(void) | |
577 | { | |
578 | extern void sun4c_init_IRQ( void ); | |
579 | extern void sun4m_init_IRQ( void ); | |
580 | extern void sun4d_init_IRQ( void ); | |
581 | ||
582 | switch(sparc_cpu_model) { | |
583 | case sun4c: | |
584 | case sun4: | |
585 | sun4c_init_IRQ(); | |
586 | break; | |
587 | ||
588 | case sun4m: | |
589 | #ifdef CONFIG_PCI | |
590 | pcic_probe(); | |
591 | if (pcic_present()) { | |
592 | sun4m_pci_init_IRQ(); | |
593 | break; | |
594 | } | |
595 | #endif | |
596 | sun4m_init_IRQ(); | |
597 | break; | |
598 | ||
599 | case sun4d: | |
600 | sun4d_init_IRQ(); | |
601 | break; | |
602 | ||
603 | default: | |
604 | prom_printf("Cannot initialize IRQ's on this Sun machine..."); | |
605 | break; | |
606 | } | |
607 | btfixup(); | |
608 | } | |
609 | ||
610 | void init_irq_proc(void) | |
611 | { | |
612 | /* For now, nothing... */ | |
613 | } |