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| a62a3861 PM |
1 | #ifndef __ASM_SH_SYSTEM_64_H |
| 2 | #define __ASM_SH_SYSTEM_64_H | |
| 3 | ||
| 4 | /* | |
| 5 | * include/asm-sh/system_64.h | |
| 6 | * | |
| 7 | * Copyright (C) 2000, 2001 Paolo Alberelli | |
| 8 | * Copyright (C) 2003 Paul Mundt | |
| 9 | * Copyright (C) 2004 Richard Curnow | |
| 10 | * | |
| 11 | * This file is subject to the terms and conditions of the GNU General Public | |
| 12 | * License. See the file "COPYING" in the main directory of this archive | |
| 13 | * for more details. | |
| 14 | */ | |
| 03fdb708 | 15 | #include <cpu/registers.h> |
| a62a3861 PM |
16 | #include <asm/processor.h> |
| 17 | ||
| 18 | /* | |
| 19 | * switch_to() should switch tasks to task nr n, first | |
| 20 | */ | |
| b0f3ae03 | 21 | struct thread_struct; |
| a62a3861 PM |
22 | struct task_struct *sh64_switch_to(struct task_struct *prev, |
| 23 | struct thread_struct *prev_thread, | |
| 24 | struct task_struct *next, | |
| 25 | struct thread_struct *next_thread); | |
| 26 | ||
| 27 | #define switch_to(prev,next,last) \ | |
| 28 | do { \ | |
| 29 | if (last_task_used_math != next) { \ | |
| 30 | struct pt_regs *regs = next->thread.uregs; \ | |
| 31 | if (regs) regs->sr |= SR_FD; \ | |
| 32 | } \ | |
| 33 | last = sh64_switch_to(prev, &prev->thread, next, \ | |
| 34 | &next->thread); \ | |
| 35 | } while (0) | |
| 36 | ||
| 94ecd224 PM |
37 | #define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) |
| 38 | #define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) | |
| 39 | #define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) | |
| 40 | #define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr)) | |
| 41 | ||
| 43bc61d8 PM |
42 | static inline reg_size_t register_align(void *val) |
| 43 | { | |
| 44 | return (unsigned long long)(signed long long)(signed long)val; | |
| 45 | } | |
| 46 | ||
| fbb82b03 PM |
47 | extern void phys_stext(void); |
| 48 | ||
| 49 | static inline void trigger_address_error(void) | |
| 50 | { | |
| 51 | phys_stext(); | |
| 52 | } | |
| 53 | ||
| 03fdb708 PM |
54 | #define SR_BL_LL 0x0000000010000000LL |
| 55 | ||
| 56 | static inline void set_bl_bit(void) | |
| 57 | { | |
| 58 | unsigned long long __dummy0, __dummy1 = SR_BL_LL; | |
| 59 | ||
| 60 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | |
| 61 | "or %0, %1, %0\n\t" | |
| 62 | "putcon %0, " __SR "\n\t" | |
| 63 | : "=&r" (__dummy0) | |
| 64 | : "r" (__dummy1)); | |
| 65 | ||
| 66 | } | |
| 67 | ||
| 68 | static inline void clear_bl_bit(void) | |
| 69 | { | |
| 70 | unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; | |
| 71 | ||
| 72 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | |
| 73 | "and %0, %1, %0\n\t" | |
| 74 | "putcon %0, " __SR "\n\t" | |
| 75 | : "=&r" (__dummy0) | |
| 76 | : "r" (__dummy1)); | |
| 77 | } | |
| 78 | ||
| a62a3861 | 79 | #endif /* __ASM_SH_SYSTEM_64_H */ |