[net-next-2.6.git] / arch / sh / include / asm / processor.h

#ifndef __ASM_SH_PROCESSOR_H
#define __ASM_SH_PROCESSOR_H

#include <asm/cpu-features.h>
#include <asm/segment.h>
#include <asm/cache.h>

#ifndef __ASSEMBLY__
/*
 *  CPU type and hardware bug flags. Kept separately for each CPU.
 *
 *  Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
 *  in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
 *  for parsing the subtype in get_cpu_subtype().
 */
enum cpu_type {
	/* SH-2 types */
	CPU_SH7619,

	/* SH-2A types */
	CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,

	/* SH-3 types */
	CPU_SH7705, CPU_SH7706, CPU_SH7707,
	CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
	CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
	CPU_SH7720, CPU_SH7721, CPU_SH7729,

	/* SH-4 types */
	CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
	CPU_SH7760, CPU_SH4_202, CPU_SH4_501,

	/* SH-4A types */
	CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785,
	CPU_SH7723, CPU_SHX3,

	/* SH4AL-DSP types */
	CPU_SH7343, CPU_SH7722, CPU_SH7366,

	/* SH-5 types */
        CPU_SH5_101, CPU_SH5_103,

	/* Unknown subtype */
	CPU_SH_NONE
};

/*
 * TLB information structure
 *
 * Defined for both I and D tlb, per-processor.
 */
struct tlb_info {
	unsigned long long next;
	unsigned long long first;
	unsigned long long last;

	unsigned int entries;
	unsigned int step;

	unsigned long flags;
};

struct sh_cpuinfo {
	unsigned int type;
	int cut_major, cut_minor;
	unsigned long loops_per_jiffy;
	unsigned long asid_cache;

	struct cache_info icache;	/* Primary I-cache */
	struct cache_info dcache;	/* Primary D-cache */
	struct cache_info scache;	/* Secondary cache */

	/* TLB info */
	struct tlb_info itlb;
	struct tlb_info dtlb;

	unsigned long flags;
} __attribute__ ((aligned(L1_CACHE_BYTES)));

extern struct sh_cpuinfo cpu_data[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]

/* Forward decl */
struct seq_operations;

extern struct pt_regs fake_swapper_regs;

/* arch/sh/kernel/setup.c */
const char *get_cpu_subtype(struct sh_cpuinfo *c);
extern const struct seq_operations cpuinfo_op;

#ifdef CONFIG_VSYSCALL
int vsyscall_init(void);
#else
#define vsyscall_init() do { } while (0)
#endif

#endif /* __ASSEMBLY__ */

#ifdef CONFIG_SUPERH32
# include "processor_32.h"
#else
# include "processor_64.h"
#endif

#endif /* __ASM_SH_PROCESSOR_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef __ASM_SH_PROCESSOR_H
1da177e4 LT	2	#define __ASM_SH_PROCESSOR_H
1da177e4	3
76168c21	4	#include <asm/cpu-features.h>
02f7e627	5	#include <asm/segment.h>
81b66995	6	#include <asm/cache.h>
76168c21	7
343ac722	8	#ifndef __ASSEMBLY__
1da177e4 LT	9	/*
	10	* CPU type and hardware bug flags. Kept separately for each CPU.
	11	*
	12	* Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
de02797a	13	* in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
1da177e4 LT	14	* for parsing the subtype in get_cpu_subtype().
	15	*/
	16	enum cpu_type {
	17	/* SH-2 types */
b9601c5e	18	CPU_SH7619,
b229632a YS	19
b229632a YS	20	/* SH-2A types */
2ad69908	21	CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
1da177e4 LT	22
1da177e4 LT	23	/* SH-3 types */
e5723e0e PM	24	CPU_SH7705, CPU_SH7706, CPU_SH7707,
e5723e0e PM	25	CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
9465a54f	26	CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
31a49c4b	27	CPU_SH7720, CPU_SH7721, CPU_SH7729,
1da177e4 LT	28
	29	/* SH-4 types */
	30	CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
f9669187	31	CPU_SH7760, CPU_SH4_202, CPU_SH4_501,
b552c7e8 PM	32
b552c7e8 PM	33	/* SH-4A types */
178dd0cd PM	34	CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785,
178dd0cd PM	35	CPU_SH7723, CPU_SHX3,
41504c39 PM	36
41504c39 PM	37	/* SH4AL-DSP types */
9109a30e	38	CPU_SH7343, CPU_SH7722, CPU_SH7366,
1da177e4	39
af3c7dfe PM	40	/* SH-5 types */
	41	CPU_SH5_101, CPU_SH5_103,
	42
1da177e4 LT	43	/* Unknown subtype */
	44	CPU_SH_NONE
	45	};
	46
81b66995 PM	47	/*
	48	* TLB information structure
	49	*
	50	* Defined for both I and D tlb, per-processor.
	51	*/
	52	struct tlb_info {
	53	unsigned long long next;
	54	unsigned long long first;
	55	unsigned long long last;
	56
	57	unsigned int entries;
	58	unsigned int step;
	59
	60	unsigned long flags;
	61	};
	62
	63	struct sh_cpuinfo {
	64	unsigned int type;
	65	int cut_major, cut_minor;
	66	unsigned long loops_per_jiffy;
	67	unsigned long asid_cache;
	68
	69	struct cache_info icache; /* Primary I-cache */
	70	struct cache_info dcache; /* Primary D-cache */
	71	struct cache_info scache; /* Secondary cache */
	72
	73	/* TLB info */
	74	struct tlb_info itlb;
	75	struct tlb_info dtlb;
	76
	77	unsigned long flags;
	78	} __attribute__ ((aligned(L1_CACHE_BYTES)));
	79
	80	extern struct sh_cpuinfo cpu_data[];
	81	#define boot_cpu_data cpu_data[0]
	82	#define current_cpu_data cpu_data[smp_processor_id()]
	83	#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
	84
343ac722	85	/* Forward decl */
fa43972f PM	86	struct seq_operations;
	87
	88	extern struct pt_regs fake_swapper_regs;
19f9a34f	89
11c19656 PM	90	/* arch/sh/kernel/setup.c */
11c19656 PM	91	const char get_cpu_subtype(struct sh_cpuinfo c);
fa43972f	92	extern const struct seq_operations cpuinfo_op;
11c19656	93
acb499f0 PM	94	#ifdef CONFIG_VSYSCALL
	95	int vsyscall_init(void);
	96	#else
	97	#define vsyscall_init() do { } while (0)
	98	#endif
	99
343ac722 PM	100	#endif /* __ASSEMBLY__ */
	101
	102	#ifdef CONFIG_SUPERH32
	103	# include "processor_32.h"
	104	#else
	105	# include "processor_64.h"
	106	#endif
	107
1da177e4	108	#endif /* __ASM_SH_PROCESSOR_H */