[net-next-2.6.git] / arch / sh / boards / mach-se / 770x / setup.c

/*
 * linux/arch/sh/boards/se/770x/setup.c
 *
 * Copyright (C) 2000  Kazumoto Kojima
 *
 * Hitachi SolutionEngine Support.
 *
 */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <mach-se/mach/se.h>
#include <mach-se/mach/mrshpc.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/smc37c93x.h>
#include <asm/heartbeat.h>

/*
 * Configure the Super I/O chip
 */
static void __init smsc_config(int index, int data)
{
	outb_p(index, INDEX_PORT);
	outb_p(data, DATA_PORT);
}

/* XXX: Another candidate for a more generic cchip machine vector */
static void __init smsc_setup(char **cmdline_p)
{
	outb_p(CONFIG_ENTER, CONFIG_PORT);
	outb_p(CONFIG_ENTER, CONFIG_PORT);

	/* FDC */
	smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
	smsc_config(ACTIVATE_INDEX, 0x01);
	smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */

	/* AUXIO (GPIO): to use IDE1 */
	smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
	smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
	smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */

	/* COM1 */
	smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
	smsc_config(ACTIVATE_INDEX, 0x01);
	smsc_config(IO_BASE_HI_INDEX, 0x03);
	smsc_config(IO_BASE_LO_INDEX, 0xf8);
	smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */

	/* COM2 */
	smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
	smsc_config(ACTIVATE_INDEX, 0x01);
	smsc_config(IO_BASE_HI_INDEX, 0x02);
	smsc_config(IO_BASE_LO_INDEX, 0xf8);
	smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */

	/* RTC */
	smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
	smsc_config(ACTIVATE_INDEX, 0x01);
	smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */

	/* XXX: PARPORT, KBD, and MOUSE will come here... */
	outb_p(CONFIG_EXIT, CONFIG_PORT);
}


static struct resource cf_ide_resources[] = {
	[0] = {
		.start  = PA_MRSHPC_IO + 0x1f0,
		.end    = PA_MRSHPC_IO + 0x1f0 + 8,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = PA_MRSHPC_IO + 0x1f0 + 0x206,
		.end    = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
		.flags  = IORESOURCE_MEM,
	},
	[2] = {
		.start  = IRQ_CFCARD,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device cf_ide_device  = {
	.name           = "pata_platform",
	.id             = -1,
	.num_resources  = ARRAY_SIZE(cf_ide_resources),
	.resource       = cf_ide_resources,
};

static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };

static struct heartbeat_data heartbeat_data = {
	.bit_pos	= heartbeat_bit_pos,
	.nr_bits	= ARRAY_SIZE(heartbeat_bit_pos),
};

static struct resource heartbeat_resource = {
	.start	= PA_LED,
	.end	= PA_LED,
	.flags	= IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
};

static struct platform_device heartbeat_device = {
	.name		= "heartbeat",
	.id		= -1,
	.dev	= {
		.platform_data	= &heartbeat_data,
	},
	.num_resources	= 1,
	.resource	= &heartbeat_resource,
};

#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
	defined(CONFIG_CPU_SUBTYPE_SH7712)
/* SH771X Ethernet driver */
static struct resource sh_eth0_resources[] = {
	[0] = {
		.start = SH_ETH0_BASE,
		.end = SH_ETH0_BASE + 0x1B8,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = SH_ETH0_IRQ,
		.end = SH_ETH0_IRQ,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device sh_eth0_device = {
	.name = "sh-eth",
	.id	= 0,
	.dev = {
		.platform_data = PHY_ID,
	},
	.num_resources = ARRAY_SIZE(sh_eth0_resources),
	.resource = sh_eth0_resources,
};

static struct resource sh_eth1_resources[] = {
	[0] = {
		.start = SH_ETH1_BASE,
		.end = SH_ETH1_BASE + 0x1B8,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = SH_ETH1_IRQ,
		.end = SH_ETH1_IRQ,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device sh_eth1_device = {
	.name = "sh-eth",
	.id	= 1,
	.dev = {
		.platform_data = PHY_ID,
	},
	.num_resources = ARRAY_SIZE(sh_eth1_resources),
	.resource = sh_eth1_resources,
};
#endif

static struct platform_device *se_devices[] __initdata = {
	&heartbeat_device,
	&cf_ide_device,
#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
	defined(CONFIG_CPU_SUBTYPE_SH7712)
	&sh_eth0_device,
	&sh_eth1_device,
#endif
};

static int __init se_devices_setup(void)
{
	mrshpc_setup_windows();
	return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
}
device_initcall(se_devices_setup);

/*
 * The Machine Vector
 */
static struct sh_machine_vector mv_se __initmv = {
	.mv_name		= "SolutionEngine",
	.mv_setup		= smsc_setup,
#if defined(CONFIG_CPU_SH4)
	.mv_nr_irqs		= 48,
#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
	.mv_nr_irqs		= 32,
#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
	.mv_nr_irqs		= 61,
#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
	.mv_nr_irqs		= 86,
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
	.mv_nr_irqs             = 104,
#endif
	.mv_init_irq		= init_se_IRQ,
};
Commit	Line	Data
aa4a5db5	1	/*
1da177e4 LT	2	* linux/arch/sh/boards/se/770x/setup.c
	3	*
	4	* Copyright (C) 2000 Kazumoto Kojima
	5	*
	6	* Hitachi SolutionEngine Support.
	7	*
	8	*/
1da177e4	9	#include <linux/init.h>
3b4d9539	10	#include <linux/platform_device.h>
939a24a6	11	#include <mach-se/mach/se.h>
073da9c0 PM	12	#include <mach-se/mach/mrshpc.h>
073da9c0 PM	13	#include <asm/machvec.h>
711fa809	14	#include <asm/io.h>
0c91c1a7	15	#include <asm/smc37c93x.h>
8786c952	16	#include <asm/heartbeat.h>
2c7834a6	17
1da177e4 LT	18	/*
	19	* Configure the Super I/O chip
	20	*/
	21	static void __init smsc_config(int index, int data)
	22	{
	23	outb_p(index, INDEX_PORT);
	24	outb_p(data, DATA_PORT);
	25	}
	26
2c7834a6 PM	27	/* XXX: Another candidate for a more generic cchip machine vector */
2c7834a6 PM	28	static void __init smsc_setup(char **cmdline_p)
1da177e4 LT	29	{
	30	outb_p(CONFIG_ENTER, CONFIG_PORT);
	31	outb_p(CONFIG_ENTER, CONFIG_PORT);
	32
	33	/* FDC */
	34	smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
	35	smsc_config(ACTIVATE_INDEX, 0x01);
	36	smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
	37
1da177e4 LT	38	/* AUXIO (GPIO): to use IDE1 */
	39	smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
	40	smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
	41	smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
	42
	43	/* COM1 */
	44	smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
	45	smsc_config(ACTIVATE_INDEX, 0x01);
	46	smsc_config(IO_BASE_HI_INDEX, 0x03);
	47	smsc_config(IO_BASE_LO_INDEX, 0xf8);
	48	smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
	49
	50	/* COM2 */
	51	smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
	52	smsc_config(ACTIVATE_INDEX, 0x01);
	53	smsc_config(IO_BASE_HI_INDEX, 0x02);
	54	smsc_config(IO_BASE_LO_INDEX, 0xf8);
	55	smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
	56
	57	/* RTC */
	58	smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
	59	smsc_config(ACTIVATE_INDEX, 0x01);
	60	smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
	61
	62	/* XXX: PARPORT, KBD, and MOUSE will come here... */
	63	outb_p(CONFIG_EXIT, CONFIG_PORT);
	64	}
	65
f987fc88 NI	66
	67	static struct resource cf_ide_resources[] = {
	68	[0] = {
	69	.start = PA_MRSHPC_IO + 0x1f0,
	70	.end = PA_MRSHPC_IO + 0x1f0 + 8,
	71	.flags = IORESOURCE_MEM,
	72	},
	73	[1] = {
	74	.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
787d9d7e	75	.end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
f987fc88 NI	76	.flags = IORESOURCE_MEM,
	77	},
	78	[2] = {
2a8ff459	79	.start = IRQ_CFCARD,
f987fc88 NI	80	.flags = IORESOURCE_IRQ,
	81	},
	82	};
	83
	84	static struct platform_device cf_ide_device = {
	85	.name = "pata_platform",
	86	.id = -1,
	87	.num_resources = ARRAY_SIZE(cf_ide_resources),
	88	.resource = cf_ide_resources,
	89	};
	90
3b4d9539 PM	91	static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
3b4d9539 PM	92
8786c952 PM	93	static struct heartbeat_data heartbeat_data = {
	94	.bit_pos = heartbeat_bit_pos,
	95	.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
	96	};
	97
a09d2831 PM	98	static struct resource heartbeat_resource = {
	99	.start = PA_LED,
	100	.end = PA_LED,
	101	.flags = IORESOURCE_MEM \| IORESOURCE_MEM_16BIT,
3b4d9539 PM	102	};
	103
	104	static struct platform_device heartbeat_device = {
	105	.name = "heartbeat",
	106	.id = -1,
	107	.dev = {
a1fd306b	108	.platform_data = &heartbeat_data,
3b4d9539	109	},
a09d2831 PM	110	.num_resources = 1,
a09d2831 PM	111	.resource = &heartbeat_resource,
3b4d9539 PM	112	};
3b4d9539 PM	113
4864841a NI	114	#if defined(CONFIG_CPU_SUBTYPE_SH7710) \|\|\
4864841a NI	115	defined(CONFIG_CPU_SUBTYPE_SH7712)
ffb91ad2 NI	116	/* SH771X Ethernet driver */
	117	static struct resource sh_eth0_resources[] = {
	118	[0] = {
	119	.start = SH_ETH0_BASE,
	120	.end = SH_ETH0_BASE + 0x1B8,
	121	.flags = IORESOURCE_MEM,
	122	},
	123	[1] = {
	124	.start = SH_ETH0_IRQ,
	125	.end = SH_ETH0_IRQ,
	126	.flags = IORESOURCE_IRQ,
	127	},
	128	};
	129
	130	static struct platform_device sh_eth0_device = {
	131	.name = "sh-eth",
	132	.id = 0,
	133	.dev = {
	134	.platform_data = PHY_ID,
	135	},
	136	.num_resources = ARRAY_SIZE(sh_eth0_resources),
	137	.resource = sh_eth0_resources,
	138	};
	139
	140	static struct resource sh_eth1_resources[] = {
	141	[0] = {
	142	.start = SH_ETH1_BASE,
	143	.end = SH_ETH1_BASE + 0x1B8,
	144	.flags = IORESOURCE_MEM,
	145	},
	146	[1] = {
	147	.start = SH_ETH1_IRQ,
	148	.end = SH_ETH1_IRQ,
	149	.flags = IORESOURCE_IRQ,
	150	},
	151	};
	152
	153	static struct platform_device sh_eth1_device = {
	154	.name = "sh-eth",
	155	.id = 1,
	156	.dev = {
	157	.platform_data = PHY_ID,
	158	},
	159	.num_resources = ARRAY_SIZE(sh_eth1_resources),
	160	.resource = sh_eth1_resources,
	161	};
4864841a	162	#endif
ffb91ad2	163
3b4d9539 PM	164	static struct platform_device *se_devices[] __initdata = {
3b4d9539 PM	165	&heartbeat_device,
f987fc88	166	&cf_ide_device,
4864841a NI	167	#if defined(CONFIG_CPU_SUBTYPE_SH7710) \|\|\
4864841a NI	168	defined(CONFIG_CPU_SUBTYPE_SH7712)
ffb91ad2 NI	169	&sh_eth0_device,
ffb91ad2 NI	170	&sh_eth1_device,
4864841a	171	#endif
3b4d9539 PM	172	};
	173
	174	static int __init se_devices_setup(void)
	175	{
073da9c0	176	mrshpc_setup_windows();
3b4d9539 PM	177	return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
3b4d9539 PM	178	}
9465a54f	179	device_initcall(se_devices_setup);
3b4d9539	180
1da177e4	181	/*
2c7834a6	182	* The Machine Vector
1da177e4	183	*/
82f81f47	184	static struct sh_machine_vector mv_se __initmv = {
2c7834a6 PM	185	.mv_name = "SolutionEngine",
	186	.mv_setup = smsc_setup,
	187	#if defined(CONFIG_CPU_SH4)
	188	.mv_nr_irqs = 48,
	189	#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
	190	.mv_nr_irqs = 32,
	191	#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
	192	.mv_nr_irqs = 61,
	193	#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
	194	.mv_nr_irqs = 86,
9465a54f NI	195	#elif defined(CONFIG_CPU_SUBTYPE_SH7710) \|\| defined(CONFIG_CPU_SUBTYPE_SH7712)
9465a54f NI	196	.mv_nr_irqs = 104,
2c7834a6	197	#endif
2c7834a6	198	.mv_init_irq = init_se_IRQ,
2c7834a6	199	};