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1da177e4 | 1 | /* |
f30c2269 | 2 | * linux/arch/sh/boards/superh/microdev/io.c |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) | |
5 | * Copyright (C) 2003, 2004 SuperH, Inc. | |
6 | * Copyright (C) 2004 Paul Mundt | |
7 | * | |
8 | * SuperH SH4-202 MicroDev board support. | |
9 | * | |
10 | * May be copied or modified under the terms of the GNU General Public | |
11 | * License. See linux/COPYING for more information. | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/init.h> |
15 | #include <linux/pci.h> | |
16 | #include <linux/wait.h> | |
17 | #include <asm/io.h> | |
7639a454 | 18 | #include <mach/microdev.h> |
1da177e4 LT |
19 | |
20 | /* | |
21 | * we need to have a 'safe' address to re-direct all I/O requests | |
22 | * that we do not explicitly wish to handle. This safe address | |
23 | * must have the following properies: | |
24 | * | |
25 | * * writes are ignored (no exception) | |
26 | * * reads are benign (no side-effects) | |
27 | * * accesses of width 1, 2 and 4-bytes are all valid. | |
28 | * | |
29 | * The Processor Version Register (PVR) has these properties. | |
30 | */ | |
31 | #define PVR 0xff000030 /* Processor Version Register */ | |
32 | ||
33 | ||
34 | #define IO_IDE2_BASE 0x170ul /* I/O base for SMSC FDC37C93xAPM IDE #2 */ | |
35 | #define IO_IDE1_BASE 0x1f0ul /* I/O base for SMSC FDC37C93xAPM IDE #1 */ | |
36 | #define IO_ISP1161_BASE 0x290ul /* I/O port for Philips ISP1161x USB chip */ | |
37 | #define IO_SERIAL2_BASE 0x2f8ul /* I/O base for SMSC FDC37C93xAPM Serial #2 */ | |
38 | #define IO_LAN91C111_BASE 0x300ul /* I/O base for SMSC LAN91C111 Ethernet chip */ | |
39 | #define IO_IDE2_MISC 0x376ul /* I/O misc for SMSC FDC37C93xAPM IDE #2 */ | |
40 | #define IO_SUPERIO_BASE 0x3f0ul /* I/O base for SMSC FDC37C93xAPM SuperIO chip */ | |
41 | #define IO_IDE1_MISC 0x3f6ul /* I/O misc for SMSC FDC37C93xAPM IDE #1 */ | |
42 | #define IO_SERIAL1_BASE 0x3f8ul /* I/O base for SMSC FDC37C93xAPM Serial #1 */ | |
43 | ||
44 | #define IO_ISP1161_EXTENT 0x04ul /* I/O extent for Philips ISP1161x USB chip */ | |
45 | #define IO_LAN91C111_EXTENT 0x10ul /* I/O extent for SMSC LAN91C111 Ethernet chip */ | |
46 | #define IO_SUPERIO_EXTENT 0x02ul /* I/O extent for SMSC FDC37C93xAPM SuperIO chip */ | |
47 | #define IO_IDE_EXTENT 0x08ul /* I/O extent for IDE Task Register set */ | |
48 | #define IO_SERIAL_EXTENT 0x10ul | |
49 | ||
50 | #define IO_LAN91C111_PHYS 0xa7500000ul /* Physical address of SMSC LAN91C111 Ethernet chip */ | |
51 | #define IO_ISP1161_PHYS 0xa7700000ul /* Physical address of Philips ISP1161x USB chip */ | |
52 | #define IO_SUPERIO_PHYS 0xa7800000ul /* Physical address of SMSC FDC37C93xAPM SuperIO chip */ | |
53 | ||
74017294 PM |
54 | /* |
55 | * map I/O ports to memory-mapped addresses | |
56 | */ | |
46bc8587 | 57 | void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len) |
74017294 PM |
58 | { |
59 | unsigned long result; | |
60 | ||
61 | if ((offset >= IO_LAN91C111_BASE) && | |
62 | (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) { | |
63 | /* | |
64 | * SMSC LAN91C111 Ethernet chip | |
65 | */ | |
66 | result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE; | |
67 | } else if ((offset >= IO_SUPERIO_BASE) && | |
68 | (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) { | |
69 | /* | |
70 | * SMSC FDC37C93xAPM SuperIO chip | |
71 | * | |
72 | * Configuration Registers | |
73 | */ | |
74 | result = IO_SUPERIO_PHYS + (offset << 1); | |
74017294 PM |
75 | } else if (((offset >= IO_IDE1_BASE) && |
76 | (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) || | |
77 | (offset == IO_IDE1_MISC)) { | |
78 | /* | |
79 | * SMSC FDC37C93xAPM SuperIO chip | |
80 | * | |
81 | * IDE #1 | |
82 | */ | |
83 | result = IO_SUPERIO_PHYS + (offset << 1); | |
84 | } else if (((offset >= IO_IDE2_BASE) && | |
85 | (offset < IO_IDE2_BASE + IO_IDE_EXTENT)) || | |
86 | (offset == IO_IDE2_MISC)) { | |
87 | /* | |
88 | * SMSC FDC37C93xAPM SuperIO chip | |
89 | * | |
90 | * IDE #2 | |
91 | */ | |
92 | result = IO_SUPERIO_PHYS + (offset << 1); | |
93 | } else if ((offset >= IO_SERIAL1_BASE) && | |
94 | (offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) { | |
95 | /* | |
96 | * SMSC FDC37C93xAPM SuperIO chip | |
97 | * | |
98 | * Serial #1 | |
99 | */ | |
100 | result = IO_SUPERIO_PHYS + (offset << 1); | |
101 | } else if ((offset >= IO_SERIAL2_BASE) && | |
102 | (offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) { | |
103 | /* | |
104 | * SMSC FDC37C93xAPM SuperIO chip | |
105 | * | |
106 | * Serial #2 | |
107 | */ | |
108 | result = IO_SUPERIO_PHYS + (offset << 1); | |
109 | } else if ((offset >= IO_ISP1161_BASE) && | |
110 | (offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) { | |
111 | /* | |
112 | * Philips USB ISP1161x chip | |
113 | */ | |
114 | result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE; | |
115 | } else { | |
116 | /* | |
117 | * safe default. | |
118 | */ | |
119 | printk("Warning: unexpected port in %s( offset = 0x%lx )\n", | |
866e6b9e | 120 | __func__, offset); |
74017294 PM |
121 | result = PVR; |
122 | } | |
123 | ||
46bc8587 | 124 | return (void __iomem *)result; |
1da177e4 | 125 | } |