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[net-next-2.6.git] / arch / sh / boards / mach-ecovec24 / setup.c
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1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
815f1995 14#include <linux/mfd/sh_mobile_sdhi.h>
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15#include <linux/mmc/host.h>
16#include <linux/mmc/sh_mmcif.h>
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17#include <linux/mtd/physmap.h>
18#include <linux/gpio.h>
19#include <linux/interrupt.h>
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20#include <linux/io.h>
21#include <linux/delay.h>
907050a3 22#include <linux/usb/r8a66597.h>
4907d57f 23#include <linux/i2c.h>
8810e055 24#include <linux/i2c/tsc2007.h>
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25#include <linux/spi/spi.h>
26#include <linux/spi/sh_msiof.h>
27#include <linux/spi/mmc_spi.h>
e9103e74 28#include <linux/input.h>
fc1d003d 29#include <linux/input/sh_keysc.h>
fa3ba51b 30#include <video/sh_mobile_lcdc.h>
1980fdc4 31#include <sound/sh_fsi.h>
2153ad32 32#include <media/sh_mobile_ceu.h>
207efd07 33#include <media/tw9910.h>
9aa25d64 34#include <media/mt9t112.h>
4138b740 35#include <asm/heartbeat.h>
35a35408 36#include <asm/sh_eth.h>
a991801a 37#include <asm/clock.h>
eb0cd9e8 38#include <asm/suspend.h>
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39#include <cpu/sh7724.h>
40
41/*
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42 * Address Interface BusWidth
43 *-----------------------------------------
44 * 0x0000_0000 uboot 16bit
45 * 0x0004_0000 Linux romImage 16bit
46 * 0x0014_0000 MTD for Linux 16bit
47 * 0x0400_0000 Internal I/O 16/32bit
48 * 0x0800_0000 DRAM 32bit
49 * 0x1800_0000 MFI 16bit
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50 */
51
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52/* SWITCH
53 *------------------------------
54 * DS2[1] = FlashROM write protect ON : write protect
55 * OFF : No write protect
56 * DS2[2] = RMII / TS, SCIF ON : RMII
57 * OFF : TS, SCIF3
58 * DS2[3] = Camera / Video ON : Camera
59 * OFF : NTSC/PAL (IN)
60 * DS2[5] = NTSC_OUT Clock ON : On board OSC
61 * OFF : SH7724 DV_CLK
62 * DS2[6-7] = MMC / SD ON-OFF : SD
63 * OFF-ON : MMC
64 */
65
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66/* Heartbeat */
67static unsigned char led_pos[] = { 0, 1, 2, 3 };
a09d2831 68
4138b740 69static struct heartbeat_data heartbeat_data = {
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70 .nr_bits = 4,
71 .bit_pos = led_pos,
72};
73
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74static struct resource heartbeat_resource = {
75 .start = 0xA405012C, /* PTG */
76 .end = 0xA405012E - 1,
77 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
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78};
79
80static struct platform_device heartbeat_device = {
81 .name = "heartbeat",
82 .id = -1,
83 .dev = {
84 .platform_data = &heartbeat_data,
85 },
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86 .num_resources = 1,
87 .resource = &heartbeat_resource,
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88};
89
90/* MTD */
91static struct mtd_partition nor_flash_partitions[] = {
92 {
b7056bc1 93 .name = "boot loader",
4138b740 94 .offset = 0,
b7056bc1 95 .size = (5 * 1024 * 1024),
d5ce010c 96 .mask_flags = MTD_WRITEABLE, /* force read-only */
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97 }, {
98 .name = "free-area",
99 .offset = MTDPART_OFS_APPEND,
100 .size = MTDPART_SIZ_FULL,
101 },
102};
103
104static struct physmap_flash_data nor_flash_data = {
105 .width = 2,
106 .parts = nor_flash_partitions,
107 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
108};
109
110static struct resource nor_flash_resources[] = {
111 [0] = {
112 .name = "NOR Flash",
113 .start = 0x00000000,
114 .end = 0x03ffffff,
115 .flags = IORESOURCE_MEM,
116 }
117};
118
119static struct platform_device nor_flash_device = {
120 .name = "physmap-flash",
121 .resource = nor_flash_resources,
122 .num_resources = ARRAY_SIZE(nor_flash_resources),
123 .dev = {
124 .platform_data = &nor_flash_data,
125 },
126};
127
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128/* SH Eth */
129#define SH_ETH_ADDR (0xA4600000)
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130static struct resource sh_eth_resources[] = {
131 [0] = {
132 .start = SH_ETH_ADDR,
133 .end = SH_ETH_ADDR + 0x1FC,
134 .flags = IORESOURCE_MEM,
135 },
136 [1] = {
137 .start = 91,
138 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
139 },
140};
141
3ce09334 142static struct sh_eth_plat_data sh_eth_plat = {
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143 .phy = 0x1f, /* SMSC LAN8700 */
144 .edmac_endian = EDMAC_LITTLE_ENDIAN,
acf3cc28 145 .ether_link_active_low = 1
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146};
147
148static struct platform_device sh_eth_device = {
149 .name = "sh-eth",
150 .id = 0,
151 .dev = {
152 .platform_data = &sh_eth_plat,
153 },
154 .num_resources = ARRAY_SIZE(sh_eth_resources),
155 .resource = sh_eth_resources,
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156 .archdata = {
157 .hwblk_id = HWBLK_ETHER,
158 },
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159};
160
907050a3 161/* USB0 host */
3ce09334 162static void usb0_port_power(int port, int power)
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163{
164 gpio_set_value(GPIO_PTB4, power);
165}
166
167static struct r8a66597_platdata usb0_host_data = {
168 .on_chip = 1,
169 .port_power = usb0_port_power,
170};
171
172static struct resource usb0_host_resources[] = {
173 [0] = {
174 .start = 0xa4d80000,
175 .end = 0xa4d80124 - 1,
176 .flags = IORESOURCE_MEM,
177 },
178 [1] = {
179 .start = 65,
180 .end = 65,
181 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
182 },
183};
184
185static struct platform_device usb0_host_device = {
186 .name = "r8a66597_hcd",
187 .id = 0,
188 .dev = {
189 .dma_mask = NULL, /* not use dma */
190 .coherent_dma_mask = 0xffffffff,
191 .platform_data = &usb0_host_data,
192 },
193 .num_resources = ARRAY_SIZE(usb0_host_resources),
194 .resource = usb0_host_resources,
195};
196
3714a9a0 197/* USB1 host/function */
3ce09334 198static void usb1_port_power(int port, int power)
907050a3 199{
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200 gpio_set_value(GPIO_PTB5, power);
201}
202
3714a9a0 203static struct r8a66597_platdata usb1_common_data = {
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204 .on_chip = 1,
205 .port_power = usb1_port_power,
206};
207
3714a9a0 208static struct resource usb1_common_resources[] = {
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209 [0] = {
210 .start = 0xa4d90000,
211 .end = 0xa4d90124 - 1,
212 .flags = IORESOURCE_MEM,
213 },
214 [1] = {
215 .start = 66,
216 .end = 66,
217 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
218 },
219};
220
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221static struct platform_device usb1_common_device = {
222 /* .name will be added in arch_setup */
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223 .id = 1,
224 .dev = {
225 .dma_mask = NULL, /* not use dma */
226 .coherent_dma_mask = 0xffffffff,
3714a9a0 227 .platform_data = &usb1_common_data,
907050a3 228 },
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229 .num_resources = ARRAY_SIZE(usb1_common_resources),
230 .resource = usb1_common_resources,
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231};
232
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233/* LCDC */
234static struct sh_mobile_lcdc_info lcdc_info = {
235 .ch[0] = {
236 .interface_type = RGB18,
237 .chan = LCDC_CHAN_MAINLCD,
238 .bpp = 16,
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239 .lcd_cfg = {
240 .sync = 0, /* hsync and vsync are active low */
241 },
242 .lcd_size_cfg = { /* 7.0 inch */
243 .width = 152,
244 .height = 91,
245 },
246 .board_cfg = {
247 },
248 }
249};
250
251static struct resource lcdc_resources[] = {
252 [0] = {
253 .name = "LCDC",
254 .start = 0xfe940000,
a6f15ade 255 .end = 0xfe942fff,
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256 .flags = IORESOURCE_MEM,
257 },
258 [1] = {
259 .start = 106,
260 .flags = IORESOURCE_IRQ,
261 },
262};
263
264static struct platform_device lcdc_device = {
265 .name = "sh_mobile_lcdc_fb",
266 .num_resources = ARRAY_SIZE(lcdc_resources),
267 .resource = lcdc_resources,
268 .dev = {
269 .platform_data = &lcdc_info,
270 },
271 .archdata = {
272 .hwblk_id = HWBLK_LCDC,
273 },
274};
275
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276/* CEU0 */
277static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
278 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
279};
280
281static struct resource ceu0_resources[] = {
282 [0] = {
283 .name = "CEU0",
284 .start = 0xfe910000,
285 .end = 0xfe91009f,
286 .flags = IORESOURCE_MEM,
287 },
288 [1] = {
289 .start = 52,
290 .flags = IORESOURCE_IRQ,
291 },
292 [2] = {
293 /* place holder for contiguous memory */
294 },
295};
296
297static struct platform_device ceu0_device = {
298 .name = "sh_mobile_ceu",
299 .id = 0, /* "ceu0" clock */
300 .num_resources = ARRAY_SIZE(ceu0_resources),
301 .resource = ceu0_resources,
302 .dev = {
303 .platform_data = &sh_mobile_ceu0_info,
304 },
305 .archdata = {
306 .hwblk_id = HWBLK_CEU0,
307 },
308};
309
310/* CEU1 */
311static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
312 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
313};
314
315static struct resource ceu1_resources[] = {
316 [0] = {
317 .name = "CEU1",
318 .start = 0xfe914000,
319 .end = 0xfe91409f,
320 .flags = IORESOURCE_MEM,
321 },
322 [1] = {
323 .start = 63,
324 .flags = IORESOURCE_IRQ,
325 },
326 [2] = {
327 /* place holder for contiguous memory */
328 },
329};
330
331static struct platform_device ceu1_device = {
332 .name = "sh_mobile_ceu",
333 .id = 1, /* "ceu1" clock */
334 .num_resources = ARRAY_SIZE(ceu1_resources),
335 .resource = ceu1_resources,
336 .dev = {
337 .platform_data = &sh_mobile_ceu1_info,
338 },
339 .archdata = {
340 .hwblk_id = HWBLK_CEU1,
341 },
342};
343
125ecce6 344/* I2C device */
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345static struct i2c_board_info i2c0_devices[] = {
346 {
347 I2C_BOARD_INFO("da7210", 0x1a),
348 },
349};
350
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351static struct i2c_board_info i2c1_devices[] = {
352 {
353 I2C_BOARD_INFO("r2025sd", 0x32),
354 },
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355 {
356 I2C_BOARD_INFO("lis3lv02d", 0x1c),
357 .irq = 33,
358 }
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359};
360
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361/* KEYSC */
362static struct sh_keysc_info keysc_info = {
363 .mode = SH_KEYSC_MODE_1,
364 .scan_timing = 3,
365 .delay = 50,
366 .kycr2_delay = 100,
367 .keycodes = { KEY_1, 0, 0, 0, 0,
368 KEY_2, 0, 0, 0, 0,
369 KEY_3, 0, 0, 0, 0,
370 KEY_4, 0, 0, 0, 0,
371 KEY_5, 0, 0, 0, 0,
372 KEY_6, 0, 0, 0, 0, },
373};
374
375static struct resource keysc_resources[] = {
376 [0] = {
377 .name = "KEYSC",
378 .start = 0x044b0000,
379 .end = 0x044b000f,
380 .flags = IORESOURCE_MEM,
381 },
382 [1] = {
383 .start = 79,
384 .flags = IORESOURCE_IRQ,
385 },
386};
387
388static struct platform_device keysc_device = {
389 .name = "sh_keysc",
390 .id = 0, /* keysc0 clock */
391 .num_resources = ARRAY_SIZE(keysc_resources),
392 .resource = keysc_resources,
393 .dev = {
394 .platform_data = &keysc_info,
395 },
396 .archdata = {
397 .hwblk_id = HWBLK_KEYSC,
398 },
399};
400
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401/* TouchScreen */
402#define IRQ0 32
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403static int ts_get_pendown_state(void)
404{
405 int val = 0;
406 gpio_free(GPIO_FN_INTC_IRQ0);
407 gpio_request(GPIO_PTZ0, NULL);
408 gpio_direction_input(GPIO_PTZ0);
409
410 val = gpio_get_value(GPIO_PTZ0);
411
412 gpio_free(GPIO_PTZ0);
413 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
414
415 return val ? 0 : 1;
416}
417
418static int ts_init(void)
419{
420 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
421 return 0;
422}
423
3ce09334 424static struct tsc2007_platform_data tsc2007_info = {
8810e055 425 .model = 2007,
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426 .x_plate_ohms = 180,
427 .get_pendown_state = ts_get_pendown_state,
428 .init_platform_hw = ts_init,
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429};
430
431static struct i2c_board_info ts_i2c_clients = {
432 I2C_BOARD_INFO("tsc2007", 0x48),
433 .type = "tsc2007",
434 .platform_data = &tsc2007_info,
435 .irq = IRQ0,
436};
437
1ce4da7a 438#ifdef CONFIG_MFD_SH_MOBILE_SDHI
1238c684 439/* SDHI0 */
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440static void sdhi0_set_pwr(struct platform_device *pdev, int state)
441{
442 gpio_set_value(GPIO_PTB6, state);
443}
444
445static struct sh_mobile_sdhi_info sdhi0_info = {
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446 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
447 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
448 .set_pwr = sdhi0_set_pwr,
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449};
450
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451static struct resource sdhi0_resources[] = {
452 [0] = {
453 .name = "SDHI0",
454 .start = 0x04ce0000,
455 .end = 0x04ce01ff,
456 .flags = IORESOURCE_MEM,
457 },
458 [1] = {
3844eadc 459 .start = 100,
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460 .flags = IORESOURCE_IRQ,
461 },
462};
463
464static struct platform_device sdhi0_device = {
465 .name = "sh_mobile_sdhi",
466 .num_resources = ARRAY_SIZE(sdhi0_resources),
467 .resource = sdhi0_resources,
468 .id = 0,
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469 .dev = {
470 .platform_data = &sdhi0_info,
471 },
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472 .archdata = {
473 .hwblk_id = HWBLK_SDHI0,
474 },
475};
476
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477#if !defined(CONFIG_MMC_SH_MMCIF)
478/* SDHI1 */
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479static void sdhi1_set_pwr(struct platform_device *pdev, int state)
480{
481 gpio_set_value(GPIO_PTB7, state);
482}
483
484static struct sh_mobile_sdhi_info sdhi1_info = {
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485 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
486 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
487 .set_pwr = sdhi1_set_pwr,
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488};
489
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490static struct resource sdhi1_resources[] = {
491 [0] = {
492 .name = "SDHI1",
493 .start = 0x04cf0000,
494 .end = 0x04cf01ff,
495 .flags = IORESOURCE_MEM,
496 },
497 [1] = {
3844eadc 498 .start = 23,
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499 .flags = IORESOURCE_IRQ,
500 },
501};
502
503static struct platform_device sdhi1_device = {
504 .name = "sh_mobile_sdhi",
505 .num_resources = ARRAY_SIZE(sdhi1_resources),
506 .resource = sdhi1_resources,
507 .id = 1,
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508 .dev = {
509 .platform_data = &sdhi1_info,
510 },
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511 .archdata = {
512 .hwblk_id = HWBLK_SDHI1,
513 },
514};
1238c684 515#endif /* CONFIG_MMC_SH_MMCIF */
96987d96 516
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517#else
518
9503e891 519/* MMC SPI */
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520static int mmc_spi_get_ro(struct device *dev)
521{
522 return gpio_get_value(GPIO_PTY6);
523}
524
525static int mmc_spi_get_cd(struct device *dev)
526{
527 return !gpio_get_value(GPIO_PTY7);
528}
529
530static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
531{
532 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
533}
534
535static struct mmc_spi_platform_data mmc_spi_info = {
536 .get_ro = mmc_spi_get_ro,
537 .get_cd = mmc_spi_get_cd,
538 .caps = MMC_CAP_NEEDS_POLL,
539 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
540 .setpower = mmc_spi_setpower,
541};
542
543static struct spi_board_info spi_bus[] = {
544 {
545 .modalias = "mmc_spi",
546 .platform_data = &mmc_spi_info,
547 .max_speed_hz = 5000000,
548 .mode = SPI_MODE_0,
549 .controller_data = (void *) GPIO_PTM4,
550 },
551};
552
9503e891 553/* MSIOF0 */
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554static struct sh_msiof_spi_info msiof0_data = {
555 .num_chipselect = 1,
556};
557
558static struct resource msiof0_resources[] = {
559 [0] = {
560 .name = "MSIOF0",
561 .start = 0xa4c40000,
562 .end = 0xa4c40063,
563 .flags = IORESOURCE_MEM,
564 },
565 [1] = {
566 .start = 84,
567 .flags = IORESOURCE_IRQ,
568 },
569};
570
571static struct platform_device msiof0_device = {
572 .name = "spi_sh_msiof",
573 .id = 0, /* MSIOF0 */
574 .dev = {
575 .platform_data = &msiof0_data,
576 },
577 .num_resources = ARRAY_SIZE(msiof0_resources),
578 .resource = msiof0_resources,
579 .archdata = {
580 .hwblk_id = HWBLK_MSIOF0,
581 },
582};
583
584#endif
585
9aa25d64 586/* I2C Video/Camera */
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587static struct i2c_board_info i2c_camera[] = {
588 {
589 I2C_BOARD_INFO("tw9910", 0x45),
590 },
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591 {
592 /* 1st camera */
593 I2C_BOARD_INFO("mt9t112", 0x3c),
594 },
595 {
596 /* 2nd camera */
597 I2C_BOARD_INFO("mt9t112", 0x3c),
598 },
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599};
600
601/* tw9910 */
602static int tw9910_power(struct device *dev, int mode)
603{
604 int val = mode ? 0 : 1;
605
606 gpio_set_value(GPIO_PTU2, val);
607 if (mode)
608 mdelay(100);
609
610 return 0;
611}
612
613static struct tw9910_video_info tw9910_info = {
614 .buswidth = SOCAM_DATAWIDTH_8,
615 .mpout = TW9910_MPO_FIELD,
616};
617
618static struct soc_camera_link tw9910_link = {
619 .i2c_adapter_id = 0,
620 .bus_id = 1,
621 .power = tw9910_power,
622 .board_info = &i2c_camera[0],
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623 .priv = &tw9910_info,
624};
625
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626/* mt9t112 */
627static int mt9t112_power1(struct device *dev, int mode)
628{
629 gpio_set_value(GPIO_PTA3, mode);
630 if (mode)
631 mdelay(100);
632
633 return 0;
634}
635
636static struct mt9t112_camera_info mt9t112_info1 = {
637 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
638 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
639};
640
641static struct soc_camera_link mt9t112_link1 = {
642 .i2c_adapter_id = 0,
643 .power = mt9t112_power1,
644 .bus_id = 0,
645 .board_info = &i2c_camera[1],
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646 .priv = &mt9t112_info1,
647};
648
649static int mt9t112_power2(struct device *dev, int mode)
650{
651 gpio_set_value(GPIO_PTA4, mode);
652 if (mode)
653 mdelay(100);
654
655 return 0;
656}
657
658static struct mt9t112_camera_info mt9t112_info2 = {
659 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
660 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
661};
662
663static struct soc_camera_link mt9t112_link2 = {
664 .i2c_adapter_id = 1,
665 .power = mt9t112_power2,
666 .bus_id = 1,
667 .board_info = &i2c_camera[2],
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668 .priv = &mt9t112_info2,
669};
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670
671static struct platform_device camera_devices[] = {
672 {
673 .name = "soc-camera-pdrv",
674 .id = 0,
675 .dev = {
676 .platform_data = &tw9910_link,
677 },
678 },
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679 {
680 .name = "soc-camera-pdrv",
681 .id = 1,
682 .dev = {
683 .platform_data = &mt9t112_link1,
684 },
685 },
686 {
687 .name = "soc-camera-pdrv",
688 .id = 2,
689 .dev = {
690 .platform_data = &mt9t112_link2,
691 },
692 },
207efd07
KM
693};
694
1980fdc4
KM
695/* FSI */
696/*
697 * FSI-B use external clock which came from da7210.
698 * So, we should change parent of fsi
699 */
700#define FCLKBCR 0xa415000c
701static void fsimck_init(struct clk *clk)
702{
9d56dd3b 703 u32 status = __raw_readl(clk->enable_reg);
1980fdc4
KM
704
705 /* use external clock */
706 status &= ~0x000000ff;
707 status |= 0x00000080;
708
9d56dd3b 709 __raw_writel(status, clk->enable_reg);
1980fdc4
KM
710}
711
712static struct clk_ops fsimck_clk_ops = {
713 .init = fsimck_init,
714};
715
716static struct clk fsimckb_clk = {
1980fdc4
KM
717 .ops = &fsimck_clk_ops,
718 .enable_reg = (void __iomem *)FCLKBCR,
719 .rate = 0, /* unknown */
720};
721
3ce09334 722static struct sh_fsi_platform_info fsi_info = {
1980fdc4
KM
723 .portb_flags = SH_FSI_BRS_INV |
724 SH_FSI_OUT_SLAVE_MODE |
725 SH_FSI_IN_SLAVE_MODE |
726 SH_FSI_OFMT(I2S) |
727 SH_FSI_IFMT(I2S),
728};
729
730static struct resource fsi_resources[] = {
731 [0] = {
732 .name = "FSI",
733 .start = 0xFE3C0000,
734 .end = 0xFE3C021d,
735 .flags = IORESOURCE_MEM,
736 },
737 [1] = {
738 .start = 108,
739 .flags = IORESOURCE_IRQ,
740 },
741};
742
743static struct platform_device fsi_device = {
744 .name = "sh_fsi",
745 .id = 0,
746 .num_resources = ARRAY_SIZE(fsi_resources),
747 .resource = fsi_resources,
748 .dev = {
749 .platform_data = &fsi_info,
750 },
751 .archdata = {
752 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
753 },
754};
755
26365716
KM
756/* IrDA */
757static struct resource irda_resources[] = {
758 [0] = {
759 .name = "IrDA",
760 .start = 0xA45D0000,
761 .end = 0xA45D0049,
762 .flags = IORESOURCE_MEM,
763 },
764 [1] = {
765 .start = 20,
766 .flags = IORESOURCE_IRQ,
767 },
768};
769
770static struct platform_device irda_device = {
771 .name = "sh_sir",
772 .num_resources = ARRAY_SIZE(irda_resources),
773 .resource = irda_resources,
774};
775
aee5ab0b
GL
776#include <media/ak881x.h>
777#include <media/sh_vou.h>
778
3ce09334 779static struct ak881x_pdata ak881x_pdata = {
aee5ab0b
GL
780 .flags = AK881X_IF_MODE_SLAVE,
781};
782
783static struct i2c_board_info ak8813 = {
784 I2C_BOARD_INFO("ak8813", 0x20),
785 .platform_data = &ak881x_pdata,
786};
787
3ce09334 788static struct sh_vou_pdata sh_vou_pdata = {
aee5ab0b
GL
789 .bus_fmt = SH_VOU_BUS_8BIT,
790 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
791 .board_info = &ak8813,
792 .i2c_adap = 0,
aee5ab0b
GL
793};
794
795static struct resource sh_vou_resources[] = {
796 [0] = {
797 .start = 0xfe960000,
798 .end = 0xfe962043,
799 .flags = IORESOURCE_MEM,
800 },
801 [1] = {
802 .start = 55,
803 .flags = IORESOURCE_IRQ,
804 },
805};
806
807static struct platform_device vou_device = {
808 .name = "sh-vou",
809 .id = -1,
810 .num_resources = ARRAY_SIZE(sh_vou_resources),
811 .resource = sh_vou_resources,
812 .dev = {
813 .platform_data = &sh_vou_pdata,
814 },
815 .archdata = {
816 .hwblk_id = HWBLK_VOU,
817 },
818};
819
1238c684
YG
820#if defined(CONFIG_MMC_SH_MMCIF)
821/* SH_MMCIF */
822static void mmcif_set_pwr(struct platform_device *pdev, int state)
823{
824 gpio_set_value(GPIO_PTB7, state);
825}
826
827static void mmcif_down_pwr(struct platform_device *pdev)
828{
829 gpio_set_value(GPIO_PTB7, 0);
830}
831
832static struct resource sh_mmcif_resources[] = {
833 [0] = {
834 .name = "SH_MMCIF",
835 .start = 0xA4CA0000,
836 .end = 0xA4CA00FF,
837 .flags = IORESOURCE_MEM,
838 },
839 [1] = {
840 /* MMC2I */
841 .start = 29,
842 .flags = IORESOURCE_IRQ,
843 },
844 [2] = {
845 /* MMC3I */
846 .start = 30,
847 .flags = IORESOURCE_IRQ,
848 },
849};
850
3ce09334 851static struct sh_mmcif_plat_data sh_mmcif_plat = {
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YG
852 .set_pwr = mmcif_set_pwr,
853 .down_pwr = mmcif_down_pwr,
854 .sup_pclk = 0, /* SH7724: Max Pclk/2 */
855 .caps = MMC_CAP_4_BIT_DATA |
856 MMC_CAP_8_BIT_DATA |
857 MMC_CAP_NEEDS_POLL,
858 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
859};
860
861static struct platform_device sh_mmcif_device = {
862 .name = "sh_mmcif",
863 .id = 0,
864 .dev = {
865 .platform_data = &sh_mmcif_plat,
866 },
867 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
868 .resource = sh_mmcif_resources,
869};
870#endif
871
4138b740
KM
872static struct platform_device *ecovec_devices[] __initdata = {
873 &heartbeat_device,
874 &nor_flash_device,
35a35408 875 &sh_eth_device,
907050a3 876 &usb0_host_device,
3714a9a0 877 &usb1_common_device,
fa3ba51b 878 &lcdc_device,
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KM
879 &ceu0_device,
880 &ceu1_device,
e9103e74 881 &keysc_device,
1ce4da7a 882#ifdef CONFIG_MFD_SH_MOBILE_SDHI
96987d96 883 &sdhi0_device,
1238c684 884#if !defined(CONFIG_MMC_SH_MMCIF)
96987d96 885 &sdhi1_device,
1238c684 886#endif
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MD
887#else
888 &msiof0_device,
889#endif
207efd07 890 &camera_devices[0],
9aa25d64
KM
891 &camera_devices[1],
892 &camera_devices[2],
1980fdc4 893 &fsi_device,
26365716 894 &irda_device,
aee5ab0b 895 &vou_device,
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YG
896#if defined(CONFIG_MMC_SH_MMCIF)
897 &sh_mmcif_device,
898#endif
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KM
899};
900
6b3b5575 901#ifdef CONFIG_I2C
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KM
902#define EEPROM_ADDR 0x50
903static u8 mac_read(struct i2c_adapter *a, u8 command)
904{
905 struct i2c_msg msg[2];
906 u8 buf;
907 int ret;
908
909 msg[0].addr = EEPROM_ADDR;
910 msg[0].flags = 0;
911 msg[0].len = 1;
912 msg[0].buf = &command;
913
914 msg[1].addr = EEPROM_ADDR;
915 msg[1].flags = I2C_M_RD;
916 msg[1].len = 1;
917 msg[1].buf = &buf;
918
919 ret = i2c_transfer(a, msg, 2);
920 if (ret < 0) {
921 printk(KERN_ERR "error %d\n", ret);
922 buf = 0xff;
923 }
924
925 return buf;
926}
927
376abbb4 928static void __init sh_eth_init(struct sh_eth_plat_data *pd)
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KM
929{
930 struct i2c_adapter *a = i2c_get_adapter(1);
4907d57f
KM
931 int i;
932
933 if (!a) {
934 pr_err("can not get I2C 1\n");
935 return;
936 }
937
4907d57f 938 /* read MAC address frome EEPROM */
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MD
939 for (i = 0; i < sizeof(pd->mac_addr); i++) {
940 pd->mac_addr[i] = mac_read(a, 0x10 + i);
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KM
941 msleep(10);
942 }
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KM
943
944 i2c_put_adapter(a);
4907d57f 945}
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MD
946#else
947static void __init sh_eth_init(struct sh_eth_plat_data *pd)
948{
949 pr_err("unable to read sh_eth MAC address\n");
950}
951#endif
4907d57f 952
fa3ba51b 953#define PORT_HIZA 0xA4050158
ea15edb2 954#define IODRIVEA 0xA405018A
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MD
955
956extern char ecovec24_sdram_enter_start;
957extern char ecovec24_sdram_enter_end;
958extern char ecovec24_sdram_leave_start;
959extern char ecovec24_sdram_leave_end;
960
4907d57f 961static int __init arch_setup(void)
4138b740 962{
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KM
963 struct clk *clk;
964
eb0cd9e8 965 /* register board specific self-refresh code */
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MD
966 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
967 SUSP_SH_RSTANDBY,
eb0cd9e8
MD
968 &ecovec24_sdram_enter_start,
969 &ecovec24_sdram_enter_end,
970 &ecovec24_sdram_leave_start,
971 &ecovec24_sdram_leave_end);
972
f78bab30
MD
973 /* enable STATUS0, STATUS2 and PDSTATUS */
974 gpio_request(GPIO_FN_STATUS0, NULL);
975 gpio_request(GPIO_FN_STATUS2, NULL);
976 gpio_request(GPIO_FN_PDSTATUS, NULL);
977
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KM
978 /* enable SCIFA0 */
979 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
980 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
4138b740
KM
981
982 /* enable debug LED */
983 gpio_request(GPIO_PTG0, NULL);
984 gpio_request(GPIO_PTG1, NULL);
985 gpio_request(GPIO_PTG2, NULL);
986 gpio_request(GPIO_PTG3, NULL);
b7056bc1
KM
987 gpio_direction_output(GPIO_PTG0, 0);
988 gpio_direction_output(GPIO_PTG1, 0);
989 gpio_direction_output(GPIO_PTG2, 0);
990 gpio_direction_output(GPIO_PTG3, 0);
9d56dd3b 991 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
4138b740 992
35a35408
KM
993 /* enable SH-Eth */
994 gpio_request(GPIO_PTA1, NULL);
995 gpio_direction_output(GPIO_PTA1, 1);
996 mdelay(20);
997
998 gpio_request(GPIO_FN_RMII_RXD0, NULL);
999 gpio_request(GPIO_FN_RMII_RXD1, NULL);
1000 gpio_request(GPIO_FN_RMII_TXD0, NULL);
1001 gpio_request(GPIO_FN_RMII_TXD1, NULL);
1002 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1003 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
1004 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
1005 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
1006 gpio_request(GPIO_FN_MDIO, NULL);
1007 gpio_request(GPIO_FN_MDC, NULL);
1008 gpio_request(GPIO_FN_LNKSTA, NULL);
1009
907050a3 1010 /* enable USB */
9d56dd3b
PM
1011 __raw_writew(0x0000, 0xA4D80000);
1012 __raw_writew(0x0000, 0xA4D90000);
907050a3
KM
1013 gpio_request(GPIO_PTB3, NULL);
1014 gpio_request(GPIO_PTB4, NULL);
1015 gpio_request(GPIO_PTB5, NULL);
1016 gpio_direction_input(GPIO_PTB3);
1017 gpio_direction_output(GPIO_PTB4, 0);
1018 gpio_direction_output(GPIO_PTB5, 0);
9d56dd3b
PM
1019 __raw_writew(0x0600, 0xa40501d4);
1020 __raw_writew(0x0600, 0xa4050192);
907050a3 1021
3714a9a0
KM
1022 if (gpio_get_value(GPIO_PTB3)) {
1023 printk(KERN_INFO "USB1 function is selected\n");
1024 usb1_common_device.name = "r8a66597_udc";
1025 } else {
1026 printk(KERN_INFO "USB1 host is selected\n");
1027 usb1_common_device.name = "r8a66597_hcd";
1028 }
1029
fa3ba51b
KM
1030 /* enable LCDC */
1031 gpio_request(GPIO_FN_LCDD23, NULL);
1032 gpio_request(GPIO_FN_LCDD22, NULL);
1033 gpio_request(GPIO_FN_LCDD21, NULL);
1034 gpio_request(GPIO_FN_LCDD20, NULL);
1035 gpio_request(GPIO_FN_LCDD19, NULL);
1036 gpio_request(GPIO_FN_LCDD18, NULL);
1037 gpio_request(GPIO_FN_LCDD17, NULL);
1038 gpio_request(GPIO_FN_LCDD16, NULL);
1039 gpio_request(GPIO_FN_LCDD15, NULL);
1040 gpio_request(GPIO_FN_LCDD14, NULL);
1041 gpio_request(GPIO_FN_LCDD13, NULL);
1042 gpio_request(GPIO_FN_LCDD12, NULL);
1043 gpio_request(GPIO_FN_LCDD11, NULL);
1044 gpio_request(GPIO_FN_LCDD10, NULL);
1045 gpio_request(GPIO_FN_LCDD9, NULL);
1046 gpio_request(GPIO_FN_LCDD8, NULL);
1047 gpio_request(GPIO_FN_LCDD7, NULL);
1048 gpio_request(GPIO_FN_LCDD6, NULL);
1049 gpio_request(GPIO_FN_LCDD5, NULL);
1050 gpio_request(GPIO_FN_LCDD4, NULL);
1051 gpio_request(GPIO_FN_LCDD3, NULL);
1052 gpio_request(GPIO_FN_LCDD2, NULL);
1053 gpio_request(GPIO_FN_LCDD1, NULL);
1054 gpio_request(GPIO_FN_LCDD0, NULL);
1055 gpio_request(GPIO_FN_LCDDISP, NULL);
1056 gpio_request(GPIO_FN_LCDHSYN, NULL);
1057 gpio_request(GPIO_FN_LCDDCK, NULL);
1058 gpio_request(GPIO_FN_LCDVSYN, NULL);
1059 gpio_request(GPIO_FN_LCDDON, NULL);
1060 gpio_request(GPIO_FN_LCDLCLK, NULL);
9d56dd3b 1061 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
fa3ba51b
KM
1062
1063 gpio_request(GPIO_PTE6, NULL);
1064 gpio_request(GPIO_PTU1, NULL);
1065 gpio_request(GPIO_PTR1, NULL);
1066 gpio_request(GPIO_PTA2, NULL);
1067 gpio_direction_input(GPIO_PTE6);
1068 gpio_direction_output(GPIO_PTU1, 0);
1069 gpio_direction_output(GPIO_PTR1, 0);
1070 gpio_direction_output(GPIO_PTA2, 0);
1071
82b33221 1072 /* I/O buffer drive ability is high */
9d56dd3b 1073 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
ea15edb2 1074
fa3ba51b
KM
1075 if (gpio_get_value(GPIO_PTE6)) {
1076 /* DVI */
1077 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
ea15edb2 1078 lcdc_info.ch[0].clock_divider = 1,
fa3ba51b
KM
1079 lcdc_info.ch[0].lcd_cfg.name = "DVI";
1080 lcdc_info.ch[0].lcd_cfg.xres = 1280;
1081 lcdc_info.ch[0].lcd_cfg.yres = 720;
1082 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
1083 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
1084 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
1085 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
1086 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
1087 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
1088
1089 gpio_set_value(GPIO_PTA2, 1);
1090 gpio_set_value(GPIO_PTU1, 1);
1091 } else {
1092 /* Panel */
ea15edb2
KM
1093
1094 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1095 lcdc_info.ch[0].clock_divider = 2,
1096 lcdc_info.ch[0].lcd_cfg.name = "Panel";
1097 lcdc_info.ch[0].lcd_cfg.xres = 800;
1098 lcdc_info.ch[0].lcd_cfg.yres = 480;
1099 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
1100 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
1101 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
1102 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
1103 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
1104 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
1105
1106 gpio_set_value(GPIO_PTR1, 1);
1107
1108 /* FIXME
1109 *
1110 * LCDDON control is needed for Panel,
1111 * but current sh_mobile_lcdc driver doesn't control it.
1112 * It is temporary correspondence
1113 */
1114 gpio_request(GPIO_PTF4, NULL);
1115 gpio_direction_output(GPIO_PTF4, 1);
8810e055
KM
1116
1117 /* enable TouchScreen */
1118 i2c_register_board_info(0, &ts_i2c_clients, 1);
1119 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
fa3ba51b
KM
1120 }
1121
2153ad32
KM
1122 /* enable CEU0 */
1123 gpio_request(GPIO_FN_VIO0_D15, NULL);
1124 gpio_request(GPIO_FN_VIO0_D14, NULL);
1125 gpio_request(GPIO_FN_VIO0_D13, NULL);
1126 gpio_request(GPIO_FN_VIO0_D12, NULL);
1127 gpio_request(GPIO_FN_VIO0_D11, NULL);
1128 gpio_request(GPIO_FN_VIO0_D10, NULL);
1129 gpio_request(GPIO_FN_VIO0_D9, NULL);
1130 gpio_request(GPIO_FN_VIO0_D8, NULL);
1131 gpio_request(GPIO_FN_VIO0_D7, NULL);
1132 gpio_request(GPIO_FN_VIO0_D6, NULL);
1133 gpio_request(GPIO_FN_VIO0_D5, NULL);
1134 gpio_request(GPIO_FN_VIO0_D4, NULL);
1135 gpio_request(GPIO_FN_VIO0_D3, NULL);
1136 gpio_request(GPIO_FN_VIO0_D2, NULL);
1137 gpio_request(GPIO_FN_VIO0_D1, NULL);
1138 gpio_request(GPIO_FN_VIO0_D0, NULL);
1139 gpio_request(GPIO_FN_VIO0_VD, NULL);
1140 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1141 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1142 gpio_request(GPIO_FN_VIO0_HD, NULL);
1143 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1144
1145 /* enable CEU1 */
1146 gpio_request(GPIO_FN_VIO1_D7, NULL);
1147 gpio_request(GPIO_FN_VIO1_D6, NULL);
1148 gpio_request(GPIO_FN_VIO1_D5, NULL);
1149 gpio_request(GPIO_FN_VIO1_D4, NULL);
1150 gpio_request(GPIO_FN_VIO1_D3, NULL);
1151 gpio_request(GPIO_FN_VIO1_D2, NULL);
1152 gpio_request(GPIO_FN_VIO1_D1, NULL);
1153 gpio_request(GPIO_FN_VIO1_D0, NULL);
1154 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1155 gpio_request(GPIO_FN_VIO1_HD, NULL);
1156 gpio_request(GPIO_FN_VIO1_VD, NULL);
1157 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1158 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1159
e9103e74
KM
1160 /* enable KEYSC */
1161 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1162 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1163 gpio_request(GPIO_FN_KEYOUT3, NULL);
1164 gpio_request(GPIO_FN_KEYOUT2, NULL);
1165 gpio_request(GPIO_FN_KEYOUT1, NULL);
1166 gpio_request(GPIO_FN_KEYOUT0, NULL);
1167 gpio_request(GPIO_FN_KEYIN0, NULL);
1168
064a16dc
KM
1169 /* enable user debug switch */
1170 gpio_request(GPIO_PTR0, NULL);
1171 gpio_request(GPIO_PTR4, NULL);
1172 gpio_request(GPIO_PTR5, NULL);
1173 gpio_request(GPIO_PTR6, NULL);
1174 gpio_direction_input(GPIO_PTR0);
1175 gpio_direction_input(GPIO_PTR4);
1176 gpio_direction_input(GPIO_PTR5);
1177 gpio_direction_input(GPIO_PTR6);
1178
1ce4da7a
MD
1179#ifdef CONFIG_MFD_SH_MOBILE_SDHI
1180 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
96987d96
KM
1181 gpio_request(GPIO_FN_SDHI0CD, NULL);
1182 gpio_request(GPIO_FN_SDHI0WP, NULL);
1183 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1184 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1185 gpio_request(GPIO_FN_SDHI0D3, NULL);
1186 gpio_request(GPIO_FN_SDHI0D2, NULL);
1187 gpio_request(GPIO_FN_SDHI0D1, NULL);
1188 gpio_request(GPIO_FN_SDHI0D0, NULL);
98779ad8
MD
1189 gpio_request(GPIO_PTB6, NULL);
1190 gpio_direction_output(GPIO_PTB6, 0);
96987d96 1191
1238c684 1192#if !defined(CONFIG_MMC_SH_MMCIF)
1ce4da7a 1193 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
96987d96
KM
1194 gpio_request(GPIO_FN_SDHI1CD, NULL);
1195 gpio_request(GPIO_FN_SDHI1WP, NULL);
1196 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1197 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1198 gpio_request(GPIO_FN_SDHI1D3, NULL);
1199 gpio_request(GPIO_FN_SDHI1D2, NULL);
1200 gpio_request(GPIO_FN_SDHI1D1, NULL);
1201 gpio_request(GPIO_FN_SDHI1D0, NULL);
96987d96 1202 gpio_request(GPIO_PTB7, NULL);
98779ad8 1203 gpio_direction_output(GPIO_PTB7, 0);
96987d96
KM
1204
1205 /* I/O buffer drive ability is high for SDHI1 */
9d56dd3b 1206 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1238c684 1207#endif /* CONFIG_MMC_SH_MMCIF */
1ce4da7a
MD
1208#else
1209 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1210 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1211 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1212 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1213 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1214 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1215 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1216 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1217 gpio_request(GPIO_PTY6, NULL); /* write protect */
1218 gpio_direction_input(GPIO_PTY6);
1219 gpio_request(GPIO_PTY7, NULL); /* card detect */
1220 gpio_direction_input(GPIO_PTY7);
1221
1222 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1223#endif
96987d96 1224
207efd07
KM
1225 /* enable Video */
1226 gpio_request(GPIO_PTU2, NULL);
1227 gpio_direction_output(GPIO_PTU2, 1);
1228
9aa25d64
KM
1229 /* enable Camera */
1230 gpio_request(GPIO_PTA3, NULL);
1231 gpio_request(GPIO_PTA4, NULL);
1232 gpio_direction_output(GPIO_PTA3, 0);
1233 gpio_direction_output(GPIO_PTA4, 0);
1234
1980fdc4
KM
1235 /* enable FSI */
1236 gpio_request(GPIO_FN_FSIMCKB, NULL);
1237 gpio_request(GPIO_FN_FSIIBSD, NULL);
1238 gpio_request(GPIO_FN_FSIOBSD, NULL);
1239 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1240 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1241 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1242 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1243 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1244
16afc9fb
KM
1245 /* set SPU2 clock to 83.4 MHz */
1246 clk = clk_get(NULL, "spu_clk");
56ea5109 1247 if (!IS_ERR(clk)) {
10305853
KM
1248 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1249 clk_put(clk);
1250 }
16afc9fb 1251
1980fdc4
KM
1252 /* change parent of FSI B */
1253 clk = clk_get(NULL, "fsib_clk");
56ea5109 1254 if (!IS_ERR(clk)) {
10305853
KM
1255 clk_register(&fsimckb_clk);
1256 clk_set_parent(clk, &fsimckb_clk);
1257 clk_set_rate(clk, 11000);
1258 clk_set_rate(&fsimckb_clk, 11000);
1259 clk_put(clk);
1260 }
1980fdc4
KM
1261
1262 gpio_request(GPIO_PTU0, NULL);
1263 gpio_direction_output(GPIO_PTU0, 0);
1264 mdelay(20);
1265
ea440783
NH
1266 /* enable motion sensor */
1267 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1268 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1269
6f26d19f
MD
1270 /* set VPU clock to 166 MHz */
1271 clk = clk_get(NULL, "vpu_clk");
56ea5109 1272 if (!IS_ERR(clk)) {
10305853
KM
1273 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1274 clk_put(clk);
1275 }
6f26d19f 1276
26365716
KM
1277 /* enable IrDA */
1278 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1279 gpio_request(GPIO_FN_IRDA_IN, NULL);
1280 gpio_request(GPIO_PTU5, NULL);
1281 gpio_direction_output(GPIO_PTU5, 0);
1282
1238c684
YG
1283#if defined(CONFIG_MMC_SH_MMCIF)
1284 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1285 gpio_request(GPIO_FN_MMC_D7, NULL);
1286 gpio_request(GPIO_FN_MMC_D6, NULL);
1287 gpio_request(GPIO_FN_MMC_D5, NULL);
1288 gpio_request(GPIO_FN_MMC_D4, NULL);
1289 gpio_request(GPIO_FN_MMC_D3, NULL);
1290 gpio_request(GPIO_FN_MMC_D2, NULL);
1291 gpio_request(GPIO_FN_MMC_D1, NULL);
1292 gpio_request(GPIO_FN_MMC_D0, NULL);
1293 gpio_request(GPIO_FN_MMC_CLK, NULL);
1294 gpio_request(GPIO_FN_MMC_CMD, NULL);
1295 gpio_request(GPIO_PTB7, NULL);
1296 gpio_direction_output(GPIO_PTB7, 0);
1297
1298 /* I/O buffer drive ability is high for MMCIF */
1299 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1300#endif
1301
125ecce6 1302 /* enable I2C device */
1980fdc4
KM
1303 i2c_register_board_info(0, i2c0_devices,
1304 ARRAY_SIZE(i2c0_devices));
1305
125ecce6
KM
1306 i2c_register_board_info(1, i2c1_devices,
1307 ARRAY_SIZE(i2c1_devices));
1308
aee5ab0b
GL
1309 /* VOU */
1310 gpio_request(GPIO_FN_DV_D15, NULL);
1311 gpio_request(GPIO_FN_DV_D14, NULL);
1312 gpio_request(GPIO_FN_DV_D13, NULL);
1313 gpio_request(GPIO_FN_DV_D12, NULL);
1314 gpio_request(GPIO_FN_DV_D11, NULL);
1315 gpio_request(GPIO_FN_DV_D10, NULL);
1316 gpio_request(GPIO_FN_DV_D9, NULL);
1317 gpio_request(GPIO_FN_DV_D8, NULL);
1318 gpio_request(GPIO_FN_DV_CLKI, NULL);
1319 gpio_request(GPIO_FN_DV_CLK, NULL);
1320 gpio_request(GPIO_FN_DV_VSYNC, NULL);
1321 gpio_request(GPIO_FN_DV_HSYNC, NULL);
1322
1323 /* AK8813 power / reset sequence */
1324 gpio_request(GPIO_PTG4, NULL);
1325 gpio_request(GPIO_PTU3, NULL);
1326 /* Reset */
1327 gpio_direction_output(GPIO_PTG4, 0);
1328 /* Power down */
1329 gpio_direction_output(GPIO_PTU3, 1);
1330
1331 udelay(10);
1332
1333 /* Power up, reset */
1334 gpio_set_value(GPIO_PTU3, 0);
1335
1336 udelay(10);
1337
1338 /* Remove reset */
1339 gpio_set_value(GPIO_PTG4, 1);
1340
4138b740
KM
1341 return platform_add_devices(ecovec_devices,
1342 ARRAY_SIZE(ecovec_devices));
1343}
4907d57f
KM
1344arch_initcall(arch_setup);
1345
1346static int __init devices_setup(void)
1347{
376abbb4 1348 sh_eth_init(&sh_eth_plat);
4907d57f
KM
1349 return 0;
1350}
1351device_initcall(devices_setup);
1352
4138b740
KM
1353static struct sh_machine_vector mv_ecovec __initmv = {
1354 .mv_name = "R0P7724 (EcoVec)",
1355};