[net-next-2.6.git] / arch / s390 / kernel / topology.c

/*
 *    Copyright IBM Corp. 2007
 *    Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
 */

#define KMSG_COMPONENT "cpu"
#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt

#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/bootmem.h>
#include <linux/sched.h>
#include <linux/workqueue.h>
#include <linux/cpu.h>
#include <linux/smp.h>
#include <linux/cpuset.h>
#include <asm/delay.h>
#include <asm/s390_ext.h>
#include <asm/sysinfo.h>

#define CPU_BITS 64
#define NR_MAG 6

#define PTF_HORIZONTAL	(0UL)
#define PTF_VERTICAL	(1UL)
#define PTF_CHECK	(2UL)

struct tl_cpu {
	unsigned char reserved0[4];
	unsigned char :6;
	unsigned char pp:2;
	unsigned char reserved1;
	unsigned short origin;
	unsigned long mask[CPU_BITS / BITS_PER_LONG];
};

struct tl_container {
	unsigned char reserved[8];
};

union tl_entry {
	unsigned char nl;
	struct tl_cpu cpu;
	struct tl_container container;
};

struct tl_info {
	unsigned char reserved0[2];
	unsigned short length;
	unsigned char mag[NR_MAG];
	unsigned char reserved1;
	unsigned char mnest;
	unsigned char reserved2[4];
	union tl_entry tle[0];
};

struct core_info {
	struct core_info *next;
	cpumask_t mask;
};

static int topology_enabled;
static void topology_work_fn(struct work_struct *work);
static struct tl_info *tl_info;
static struct core_info core_info;
static int machine_has_topology;
static struct timer_list topology_timer;
static void set_topology_timer(void);
static DECLARE_WORK(topology_work, topology_work_fn);
/* topology_lock protects the core linked list */
static DEFINE_SPINLOCK(topology_lock);

cpumask_t cpu_core_map[NR_CPUS];

static cpumask_t cpu_coregroup_map(unsigned int cpu)
{
	struct core_info *core = &core_info;
	unsigned long flags;
	cpumask_t mask;

	cpus_clear(mask);
	if (!topology_enabled || !machine_has_topology)
		return cpu_possible_map;
	spin_lock_irqsave(&topology_lock, flags);
	while (core) {
		if (cpu_isset(cpu, core->mask)) {
			mask = core->mask;
			break;
		}
		core = core->next;
	}
	spin_unlock_irqrestore(&topology_lock, flags);
	if (cpus_empty(mask))
		mask = cpumask_of_cpu(cpu);
	return mask;
}

const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
{
	return &cpu_core_map[cpu];
}

static void add_cpus_to_core(struct tl_cpu *tl_cpu, struct core_info *core)
{
	unsigned int cpu;

	for (cpu = find_first_bit(&tl_cpu->mask[0], CPU_BITS);
	     cpu < CPU_BITS;
	     cpu = find_next_bit(&tl_cpu->mask[0], CPU_BITS, cpu + 1))
	{
		unsigned int rcpu, lcpu;

		rcpu = CPU_BITS - 1 - cpu + tl_cpu->origin;
		for_each_present_cpu(lcpu) {
			if (cpu_logical_map(lcpu) == rcpu) {
				cpu_set(lcpu, core->mask);
				smp_cpu_polarization[lcpu] = tl_cpu->pp;
			}
		}
	}
}

static void clear_cores(void)
{
	struct core_info *core = &core_info;

	while (core) {
		cpus_clear(core->mask);
		core = core->next;
	}
}

static union tl_entry *next_tle(union tl_entry *tle)
{
	if (tle->nl)
		return (union tl_entry *)((struct tl_container *)tle + 1);
	else
		return (union tl_entry *)((struct tl_cpu *)tle + 1);
}

static void tl_to_cores(struct tl_info *info)
{
	union tl_entry *tle, *end;
	struct core_info *core = &core_info;

	spin_lock_irq(&topology_lock);
	clear_cores();
	tle = info->tle;
	end = (union tl_entry *)((unsigned long)info + info->length);
	while (tle < end) {
		switch (tle->nl) {
		case 5:
		case 4:
		case 3:
		case 2:
			break;
		case 1:
			core = core->next;
			break;
		case 0:
			add_cpus_to_core(&tle->cpu, core);
			break;
		default:
			clear_cores();
			machine_has_topology = 0;
			return;
		}
		tle = next_tle(tle);
	}
	spin_unlock_irq(&topology_lock);
}

static void topology_update_polarization_simple(void)
{
	int cpu;

	mutex_lock(&smp_cpu_state_mutex);
	for_each_possible_cpu(cpu)
		smp_cpu_polarization[cpu] = POLARIZATION_HRZ;
	mutex_unlock(&smp_cpu_state_mutex);
}

static int ptf(unsigned long fc)
{
	int rc;

	asm volatile(
		"	.insn	rre,0xb9a20000,%1,%1\n"
		"	ipm	%0\n"
		"	srl	%0,28\n"
		: "=d" (rc)
		: "d" (fc)  : "cc");
	return rc;
}

int topology_set_cpu_management(int fc)
{
	int cpu;
	int rc;

	if (!machine_has_topology)
		return -EOPNOTSUPP;
	if (fc)
		rc = ptf(PTF_VERTICAL);
	else
		rc = ptf(PTF_HORIZONTAL);
	if (rc)
		return -EBUSY;
	for_each_possible_cpu(cpu)
		smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
	return rc;
}

static void update_cpu_core_map(void)
{
	int cpu;

	for_each_possible_cpu(cpu)
		cpu_core_map[cpu] = cpu_coregroup_map(cpu);
}

int arch_update_cpu_topology(void)
{
	struct tl_info *info = tl_info;
	struct sys_device *sysdev;
	int cpu;

	if (!machine_has_topology) {
		update_cpu_core_map();
		topology_update_polarization_simple();
		return 0;
	}
	stsi(info, 15, 1, 2);
	tl_to_cores(info);
	update_cpu_core_map();
	for_each_online_cpu(cpu) {
		sysdev = get_cpu_sysdev(cpu);
		kobject_uevent(&sysdev->kobj, KOBJ_CHANGE);
	}
	return 1;
}

static void topology_work_fn(struct work_struct *work)
{
	rebuild_sched_domains();
}

void topology_schedule_update(void)
{
	schedule_work(&topology_work);
}

static void topology_timer_fn(unsigned long ignored)
{
	if (ptf(PTF_CHECK))
		topology_schedule_update();
	set_topology_timer();
}

static void set_topology_timer(void)
{
	topology_timer.function = topology_timer_fn;
	topology_timer.data = 0;
	topology_timer.expires = jiffies + 60 * HZ;
	add_timer(&topology_timer);
}

static int __init early_parse_topology(char *p)
{
	if (strncmp(p, "on", 2))
		return 0;
	topology_enabled = 1;
	return 0;
}
early_param("topology", early_parse_topology);

static int __init init_topology_update(void)
{
	int rc;

	rc = 0;
	if (!machine_has_topology) {
		topology_update_polarization_simple();
		goto out;
	}
	init_timer_deferrable(&topology_timer);
	set_topology_timer();
out:
	update_cpu_core_map();
	return rc;
}
__initcall(init_topology_update);

void __init s390_init_cpu_topology(void)
{
	unsigned long long facility_bits;
	struct tl_info *info;
	struct core_info *core;
	int nr_cores;
	int i;

	if (stfle(&facility_bits, 1) <= 0)
		return;
	if (!(facility_bits & (1ULL << 52)) || !(facility_bits & (1ULL << 61)))
		return;
	machine_has_topology = 1;

	tl_info = alloc_bootmem_pages(PAGE_SIZE);
	info = tl_info;
	stsi(info, 15, 1, 2);

	nr_cores = info->mag[NR_MAG - 2];
	for (i = 0; i < info->mnest - 2; i++)
		nr_cores *= info->mag[NR_MAG - 3 - i];

	pr_info("The CPU configuration topology of the machine is:");
	for (i = 0; i < NR_MAG; i++)
		printk(" %d", info->mag[i]);
	printk(" / %d\n", info->mnest);

	core = &core_info;
	for (i = 0; i < nr_cores; i++) {
		core->next = alloc_bootmem(sizeof(struct core_info));
		core = core->next;
		if (!core)
			goto error;
	}
	return;
error:
	machine_has_topology = 0;
}
Commit	Line	Data
dbd70fb4	1	/*
dbd70fb4 HC	2	* Copyright IBM Corp. 2007
	3	* Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
	4	*/
	5
395d31d4 MS	6	#define KMSG_COMPONENT "cpu"
	7	#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
	8
dbd70fb4 HC	9	#include <linux/kernel.h>
	10	#include <linux/mm.h>
	11	#include <linux/init.h>
	12	#include <linux/device.h>
	13	#include <linux/bootmem.h>
	14	#include <linux/sched.h>
	15	#include <linux/workqueue.h>
	16	#include <linux/cpu.h>
	17	#include <linux/smp.h>
f414f5f1	18	#include <linux/cpuset.h>
dbd70fb4 HC	19	#include <asm/delay.h>
	20	#include <asm/s390_ext.h>
	21	#include <asm/sysinfo.h>
	22
	23	#define CPU_BITS 64
c10fde0d HC	24	#define NR_MAG 6
	25
	26	#define PTF_HORIZONTAL (0UL)
	27	#define PTF_VERTICAL (1UL)
	28	#define PTF_CHECK (2UL)
dbd70fb4 HC	29
dbd70fb4 HC	30	struct tl_cpu {
c10fde0d HC	31	unsigned char reserved0[4];
	32	unsigned char :6;
	33	unsigned char pp:2;
	34	unsigned char reserved1;
dbd70fb4 HC	35	unsigned short origin;
	36	unsigned long mask[CPU_BITS / BITS_PER_LONG];
	37	};
	38
	39	struct tl_container {
	40	unsigned char reserved[8];
	41	};
	42
	43	union tl_entry {
	44	unsigned char nl;
	45	struct tl_cpu cpu;
	46	struct tl_container container;
	47	};
	48
dbd70fb4 HC	49	struct tl_info {
	50	unsigned char reserved0[2];
	51	unsigned short length;
	52	unsigned char mag[NR_MAG];
	53	unsigned char reserved1;
	54	unsigned char mnest;
	55	unsigned char reserved2[4];
	56	union tl_entry tle[0];
	57	};
	58
	59	struct core_info {
	60	struct core_info *next;
	61	cpumask_t mask;
	62	};
	63
2b1a61f0	64	static int topology_enabled;
dbd70fb4 HC	65	static void topology_work_fn(struct work_struct *work);
	66	static struct tl_info *tl_info;
	67	static struct core_info core_info;
	68	static int machine_has_topology;
dbd70fb4 HC	69	static struct timer_list topology_timer;
	70	static void set_topology_timer(void);
	71	static DECLARE_WORK(topology_work, topology_work_fn);
74af2831 HC	72	/* topology_lock protects the core linked list */
74af2831 HC	73	static DEFINE_SPINLOCK(topology_lock);
dbd70fb4	74
d00aa4e7 HC	75	cpumask_t cpu_core_map[NR_CPUS];
d00aa4e7 HC	76
6f7a321d	77	static cpumask_t cpu_coregroup_map(unsigned int cpu)
dbd70fb4 HC	78	{
dbd70fb4 HC	79	struct core_info *core = &core_info;
74af2831	80	unsigned long flags;
dbd70fb4 HC	81	cpumask_t mask;
	82
	83	cpus_clear(mask);
2b1a61f0	84	if (!topology_enabled \|\| !machine_has_topology)
5439050f	85	return cpu_possible_map;
74af2831	86	spin_lock_irqsave(&topology_lock, flags);
dbd70fb4 HC	87	while (core) {
	88	if (cpu_isset(cpu, core->mask)) {
	89	mask = core->mask;
	90	break;
	91	}
	92	core = core->next;
	93	}
74af2831	94	spin_unlock_irqrestore(&topology_lock, flags);
dbd70fb4 HC	95	if (cpus_empty(mask))
	96	mask = cpumask_of_cpu(cpu);
	97	return mask;
	98	}
	99
9be3eec2 RR	100	const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
	101	{
	102	return &cpu_core_map[cpu];
	103	}
	104
dbd70fb4 HC	105	static void add_cpus_to_core(struct tl_cpu tl_cpu, struct core_info core)
	106	{
	107	unsigned int cpu;
	108
	109	for (cpu = find_first_bit(&tl_cpu->mask[0], CPU_BITS);
	110	cpu < CPU_BITS;
	111	cpu = find_next_bit(&tl_cpu->mask[0], CPU_BITS, cpu + 1))
	112	{
	113	unsigned int rcpu, lcpu;
	114
	115	rcpu = CPU_BITS - 1 - cpu + tl_cpu->origin;
	116	for_each_present_cpu(lcpu) {
fb380aad	117	if (cpu_logical_map(lcpu) == rcpu) {
dbd70fb4	118	cpu_set(lcpu, core->mask);
c10fde0d HC	119	smp_cpu_polarization[lcpu] = tl_cpu->pp;
c10fde0d HC	120	}
dbd70fb4 HC	121	}
	122	}
	123	}
	124
	125	static void clear_cores(void)
	126	{
	127	struct core_info *core = &core_info;
	128
	129	while (core) {
	130	cpus_clear(core->mask);
	131	core = core->next;
	132	}
	133	}
	134
	135	static union tl_entry next_tle(union tl_entry tle)
	136	{
	137	if (tle->nl)
	138	return (union tl_entry )((struct tl_container )tle + 1);
	139	else
	140	return (union tl_entry )((struct tl_cpu )tle + 1);
	141	}
	142
	143	static void tl_to_cores(struct tl_info *info)
	144	{
	145	union tl_entry tle, end;
	146	struct core_info *core = &core_info;
	147
74af2831	148	spin_lock_irq(&topology_lock);
dbd70fb4	149	clear_cores();
c10fde0d	150	tle = info->tle;
dbd70fb4 HC	151	end = (union tl_entry *)((unsigned long)info + info->length);
	152	while (tle < end) {
	153	switch (tle->nl) {
	154	case 5:
	155	case 4:
	156	case 3:
	157	case 2:
	158	break;
	159	case 1:
	160	core = core->next;
	161	break;
	162	case 0:
	163	add_cpus_to_core(&tle->cpu, core);
	164	break;
	165	default:
	166	clear_cores();
	167	machine_has_topology = 0;
	168	return;
	169	}
	170	tle = next_tle(tle);
	171	}
74af2831	172	spin_unlock_irq(&topology_lock);
dbd70fb4 HC	173	}
dbd70fb4 HC	174
c10fde0d HC	175	static void topology_update_polarization_simple(void)
	176	{
	177	int cpu;
	178
	179	mutex_lock(&smp_cpu_state_mutex);
5439050f	180	for_each_possible_cpu(cpu)
c10fde0d HC	181	smp_cpu_polarization[cpu] = POLARIZATION_HRZ;
	182	mutex_unlock(&smp_cpu_state_mutex);
	183	}
	184
	185	static int ptf(unsigned long fc)
dbd70fb4 HC	186	{
	187	int rc;
	188
	189	asm volatile(
	190	" .insn rre,0xb9a20000,%1,%1\n"
	191	" ipm %0\n"
	192	" srl %0,28\n"
	193	: "=d" (rc)
c10fde0d HC	194	: "d" (fc) : "cc");
	195	return rc;
	196	}
	197
	198	int topology_set_cpu_management(int fc)
	199	{
	200	int cpu;
	201	int rc;
	202
	203	if (!machine_has_topology)
	204	return -EOPNOTSUPP;
	205	if (fc)
	206	rc = ptf(PTF_VERTICAL);
	207	else
	208	rc = ptf(PTF_HORIZONTAL);
	209	if (rc)
	210	return -EBUSY;
5439050f	211	for_each_possible_cpu(cpu)
c10fde0d	212	smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
dbd70fb4 HC	213	return rc;
	214	}
	215
d00aa4e7 HC	216	static void update_cpu_core_map(void)
	217	{
	218	int cpu;
	219
5439050f	220	for_each_possible_cpu(cpu)
d00aa4e7 HC	221	cpu_core_map[cpu] = cpu_coregroup_map(cpu);
	222	}
	223
ee79d1bd	224	int arch_update_cpu_topology(void)
dbd70fb4 HC	225	{
	226	struct tl_info *info = tl_info;
	227	struct sys_device *sysdev;
	228	int cpu;
	229
c10fde0d	230	if (!machine_has_topology) {
d00aa4e7	231	update_cpu_core_map();
c10fde0d	232	topology_update_polarization_simple();
ee79d1bd	233	return 0;
c10fde0d	234	}
dbd70fb4 HC	235	stsi(info, 15, 1, 2);
dbd70fb4 HC	236	tl_to_cores(info);
d00aa4e7	237	update_cpu_core_map();
dbd70fb4 HC	238	for_each_online_cpu(cpu) {
	239	sysdev = get_cpu_sysdev(cpu);
	240	kobject_uevent(&sysdev->kobj, KOBJ_CHANGE);
	241	}
ee79d1bd	242	return 1;
dbd70fb4 HC	243	}
dbd70fb4 HC	244
fd781fa2 HC	245	static void topology_work_fn(struct work_struct *work)
fd781fa2 HC	246	{
f414f5f1	247	rebuild_sched_domains();
dbd70fb4 HC	248	}
dbd70fb4 HC	249
c10fde0d HC	250	void topology_schedule_update(void)
	251	{
	252	schedule_work(&topology_work);
	253	}
	254
dbd70fb4 HC	255	static void topology_timer_fn(unsigned long ignored)
dbd70fb4 HC	256	{
c10fde0d HC	257	if (ptf(PTF_CHECK))
c10fde0d HC	258	topology_schedule_update();
dbd70fb4 HC	259	set_topology_timer();
	260	}
	261
	262	static void set_topology_timer(void)
	263	{
	264	topology_timer.function = topology_timer_fn;
	265	topology_timer.data = 0;
	266	topology_timer.expires = jiffies + 60 * HZ;
	267	add_timer(&topology_timer);
	268	}
	269
2b1a61f0	270	static int __init early_parse_topology(char *p)
dbd70fb4	271	{
2b1a61f0 HC	272	if (strncmp(p, "on", 2))
	273	return 0;
	274	topology_enabled = 1;
	275	return 0;
dbd70fb4	276	}
2b1a61f0	277	early_param("topology", early_parse_topology);
dbd70fb4 HC	278
	279	static int __init init_topology_update(void)
	280	{
	281	int rc;
	282
d00aa4e7	283	rc = 0;
c10fde0d HC	284	if (!machine_has_topology) {
c10fde0d HC	285	topology_update_polarization_simple();
d00aa4e7	286	goto out;
c10fde0d HC	287	}
c10fde0d HC	288	init_timer_deferrable(&topology_timer);
349f1b67	289	set_topology_timer();
d00aa4e7 HC	290	out:
	291	update_cpu_core_map();
	292	return rc;
dbd70fb4 HC	293	}
	294	__initcall(init_topology_update);
	295
	296	void __init s390_init_cpu_topology(void)
	297	{
	298	unsigned long long facility_bits;
	299	struct tl_info *info;
	300	struct core_info *core;
	301	int nr_cores;
	302	int i;
	303
	304	if (stfle(&facility_bits, 1) <= 0)
	305	return;
	306	if (!(facility_bits & (1ULL << 52)) \|\| !(facility_bits & (1ULL << 61)))
	307	return;
	308	machine_has_topology = 1;
	309
dbd70fb4	310	tl_info = alloc_bootmem_pages(PAGE_SIZE);
dbd70fb4 HC	311	info = tl_info;
	312	stsi(info, 15, 1, 2);
	313
	314	nr_cores = info->mag[NR_MAG - 2];
	315	for (i = 0; i < info->mnest - 2; i++)
	316	nr_cores *= info->mag[NR_MAG - 3 - i];
	317
395d31d4	318	pr_info("The CPU configuration topology of the machine is:");
dbd70fb4 HC	319	for (i = 0; i < NR_MAG; i++)
	320	printk(" %d", info->mag[i]);
	321	printk(" / %d\n", info->mnest);
	322
	323	core = &core_info;
	324	for (i = 0; i < nr_cores; i++) {
	325	core->next = alloc_bootmem(sizeof(struct core_info));
	326	core = core->next;
	327	if (!core)
	328	goto error;
	329	}
	330	return;
	331	error:
	332	machine_has_topology = 0;
dbd70fb4	333	}