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Merge branch 'upstream/core' of git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen
[net-next-2.6.git] / arch / s390 / kernel / entry.S
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
4 *
54dfe5dd 5 * Copyright (C) IBM Corp. 1999,2006
1da177e4 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
25d83cbf
HC
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
77fa2245 9 * Heiko Carstens <heiko.carstens@de.ibm.com>
1da177e4
LT
10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
2bc89b5e 14#include <linux/init.h>
1da177e4 15#include <asm/cache.h>
1da177e4
LT
16#include <asm/errno.h>
17#include <asm/ptrace.h>
18#include <asm/thread_info.h>
0013a854 19#include <asm/asm-offsets.h>
1da177e4
LT
20#include <asm/unistd.h>
21#include <asm/page.h>
22
23/*
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
26 */
25d83cbf
HC
27SP_PTREGS = STACK_FRAME_OVERHEAD
28SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
59da2139 48SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
25d83cbf 49SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
1da177e4 50
753c4dd6 51_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54dfe5dd 52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
753c4dd6 53_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54dfe5dd 54 _TIF_MCCK_PENDING)
9bf1226b 55_TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
66700001 56 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
1da177e4
LT
57
58STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
59STACK_SIZE = 1 << STACK_SHIFT
60
61#define BASED(name) name-system_call(%r13)
62
1f194a4c
HC
63#ifdef CONFIG_TRACE_IRQFLAGS
64 .macro TRACE_IRQS_ON
50bec4ce
HC
65 basr %r2,%r0
66 l %r1,BASED(.Ltrace_irq_on_caller)
1f194a4c
HC
67 basr %r14,%r1
68 .endm
69
70 .macro TRACE_IRQS_OFF
50bec4ce
HC
71 basr %r2,%r0
72 l %r1,BASED(.Ltrace_irq_off_caller)
1f194a4c
HC
73 basr %r14,%r1
74 .endm
75#else
76#define TRACE_IRQS_ON
77#define TRACE_IRQS_OFF
411788ea
HC
78#endif
79
80#ifdef CONFIG_LOCKDEP
81 .macro LOCKDEP_SYS_EXIT
82 tm SP_PSW+1(%r15),0x01 # returning to user ?
83 jz 0f
84 l %r1,BASED(.Llockdep_sys_exit)
85 basr %r14,%r1
860:
87 .endm
88#else
523b44cf 89#define LOCKDEP_SYS_EXIT
1f194a4c
HC
90#endif
91
1da177e4
LT
92/*
93 * Register usage in interrupt handlers:
94 * R9 - pointer to current task structure
95 * R13 - pointer to literal pool
96 * R14 - return register for function calls
97 * R15 - kernel stack pointer
98 */
99
25d83cbf 100 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
1da177e4
LT
101 lm %r10,%r11,\lc_from
102 sl %r10,\lc_to
103 sl %r11,\lc_to+4
104 bc 3,BASED(0f)
105 sl %r10,BASED(.Lc_1)
1060: al %r10,\lc_sum
107 al %r11,\lc_sum+4
108 bc 12,BASED(1f)
109 al %r10,BASED(.Lc_1)
1101: stm %r10,%r11,\lc_sum
111 .endm
1da177e4
LT
112
113 .macro SAVE_ALL_BASE savearea
114 stm %r12,%r15,\savearea
115 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
116 .endm
117
987ad70a
MS
118 .macro SAVE_ALL_SVC psworg,savearea
119 la %r12,\psworg
120 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
121 .endm
122
63b12246 123 .macro SAVE_ALL_SYNC psworg,savearea
1da177e4 124 la %r12,\psworg
1da177e4
LT
125 tm \psworg+1,0x01 # test problem state bit
126 bz BASED(2f) # skip stack setup save
127 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
63b12246
MS
128#ifdef CONFIG_CHECK_STACK
129 b BASED(3f)
1302: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
131 bz BASED(stack_overflow)
1323:
133#endif
1342:
135 .endm
136
137 .macro SAVE_ALL_ASYNC psworg,savearea
138 la %r12,\psworg
1da177e4
LT
139 tm \psworg+1,0x01 # test problem state bit
140 bnz BASED(1f) # from user -> load async stack
141 clc \psworg+4(4),BASED(.Lcritical_end)
142 bhe BASED(0f)
143 clc \psworg+4(4),BASED(.Lcritical_start)
144 bl BASED(0f)
145 l %r14,BASED(.Lcleanup_critical)
146 basr %r14,%r14
6add9f7f 147 tm 1(%r12),0x01 # retest problem state after cleanup
1da177e4
LT
148 bnz BASED(1f)
1490: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
150 slr %r14,%r15
151 sra %r14,STACK_SHIFT
152 be BASED(2f)
1531: l %r15,__LC_ASYNC_STACK
1da177e4
LT
154#ifdef CONFIG_CHECK_STACK
155 b BASED(3f)
1562: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
157 bz BASED(stack_overflow)
1583:
159#endif
77fa2245
HC
1602:
161 .endm
162
25d83cbf 163 .macro CREATE_STACK_FRAME psworg,savearea
77fa2245 164 s %r15,BASED(.Lc_spsize) # make room for registers & psw
1da177e4 165 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
1da177e4 166 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
86f2552b 167 icm %r12,12,__LC_SVC_ILC
1da177e4 168 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
86f2552b 169 st %r12,SP_ILC(%r15)
1da177e4
LT
170 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
171 la %r12,0
172 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
173 .endm
174
25d83cbf 175 .macro RESTORE_ALL psworg,sync
ae6aa2ea 176 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
1da177e4 177 .if !\sync
ae6aa2ea 178 ni \psworg+1,0xfd # clear wait state bit
1da177e4
LT
179 .endif
180 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
c185b783 181 stpt __LC_EXIT_TIMER
ae6aa2ea 182 lpsw \psworg # back to caller
1da177e4
LT
183 .endm
184
1e54622e
MS
185 .macro REENABLE_IRQS
186 mvc __SF_EMPTY(1,%r15),SP_PSW(%r15)
187 ni __SF_EMPTY(%r15),0xbf
188 ssm __SF_EMPTY(%r15)
189 .endm
190
1da177e4
LT
191/*
192 * Scheduler resume function, called by switch_to
193 * gpr2 = (task_struct *) prev
194 * gpr3 = (task_struct *) next
195 * Returns:
196 * gpr2 = prev
197 */
25d83cbf 198 .globl __switch_to
1da177e4 199__switch_to:
25d83cbf 200 basr %r1,0
1da177e4
LT
201__switch_to_base:
202 tm __THREAD_per(%r3),0xe8 # new process is using per ?
203 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
25d83cbf
HC
204 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
205 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
206 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
207 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
1da177e4 208__switch_to_noper:
77fa2245
HC
209 l %r4,__THREAD_info(%r2) # get thread_info of prev
210 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
211 bz __switch_to_no_mcck-__switch_to_base(%r1)
212 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
213 l %r4,__THREAD_info(%r3) # get thread_info of next
214 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
215__switch_to_no_mcck:
25d83cbf 216 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
1da177e4
LT
217 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
218 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
219 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
220 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
221 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
25d83cbf 222 l %r3,__THREAD_info(%r3) # load thread_info from task struct
1da177e4
LT
223 st %r3,__LC_THREAD_INFO
224 ahi %r3,STACK_SIZE
225 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
226 br %r14
227
228__critical_start:
229/*
230 * SVC interrupt handler routine. System calls are synchronous events and
231 * are executed with interrupts enabled.
232 */
233
25d83cbf 234 .globl system_call
1da177e4 235system_call:
c185b783 236 stpt __LC_SYNC_ENTER_TIMER
1da177e4
LT
237sysc_saveall:
238 SAVE_ALL_BASE __LC_SAVE_AREA
987ad70a 239 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 240 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4 241 lh %r7,0x8a # get svc number from lowcore
1da177e4 242sysc_vtime:
1da177e4
LT
243 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
244sysc_stime:
245 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
246sysc_update:
247 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1da177e4
LT
248sysc_do_svc:
249 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
59da2139 250 ltr %r7,%r7 # test for svc 0
25d83cbf 251 bnz BASED(sysc_nr_ok) # svc number > 0
1da177e4
LT
252 # svc 0: system call number in %r1
253 cl %r1,BASED(.Lnr_syscalls)
254 bnl BASED(sysc_nr_ok)
25d83cbf 255 lr %r7,%r1 # copy svc number to %r7
1da177e4 256sysc_nr_ok:
59da2139
MS
257 sth %r7,SP_SVCNR(%r15)
258 sll %r7,2 # svc number *4
d882b172 259 l %r8,BASED(.Lsysc_table)
bcf5cef7 260 tm __TI_flags+2(%r9),_TIF_SYSCALL
baa07158 261 mvc SP_ARGS(4,%r15),SP_R7(%r15)
d882b172 262 l %r8,0(%r7,%r8) # get system call addr.
25d83cbf
HC
263 bnz BASED(sysc_tracesys)
264 basr %r14,%r8 # call sys_xxxx
265 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
1da177e4
LT
266
267sysc_return:
6a2df3a8
MS
268 LOCKDEP_SYS_EXIT
269sysc_tif:
1da177e4
LT
270 tm __TI_flags+3(%r9),_TIF_WORK_SVC
271 bnz BASED(sysc_work) # there is work to do (signals etc.)
411788ea 272sysc_restore:
25d83cbf 273 RESTORE_ALL __LC_RETURN_PSW,1
411788ea
HC
274sysc_done:
275
1da177e4 276#
43d399d2 277# There is work to do, but first we need to check if we return to userspace.
1da177e4
LT
278#
279sysc_work:
2688905e
MS
280 tm SP_PSW+1(%r15),0x01 # returning to user ?
281 bno BASED(sysc_restore)
43d399d2
MS
282
283#
284# One of the work bits is on. Find out which one.
285#
6a2df3a8 286sysc_work_tif:
77fa2245
HC
287 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
288 bo BASED(sysc_mcck_pending)
1da177e4
LT
289 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
290 bo BASED(sysc_reschedule)
02a029b3 291 tm __TI_flags+3(%r9),_TIF_SIGPENDING
43d399d2 292 bo BASED(sysc_sigpending)
753c4dd6 293 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
43d399d2 294 bo BASED(sysc_notify_resume)
1da177e4
LT
295 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
296 bo BASED(sysc_restart)
297 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
298 bo BASED(sysc_singlestep)
43d399d2 299 b BASED(sysc_return) # beware of critical section cleanup
1da177e4
LT
300
301#
302# _TIF_NEED_RESCHED is set, call schedule
25d83cbf
HC
303#
304sysc_reschedule:
305 l %r1,BASED(.Lschedule)
6a2df3a8 306 la %r14,BASED(sysc_return)
25d83cbf 307 br %r1 # call scheduler
1da177e4 308
77fa2245
HC
309#
310# _TIF_MCCK_PENDING is set, call handler
311#
312sysc_mcck_pending:
313 l %r1,BASED(.Ls390_handle_mcck)
6a2df3a8 314 la %r14,BASED(sysc_return)
77fa2245
HC
315 br %r1 # TIF bit will be cleared by handler
316
1da177e4 317#
02a029b3 318# _TIF_SIGPENDING is set, call do_signal
1da177e4 319#
25d83cbf 320sysc_sigpending:
1da177e4 321 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
25d83cbf
HC
322 la %r2,SP_PTREGS(%r15) # load pt_regs
323 l %r1,BASED(.Ldo_signal)
324 basr %r14,%r1 # call do_signal
1da177e4
LT
325 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
326 bo BASED(sysc_restart)
327 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
328 bo BASED(sysc_singlestep)
6a2df3a8 329 b BASED(sysc_return)
1da177e4 330
753c4dd6
MS
331#
332# _TIF_NOTIFY_RESUME is set, call do_notify_resume
333#
334sysc_notify_resume:
335 la %r2,SP_PTREGS(%r15) # load pt_regs
336 l %r1,BASED(.Ldo_notify_resume)
6a2df3a8 337 la %r14,BASED(sysc_return)
753c4dd6
MS
338 br %r1 # call do_notify_resume
339
340
1da177e4
LT
341#
342# _TIF_RESTART_SVC is set, set up registers and restart svc
343#
344sysc_restart:
345 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
25d83cbf 346 l %r7,SP_R2(%r15) # load new svc number
1da177e4 347 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
25d83cbf 348 lm %r2,%r6,SP_R2(%r15) # load svc arguments
baa07158 349 b BASED(sysc_nr_ok) # restart svc
1da177e4
LT
350
351#
352# _TIF_SINGLE_STEP is set, call do_single_step
353#
354sysc_singlestep:
355 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
59da2139
MS
356 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
357 mvi SP_SVCNR+1(%r15),0xff
1da177e4
LT
358 la %r2,SP_PTREGS(%r15) # address of register-save area
359 l %r1,BASED(.Lhandle_per) # load adr. of per handler
6a2df3a8 360 la %r14,BASED(sysc_return) # load adr. of system return
1da177e4
LT
361 br %r1 # branch to do_single_step
362
1da177e4 363#
753c4dd6
MS
364# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
365# and after the system call
1da177e4
LT
366#
367sysc_tracesys:
753c4dd6 368 l %r1,BASED(.Ltrace_entry)
25d83cbf 369 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT
370 la %r3,0
371 srl %r7,2
372 st %r7,SP_R2(%r15)
373 basr %r14,%r1
753c4dd6 374 cl %r2,BASED(.Lnr_syscalls)
1da177e4 375 bnl BASED(sysc_tracenogo)
d882b172 376 l %r8,BASED(.Lsysc_table)
753c4dd6 377 lr %r7,%r2
59da2139 378 sll %r7,2 # svc number *4
d882b172 379 l %r8,0(%r7,%r8)
1da177e4
LT
380sysc_tracego:
381 lm %r3,%r6,SP_R3(%r15)
baa07158 382 mvc SP_ARGS(4,%r15),SP_R7(%r15)
1da177e4 383 l %r2,SP_ORIG_R2(%r15)
25d83cbf
HC
384 basr %r14,%r8 # call sys_xxx
385 st %r2,SP_R2(%r15) # store return value
1da177e4 386sysc_tracenogo:
bcf5cef7 387 tm __TI_flags+2(%r9),_TIF_SYSCALL
25d83cbf 388 bz BASED(sysc_return)
753c4dd6 389 l %r1,BASED(.Ltrace_exit)
25d83cbf 390 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT
391 la %r14,BASED(sysc_return)
392 br %r1
393
394#
395# a new process exits the kernel with ret_from_fork
396#
25d83cbf 397 .globl ret_from_fork
1da177e4
LT
398ret_from_fork:
399 l %r13,__LC_SVC_NEW_PSW+4
400 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
401 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
402 bo BASED(0f)
403 st %r15,SP_R15(%r15) # store stack pointer for new kthread
25d83cbf
HC
4040: l %r1,BASED(.Lschedtail)
405 basr %r14,%r1
1f194a4c 406 TRACE_IRQS_ON
25d83cbf 407 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
8f2961c3 408 b BASED(sysc_tracenogo)
1da177e4
LT
409
410#
03ff9a23
MS
411# kernel_execve function needs to deal with pt_regs that is not
412# at the usual place
1da177e4 413#
03ff9a23
MS
414 .globl kernel_execve
415kernel_execve:
416 stm %r12,%r15,48(%r15)
417 lr %r14,%r15
418 l %r13,__LC_SVC_NEW_PSW+4
419 s %r15,BASED(.Lc_spsize)
420 st %r14,__SF_BACKCHAIN(%r15)
421 la %r12,SP_PTREGS(%r15)
422 xc 0(__PT_SIZE,%r12),0(%r12)
423 l %r1,BASED(.Ldo_execve)
424 lr %r5,%r12
425 basr %r14,%r1
426 ltr %r2,%r2
427 be BASED(0f)
428 a %r15,BASED(.Lc_spsize)
429 lm %r12,%r15,48(%r15)
430 br %r14
431 # execve succeeded.
4320: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
433 l %r15,__LC_KERNEL_STACK # load ksp
434 s %r15,BASED(.Lc_spsize) # make room for registers & psw
435 l %r9,__LC_THREAD_INFO
436 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
437 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
438 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
439 l %r1,BASED(.Lexecve_tail)
440 basr %r14,%r1
441 b BASED(sysc_return)
1da177e4
LT
442
443/*
444 * Program check handler routine
445 */
446
25d83cbf 447 .globl pgm_check_handler
1da177e4
LT
448pgm_check_handler:
449/*
450 * First we need to check for a special case:
451 * Single stepping an instruction that disables the PER event mask will
452 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
453 * For a single stepped SVC the program check handler gets control after
454 * the SVC new PSW has been loaded. But we want to execute the SVC first and
455 * then handle the PER event. Therefore we update the SVC old PSW to point
456 * to the pgm_check_handler and branch to the SVC handler after we checked
457 * if we have to load the kernel stack register.
458 * For every other possible cause for PER event without the PER mask set
459 * we just ignore the PER event (FIXME: is there anything we have to do
460 * for LPSW?).
461 */
c185b783 462 stpt __LC_SYNC_ENTER_TIMER
1da177e4 463 SAVE_ALL_BASE __LC_SAVE_AREA
25d83cbf
HC
464 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
465 bnz BASED(pgm_per) # got per exception -> special case
63b12246 466 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 467 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT
468 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
469 bz BASED(pgm_no_vtime)
470 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
471 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
472 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
473pgm_no_vtime:
1da177e4 474 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
25d83cbf 475 l %r3,__LC_PGM_ILC # load program interruption code
1e54622e
MS
476 l %r4,__LC_TRANS_EXC_CODE
477 REENABLE_IRQS
1da177e4
LT
478 la %r8,0x7f
479 nr %r8,%r3
480pgm_do_call:
25d83cbf
HC
481 l %r7,BASED(.Ljump_table)
482 sll %r8,2
483 l %r7,0(%r8,%r7) # load address of handler routine
484 la %r2,SP_PTREGS(%r15) # address of register-save area
6a2df3a8
MS
485 basr %r14,%r7 # branch to interrupt-handler
486pgm_exit:
6a2df3a8 487 b BASED(sysc_return)
1da177e4
LT
488
489#
490# handle per exception
491#
492pgm_per:
25d83cbf
HC
493 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
494 bnz BASED(pgm_per_std) # ok, normal per event from user space
1da177e4 495# ok its one of the special cases, now we need to find out which one
25d83cbf
HC
496 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
497 be BASED(pgm_svcper)
1da177e4 498# no interesting special case, ignore PER event
25d83cbf
HC
499 lm %r12,%r15,__LC_SAVE_AREA
500 lpsw 0x28
1da177e4
LT
501
502#
503# Normal per exception
504#
505pgm_per_std:
63b12246 506 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 507 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT
508 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
509 bz BASED(pgm_no_vtime2)
510 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
511 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
512 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
513pgm_no_vtime2:
1da177e4
LT
514 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
515 l %r1,__TI_task(%r9)
6a2df3a8
MS
516 tm SP_PSW+1(%r15),0x01 # kernel per event ?
517 bz BASED(kernel_per)
1da177e4
LT
518 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
519 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
520 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
521 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
25d83cbf 522 l %r3,__LC_PGM_ILC # load program interruption code
1e54622e
MS
523 l %r4,__LC_TRANS_EXC_CODE
524 REENABLE_IRQS
1da177e4 525 la %r8,0x7f
25d83cbf 526 nr %r8,%r3 # clear per-event-bit and ilc
f5cdac27
HC
527 be BASED(pgm_exit2) # only per or per+check ?
528 l %r7,BASED(.Ljump_table)
529 sll %r8,2
530 l %r7,0(%r8,%r7) # load address of handler routine
531 la %r2,SP_PTREGS(%r15) # address of register-save area
532 basr %r14,%r7 # branch to interrupt-handler
533pgm_exit2:
f5cdac27 534 b BASED(sysc_return)
1da177e4
LT
535
536#
537# it was a single stepped SVC that is causing all the trouble
538#
539pgm_svcper:
63b12246 540 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 541 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT
542 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
543 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
544 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1da177e4
LT
545 lh %r7,0x8a # get svc number from lowcore
546 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
bcc6525f
CB
547 l %r8,__TI_task(%r9)
548 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
549 mvc __THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS
550 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
1da177e4
LT
551 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
552 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
6a2df3a8 553 lm %r2,%r6,SP_R2(%r15) # load svc arguments
1da177e4
LT
554 b BASED(sysc_do_svc)
555
4ba069b8
MG
556#
557# per was called from kernel, must be kprobes
558#
559kernel_per:
9ec27080 560 REENABLE_IRQS
59da2139
MS
561 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
562 mvi SP_SVCNR+1(%r15),0xff
4ba069b8
MG
563 la %r2,SP_PTREGS(%r15) # address of register-save area
564 l %r1,BASED(.Lhandle_per) # load adr. of per handler
6a2df3a8
MS
565 basr %r14,%r1 # branch to do_single_step
566 b BASED(pgm_exit)
4ba069b8 567
1da177e4
LT
568/*
569 * IO interrupt handler routine
570 */
571
25d83cbf 572 .globl io_int_handler
1da177e4 573io_int_handler:
1da177e4 574 stck __LC_INT_CLOCK
9cfb9b3c 575 stpt __LC_ASYNC_ENTER_TIMER
1da177e4 576 SAVE_ALL_BASE __LC_SAVE_AREA+16
63b12246 577 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
77fa2245 578 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
1da177e4
LT
579 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
580 bz BASED(io_no_vtime)
581 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
582 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
583 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
584io_no_vtime:
1f194a4c 585 TRACE_IRQS_OFF
6a2df3a8 586 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
25d83cbf
HC
587 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
588 la %r2,SP_PTREGS(%r15) # address of register-save area
589 basr %r14,%r1 # branch to standard irq handler
1da177e4 590io_return:
6a2df3a8
MS
591 LOCKDEP_SYS_EXIT
592 TRACE_IRQS_ON
593io_tif:
1da177e4 594 tm __TI_flags+3(%r9),_TIF_WORK_INT
25d83cbf 595 bnz BASED(io_work) # there is work to do (signals etc.)
411788ea 596io_restore:
25d83cbf 597 RESTORE_ALL __LC_RETURN_PSW,0
ae6aa2ea 598io_done:
1da177e4 599
2688905e 600#
43d399d2
MS
601# There is work todo, find out in which context we have been interrupted:
602# 1) if we return to user space we can do all _TIF_WORK_INT work
603# 2) if we return to kernel code and preemptive scheduling is enabled check
604# the preemption counter and if it is zero call preempt_schedule_irq
605# Before any work can be done, a switch to the kernel stack is required.
2688905e
MS
606#
607io_work:
608 tm SP_PSW+1(%r15),0x01 # returning to user ?
43d399d2
MS
609 bo BASED(io_work_user) # yes -> do resched & signal
610#ifdef CONFIG_PREEMPT
2688905e 611 # check for preemptive scheduling
1da177e4 612 icm %r0,15,__TI_precount(%r9)
2688905e 613 bnz BASED(io_restore) # preemption disabled
6a2df3a8
MS
614 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
615 bno BASED(io_restore)
43d399d2 616 # switch to kernel stack
1da177e4
LT
617 l %r1,SP_R15(%r15)
618 s %r1,BASED(.Lc_spsize)
619 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
25d83cbf 620 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
1da177e4 621 lr %r15,%r1
6a2df3a8
MS
622 # TRACE_IRQS_ON already done at io_return, call
623 # TRACE_IRQS_OFF to keep things symmetrical
624 TRACE_IRQS_OFF
b8e7a54c 625 l %r1,BASED(.Lpreempt_schedule_irq)
6a2df3a8
MS
626 basr %r14,%r1 # call preempt_schedule_irq
627 b BASED(io_return)
628#else
43d399d2 629 b BASED(io_restore)
6a2df3a8 630#endif
1da177e4 631
43d399d2
MS
632#
633# Need to do work before returning to userspace, switch to kernel stack
634#
2688905e 635io_work_user:
1da177e4
LT
636 l %r1,__LC_KERNEL_STACK
637 s %r1,BASED(.Lc_spsize)
638 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
25d83cbf 639 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
1da177e4 640 lr %r15,%r1
6a2df3a8 641
1da177e4
LT
642#
643# One of the work bits is on. Find out which one.
43d399d2 644# Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
25d83cbf 645# and _TIF_MCCK_PENDING
1da177e4 646#
6a2df3a8 647io_work_tif:
77fa2245 648 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
25d83cbf 649 bo BASED(io_mcck_pending)
1da177e4
LT
650 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
651 bo BASED(io_reschedule)
02a029b3 652 tm __TI_flags+3(%r9),_TIF_SIGPENDING
43d399d2 653 bo BASED(io_sigpending)
753c4dd6 654 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
43d399d2
MS
655 bo BASED(io_notify_resume)
656 b BASED(io_return) # beware of critical section cleanup
1da177e4 657
77fa2245
HC
658#
659# _TIF_MCCK_PENDING is set, call handler
660#
661io_mcck_pending:
6a2df3a8 662 # TRACE_IRQS_ON already done at io_return
77fa2245 663 l %r1,BASED(.Ls390_handle_mcck)
b771aeac 664 basr %r14,%r1 # TIF bit will be cleared by handler
6a2df3a8
MS
665 TRACE_IRQS_OFF
666 b BASED(io_return)
77fa2245 667
1da177e4
LT
668#
669# _TIF_NEED_RESCHED is set, call schedule
25d83cbf
HC
670#
671io_reschedule:
6a2df3a8 672 # TRACE_IRQS_ON already done at io_return
25d83cbf
HC
673 l %r1,BASED(.Lschedule)
674 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
675 basr %r14,%r1 # call scheduler
676 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
411788ea 677 TRACE_IRQS_OFF
6a2df3a8 678 b BASED(io_return)
1da177e4
LT
679
680#
02a029b3 681# _TIF_SIGPENDING is set, call do_signal
1da177e4 682#
25d83cbf 683io_sigpending:
6a2df3a8 684 # TRACE_IRQS_ON already done at io_return
25d83cbf
HC
685 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
686 la %r2,SP_PTREGS(%r15) # load pt_regs
687 l %r1,BASED(.Ldo_signal)
688 basr %r14,%r1 # call do_signal
689 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
411788ea 690 TRACE_IRQS_OFF
6a2df3a8 691 b BASED(io_return)
1da177e4 692
753c4dd6
MS
693#
694# _TIF_SIGPENDING is set, call do_signal
695#
696io_notify_resume:
6a2df3a8 697 # TRACE_IRQS_ON already done at io_return
753c4dd6
MS
698 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
699 la %r2,SP_PTREGS(%r15) # load pt_regs
700 l %r1,BASED(.Ldo_notify_resume)
701 basr %r14,%r1 # call do_signal
702 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
703 TRACE_IRQS_OFF
6a2df3a8 704 b BASED(io_return)
753c4dd6 705
1da177e4
LT
706/*
707 * External interrupt handler routine
708 */
709
25d83cbf 710 .globl ext_int_handler
1da177e4 711ext_int_handler:
1da177e4 712 stck __LC_INT_CLOCK
9cfb9b3c 713 stpt __LC_ASYNC_ENTER_TIMER
1da177e4 714 SAVE_ALL_BASE __LC_SAVE_AREA+16
63b12246 715 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
77fa2245 716 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
1da177e4
LT
717 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
718 bz BASED(ext_no_vtime)
719 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
720 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
721 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
722ext_no_vtime:
1da177e4 723 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
1f194a4c 724 TRACE_IRQS_OFF
25d83cbf 725 la %r2,SP_PTREGS(%r15) # address of register-save area
f6649a7e
MS
726 l %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
727 l %r4,__LC_EXT_PARAMS # get external parameters
1da177e4
LT
728 l %r1,BASED(.Ldo_extint)
729 basr %r14,%r1
730 b BASED(io_return)
731
ae6aa2ea
MS
732__critical_end:
733
1da177e4
LT
734/*
735 * Machine check handler routines
736 */
737
25d83cbf 738 .globl mcck_int_handler
1da177e4 739mcck_int_handler:
6377981f 740 stck __LC_MCCK_CLOCK
77fa2245
HC
741 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
742 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
1da177e4 743 SAVE_ALL_BASE __LC_SAVE_AREA+32
77fa2245 744 la %r12,__LC_MCK_OLD_PSW
25d83cbf 745 tm __LC_MCCK_CODE,0x80 # system damage?
77fa2245 746 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
6377981f 747 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
63b12246
MS
748 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
749 bo BASED(1f)
750 la %r14,__LC_SYNC_ENTER_TIMER
751 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
752 bl BASED(0f)
753 la %r14,__LC_ASYNC_ENTER_TIMER
7540: clc 0(8,%r14),__LC_EXIT_TIMER
755 bl BASED(0f)
756 la %r14,__LC_EXIT_TIMER
7570: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
758 bl BASED(0f)
759 la %r14,__LC_LAST_UPDATE_TIMER
7600: spt 0(%r14)
6377981f 761 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
c185b783 7621: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
77fa2245
HC
763 bno BASED(mcck_int_main) # no -> skip cleanup critical
764 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
765 bnz BASED(mcck_int_main) # from user -> load async stack
766 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
767 bhe BASED(mcck_int_main)
768 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
769 bl BASED(mcck_int_main)
770 l %r14,BASED(.Lcleanup_critical)
771 basr %r14,%r14
772mcck_int_main:
773 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
774 slr %r14,%r15
775 sra %r14,PAGE_SHIFT
776 be BASED(0f)
777 l %r15,__LC_PANIC_STACK # load panic stack
7780: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
25d83cbf 779 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
ae6aa2ea 780 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
63b12246 781 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
ae6aa2ea 782 bz BASED(mcck_no_vtime)
6377981f 783 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
ae6aa2ea 784 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
6377981f 785 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
ae6aa2ea 786mcck_no_vtime:
77fa2245
HC
787 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
788 la %r2,SP_PTREGS(%r15) # load pt_regs
25d83cbf
HC
789 l %r1,BASED(.Ls390_mcck)
790 basr %r14,%r1 # call machine check handler
791 tm SP_PSW+1(%r15),0x01 # returning to user ?
77fa2245 792 bno BASED(mcck_return)
25d83cbf 793 l %r1,__LC_KERNEL_STACK # switch to kernel stack
77fa2245
HC
794 s %r1,BASED(.Lc_spsize)
795 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
25d83cbf 796 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
77fa2245
HC
797 lr %r15,%r1
798 stosm __SF_EMPTY(%r15),0x04 # turn dat on
799 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
800 bno BASED(mcck_return)
1f194a4c 801 TRACE_IRQS_OFF
77fa2245
HC
802 l %r1,BASED(.Ls390_handle_mcck)
803 basr %r14,%r1 # call machine check handler
1f194a4c 804 TRACE_IRQS_ON
1da177e4 805mcck_return:
63b12246
MS
806 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
807 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
63b12246
MS
808 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
809 bno BASED(0f)
810 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
811 stpt __LC_EXIT_TIMER
812 lpsw __LC_RETURN_MCCK_PSW # back to caller
c185b783 8130: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
63b12246
MS
814 lpsw __LC_RETURN_MCCK_PSW # back to caller
815
25d83cbf 816 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
1da177e4 817
1da177e4
LT
818/*
819 * Restart interruption handler, kick starter for additional CPUs
820 */
84b36a8e 821#ifdef CONFIG_SMP
2bc89b5e 822 __CPUINIT
25d83cbf 823 .globl restart_int_handler
1da177e4 824restart_int_handler:
5b409ed1
MS
825 basr %r1,0
826restart_base:
827 spt restart_vtime-restart_base(%r1)
828 stck __LC_LAST_UPDATE_CLOCK
829 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
830 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
25d83cbf
HC
831 l %r15,__LC_SAVE_AREA+60 # load ksp
832 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
833 lam %a0,%a15,__LC_AREGS_SAVE_AREA
834 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
5b409ed1
MS
835 l %r1,__LC_THREAD_INFO
836 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
837 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
838 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
25d83cbf
HC
839 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
840 basr %r14,0
841 l %r14,restart_addr-.(%r14)
842 br %r14 # branch to start_secondary
1da177e4 843restart_addr:
25d83cbf 844 .long start_secondary
5b409ed1
MS
845 .align 8
846restart_vtime:
847 .long 0x7fffffff,0xffffffff
84b36a8e 848 .previous
1da177e4
LT
849#else
850/*
851 * If we do not run with SMP enabled, let the new CPU crash ...
852 */
25d83cbf 853 .globl restart_int_handler
1da177e4 854restart_int_handler:
25d83cbf 855 basr %r1,0
1da177e4 856restart_base:
25d83cbf
HC
857 lpsw restart_crash-restart_base(%r1)
858 .align 8
1da177e4 859restart_crash:
25d83cbf 860 .long 0x000a0000,0x00000000
1da177e4
LT
861restart_go:
862#endif
863
864#ifdef CONFIG_CHECK_STACK
865/*
866 * The synchronous or the asynchronous stack overflowed. We are dead.
867 * No need to properly save the registers, we are going to panic anyway.
868 * Setup a pt_regs so that show_trace can provide a good call trace.
869 */
870stack_overflow:
871 l %r15,__LC_PANIC_STACK # change to panic stack
872 sl %r15,BASED(.Lc_spsize)
873 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
874 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
875 la %r1,__LC_SAVE_AREA
876 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
877 be BASED(0f)
878 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
879 be BASED(0f)
880 la %r1,__LC_SAVE_AREA+16
8810: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
25d83cbf 882 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
1da177e4 883 l %r1,BASED(1f) # branch to kernel_stack_overflow
25d83cbf 884 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4 885 br %r1
25d83cbf 8861: .long kernel_stack_overflow
1da177e4
LT
887#endif
888
889cleanup_table_system_call:
890 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
6a2df3a8
MS
891cleanup_table_sysc_tif:
892 .long sysc_tif + 0x80000000, sysc_restore + 0x80000000
893cleanup_table_sysc_restore:
894 .long sysc_restore + 0x80000000, sysc_done + 0x80000000
895cleanup_table_io_tif:
896 .long io_tif + 0x80000000, io_restore + 0x80000000
897cleanup_table_io_restore:
898 .long io_restore + 0x80000000, io_done + 0x80000000
1da177e4
LT
899
900cleanup_critical:
901 clc 4(4,%r12),BASED(cleanup_table_system_call)
902 bl BASED(0f)
903 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
904 bl BASED(cleanup_system_call)
9050:
6a2df3a8 906 clc 4(4,%r12),BASED(cleanup_table_sysc_tif)
1da177e4 907 bl BASED(0f)
6a2df3a8
MS
908 clc 4(4,%r12),BASED(cleanup_table_sysc_tif+4)
909 bl BASED(cleanup_sysc_tif)
1da177e4 9100:
6a2df3a8 911 clc 4(4,%r12),BASED(cleanup_table_sysc_restore)
1da177e4 912 bl BASED(0f)
6a2df3a8
MS
913 clc 4(4,%r12),BASED(cleanup_table_sysc_restore+4)
914 bl BASED(cleanup_sysc_restore)
63b12246 9150:
6a2df3a8 916 clc 4(4,%r12),BASED(cleanup_table_io_tif)
63b12246 917 bl BASED(0f)
6a2df3a8
MS
918 clc 4(4,%r12),BASED(cleanup_table_io_tif+4)
919 bl BASED(cleanup_io_tif)
ae6aa2ea 9200:
6a2df3a8 921 clc 4(4,%r12),BASED(cleanup_table_io_restore)
ae6aa2ea 922 bl BASED(0f)
6a2df3a8
MS
923 clc 4(4,%r12),BASED(cleanup_table_io_restore+4)
924 bl BASED(cleanup_io_restore)
1da177e4
LT
9250:
926 br %r14
927
928cleanup_system_call:
929 mvc __LC_RETURN_PSW(8),0(%r12)
1da177e4
LT
930 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
931 bh BASED(0f)
6377981f
MS
932 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
933 c %r12,BASED(.Lmck_old_psw)
934 be BASED(0f)
1da177e4 935 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
6377981f
MS
9360: c %r12,BASED(.Lmck_old_psw)
937 la %r12,__LC_SAVE_AREA+32
938 be BASED(0f)
939 la %r12,__LC_SAVE_AREA+16
1da177e4
LT
9400: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
941 bhe BASED(cleanup_vtime)
1da177e4
LT
942 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
943 bh BASED(0f)
ae6aa2ea
MS
944 mvc __LC_SAVE_AREA(16),0(%r12)
9450: st %r13,4(%r12)
946 st %r12,__LC_SAVE_AREA+48 # argh
63b12246 947 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 948 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
ae6aa2ea
MS
949 l %r12,__LC_SAVE_AREA+48 # argh
950 st %r15,12(%r12)
1da177e4 951 lh %r7,0x8a
1da177e4
LT
952cleanup_vtime:
953 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
954 bhe BASED(cleanup_stime)
1da177e4
LT
955 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
956cleanup_stime:
957 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
958 bh BASED(cleanup_update)
959 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
960cleanup_update:
961 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1da177e4
LT
962 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
963 la %r12,__LC_RETURN_PSW
964 br %r14
965cleanup_system_call_insn:
966 .long sysc_saveall + 0x80000000
25d83cbf
HC
967 .long system_call + 0x80000000
968 .long sysc_vtime + 0x80000000
969 .long sysc_stime + 0x80000000
970 .long sysc_update + 0x80000000
1da177e4 971
6a2df3a8 972cleanup_sysc_tif:
1da177e4 973 mvc __LC_RETURN_PSW(4),0(%r12)
6a2df3a8 974 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif)
1da177e4
LT
975 la %r12,__LC_RETURN_PSW
976 br %r14
977
6a2df3a8
MS
978cleanup_sysc_restore:
979 clc 4(4,%r12),BASED(cleanup_sysc_restore_insn)
ae6aa2ea 980 be BASED(2f)
6377981f
MS
981 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
982 c %r12,BASED(.Lmck_old_psw)
983 be BASED(0f)
1da177e4 984 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
6377981f 9850: clc 4(4,%r12),BASED(cleanup_sysc_restore_insn+4)
ae6aa2ea 986 be BASED(2f)
1da177e4 987 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
ae6aa2ea 988 c %r12,BASED(.Lmck_old_psw)
6377981f
MS
989 la %r12,__LC_SAVE_AREA+32
990 be BASED(1f)
991 la %r12,__LC_SAVE_AREA+16
9921: mvc 0(16,%r12),SP_R12(%r15)
993 lm %r0,%r11,SP_R0(%r15)
1da177e4 994 l %r15,SP_R15(%r15)
ae6aa2ea 9952: la %r12,__LC_RETURN_PSW
1da177e4 996 br %r14
6a2df3a8 997cleanup_sysc_restore_insn:
411788ea 998 .long sysc_done - 4 + 0x80000000
411788ea 999 .long sysc_done - 8 + 0x80000000
1da177e4 1000
6a2df3a8 1001cleanup_io_tif:
176b1803 1002 mvc __LC_RETURN_PSW(4),0(%r12)
6a2df3a8 1003 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif)
176b1803
MS
1004 la %r12,__LC_RETURN_PSW
1005 br %r14
1006
6a2df3a8
MS
1007cleanup_io_restore:
1008 clc 4(4,%r12),BASED(cleanup_io_restore_insn)
6377981f
MS
1009 be BASED(1f)
1010 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
6a2df3a8 1011 clc 4(4,%r12),BASED(cleanup_io_restore_insn+4)
6377981f 1012 be BASED(1f)
ae6aa2ea 1013 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
ae6aa2ea 1014 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
6377981f 1015 lm %r0,%r11,SP_R0(%r15)
ae6aa2ea 1016 l %r15,SP_R15(%r15)
6377981f 10171: la %r12,__LC_RETURN_PSW
ae6aa2ea 1018 br %r14
6a2df3a8 1019cleanup_io_restore_insn:
411788ea 1020 .long io_done - 4 + 0x80000000
411788ea 1021 .long io_done - 8 + 0x80000000
ae6aa2ea 1022
1da177e4
LT
1023/*
1024 * Integer constants
1025 */
25d83cbf
HC
1026 .align 4
1027.Lc_spsize: .long SP_SIZE
1028.Lc_overhead: .long STACK_FRAME_OVERHEAD
25d83cbf
HC
1029.Lnr_syscalls: .long NR_syscalls
1030.L0x018: .short 0x018
1031.L0x020: .short 0x020
1032.L0x028: .short 0x028
1033.L0x030: .short 0x030
1034.L0x038: .short 0x038
1035.Lc_1: .long 1
1da177e4
LT
1036
1037/*
1038 * Symbol constants
1039 */
25d83cbf 1040.Ls390_mcck: .long s390_do_machine_check
77fa2245 1041.Ls390_handle_mcck:
25d83cbf
HC
1042 .long s390_handle_mcck
1043.Lmck_old_psw: .long __LC_MCK_OLD_PSW
1044.Ldo_IRQ: .long do_IRQ
1045.Ldo_extint: .long do_extint
1046.Ldo_signal: .long do_signal
753c4dd6
MS
1047.Ldo_notify_resume:
1048 .long do_notify_resume
25d83cbf 1049.Lhandle_per: .long do_single_step
03ff9a23
MS
1050.Ldo_execve: .long do_execve
1051.Lexecve_tail: .long execve_tail
25d83cbf
HC
1052.Ljump_table: .long pgm_check_table
1053.Lschedule: .long schedule
ab1809b4 1054#ifdef CONFIG_PREEMPT
b8e7a54c
HC
1055.Lpreempt_schedule_irq:
1056 .long preempt_schedule_irq
ab1809b4 1057#endif
753c4dd6
MS
1058.Ltrace_entry: .long do_syscall_trace_enter
1059.Ltrace_exit: .long do_syscall_trace_exit
25d83cbf
HC
1060.Lschedtail: .long schedule_tail
1061.Lsysc_table: .long sys_call_table
1f194a4c 1062#ifdef CONFIG_TRACE_IRQFLAGS
50bec4ce
HC
1063.Ltrace_irq_on_caller:
1064 .long trace_hardirqs_on_caller
1065.Ltrace_irq_off_caller:
1066 .long trace_hardirqs_off_caller
af4c6874
HC
1067#endif
1068#ifdef CONFIG_LOCKDEP
523b44cf
HC
1069.Llockdep_sys_exit:
1070 .long lockdep_sys_exit
1f194a4c 1071#endif
1da177e4 1072.Lcritical_start:
25d83cbf 1073 .long __critical_start + 0x80000000
1da177e4 1074.Lcritical_end:
25d83cbf 1075 .long __critical_end + 0x80000000
1da177e4 1076.Lcleanup_critical:
25d83cbf 1077 .long cleanup_critical
1da177e4 1078
25d83cbf 1079 .section .rodata, "a"
1da177e4 1080#define SYSCALL(esa,esame,emu) .long esa
9bf1226b 1081 .globl sys_call_table
1da177e4
LT
1082sys_call_table:
1083#include "syscalls.S"
1084#undef SYSCALL