[net-next-2.6.git] / arch / s390 / kernel / early.c

/*
 *  arch/s390/kernel/early.c
 *
 *    Copyright IBM Corp. 2007
 *    Author(s): Hongjie Yang <hongjie@us.ibm.com>,
 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
 */

#include <linux/init.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/lockdep.h>
#include <linux/module.h>
#include <linux/pfn.h>
#include <linux/uaccess.h>
#include <asm/ebcdic.h>
#include <asm/ipl.h>
#include <asm/lowcore.h>
#include <asm/processor.h>
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/cpcmd.h>
#include <asm/sclp.h>
#include "entry.h"

/*
 * Create a Kernel NSS if the SAVESYS= parameter is defined
 */
#define DEFSYS_CMD_SIZE		128
#define SAVESYS_CMD_SIZE	32

char kernel_nss_name[NSS_NAME_SIZE + 1];

static void __init setup_boot_command_line(void);


#ifdef CONFIG_SHARED_KERNEL
int __init savesys_ipl_nss(char *cmd, const int cmdlen);

asm(
	"	.section .init.text,\"ax\",@progbits\n"
	"	.align	4\n"
	"	.type	savesys_ipl_nss, @function\n"
	"savesys_ipl_nss:\n"
#ifdef CONFIG_64BIT
	"	stmg	6,15,48(15)\n"
	"	lgr	14,3\n"
	"	sam31\n"
	"	diag	2,14,0x8\n"
	"	sam64\n"
	"	lgr	2,14\n"
	"	lmg	6,15,48(15)\n"
#else
	"	stm	6,15,24(15)\n"
	"	lr	14,3\n"
	"	diag	2,14,0x8\n"
	"	lr	2,14\n"
	"	lm	6,15,24(15)\n"
#endif
	"	br	14\n"
	"	.size	savesys_ipl_nss, .-savesys_ipl_nss\n");

static noinline __init void create_kernel_nss(void)
{
	unsigned int i, stext_pfn, eshared_pfn, end_pfn, min_size;
#ifdef CONFIG_BLK_DEV_INITRD
	unsigned int sinitrd_pfn, einitrd_pfn;
#endif
	int response;
	size_t len;
	char *savesys_ptr;
	char upper_command_line[COMMAND_LINE_SIZE];
	char defsys_cmd[DEFSYS_CMD_SIZE];
	char savesys_cmd[SAVESYS_CMD_SIZE];

	/* Do nothing if we are not running under VM */
	if (!MACHINE_IS_VM)
		return;

	/* Convert COMMAND_LINE to upper case */
	for (i = 0; i < strlen(boot_command_line); i++)
		upper_command_line[i] = toupper(boot_command_line[i]);

	savesys_ptr = strstr(upper_command_line, "SAVESYS=");

	if (!savesys_ptr)
		return;

	savesys_ptr += 8;    /* Point to the beginning of the NSS name */
	for (i = 0; i < NSS_NAME_SIZE; i++) {
		if (savesys_ptr[i] == ' ' || savesys_ptr[i] == '\0')
			break;
		kernel_nss_name[i] = savesys_ptr[i];
	}

	stext_pfn = PFN_DOWN(__pa(&_stext));
	eshared_pfn = PFN_DOWN(__pa(&_eshared));
	end_pfn = PFN_UP(__pa(&_end));
	min_size = end_pfn << 2;

	sprintf(defsys_cmd, "DEFSYS %s 00000-%.5X EW %.5X-%.5X SR %.5X-%.5X",
		kernel_nss_name, stext_pfn - 1, stext_pfn, eshared_pfn - 1,
		eshared_pfn, end_pfn);

#ifdef CONFIG_BLK_DEV_INITRD
	if (INITRD_START && INITRD_SIZE) {
		sinitrd_pfn = PFN_DOWN(__pa(INITRD_START));
		einitrd_pfn = PFN_UP(__pa(INITRD_START + INITRD_SIZE));
		min_size = einitrd_pfn << 2;
		sprintf(defsys_cmd, "%s EW %.5X-%.5X", defsys_cmd,
		sinitrd_pfn, einitrd_pfn);
	}
#endif

	sprintf(defsys_cmd, "%s EW MINSIZE=%.7iK PARMREGS=0-13",
		defsys_cmd, min_size);
	sprintf(savesys_cmd, "SAVESYS %s \n IPL %s",
		kernel_nss_name, kernel_nss_name);

	__cpcmd(defsys_cmd, NULL, 0, &response);

	if (response != 0) {
		kernel_nss_name[0] = '\0';
		return;
	}

	len = strlen(savesys_cmd);
	ASCEBC(savesys_cmd, len);
	response = savesys_ipl_nss(savesys_cmd, len);

	/* On success: response is equal to the command size,
	 *	       max SAVESYS_CMD_SIZE
	 * On error: response contains the numeric portion of cp error message.
	 *	     for SAVESYS it will be >= 263
	 */
	if (response > SAVESYS_CMD_SIZE) {
		kernel_nss_name[0] = '\0';
		return;
	}

	/* re-setup boot command line with new ipl vm parms */
	ipl_update_parameters();
	setup_boot_command_line();

	ipl_flags = IPL_NSS_VALID;
}

#else /* CONFIG_SHARED_KERNEL */

static inline void create_kernel_nss(void) { }

#endif /* CONFIG_SHARED_KERNEL */

/*
 * Clear bss memory
 */
static noinline __init void clear_bss_section(void)
{
	memset(__bss_start, 0, __bss_stop - __bss_start);
}

/*
 * Initialize storage key for kernel pages
 */
static noinline __init void init_kernel_storage_key(void)
{
	unsigned long end_pfn, init_pfn;

	end_pfn = PFN_UP(__pa(&_end));

	for (init_pfn = 0 ; init_pfn < end_pfn; init_pfn++)
		page_set_storage_key(init_pfn << PAGE_SHIFT, PAGE_DEFAULT_KEY);
}

static noinline __init void detect_machine_type(void)
{
	struct cpuinfo_S390 *cpuinfo = &S390_lowcore.cpu_data;

	get_cpu_id(&S390_lowcore.cpu_data.cpu_id);

	/* Running under z/VM ? */
	if (cpuinfo->cpu_id.version == 0xff)
		machine_flags |= MACHINE_FLAG_VM;

	/* Running on a P/390 ? */
	if (cpuinfo->cpu_id.machine == 0x7490)
		machine_flags |= MACHINE_FLAG_P390;

	/* Running under KVM ? */
	if (cpuinfo->cpu_id.version == 0xfe)
		machine_flags |= MACHINE_FLAG_KVM;
}

#ifdef CONFIG_64BIT
static noinline __init int memory_fast_detect(void)
{
	unsigned long val0 = 0;
	unsigned long val1 = 0xc;
	int ret = -ENOSYS;

	if (ipl_flags & IPL_NSS_VALID)
		return -ENOSYS;

	asm volatile(
		"	diag	%1,%2,0x260\n"
		"0:	lhi	%0,0\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "+d" (ret), "+d" (val0), "+d" (val1) : : "cc");

	if (ret || val0 != val1)
		return -ENOSYS;

	memory_chunk[0].size = val0 + 1;
	return 0;
}
#else
static inline int memory_fast_detect(void)
{
	return -ENOSYS;
}
#endif

static inline __init unsigned long __tprot(unsigned long addr)
{
	int cc = -1;

	asm volatile(
		"	tprot	0(%1),0\n"
		"0:	ipm	%0\n"
		"	srl	%0,28\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "+d" (cc) : "a" (addr) : "cc");
	return (unsigned long)cc;
}

/* Checking memory in 128KB increments. */
#define CHUNK_INCR	(1UL << 17)
#define ADDR2G		(1UL << 31)

static noinline __init void find_memory_chunks(unsigned long memsize)
{
	unsigned long addr = 0, old_addr = 0;
	unsigned long old_cc = CHUNK_READ_WRITE;
	unsigned long cc;
	int chunk = 0;

	while (chunk < MEMORY_CHUNKS) {
		cc = __tprot(addr);
		while (cc == old_cc) {
			addr += CHUNK_INCR;
			if (memsize && addr >= memsize)
				break;
#ifndef CONFIG_64BIT
			if (addr == ADDR2G)
				break;
#endif
			cc = __tprot(addr);
		}

		if (old_addr != addr &&
		    (old_cc == CHUNK_READ_WRITE || old_cc == CHUNK_READ_ONLY)) {
			memory_chunk[chunk].addr = old_addr;
			memory_chunk[chunk].size = addr - old_addr;
			memory_chunk[chunk].type = old_cc;
			chunk++;
		}

		old_addr = addr;
		old_cc = cc;

#ifndef CONFIG_64BIT
		if (addr == ADDR2G)
			break;
#endif
		/*
		 * Finish memory detection at the first hole
		 * if storage size is unknown.
		 */
		if (cc == -1UL && !memsize)
			break;
		if (memsize && addr >= memsize)
			break;
	}
}

static __init void early_pgm_check_handler(void)
{
	unsigned long addr;
	const struct exception_table_entry *fixup;

	addr = S390_lowcore.program_old_psw.addr;
	fixup = search_exception_tables(addr & PSW_ADDR_INSN);
	if (!fixup)
		disabled_wait(0);
	S390_lowcore.program_old_psw.addr = fixup->fixup | PSW_ADDR_AMODE;
}

static noinline __init void setup_lowcore_early(void)
{
	psw_t psw;

	psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
	psw.addr = PSW_ADDR_AMODE | (unsigned long) s390_base_ext_handler;
	S390_lowcore.external_new_psw = psw;
	psw.addr = PSW_ADDR_AMODE | (unsigned long) s390_base_pgm_handler;
	S390_lowcore.program_new_psw = psw;
	s390_base_pgm_handler_fn = early_pgm_check_handler;
}

static noinline __init void setup_hpage(void)
{
#ifndef CONFIG_DEBUG_PAGEALLOC
	unsigned int facilities;

	facilities = stfl();
	if (!(facilities & (1UL << 23)) || !(facilities & (1UL << 29)))
		return;
	machine_flags |= MACHINE_FLAG_HPAGE;
	__ctl_set_bit(0, 23);
#endif
}

static __init void detect_mvpg(void)
{
#ifndef CONFIG_64BIT
	int rc;

	asm volatile(
		"	la	0,0\n"
		"	mvpg	%2,%2\n"
		"0:	la	%0,0\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "=d" (rc) : "0" (-EOPNOTSUPP), "a" (0) : "memory", "cc", "0");
	if (!rc)
		machine_flags |= MACHINE_FLAG_MVPG;
#endif
}

static __init void detect_ieee(void)
{
#ifndef CONFIG_64BIT
	int rc, tmp;

	asm volatile(
		"	efpc	%1,0\n"
		"0:	la	%0,0\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "=d" (rc), "=d" (tmp): "0" (-EOPNOTSUPP) : "cc");
	if (!rc)
		machine_flags |= MACHINE_FLAG_IEEE;
#endif
}

static __init void detect_csp(void)
{
#ifndef CONFIG_64BIT
	int rc;

	asm volatile(
		"	la	0,0\n"
		"	la	1,0\n"
		"	la	2,4\n"
		"	csp	0,2\n"
		"0:	la	%0,0\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "=d" (rc) : "0" (-EOPNOTSUPP) : "cc", "0", "1", "2");
	if (!rc)
		machine_flags |= MACHINE_FLAG_CSP;
#endif
}

static __init void detect_diag9c(void)
{
	unsigned int cpu_address;
	int rc;

	cpu_address = stap();
	asm volatile(
		"	diag	%2,0,0x9c\n"
		"0:	la	%0,0\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "=d" (rc) : "0" (-EOPNOTSUPP), "d" (cpu_address) : "cc");
	if (!rc)
		machine_flags |= MACHINE_FLAG_DIAG9C;
}

static __init void detect_diag44(void)
{
#ifdef CONFIG_64BIT
	int rc;

	asm volatile(
		"	diag	0,0,0x44\n"
		"0:	la	%0,0\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "=d" (rc) : "0" (-EOPNOTSUPP) : "cc");
	if (!rc)
		machine_flags |= MACHINE_FLAG_DIAG44;
#endif
}

static __init void detect_machine_facilities(void)
{
#ifdef CONFIG_64BIT
	unsigned int facilities;

	facilities = stfl();
	if (facilities & (1 << 28))
		machine_flags |= MACHINE_FLAG_IDTE;
	if (facilities & (1 << 23))
		machine_flags |= MACHINE_FLAG_PFMF;
	if (facilities & (1 << 4))
		machine_flags |= MACHINE_FLAG_MVCOS;
#endif
}

static __init void rescue_initrd(void)
{
#ifdef CONFIG_BLK_DEV_INITRD
	/*
	 * Move the initrd right behind the bss section in case it starts
	 * within the bss section. So we don't overwrite it when the bss
	 * section gets cleared.
	 */
	if (!INITRD_START || !INITRD_SIZE)
		return;
	if (INITRD_START >= (unsigned long) __bss_stop)
		return;
	memmove(__bss_stop, (void *) INITRD_START, INITRD_SIZE);
	INITRD_START = (unsigned long) __bss_stop;
#endif
}

/* Set up boot command line */
static void __init setup_boot_command_line(void)
{
	char *parm = NULL;

	/* copy arch command line */
	strlcpy(boot_command_line, COMMAND_LINE, ARCH_COMMAND_LINE_SIZE);
	boot_command_line[ARCH_COMMAND_LINE_SIZE - 1] = 0;

	/* append IPL PARM data to the boot command line */
	if (MACHINE_IS_VM) {
		parm = boot_command_line + strlen(boot_command_line);
		*parm++ = ' ';
		get_ipl_vmparm(parm);
		if (parm[0] == '=')
			memmove(boot_command_line, parm + 1, strlen(parm));
	}
}


/*
 * Save ipl parameters, clear bss memory, initialize storage keys
 * and create a kernel NSS at startup if the SAVESYS= parm is defined
 */
void __init startup_init(void)
{
	unsigned long long memsize;

	ipl_save_parameters();
	rescue_initrd();
	clear_bss_section();
	init_kernel_storage_key();
	lockdep_init();
	lockdep_off();
	sort_main_extable();
	setup_lowcore_early();
	detect_machine_type();
	ipl_update_parameters();
	setup_boot_command_line();
	create_kernel_nss();
	detect_mvpg();
	detect_ieee();
	detect_csp();
	detect_diag9c();
	detect_diag44();
	detect_machine_facilities();
	setup_hpage();
	sclp_read_info_early();
	sclp_facilities_detect();
	memsize = sclp_memory_detect();
#ifndef CONFIG_64BIT
	/*
	 * Can't deal with more than 2G in 31 bit addressing mode, so
	 * limit the value in order to avoid strange side effects.
	 */
	if (memsize > ADDR2G)
		memsize = ADDR2G;
#endif
	if (memory_fast_detect() < 0)
		find_memory_chunks((unsigned long) memsize);
	lockdep_on();
}
Commit	Line	Data
ab14de6c HC	1	/*
	2	* arch/s390/kernel/early.c
	3	*
	4	* Copyright IBM Corp. 2007
	5	* Author(s): Hongjie Yang <hongjie@us.ibm.com>,
	6	* Heiko Carstens <heiko.carstens@de.ibm.com>
	7	*/
	8
	9	#include <linux/init.h>
	10	#include <linux/errno.h>
	11	#include <linux/string.h>
	12	#include <linux/ctype.h>
	13	#include <linux/lockdep.h>
	14	#include <linux/module.h>
	15	#include <linux/pfn.h>
	16	#include <linux/uaccess.h>
a0443fbb	17	#include <asm/ebcdic.h>
46b05d26	18	#include <asm/ipl.h>
ab14de6c HC	19	#include <asm/lowcore.h>
	20	#include <asm/processor.h>
	21	#include <asm/sections.h>
	22	#include <asm/setup.h>
	23	#include <asm/cpcmd.h>
	24	#include <asm/sclp.h>
a806170e	25	#include "entry.h"
ab14de6c HC	26
	27	/*
	28	* Create a Kernel NSS if the SAVESYS= parameter is defined
	29	*/
a0443fbb	30	#define DEFSYS_CMD_SIZE 128
ab14de6c HC	31	#define SAVESYS_CMD_SIZE 32
ab14de6c HC	32
ab14de6c HC	33	char kernel_nss_name[NSS_NAME_SIZE + 1];
ab14de6c HC	34
a0443fbb HB	35	static void __init setup_boot_command_line(void);
	36
	37
ab14de6c	38	#ifdef CONFIG_SHARED_KERNEL
a0443fbb HB	39	int __init savesys_ipl_nss(char *cmd, const int cmdlen);
	40
	41	asm(
	42	" .section .init.text,\"ax\",@progbits\n"
	43	" .align 4\n"
	44	" .type savesys_ipl_nss, @function\n"
	45	"savesys_ipl_nss:\n"
	46	#ifdef CONFIG_64BIT
	47	" stmg 6,15,48(15)\n"
	48	" lgr 14,3\n"
	49	" sam31\n"
	50	" diag 2,14,0x8\n"
	51	" sam64\n"
	52	" lgr 2,14\n"
	53	" lmg 6,15,48(15)\n"
	54	#else
	55	" stm 6,15,24(15)\n"
	56	" lr 14,3\n"
	57	" diag 2,14,0x8\n"
	58	" lr 2,14\n"
	59	" lm 6,15,24(15)\n"
	60	#endif
	61	" br 14\n"
	62	" .size savesys_ipl_nss, .-savesys_ipl_nss\n");
	63
ab14de6c HC	64	static noinline __init void create_kernel_nss(void)
	65	{
	66	unsigned int i, stext_pfn, eshared_pfn, end_pfn, min_size;
	67	#ifdef CONFIG_BLK_DEV_INITRD
	68	unsigned int sinitrd_pfn, einitrd_pfn;
	69	#endif
	70	int response;
a0443fbb	71	size_t len;
ab14de6c HC	72	char *savesys_ptr;
	73	char upper_command_line[COMMAND_LINE_SIZE];
	74	char defsys_cmd[DEFSYS_CMD_SIZE];
	75	char savesys_cmd[SAVESYS_CMD_SIZE];
	76
	77	/* Do nothing if we are not running under VM */
	78	if (!MACHINE_IS_VM)
	79	return;
	80
	81	/* Convert COMMAND_LINE to upper case */
a0443fbb HB	82	for (i = 0; i < strlen(boot_command_line); i++)
a0443fbb HB	83	upper_command_line[i] = toupper(boot_command_line[i]);
ab14de6c HC	84
	85	savesys_ptr = strstr(upper_command_line, "SAVESYS=");
	86
	87	if (!savesys_ptr)
	88	return;
	89
	90	savesys_ptr += 8; /* Point to the beginning of the NSS name */
	91	for (i = 0; i < NSS_NAME_SIZE; i++) {
	92	if (savesys_ptr[i] == ' ' \|\| savesys_ptr[i] == '\0')
	93	break;
	94	kernel_nss_name[i] = savesys_ptr[i];
	95	}
	96
	97	stext_pfn = PFN_DOWN(__pa(&_stext));
	98	eshared_pfn = PFN_DOWN(__pa(&_eshared));
	99	end_pfn = PFN_UP(__pa(&_end));
	100	min_size = end_pfn << 2;
	101
	102	sprintf(defsys_cmd, "DEFSYS %s 00000-%.5X EW %.5X-%.5X SR %.5X-%.5X",
	103	kernel_nss_name, stext_pfn - 1, stext_pfn, eshared_pfn - 1,
	104	eshared_pfn, end_pfn);
	105
	106	#ifdef CONFIG_BLK_DEV_INITRD
	107	if (INITRD_START && INITRD_SIZE) {
	108	sinitrd_pfn = PFN_DOWN(__pa(INITRD_START));
	109	einitrd_pfn = PFN_UP(__pa(INITRD_START + INITRD_SIZE));
	110	min_size = einitrd_pfn << 2;
	111	sprintf(defsys_cmd, "%s EW %.5X-%.5X", defsys_cmd,
	112	sinitrd_pfn, einitrd_pfn);
	113	}
	114	#endif
	115
a0443fbb HB	116	sprintf(defsys_cmd, "%s EW MINSIZE=%.7iK PARMREGS=0-13",
a0443fbb HB	117	defsys_cmd, min_size);
ab14de6c HC	118	sprintf(savesys_cmd, "SAVESYS %s \n IPL %s",
	119	kernel_nss_name, kernel_nss_name);
	120
	121	__cpcmd(defsys_cmd, NULL, 0, &response);
	122
583b33bc HY	123	if (response != 0) {
583b33bc HY	124	kernel_nss_name[0] = '\0';
ab14de6c	125	return;
583b33bc	126	}
ab14de6c	127
a0443fbb HB	128	len = strlen(savesys_cmd);
	129	ASCEBC(savesys_cmd, len);
	130	response = savesys_ipl_nss(savesys_cmd, len);
ab14de6c	131
a0443fbb HB	132	/* On success: response is equal to the command size,
	133	* max SAVESYS_CMD_SIZE
	134	* On error: response contains the numeric portion of cp error message.
	135	* for SAVESYS it will be >= 263
	136	*/
	137	if (response > SAVESYS_CMD_SIZE) {
583b33bc	138	kernel_nss_name[0] = '\0';
ab14de6c	139	return;
583b33bc	140	}
ab14de6c	141
a0443fbb HB	142	/* re-setup boot command line with new ipl vm parms */
	143	ipl_update_parameters();
	144	setup_boot_command_line();
	145
ab14de6c HC	146	ipl_flags = IPL_NSS_VALID;
	147	}
	148
	149	#else /* CONFIG_SHARED_KERNEL */
	150
	151	static inline void create_kernel_nss(void) { }
	152
	153	#endif /* CONFIG_SHARED_KERNEL */
	154
	155	/*
	156	* Clear bss memory
	157	*/
	158	static noinline __init void clear_bss_section(void)
	159	{
229d9c6d	160	memset(__bss_start, 0, __bss_stop - __bss_start);
ab14de6c HC	161	}
	162
	163	/*
	164	* Initialize storage key for kernel pages
	165	*/
	166	static noinline __init void init_kernel_storage_key(void)
	167	{
	168	unsigned long end_pfn, init_pfn;
	169
	170	end_pfn = PFN_UP(__pa(&_end));
	171
	172	for (init_pfn = 0 ; init_pfn < end_pfn; init_pfn++)
	173	page_set_storage_key(init_pfn << PAGE_SHIFT, PAGE_DEFAULT_KEY);
	174	}
	175
	176	static noinline __init void detect_machine_type(void)
	177	{
	178	struct cpuinfo_S390 *cpuinfo = &S390_lowcore.cpu_data;
	179
72960a02	180	get_cpu_id(&S390_lowcore.cpu_data.cpu_id);
ab14de6c HC	181
	182	/* Running under z/VM ? */
	183	if (cpuinfo->cpu_id.version == 0xff)
2e5061e4	184	machine_flags \|= MACHINE_FLAG_VM;
ab14de6c HC	185
	186	/* Running on a P/390 ? */
	187	if (cpuinfo->cpu_id.machine == 0x7490)
2e5061e4	188	machine_flags \|= MACHINE_FLAG_P390;
fa587743 CO	189
	190	/* Running under KVM ? */
	191	if (cpuinfo->cpu_id.version == 0xfe)
2e5061e4	192	machine_flags \|= MACHINE_FLAG_KVM;
ab14de6c HC	193	}
ab14de6c HC	194
257c6e1c	195	#ifdef CONFIG_64BIT
ab14de6c HC	196	static noinline __init int memory_fast_detect(void)
ab14de6c HC	197	{
ab14de6c HC	198	unsigned long val0 = 0;
	199	unsigned long val1 = 0xc;
	200	int ret = -ENOSYS;
	201
	202	if (ipl_flags & IPL_NSS_VALID)
	203	return -ENOSYS;
	204
	205	asm volatile(
	206	" diag %1,%2,0x260\n"
	207	"0: lhi %0,0\n"
	208	"1:\n"
	209	EX_TABLE(0b,1b)
	210	: "+d" (ret), "+d" (val0), "+d" (val1) : : "cc");
	211
	212	if (ret \|\| val0 != val1)
	213	return -ENOSYS;
	214
257c6e1c	215	memory_chunk[0].size = val0 + 1;
ab14de6c HC	216	return 0;
ab14de6c HC	217	}
257c6e1c HC	218	#else
	219	static inline int memory_fast_detect(void)
	220	{
	221	return -ENOSYS;
	222	}
	223	#endif
ab14de6c	224
ab14de6c HC	225	static inline __init unsigned long __tprot(unsigned long addr)
	226	{
	227	int cc = -1;
	228
	229	asm volatile(
	230	" tprot 0(%1),0\n"
	231	"0: ipm %0\n"
	232	" srl %0,28\n"
	233	"1:\n"
	234	EX_TABLE(0b,1b)
	235	: "+d" (cc) : "a" (addr) : "cc");
	236	return (unsigned long)cc;
	237	}
	238
	239	/* Checking memory in 128KB increments. */
	240	#define CHUNK_INCR (1UL << 17)
05dd2530	241	#define ADDR2G (1UL << 31)
ab14de6c HC	242
	243	static noinline __init void find_memory_chunks(unsigned long memsize)
	244	{
	245	unsigned long addr = 0, old_addr = 0;
	246	unsigned long old_cc = CHUNK_READ_WRITE;
	247	unsigned long cc;
	248	int chunk = 0;
	249
	250	while (chunk < MEMORY_CHUNKS) {
	251	cc = __tprot(addr);
	252	while (cc == old_cc) {
	253	addr += CHUNK_INCR;
a2cb0737	254	if (memsize && addr >= memsize)
0b8da654	255	break;
ab14de6c HC	256	#ifndef CONFIG_64BIT
	257	if (addr == ADDR2G)
	258	break;
	259	#endif
0b8da654	260	cc = __tprot(addr);
ab14de6c HC	261	}
	262
	263	if (old_addr != addr &&
	264	(old_cc == CHUNK_READ_WRITE \|\| old_cc == CHUNK_READ_ONLY)) {
	265	memory_chunk[chunk].addr = old_addr;
	266	memory_chunk[chunk].size = addr - old_addr;
	267	memory_chunk[chunk].type = old_cc;
	268	chunk++;
	269	}
	270
	271	old_addr = addr;
	272	old_cc = cc;
	273
	274	#ifndef CONFIG_64BIT
	275	if (addr == ADDR2G)
	276	break;
	277	#endif
	278	/*
29c380f5 HC	279	* Finish memory detection at the first hole
29c380f5 HC	280	* if storage size is unknown.
ab14de6c	281	*/
29c380f5	282	if (cc == -1UL && !memsize)
ab14de6c HC	283	break;
	284	if (memsize && addr >= memsize)
	285	break;
	286	}
	287	}
	288
	289	static __init void early_pgm_check_handler(void)
	290	{
	291	unsigned long addr;
	292	const struct exception_table_entry *fixup;
	293
	294	addr = S390_lowcore.program_old_psw.addr;
	295	fixup = search_exception_tables(addr & PSW_ADDR_INSN);
	296	if (!fixup)
	297	disabled_wait(0);
	298	S390_lowcore.program_old_psw.addr = fixup->fixup \| PSW_ADDR_AMODE;
	299	}
	300
	301	static noinline __init void setup_lowcore_early(void)
	302	{
	303	psw_t psw;
	304
	305	psw.mask = PSW_BASE_BITS \| PSW_DEFAULT_KEY;
	306	psw.addr = PSW_ADDR_AMODE \| (unsigned long) s390_base_ext_handler;
	307	S390_lowcore.external_new_psw = psw;
	308	psw.addr = PSW_ADDR_AMODE \| (unsigned long) s390_base_pgm_handler;
	309	S390_lowcore.program_new_psw = psw;
	310	s390_base_pgm_handler_fn = early_pgm_check_handler;
	311	}
	312
53492b1d GS	313	static noinline __init void setup_hpage(void)
	314	{
	315	#ifndef CONFIG_DEBUG_PAGEALLOC
	316	unsigned int facilities;
	317
	318	facilities = stfl();
	319	if (!(facilities & (1UL << 23)) \|\| !(facilities & (1UL << 29)))
	320	return;
	321	machine_flags \|= MACHINE_FLAG_HPAGE;
	322	__ctl_set_bit(0, 23);
	323	#endif
	324	}
	325
2e5061e4 HC	326	static __init void detect_mvpg(void)
	327	{
	328	#ifndef CONFIG_64BIT
	329	int rc;
	330
	331	asm volatile(
	332	" la 0,0\n"
	333	" mvpg %2,%2\n"
	334	"0: la %0,0\n"
	335	"1:\n"
	336	EX_TABLE(0b,1b)
	337	: "=d" (rc) : "0" (-EOPNOTSUPP), "a" (0) : "memory", "cc", "0");
	338	if (!rc)
	339	machine_flags \|= MACHINE_FLAG_MVPG;
	340	#endif
	341	}
	342
	343	static __init void detect_ieee(void)
	344	{
	345	#ifndef CONFIG_64BIT
	346	int rc, tmp;
	347
	348	asm volatile(
	349	" efpc %1,0\n"
	350	"0: la %0,0\n"
	351	"1:\n"
	352	EX_TABLE(0b,1b)
	353	: "=d" (rc), "=d" (tmp): "0" (-EOPNOTSUPP) : "cc");
	354	if (!rc)
	355	machine_flags \|= MACHINE_FLAG_IEEE;
	356	#endif
	357	}
	358
	359	static __init void detect_csp(void)
	360	{
	361	#ifndef CONFIG_64BIT
	362	int rc;
	363
	364	asm volatile(
	365	" la 0,0\n"
	366	" la 1,0\n"
	367	" la 2,4\n"
	368	" csp 0,2\n"
	369	"0: la %0,0\n"
	370	"1:\n"
	371	EX_TABLE(0b,1b)
	372	: "=d" (rc) : "0" (-EOPNOTSUPP) : "cc", "0", "1", "2");
	373	if (!rc)
	374	machine_flags \|= MACHINE_FLAG_CSP;
	375	#endif
	376	}
	377
	378	static __init void detect_diag9c(void)
	379	{
	380	unsigned int cpu_address;
	381	int rc;
	382
	383	cpu_address = stap();
	384	asm volatile(
	385	" diag %2,0,0x9c\n"
	386	"0: la %0,0\n"
	387	"1:\n"
	388	EX_TABLE(0b,1b)
	389	: "=d" (rc) : "0" (-EOPNOTSUPP), "d" (cpu_address) : "cc");
390	if (!rc)
391	machine_flags \|= MACHINE_FLAG_DIAG9C;
392	}
393
394	static __init void detect_diag44(void)
395	{
396	#ifdef CONFIG_64BIT
397	int rc;
398
399	asm volatile(
400	" diag 0,0,0x44\n"
401	"0: la %0,0\n"
402	"1:\n"
403	EX_TABLE(0b,1b)
404	: "=d" (rc) : "0" (-EOPNOTSUPP) : "cc");
405	if (!rc)
406	machine_flags \|= MACHINE_FLAG_DIAG44;
407	#endif
408	}
409
410	static __init void detect_machine_facilities(void)
411	{
412	#ifdef CONFIG_64BIT
413	unsigned int facilities;
414
415	facilities = stfl();
416	if (facilities & (1 << 28))
417	machine_flags \|= MACHINE_FLAG_IDTE;
53492b1d GS	418	if (facilities & (1 << 23))
53492b1d GS	419	machine_flags \|= MACHINE_FLAG_PFMF;
2e5061e4 HC	420	if (facilities & (1 << 4))
	421	machine_flags \|= MACHINE_FLAG_MVCOS;
	422	#endif
	423	}
	424
761cdf6a HC	425	static __init void rescue_initrd(void)
	426	{
	427	#ifdef CONFIG_BLK_DEV_INITRD
	428	/*
	429	* Move the initrd right behind the bss section in case it starts
	430	* within the bss section. So we don't overwrite it when the bss
	431	* section gets cleared.
	432	*/
	433	if (!INITRD_START \|\| !INITRD_SIZE)
	434	return;
	435	if (INITRD_START >= (unsigned long) __bss_stop)
	436	return;
	437	memmove(__bss_stop, (void *) INITRD_START, INITRD_SIZE);
	438	INITRD_START = (unsigned long) __bss_stop;
	439	#endif
	440	}
	441
a0443fbb HB	442	/* Set up boot command line */
	443	static void __init setup_boot_command_line(void)
	444	{
	445	char *parm = NULL;
	446
	447	/* copy arch command line */
	448	strlcpy(boot_command_line, COMMAND_LINE, ARCH_COMMAND_LINE_SIZE);
	449	boot_command_line[ARCH_COMMAND_LINE_SIZE - 1] = 0;
	450
	451	/* append IPL PARM data to the boot command line */
	452	if (MACHINE_IS_VM) {
	453	parm = boot_command_line + strlen(boot_command_line);
	454	*parm++ = ' ';
	455	get_ipl_vmparm(parm);
	456	if (parm[0] == '=')
	457	memmove(boot_command_line, parm + 1, strlen(parm));
	458	}
	459	}
	460
	461
ab14de6c HC	462	/*
	463	* Save ipl parameters, clear bss memory, initialize storage keys
	464	* and create a kernel NSS at startup if the SAVESYS= parm is defined
	465	*/
	466	void __init startup_init(void)
	467	{
05dd2530	468	unsigned long long memsize;
ab14de6c HC	469
ab14de6c HC	470	ipl_save_parameters();
761cdf6a	471	rescue_initrd();
ab14de6c HC	472	clear_bss_section();
	473	init_kernel_storage_key();
	474	lockdep_init();
	475	lockdep_off();
ab14de6c HC	476	sort_main_extable();
ab14de6c HC	477	setup_lowcore_early();
a0443fbb HB	478	detect_machine_type();
	479	ipl_update_parameters();
	480	setup_boot_command_line();
	481	create_kernel_nss();
2e5061e4 HC	482	detect_mvpg();
	483	detect_ieee();
	484	detect_csp();
	485	detect_diag9c();
	486	detect_diag44();
	487	detect_machine_facilities();
53492b1d	488	setup_hpage();
08d07968	489	sclp_read_info_early();
83119ad4	490	sclp_facilities_detect();
ab14de6c	491	memsize = sclp_memory_detect();
05dd2530 HC	492	#ifndef CONFIG_64BIT
	493	/*
	494	* Can't deal with more than 2G in 31 bit addressing mode, so
	495	* limit the value in order to avoid strange side effects.
	496	*/
	497	if (memsize > ADDR2G)
	498	memsize = ADDR2G;
	499	#endif
ab14de6c	500	if (memory_fast_detect() < 0)
05dd2530	501	find_memory_chunks((unsigned long) memsize);
ab14de6c HC	502	lockdep_on();
ab14de6c HC	503	}