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1da177e4 LT |
1 | /* |
2 | * arch/ppc/platforms/85xx/sbc8560.c | |
3 | * | |
4 | * Wind River SBC8560 board specific routines | |
5 | * | |
6 | * Maintainer: Kumar Gala <kumar.gala@freescale.com> | |
7 | * | |
8 | * Copyright 2004 Freescale Semiconductor Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | */ | |
15 | ||
16 | #include <linux/config.h> | |
17 | #include <linux/stddef.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/errno.h> | |
21 | #include <linux/reboot.h> | |
22 | #include <linux/pci.h> | |
23 | #include <linux/kdev_t.h> | |
24 | #include <linux/major.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/irq.h> | |
28 | #include <linux/seq_file.h> | |
29 | #include <linux/root_dev.h> | |
30 | #include <linux/serial.h> | |
31 | #include <linux/tty.h> /* for linux/serial_core.h */ | |
32 | #include <linux/serial_core.h> | |
33 | #include <linux/initrd.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/fsl_devices.h> | |
36 | ||
37 | #include <asm/system.h> | |
38 | #include <asm/pgtable.h> | |
39 | #include <asm/page.h> | |
40 | #include <asm/atomic.h> | |
41 | #include <asm/time.h> | |
42 | #include <asm/io.h> | |
43 | #include <asm/machdep.h> | |
44 | #include <asm/prom.h> | |
45 | #include <asm/open_pic.h> | |
46 | #include <asm/bootinfo.h> | |
47 | #include <asm/pci-bridge.h> | |
48 | #include <asm/mpc85xx.h> | |
49 | #include <asm/irq.h> | |
50 | #include <asm/immap_85xx.h> | |
51 | #include <asm/kgdb.h> | |
52 | #include <asm/ppc_sys.h> | |
53 | #include <mm/mmu_decl.h> | |
54 | ||
55 | #include <syslib/ppc85xx_common.h> | |
56 | #include <syslib/ppc85xx_setup.h> | |
57 | ||
58 | #ifdef CONFIG_SERIAL_8250 | |
59 | static void __init | |
60 | sbc8560_early_serial_map(void) | |
61 | { | |
62 | struct uart_port uart_req; | |
63 | ||
64 | /* Setup serial port access */ | |
65 | memset(&uart_req, 0, sizeof (uart_req)); | |
66 | uart_req.irq = MPC85xx_IRQ_EXT9; | |
67 | uart_req.flags = STD_COM_FLAGS; | |
68 | uart_req.uartclk = BASE_BAUD * 16; | |
69 | uart_req.iotype = SERIAL_IO_MEM; | |
70 | uart_req.mapbase = UARTA_ADDR; | |
71 | uart_req.membase = ioremap(uart_req.mapbase, MPC85xx_UART0_SIZE); | |
72 | uart_req.type = PORT_16650; | |
73 | ||
74 | #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) | |
75 | gen550_init(0, &uart_req); | |
76 | #endif | |
77 | ||
78 | if (early_serial_setup(&uart_req) != 0) | |
79 | printk("Early serial init of port 0 failed\n"); | |
80 | ||
81 | /* Assume early_serial_setup() doesn't modify uart_req */ | |
82 | uart_req.line = 1; | |
83 | uart_req.mapbase = UARTB_ADDR; | |
84 | uart_req.membase = ioremap(uart_req.mapbase, MPC85xx_UART1_SIZE); | |
85 | uart_req.irq = MPC85xx_IRQ_EXT10; | |
86 | ||
87 | #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) | |
88 | gen550_init(1, &uart_req); | |
89 | #endif | |
90 | ||
91 | if (early_serial_setup(&uart_req) != 0) | |
92 | printk("Early serial init of port 1 failed\n"); | |
93 | } | |
94 | #endif | |
95 | ||
96 | /* ************************************************************************ | |
97 | * | |
98 | * Setup the architecture | |
99 | * | |
100 | */ | |
101 | static void __init | |
102 | sbc8560_setup_arch(void) | |
103 | { | |
104 | bd_t *binfo = (bd_t *) __res; | |
105 | unsigned int freq; | |
106 | struct gianfar_platform_data *pdata; | |
107 | ||
108 | /* get the core frequency */ | |
109 | freq = binfo->bi_intfreq; | |
110 | ||
111 | if (ppc_md.progress) | |
112 | ppc_md.progress("sbc8560_setup_arch()", 0); | |
113 | ||
114 | /* Set loops_per_jiffy to a half-way reasonable value, | |
115 | for use until calibrate_delay gets called. */ | |
116 | loops_per_jiffy = freq / HZ; | |
117 | ||
118 | #ifdef CONFIG_PCI | |
119 | /* setup PCI host bridges */ | |
120 | mpc85xx_setup_hose(); | |
121 | #endif | |
122 | #ifdef CONFIG_SERIAL_8250 | |
123 | sbc8560_early_serial_map(); | |
124 | #endif | |
125 | #ifdef CONFIG_SERIAL_TEXT_DEBUG | |
126 | /* Invalidate the entry we stole earlier the serial ports | |
127 | * should be properly mapped */ | |
128 | invalidate_tlbcam_entry(NUM_TLBCAMS - 1); | |
129 | #endif | |
130 | ||
131 | /* setup the board related information for the enet controllers */ | |
132 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | |
133 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | |
134 | pdata->interruptPHY = MPC85xx_IRQ_EXT6; | |
135 | pdata->phyid = 25; | |
136 | /* fixup phy address */ | |
137 | pdata->phy_reg_addr += binfo->bi_immr_base; | |
138 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | |
139 | ||
140 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | |
141 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | |
142 | pdata->interruptPHY = MPC85xx_IRQ_EXT7; | |
143 | pdata->phyid = 26; | |
144 | /* fixup phy address */ | |
145 | pdata->phy_reg_addr += binfo->bi_immr_base; | |
146 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | |
147 | ||
148 | #ifdef CONFIG_BLK_DEV_INITRD | |
149 | if (initrd_start) | |
150 | ROOT_DEV = Root_RAM0; | |
151 | else | |
152 | #endif | |
153 | #ifdef CONFIG_ROOT_NFS | |
154 | ROOT_DEV = Root_NFS; | |
155 | #else | |
156 | ROOT_DEV = Root_HDA1; | |
157 | #endif | |
158 | } | |
159 | ||
160 | /* ************************************************************************ */ | |
161 | void __init | |
162 | platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
163 | unsigned long r6, unsigned long r7) | |
164 | { | |
165 | /* parse_bootinfo must always be called first */ | |
166 | parse_bootinfo(find_bootinfo()); | |
167 | ||
168 | /* | |
169 | * If we were passed in a board information, copy it into the | |
170 | * residual data area. | |
171 | */ | |
172 | if (r3) { | |
173 | memcpy((void *) __res, (void *) (r3 + KERNELBASE), | |
174 | sizeof (bd_t)); | |
175 | } | |
176 | ||
177 | #ifdef CONFIG_SERIAL_TEXT_DEBUG | |
178 | /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */ | |
179 | settlbcam(NUM_TLBCAMS - 1, UARTA_ADDR, | |
180 | UARTA_ADDR, 0x1000, _PAGE_IO, 0); | |
181 | #endif | |
182 | ||
183 | #if defined(CONFIG_BLK_DEV_INITRD) | |
184 | /* | |
185 | * If the init RAM disk has been configured in, and there's a valid | |
186 | * starting address for it, set it up. | |
187 | */ | |
188 | if (r4) { | |
189 | initrd_start = r4 + KERNELBASE; | |
190 | initrd_end = r5 + KERNELBASE; | |
191 | } | |
192 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
193 | ||
194 | /* Copy the kernel command line arguments to a safe place. */ | |
195 | ||
196 | if (r6) { | |
197 | *(char *) (r7 + KERNELBASE) = 0; | |
198 | strcpy(cmd_line, (char *) (r6 + KERNELBASE)); | |
199 | } | |
200 | ||
201 | identify_ppc_sys_by_id(mfspr(SPRN_SVR)); | |
202 | ||
203 | /* setup the PowerPC module struct */ | |
204 | ppc_md.setup_arch = sbc8560_setup_arch; | |
205 | ppc_md.show_cpuinfo = sbc8560_show_cpuinfo; | |
206 | ||
207 | ppc_md.init_IRQ = sbc8560_init_IRQ; | |
208 | ppc_md.get_irq = openpic_get_irq; | |
209 | ||
210 | ppc_md.restart = mpc85xx_restart; | |
211 | ppc_md.power_off = mpc85xx_power_off; | |
212 | ppc_md.halt = mpc85xx_halt; | |
213 | ||
214 | ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory; | |
215 | ||
216 | ppc_md.time_init = NULL; | |
217 | ppc_md.set_rtc_time = NULL; | |
218 | ppc_md.get_rtc_time = NULL; | |
219 | ppc_md.calibrate_decr = mpc85xx_calibrate_decr; | |
220 | ||
221 | #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG) | |
222 | ppc_md.progress = gen550_progress; | |
223 | #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */ | |
224 | ||
225 | if (ppc_md.progress) | |
226 | ppc_md.progress("sbc8560_init(): exit", 0); | |
227 | } |