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[net-next-2.6.git] / arch / powerpc / platforms / pseries / setup.c
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1da177e4 1/*
033ef338 2 * 64-bit pSeries and RS/6000 setup code.
1da177e4
LT
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15/*
16 * bootup setup stuff..
17 */
18
19#undef DEBUG
20
21#include <linux/config.h>
62d60e9f 22#include <linux/cpu.h>
1da177e4
LT
23#include <linux/errno.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/stddef.h>
28#include <linux/unistd.h>
29#include <linux/slab.h>
30#include <linux/user.h>
31#include <linux/a.out.h>
32#include <linux/tty.h>
33#include <linux/major.h>
34#include <linux/interrupt.h>
35#include <linux/reboot.h>
36#include <linux/init.h>
37#include <linux/ioport.h>
38#include <linux/console.h>
39#include <linux/pci.h>
cebb2b15 40#include <linux/utsname.h>
1da177e4
LT
41#include <linux/adb.h>
42#include <linux/module.h>
43#include <linux/delay.h>
44#include <linux/irq.h>
45#include <linux/seq_file.h>
46#include <linux/root_dev.h>
47
48#include <asm/mmu.h>
49#include <asm/processor.h>
50#include <asm/io.h>
51#include <asm/pgtable.h>
52#include <asm/prom.h>
53#include <asm/rtas.h>
54#include <asm/pci-bridge.h>
55#include <asm/iommu.h>
56#include <asm/dma.h>
57#include <asm/machdep.h>
58#include <asm/irq.h>
59#include <asm/time.h>
60#include <asm/nvram.h>
007e8f51 61#include "xics.h"
1ababe11 62#include <asm/firmware.h>
180a3362 63#include <asm/pmc.h>
bbeb3f4c 64#include <asm/mpic.h>
d387899f 65#include <asm/ppc-pci.h>
69a80d3f
PM
66#include <asm/i8259.h>
67#include <asm/udbg.h>
2249ca9d 68#include <asm/smp.h>
1da177e4 69
a1218720
ME
70#include "plpar_wrappers.h"
71
1da177e4
LT
72#ifdef DEBUG
73#define DBG(fmt...) udbg_printf(fmt)
74#else
75#define DBG(fmt...)
76#endif
77
1da177e4
LT
78extern void find_udbg_vterm(void);
79extern void system_reset_fwnmi(void); /* from head.S */
80extern void machine_check_fwnmi(void); /* from head.S */
81extern void generic_find_legacy_serial_ports(u64 *physport,
82 unsigned int *default_speed);
83
84int fwnmi_active; /* TRUE if an FWNMI handler is present */
85
1da177e4
LT
86extern void pSeries_system_reset_exception(struct pt_regs *regs);
87extern int pSeries_machine_check_exception(struct pt_regs *regs);
88
143a1dec
PM
89static void pseries_shared_idle(void);
90static void pseries_dedicated_idle(void);
62d60e9f 91
1da177e4
LT
92struct mpic *pSeries_mpic;
93
0dd194d0 94void pSeries_show_cpuinfo(struct seq_file *m)
1da177e4
LT
95{
96 struct device_node *root;
97 const char *model = "";
98
99 root = of_find_node_by_path("/");
100 if (root)
101 model = get_property(root, "model", NULL);
102 seq_printf(m, "machine\t\t: CHRP %s\n", model);
103 of_node_put(root);
104}
105
106/* Initialize firmware assisted non-maskable interrupts if
107 * the firmware supports this feature.
108 *
109 */
110static void __init fwnmi_init(void)
111{
112 int ret;
113 int ibm_nmi_register = rtas_token("ibm,nmi-register");
114 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
115 return;
116 ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
117 __pa((unsigned long)system_reset_fwnmi),
118 __pa((unsigned long)machine_check_fwnmi));
119 if (ret == 0)
120 fwnmi_active = 1;
121}
122
1da177e4
LT
123static void __init pSeries_init_mpic(void)
124{
125 unsigned int *addrp;
126 struct device_node *np;
f9bd170a 127 unsigned long intack = 0;
1da177e4
LT
128
129 /* All ISUs are setup, complete initialization */
130 mpic_init(pSeries_mpic);
131
132 /* Check what kind of cascade ACK we have */
133 if (!(np = of_find_node_by_name(NULL, "pci"))
134 || !(addrp = (unsigned int *)
135 get_property(np, "8259-interrupt-acknowledge", NULL)))
136 printk(KERN_ERR "Cannot find pci to get ack address\n");
137 else
f9bd170a 138 intack = addrp[prom_n_addr_cells(np)-1];
1da177e4
LT
139 of_node_put(np);
140
141 /* Setup the legacy interrupts & controller */
f9bd170a 142 i8259_init(intack, 0);
1da177e4
LT
143
144 /* Hook cascade to mpic */
f9bd170a 145 mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
1da177e4
LT
146}
147
148static void __init pSeries_setup_mpic(void)
149{
150 unsigned int *opprop;
151 unsigned long openpic_addr = 0;
152 unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
153 struct device_node *root;
154 int irq_count;
155
156 /* Find the Open PIC if present */
157 root = of_find_node_by_path("/");
158 opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
159 if (opprop != 0) {
160 int n = prom_n_addr_cells(root);
161
162 for (openpic_addr = 0; n > 0; --n)
163 openpic_addr = (openpic_addr << 32) + *opprop++;
164 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
165 }
166 of_node_put(root);
167
168 BUG_ON(openpic_addr == 0);
169
170 /* Get the sense values from OF */
171 prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
172
173 /* Setup the openpic driver */
174 irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
175 pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
176 16, 16, irq_count, /* isu size, irq offset, irq count */
177 NR_IRQS - 4, /* ipi offset */
178 senses, irq_count, /* sense & sense size */
179 " MPIC ");
180}
181
180a3362
ME
182static void pseries_lpar_enable_pmcs(void)
183{
184 unsigned long set, reset;
185
186 power4_enable_pmcs();
187
188 set = 1UL << 63;
189 reset = 0;
190 plpar_hcall_norets(H_PERFMON, set, reset);
191
192 /* instruct hypervisor to maintain PMCs */
193 if (firmware_has_feature(FW_FEATURE_SPLPAR))
194 get_paca()->lppaca.pmcregs_in_use = 1;
195}
196
1da177e4
LT
197static void __init pSeries_setup_arch(void)
198{
199 /* Fixup ppc_md depending on the type of interrupt controller */
200 if (ppc64_interrupt_controller == IC_OPEN_PIC) {
fce0d574 201 ppc_md.init_IRQ = pSeries_init_mpic;
1da177e4 202 ppc_md.get_irq = mpic_get_irq;
fce0d574 203 ppc_md.cpu_irq_down = mpic_teardown_this_cpu;
1da177e4
LT
204 /* Allocate the mpic now, so that find_and_init_phbs() can
205 * fill the ISUs */
206 pSeries_setup_mpic();
207 } else {
208 ppc_md.init_IRQ = xics_init_IRQ;
209 ppc_md.get_irq = xics_get_irq;
fce0d574 210 ppc_md.cpu_irq_down = xics_teardown_cpu;
1da177e4
LT
211 }
212
213#ifdef CONFIG_SMP
214 smp_init_pSeries();
215#endif
216 /* openpic global configuration register (64-bit format). */
217 /* openpic Interrupt Source Unit pointer (64-bit format). */
218 /* python0 facility area (mmio) (64-bit format) REAL address. */
219
220 /* init to some ~sane value until calibrate_delay() runs */
221 loops_per_jiffy = 50000000;
222
223 if (ROOT_DEV == 0) {
224 printk("No ramdisk, default root is /dev/sda2\n");
225 ROOT_DEV = Root_SDA2;
226 }
227
228 fwnmi_init();
229
230 /* Find and initialize PCI host bridges */
231 init_pci_config_tokens();
1da177e4 232 find_and_init_phbs();
0160f53e 233 eeh_init();
1da177e4 234
1da177e4
LT
235 pSeries_nvram_init();
236
62d60e9f 237 /* Choose an idle loop */
1ababe11 238 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
8d15a3e5 239 vpa_init(boot_cpuid);
62d60e9f
ME
240 if (get_paca()->lppaca.shared_proc) {
241 printk(KERN_INFO "Using shared processor idle loop\n");
050a0938 242 ppc_md.idle_loop = pseries_shared_idle;
62d60e9f
ME
243 } else {
244 printk(KERN_INFO "Using dedicated idle loop\n");
050a0938 245 ppc_md.idle_loop = pseries_dedicated_idle;
62d60e9f
ME
246 }
247 } else {
248 printk(KERN_INFO "Using default idle loop\n");
249 ppc_md.idle_loop = default_idle;
250 }
180a3362
ME
251
252 if (systemcfg->platform & PLATFORM_LPAR)
253 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
254 else
255 ppc_md.enable_pmcs = power4_enable_pmcs;
1da177e4
LT
256}
257
258static int __init pSeries_init_panel(void)
259{
260 /* Manually leave the kernel version on the panel. */
261 ppc_md.progress("Linux ppc64\n", 0);
cebb2b15 262 ppc_md.progress(system_utsname.version, 0);
1da177e4
LT
263
264 return 0;
265}
266arch_initcall(pSeries_init_panel);
267
268
7a6af5e3 269/* Build up the ppc64_firmware_features bitmask field
1da177e4
LT
270 * using contents of device-tree/ibm,hypertas-functions.
271 * Ultimately this functionality may be moved into prom.c prom_init().
272 */
aed31351 273static void __init fw_feature_init(void)
1da177e4
LT
274{
275 struct device_node * dn;
276 char * hypertas;
277 unsigned int len;
278
279 DBG(" -> fw_feature_init()\n");
280
7a6af5e3 281 ppc64_firmware_features = 0;
1da177e4
LT
282 dn = of_find_node_by_path("/rtas");
283 if (dn == NULL) {
284 printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
285 goto no_rtas;
286 }
287
288 hypertas = get_property(dn, "ibm,hypertas-functions", &len);
289 if (hypertas) {
290 while (len > 0){
291 int i, hypertas_len;
292 /* check value against table of strings */
293 for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
294 if ((firmware_features_table[i].name) &&
295 (strcmp(firmware_features_table[i].name,hypertas))==0) {
296 /* we have a match */
7a6af5e3 297 ppc64_firmware_features |=
1da177e4
LT
298 (firmware_features_table[i].val);
299 break;
300 }
301 }
302 hypertas_len = strlen(hypertas);
303 len -= hypertas_len +1;
304 hypertas+= hypertas_len +1;
305 }
306 }
307
308 of_node_put(dn);
309 no_rtas:
310 printk(KERN_INFO "firmware_features = 0x%lx\n",
7a6af5e3 311 ppc64_firmware_features);
1da177e4
LT
312
313 DBG(" <- fw_feature_init()\n");
314}
315
316
317static void __init pSeries_discover_pic(void)
318{
319 struct device_node *np;
320 char *typep;
321
322 /*
323 * Setup interrupt mapping options that are needed for finish_device_tree
324 * to properly parse the OF interrupt tree & do the virtual irq mapping
325 */
326 __irq_offset_value = NUM_ISA_INTERRUPTS;
327 ppc64_interrupt_controller = IC_INVALID;
328 for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
329 typep = (char *)get_property(np, "compatible", NULL);
330 if (strstr(typep, "open-pic"))
331 ppc64_interrupt_controller = IC_OPEN_PIC;
332 else if (strstr(typep, "ppc-xicp"))
333 ppc64_interrupt_controller = IC_PPC_XIC;
334 else
335 printk("pSeries_discover_pic: failed to recognize"
336 " interrupt-controller\n");
337 break;
338 }
339}
340
341static void pSeries_mach_cpu_die(void)
342{
343 local_irq_disable();
344 idle_task_exit();
345 /* Some hardware requires clearing the CPPR, while other hardware does not
346 * it is safe either way
347 */
348 pSeriesLP_cppr_info(0, 0);
349 rtas_stop_self();
350 /* Should never get here... */
351 BUG();
352 for(;;);
353}
354
cab0af98
ME
355static int pseries_set_dabr(unsigned long dabr)
356{
76032de8 357 return plpar_hcall_norets(H_SET_DABR, dabr);
cab0af98
ME
358}
359
76032de8
ME
360static int pseries_set_xdabr(unsigned long dabr)
361{
362 /* We want to catch accesses from kernel and userspace */
363 return plpar_hcall_norets(H_SET_XDABR, dabr,
364 H_DABRX_KERNEL | H_DABRX_USER);
365}
1da177e4
LT
366
367/*
368 * Early initialization. Relocation is on but do not reference unbolted pages
369 */
370static void __init pSeries_init_early(void)
371{
372 void *comport;
373 int iommu_off = 0;
374 unsigned int default_speed;
375 u64 physport;
376
377 DBG(" -> pSeries_init_early()\n");
378
379 fw_feature_init();
380
381 if (systemcfg->platform & PLATFORM_LPAR)
382 hpte_init_lpar();
383 else {
384 hpte_init_native();
385 iommu_off = (of_chosen &&
386 get_property(of_chosen, "linux,iommu-off", NULL));
387 }
388
389 generic_find_legacy_serial_ports(&physport, &default_speed);
390
391 if (systemcfg->platform & PLATFORM_LPAR)
392 find_udbg_vterm();
393 else if (physport) {
394 /* Map the uart for udbg. */
dfbacdc1 395 comport = (void *)ioremap(physport, 16);
1da177e4
LT
396 udbg_init_uart(comport, default_speed);
397
1da177e4
LT
398 DBG("Hello World !\n");
399 }
400
76032de8 401 if (firmware_has_feature(FW_FEATURE_DABR))
cab0af98 402 ppc_md.set_dabr = pseries_set_dabr;
76032de8
ME
403 else if (firmware_has_feature(FW_FEATURE_XDABR))
404 ppc_md.set_dabr = pseries_set_xdabr;
1da177e4
LT
405
406 iommu_init_early_pSeries();
407
408 pSeries_discover_pic();
409
410 DBG(" <- pSeries_init_early()\n");
411}
412
413
1da177e4
LT
414static int pSeries_check_legacy_ioport(unsigned int baseport)
415{
416 struct device_node *np;
417
418#define I8042_DATA_REG 0x60
419#define FDC_BASE 0x3f0
420
421
422 switch(baseport) {
423 case I8042_DATA_REG:
424 np = of_find_node_by_type(NULL, "8042");
425 if (np == NULL)
426 return -ENODEV;
427 of_node_put(np);
428 break;
429 case FDC_BASE:
430 np = of_find_node_by_type(NULL, "fdc");
431 if (np == NULL)
432 return -ENODEV;
433 of_node_put(np);
434 break;
435 }
436 return 0;
437}
438
439/*
440 * Called very early, MMU is off, device-tree isn't unflattened
441 */
442extern struct machdep_calls pSeries_md;
443
444static int __init pSeries_probe(int platform)
445{
446 if (platform != PLATFORM_PSERIES &&
447 platform != PLATFORM_PSERIES_LPAR)
448 return 0;
449
450 /* if we have some ppc_md fixups for LPAR to do, do
451 * it here ...
452 */
453
454 return 1;
455}
456
c66d5dd6
ME
457DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
458
050a0938
AB
459static inline void dedicated_idle_sleep(unsigned int cpu)
460{
461 struct paca_struct *ppaca = &paca[cpu ^ 1];
462
463 /* Only sleep if the other thread is not idle */
464 if (!(ppaca->lppaca.idle)) {
465 local_irq_disable();
466
467 /*
468 * We are about to sleep the thread and so wont be polling any
469 * more.
470 */
471 clear_thread_flag(TIF_POLLING_NRFLAG);
472
473 /*
474 * SMT dynamic mode. Cede will result in this thread going
475 * dormant, if the partner thread is still doing work. Thread
476 * wakes up if partner goes idle, an interrupt is presented, or
477 * a prod occurs. Returning from the cede enables external
478 * interrupts.
479 */
480 if (!need_resched())
481 cede_processor();
482 else
483 local_irq_enable();
484 } else {
485 /*
486 * Give the HV an opportunity at the processor, since we are
487 * not doing any work.
488 */
489 poll_pending();
490 }
491}
492
143a1dec
PM
493static void pseries_dedicated_idle(void)
494{
c66d5dd6 495 long oldval;
050a0938
AB
496 struct paca_struct *lpaca = get_paca();
497 unsigned int cpu = smp_processor_id();
c66d5dd6
ME
498 unsigned long start_snooze;
499 unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
c66d5dd6
ME
500
501 while (1) {
502 /*
503 * Indicate to the HV that we are idle. Now would be
504 * a good time to find other work to dispatch.
505 */
506 lpaca->lppaca.idle = 1;
507
508 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
509 if (!oldval) {
510 set_thread_flag(TIF_POLLING_NRFLAG);
050a0938 511
c66d5dd6
ME
512 start_snooze = __get_tb() +
513 *smt_snooze_delay * tb_ticks_per_usec;
050a0938 514
c66d5dd6 515 while (!need_resched() && !cpu_is_offline(cpu)) {
050a0938
AB
516 ppc64_runlatch_off();
517
c66d5dd6
ME
518 /*
519 * Go into low thread priority and possibly
520 * low power mode.
521 */
522 HMT_low();
523 HMT_very_low();
524
050a0938
AB
525 if (*smt_snooze_delay != 0 &&
526 __get_tb() > start_snooze) {
527 HMT_medium();
528 dedicated_idle_sleep(cpu);
c66d5dd6 529 }
050a0938 530
c66d5dd6
ME
531 }
532
050a0938 533 HMT_medium();
c66d5dd6
ME
534 clear_thread_flag(TIF_POLLING_NRFLAG);
535 } else {
536 set_need_resched();
537 }
538
c66d5dd6 539 lpaca->lppaca.idle = 0;
050a0938
AB
540 ppc64_runlatch_on();
541
5bfb5d69 542 preempt_enable_no_resched();
c66d5dd6 543 schedule();
5bfb5d69 544 preempt_disable();
050a0938 545
c66d5dd6
ME
546 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
547 cpu_die();
548 }
c66d5dd6
ME
549}
550
143a1dec 551static void pseries_shared_idle(void)
c66d5dd6
ME
552{
553 struct paca_struct *lpaca = get_paca();
554 unsigned int cpu = smp_processor_id();
555
556 while (1) {
557 /*
558 * Indicate to the HV that we are idle. Now would be
559 * a good time to find other work to dispatch.
560 */
561 lpaca->lppaca.idle = 1;
562
563 while (!need_resched() && !cpu_is_offline(cpu)) {
564 local_irq_disable();
050a0938 565 ppc64_runlatch_off();
c66d5dd6
ME
566
567 /*
568 * Yield the processor to the hypervisor. We return if
569 * an external interrupt occurs (which are driven prior
570 * to returning here) or if a prod occurs from another
571 * processor. When returning here, external interrupts
572 * are enabled.
573 *
574 * Check need_resched() again with interrupts disabled
575 * to avoid a race.
576 */
577 if (!need_resched())
578 cede_processor();
579 else
580 local_irq_enable();
050a0938
AB
581
582 HMT_medium();
c66d5dd6
ME
583 }
584
c66d5dd6 585 lpaca->lppaca.idle = 0;
050a0938
AB
586 ppc64_runlatch_on();
587
5bfb5d69 588 preempt_enable_no_resched();
c66d5dd6 589 schedule();
5bfb5d69 590 preempt_disable();
050a0938
AB
591
592 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
c66d5dd6
ME
593 cpu_die();
594 }
c66d5dd6
ME
595}
596
4267292b
PM
597static int pSeries_pci_probe_mode(struct pci_bus *bus)
598{
599 if (systemcfg->platform & PLATFORM_LPAR)
600 return PCI_PROBE_DEVTREE;
601 return PCI_PROBE_NORMAL;
602}
603
1da177e4
LT
604struct machdep_calls __initdata pSeries_md = {
605 .probe = pSeries_probe,
606 .setup_arch = pSeries_setup_arch,
607 .init_early = pSeries_init_early,
0dd194d0 608 .show_cpuinfo = pSeries_show_cpuinfo,
1da177e4
LT
609 .log_error = pSeries_log_error,
610 .pcibios_fixup = pSeries_final_fixup,
4267292b 611 .pci_probe_mode = pSeries_pci_probe_mode,
dad32bbf 612 .irq_bus_setup = pSeries_irq_bus_setup,
f4fcbbe9
PM
613 .restart = rtas_restart,
614 .power_off = rtas_power_off,
615 .halt = rtas_halt,
1da177e4
LT
616 .panic = rtas_os_term,
617 .cpu_die = pSeries_mach_cpu_die,
773bf9c4
AB
618 .get_boot_time = rtas_get_boot_time,
619 .get_rtc_time = rtas_get_rtc_time,
620 .set_rtc_time = rtas_set_rtc_time,
10f7e7c1 621 .calibrate_decr = generic_calibrate_decr,
6566c6f1 622 .progress = rtas_progress,
1da177e4
LT
623 .check_legacy_ioport = pSeries_check_legacy_ioport,
624 .system_reset_exception = pSeries_system_reset_exception,
625 .machine_check_exception = pSeries_machine_check_exception,
626};